mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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215113ab9c
rk3576 is using DWC PCIe controller, with msi interrupt directly to GIC instead of using GIC ITS, so - no ITS support is required and the 'msi-map' is not required, - a new 'msi' interrupt is needed. Co-developed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> [mani: changed 'its' to 'ITS' in the binding, spelling mistake fix] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20250414145110.11275-2-kever.yang@rock-chips.com
133 lines
3.6 KiB
YAML
133 lines
3.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-common.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: DesignWare based PCIe RC/EP controller on Rockchip SoCs
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maintainers:
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- Shawn Lin <shawn.lin@rock-chips.com>
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- Simon Xue <xxm@rock-chips.com>
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- Heiko Stuebner <heiko@sntech.de>
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description: |+
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Generic properties for the DesignWare based PCIe RC/EP controller on Rockchip
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SoCs.
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properties:
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clocks:
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minItems: 5
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items:
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- description: AHB clock for PCIe master
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- description: AHB clock for PCIe slave
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- description: AHB clock for PCIe dbi
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- description: APB clock for PCIe
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- description: Auxiliary clock for PCIe
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- description: PIPE clock
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- description: Reference clock for PCIe
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clock-names:
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minItems: 5
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items:
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- const: aclk_mst
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- const: aclk_slv
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- const: aclk_dbi
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- const: pclk
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- const: aux
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- const: pipe
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- const: ref
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interrupts:
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minItems: 5
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items:
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- description:
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Combined system interrupt, which is used to signal the following
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interrupts - phy_link_up, dll_link_up, link_req_rst_not, hp_pme,
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hp, hp_msi, link_auto_bw, link_auto_bw_msi, bw_mgt, bw_mgt_msi,
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edma_wr, edma_rd, dpa_sub_upd, rbar_update, link_eq_req, ep_elbi_app
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- description:
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Combined PM interrupt, which is used to signal the following
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interrupts - linkst_in_l1sub, linkst_in_l1, linkst_in_l2,
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linkst_in_l0s, linkst_out_l1sub, linkst_out_l1, linkst_out_l2,
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linkst_out_l0s, pm_dstate_update
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- description:
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Combined message interrupt, which is used to signal the following
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interrupts - ven_msg, unlock_msg, ltr_msg, cfg_pme, cfg_pme_msi,
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pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active
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- description:
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Combined legacy interrupt, which is used to signal the following
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interrupts - inta, intb, intc, intd, tx_inta, tx_intb, tx_intc,
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tx_intd
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- description:
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Combined error interrupt, which is used to signal the following
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interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout,
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tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx,
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nf_err_rx, f_err_rx, radm_qoverflow
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- description:
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If the matching interrupt name is "msi", then this is the combined
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MSI line interrupt, which is to support MSI interrupts output to GIC
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controller via GIC SPI interrupt instead of GIC ITS interrupt.
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If the matching interrupt name is "dma0", then this is the eDMA write
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channel 0 interrupt.
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- description:
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eDMA write channel 1 interrupt
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- description:
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eDMA read channel 0 interrupt
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- description:
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eDMA read channel 1 interrupt
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interrupt-names:
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minItems: 5
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items:
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- const: sys
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- const: pmc
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- const: msg
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- const: legacy
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- const: err
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- enum:
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- msi
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- dma0
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- const: dma1
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- const: dma2
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- const: dma3
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num-lanes: true
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phys:
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maxItems: 1
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phy-names:
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const: pcie-phy
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power-domains:
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maxItems: 1
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resets:
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minItems: 1
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maxItems: 2
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reset-names:
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oneOf:
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- const: pipe
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- items:
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- const: pwr
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- const: pipe
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required:
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- compatible
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- reg
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- reg-names
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- clocks
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- clock-names
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- num-lanes
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- phys
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- phy-names
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- power-domains
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- resets
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- reset-names
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additionalProperties: true
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...
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