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e329b762a3
The PCI host controller on PolarFire SoC has multiple Root Port instances,
each with their own bridge and ctrl address spaces. The original binding
has an "apb" register region, and it is expected to be set to the base
address of the Root Complex register space. Some defines in the Linux
driver were used to compute the addresses of the bridge and ctrl address
ranges corresponding to Root Port instance 1. Some customers want to use
Root Port instance 2 however, which requires changing the defines in the
driver, which is clearly not a portable solution.
Remove this "apb" register region from the binding and add "bridge" &
"ctrl" regions instead, that will directly communicate the address of these
regions for a specific Root Port.
Fixes: 6ee6c89aac ("dt-bindings: PCI: microchip: Add Microchip PolarFire host binding")
Link: https://lore.kernel.org/r/20241107-barcode-whinny-b1a4e8834b4f@spud
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[bhelgaas: Capitalize PCIe spec terms]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Daire McNamara <daire.mcnamara@microchip.com>
82 lines
1.5 KiB
YAML
82 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/plda,xpressrich3-axi-common.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: PLDA XpressRICH PCIe host common properties
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maintainers:
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- Daire McNamara <daire.mcnamara@microchip.com>
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- Kevin Xie <kevin.xie@starfivetech.com>
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description:
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Generic PLDA XpressRICH PCIe host common properties.
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allOf:
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- $ref: /schemas/pci/pci-host-bridge.yaml#
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properties:
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reg:
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maxItems: 3
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minItems: 2
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reg-names:
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oneOf:
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- items:
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- const: cfg
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- const: apb
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- items:
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- const: cfg
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- const: bridge
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- const: ctrl
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interrupts:
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minItems: 1
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items:
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- description: PCIe host controller
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- description: builtin MSI controller
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interrupt-names:
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minItems: 1
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items:
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- const: pcie
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- const: msi
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msi-controller:
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description: Identifies the node as an MSI controller.
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msi-parent:
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description: MSI controller the device is capable of using.
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interrupt-controller:
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type: object
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properties:
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'#address-cells':
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const: 0
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'#interrupt-cells':
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const: 1
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interrupt-controller: true
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required:
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- '#address-cells'
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- '#interrupt-cells'
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- interrupt-controller
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additionalProperties: false
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required:
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- reg
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- reg-names
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- interrupts
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- msi-controller
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- "#interrupt-cells"
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- interrupt-map-mask
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- interrupt-map
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additionalProperties: true
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...
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