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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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9e71c41469
Convert the Marvell Armada 3700 PCIe binding to DT schema format. The 'clocks' property was missing and has been added. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/20250710180811.2970846-1-robh@kernel.org
100 lines
2.2 KiB
YAML
100 lines
2.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/marvell,armada-3700-pcie.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Marvell Armada 3700 (Aardvark) PCIe Controller
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maintainers:
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- Thomas Petazzoni <thomas.petazzoni@bootlin.com>
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- Pali Rohár <pali@kernel.org>
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allOf:
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- $ref: /schemas/pci/pci-host-bridge.yaml#
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properties:
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compatible:
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const: marvell,armada-3700-pcie
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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interrupts:
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maxItems: 1
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msi-controller: true
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msi-parent:
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maxItems: 1
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phys:
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maxItems: 1
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reset-gpios:
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description: PCIe reset GPIO signals.
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interrupt-controller:
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type: object
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additionalProperties: false
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properties:
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interrupt-controller: true
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'#interrupt-cells':
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const: 1
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required:
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- interrupt-controller
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- '#interrupt-cells'
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required:
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- compatible
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- reg
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- interrupts
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- '#interrupt-cells'
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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pcie@d0070000 {
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compatible = "marvell,armada-3700-pcie";
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device_type = "pci";
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reg = <0 0xd0070000 0 0x20000>;
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x00 0xff>;
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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msi-controller;
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msi-parent = <&pcie0>;
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ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x1000000>,
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<0x81000000 0 0xe9000000 0 0xe9000000 0 0x10000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie_intc 0>,
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<0 0 0 2 &pcie_intc 1>,
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<0 0 0 3 &pcie_intc 2>,
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<0 0 0 4 &pcie_intc 3>;
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phys = <&comphy1 0>;
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max-link-speed = <2>;
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reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
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pcie_intc: interrupt-controller {
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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};
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