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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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1f6c389983
Add FSD Ethernet compatible in Synopsys dt-bindings document. Add FSD Ethernet YAML schema to enable the DT validation. Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: Ravi Patel <ravi.patel@samsung.com> Signed-off-by: Swathi K S <swathi.ks@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250305091246.106626-2-swathi.ks@samsung.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
119 lines
3.3 KiB
YAML
119 lines
3.3 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/tesla,fsd-ethqos.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: FSD Ethernet Quality of Service
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maintainers:
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- Swathi K S <swathi.ks@samsung.com>
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description:
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Tesla ethernet devices based on dwmmac support Gigabit ethernet.
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allOf:
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- $ref: snps,dwmac.yaml#
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properties:
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compatible:
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const: tesla,fsd-ethqos
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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interrupt-names:
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items:
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- const: macirq
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clocks:
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minItems: 5
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items:
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- description: PTP clock
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- description: Master bus clock
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- description: Slave bus clock
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- description: MAC TX clock
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- description: MAC RX clock
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- description: Master2 bus clock
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- description: Slave2 bus clock
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- description: RX MUX clock
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- description: PHY RX clock
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- description: PERIC RGMII clock
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clock-names:
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minItems: 5
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items:
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- const: ptp_ref
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- const: master_bus
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- const: slave_bus
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- const: tx
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- const: rx
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- const: master2_bus
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- const: slave2_bus
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- const: eqos_rxclk_mux
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- const: eqos_phyrxclk
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- const: dout_peric_rgmii_clk
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iommus:
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maxItems: 1
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phy-mode:
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enum:
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- rgmii
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- rgmii-id
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- rgmii-rxid
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- rgmii-txid
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- iommus
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- phy-mode
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/fsd-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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ethernet1: ethernet@14300000 {
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compatible = "tesla,fsd-ethqos";
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reg = <0x0 0x14300000 0x0 0x10000>;
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interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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clocks = <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_PTP_REF_I>,
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<&clock_peric PERIC_EQOS_TOP_IPCLKPORT_ACLK_I>,
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<&clock_peric PERIC_EQOS_TOP_IPCLKPORT_HCLK_I>,
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<&clock_peric PERIC_EQOS_TOP_IPCLKPORT_RGMII_CLK_I>,
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<&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_RX_I>,
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<&clock_peric PERIC_BUS_D_PERIC_IPCLKPORT_EQOSCLK>,
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<&clock_peric PERIC_BUS_P_PERIC_IPCLKPORT_EQOSCLK>,
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<&clock_peric PERIC_EQOS_PHYRXCLK_MUX>,
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<&clock_peric PERIC_EQOS_PHYRXCLK>,
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<&clock_peric PERIC_DOUT_RGMII_CLK>;
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clock-names = "ptp_ref", "master_bus", "slave_bus","tx",
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"rx", "master2_bus", "slave2_bus", "eqos_rxclk_mux",
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"eqos_phyrxclk","dout_peric_rgmii_clk";
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assigned-clocks = <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>,
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<&clock_peric PERIC_EQOS_PHYRXCLK>;
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assigned-clock-parents = <&clock_peric PERIC_EQOS_PHYRXCLK>;
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pinctrl-names = "default";
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pinctrl-0 = <ð1_tx_clk>, <ð1_tx_data>, <ð1_tx_ctrl>,
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<ð1_phy_intr>, <ð1_rx_clk>, <ð1_rx_data>,
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<ð1_rx_ctrl>, <ð1_mdio>;
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iommus = <&smmu_peric 0x0 0x1>;
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phy-mode = "rgmii-id";
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};
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};
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...
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