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Add dtschema for the MDIO controller found in the RTL9300 Ethernet switch. The controller is slightly unusual in that direct MDIO communication is not possible. We model the MDIO controller with the MDIO buses as child nodes and the PHYs as children of the buses. The mapping of switch port number to MDIO bus/addr requires the ethernet-ports sibling to provide the mapping via the phy-handle property. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250218195216.1034220-4-chris.packham@alliedtelesis.co.nz Signed-off-by: Jakub Kicinski <kuba@kernel.org>
176 lines
3.6 KiB
YAML
176 lines
3.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/realtek,rtl9301-switch.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Realtek Switch with Internal CPU
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maintainers:
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- Chris Packham <chris.packham@alliedtelesis.co.nz>
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description:
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The RTL9300 is a series of is an Ethernet switches with an integrated CPU. A
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number of different peripherals are accessed through a common register block,
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represented here as a syscon node.
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$ref: ethernet-switch.yaml#/$defs/ethernet-ports
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properties:
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compatible:
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items:
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- enum:
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- realtek,rtl9301-switch
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- realtek,rtl9302b-switch
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- realtek,rtl9302c-switch
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- realtek,rtl9303-switch
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- const: syscon
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- const: simple-mfd
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reg:
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maxItems: 1
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interrupts:
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maxItems: 2
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interrupt-names:
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items:
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- const: switch
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- const: nic
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'#address-cells':
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const: 1
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'#size-cells':
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const: 1
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ethernet-ports:
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type: object
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patternProperties:
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'reboot@[0-9a-f]+$':
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$ref: /schemas/power/reset/syscon-reboot.yaml#
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'i2c@[0-9a-f]+$':
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$ref: /schemas/i2c/realtek,rtl9301-i2c.yaml#
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'mdio-controller@[0-9a-f]+$':
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$ref: realtek,rtl9301-mdio.yaml#
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-names
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additionalProperties: false
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examples:
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- |
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ethernet-switch@1b000000 {
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compatible = "realtek,rtl9301-switch", "syscon", "simple-mfd";
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reg = <0x1b000000 0x10000>;
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interrupt-parent = <&intc>;
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interrupts = <23>, <24>;
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interrupt-names = "switch", "nic";
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#address-cells = <1>;
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#size-cells = <1>;
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reboot@c {
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compatible = "syscon-reboot";
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reg = <0x0c 0x4>;
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value = <0x01>;
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};
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i2c@36c {
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compatible = "realtek,rtl9301-i2c";
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reg = <0x36c 0x14>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio@20 {
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compatible = "nxp,pca9555";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x20>;
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};
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};
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i2c@2 {
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reg = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio@20 {
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compatible = "nxp,pca9555";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x20>;
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};
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};
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};
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i2c@388 {
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compatible = "realtek,rtl9301-i2c";
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reg = <0x388 0x14>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@7 {
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reg = <7>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio@20 {
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compatible = "nxp,pca9555";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x20>;
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};
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};
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};
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mdio-controller@ca00 {
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compatible = "realtek,rtl9301-mdio";
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reg = <0xca00 0x200>;
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#address-cells = <1>;
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#size-cells = <0>;
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mdio-bus@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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phy1: ethernet-phy@0 {
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reg = <0>;
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};
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};
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mdio-bus@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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phy2: ethernet-phy@0 {
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reg = <0>;
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};
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};
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};
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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phy-handle = <&phy1>;
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};
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port@1 {
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reg = <1>;
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phy-handle = <&phy2>;
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};
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};
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};
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