linux-loongson/Documentation/devicetree/bindings/net/fsl,enetc.yaml
Wei Fang db2fb74c85 dt-bindings: net: add i.MX95 ENETC support
The ENETC of i.MX95 has been upgraded to revision 4.1, and the vendor
ID and device ID have also changed, so add the new compatible strings
for i.MX95 ENETC. In addition, i.MX95 supports configuration of RGMII
or RMII reference clock.

Signed-off-by: Wei Fang <wei.fang@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-04 10:03:50 +00:00

89 lines
2.0 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/fsl,enetc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: The NIC functionality of NXP NETC
description:
The NIC functionality in NETC is known as EtherNET Controller (ENETC). ENETC
supports virtualization/isolation based on PCIe Single Root IO Virtualization
(SR-IOV), advanced QoS with 8 traffic classes and 4 drop resilience levels,
and a full range of TSN standards and NIC offload capabilities
maintainers:
- Frank Li <Frank.Li@nxp.com>
- Vladimir Oltean <vladimir.oltean@nxp.com>
- Wei Fang <wei.fang@nxp.com>
- Claudiu Manoil <claudiu.manoil@nxp.com>
properties:
compatible:
oneOf:
- items:
- enum:
- pci1957,e100
- const: fsl,enetc
- enum:
- pci1131,e101
reg:
maxItems: 1
clocks:
items:
- description: MAC transmit/receive reference clock
clock-names:
items:
- const: ref
mdio:
$ref: mdio.yaml
unevaluatedProperties: false
description: Optional child node for ENETC instance, otherwise use NETC EMDIO.
required:
- compatible
- reg
allOf:
- $ref: /schemas/pci/pci-device.yaml
- $ref: ethernet-controller.yaml
- if:
not:
properties:
compatible:
contains:
enum:
- pci1131,e101
then:
properties:
clocks: false
clock-names: false
unevaluatedProperties: false
examples:
- |
pcie {
#address-cells = <3>;
#size-cells = <2>;
ethernet@0,0 {
compatible = "pci1957,e100", "fsl,enetc";
reg = <0x000000 0 0 0 0>;
phy-handle = <&sgmii_phy0>;
phy-connection-type = "sgmii";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy@2 {
reg = <0x2>;
};
};
};
};