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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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266f7a0f81
This patch adds the NPU document binding for EN7581 SoC. The Airoha Network Processor Unit (NPU) provides a configuration interface to implement wired and wireless hardware flow offloading programming Packet Processor Engine (PPE) flow table. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
85 lines
2.5 KiB
YAML
85 lines
2.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/airoha,en7581-npu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Airoha Network Processor Unit for EN7581 SoC
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maintainers:
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- Lorenzo Bianconi <lorenzo@kernel.org>
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description:
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The Airoha Network Processor Unit (NPU) provides a configuration interface
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to implement wired and wireless hardware flow offloading programming Packet
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Processor Engine (PPE) flow table.
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properties:
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compatible:
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enum:
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- airoha,en7581-npu
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: mbox host irq line
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- description: watchdog0 irq line
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- description: watchdog1 irq line
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- description: watchdog2 irq line
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- description: watchdog3 irq line
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- description: watchdog4 irq line
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- description: watchdog5 irq line
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- description: watchdog6 irq line
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- description: watchdog7 irq line
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- description: wlan irq line0
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- description: wlan irq line1
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- description: wlan irq line2
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- description: wlan irq line3
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- description: wlan irq line4
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- description: wlan irq line5
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memory-region:
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maxItems: 1
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description:
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Memory used to store NPU firmware binary.
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required:
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- compatible
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- reg
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- interrupts
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- memory-region
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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npu@1e900000 {
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compatible = "airoha,en7581-npu";
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reg = <0 0x1e900000 0 0x313000>;
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interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
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memory-region = <&npu_binary>;
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};
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};
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