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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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2d13b45f80
Introduce memory-region and memory-region-names properties for the ethernet node available on EN7581 SoC in order to reserve system memory for hw forwarding buffers queue used by the QDMA modules. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250521-airopha-desc-sram-v3-1-a6e9b085b4f0@kernel.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
167 lines
4.0 KiB
YAML
167 lines
4.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/airoha,en7581-eth.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Airoha EN7581 Frame Engine Ethernet controller
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maintainers:
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- Lorenzo Bianconi <lorenzo@kernel.org>
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description:
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The frame engine ethernet controller can be found on Airoha SoCs.
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These SoCs have multi-GMAC ports.
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properties:
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compatible:
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enum:
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- airoha,en7581-eth
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reg:
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items:
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- description: Frame engine base address
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- description: QDMA0 base address
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- description: QDMA1 base address
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reg-names:
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items:
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- const: fe
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- const: qdma0
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- const: qdma1
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interrupts:
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items:
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- description: QDMA lan irq0
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- description: QDMA lan irq1
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- description: QDMA lan irq2
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- description: QDMA lan irq3
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- description: QDMA wan irq0
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- description: QDMA wan irq1
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- description: QDMA wan irq2
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- description: QDMA wan irq3
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- description: FE error irq
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- description: PDMA irq
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resets:
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maxItems: 8
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reset-names:
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items:
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- const: fe
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- const: pdma
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- const: qdma
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- const: xsi-mac
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- const: hsi0-mac
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- const: hsi1-mac
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- const: hsi-mac
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- const: xfp-mac
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memory-region:
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items:
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- description: QDMA0 buffer memory
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- description: QDMA1 buffer memory
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memory-region-names:
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items:
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- const: qdma0-buf
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- const: qdma1-buf
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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airoha,npu:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to the node used to configure the NPU module.
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The Airoha Network Processor Unit (NPU) provides a configuration
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interface to implement hardware flow offloading programming Packet
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Processor Engine (PPE) flow table.
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patternProperties:
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"^ethernet@[1-4]$":
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type: object
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unevaluatedProperties: false
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$ref: ethernet-controller.yaml#
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description:
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Ethernet GMAC port associated to the MAC controller
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properties:
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compatible:
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const: airoha,eth-mac
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reg:
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minimum: 1
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maximum: 4
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description: GMAC port identifier
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required:
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- reg
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- compatible
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required:
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- compatible
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- reg
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- interrupts
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- resets
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- reset-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/en7523-clk.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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eth: ethernet@1fb50000 {
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compatible = "airoha,en7581-eth";
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reg = <0 0x1fb50000 0 0x2600>,
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<0 0x1fb54000 0 0x2000>,
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<0 0x1fb56000 0 0x2000>;
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reg-names = "fe", "qdma0", "qdma1";
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resets = <&scuclk 44>,
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<&scuclk 30>,
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<&scuclk 31>,
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<&scuclk 6>,
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<&scuclk 15>,
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<&scuclk 16>,
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<&scuclk 17>,
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<&scuclk 26>;
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reset-names = "fe", "pdma", "qdma", "xsi-mac",
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"hsi0-mac", "hsi1-mac", "hsi-mac",
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"xfp-mac";
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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memory-region = <&qdma0_buf>, <&qdma1_buf>;
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memory-region-names = "qdma0-buf", "qdma1-buf";
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airoha,npu = <&npu>;
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#address-cells = <1>;
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#size-cells = <0>;
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mac: ethernet@1 {
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compatible = "airoha,eth-mac";
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reg = <1>;
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};
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};
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};
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