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The Devicetree bindings document does not have to say in the title that it is a "binding", but instead just describe the hardware. Drop trailing "bindings" in various forms (also with trailing full stop): find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [bB]indings\?\.\?$/title: \1/' {} \; Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> # ROHM Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media Acked-by: Sebastian Reichel <sre@kernel.org> # power Acked-by: Viresh Kumar <viresh.kumar@linaro.org> # cpufreq Link: https://lore.kernel.org/r/20221216163815.522628-7-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
63 lines
1.4 KiB
YAML
63 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mtd/partitions/qcom,smem-part.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm SMEM NAND flash partition parser
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maintainers:
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- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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description: |
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The Qualcomm SoCs supporting the NAND controller interface features a Shared
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Memory (SMEM) based partition table scheme. The maximum partitions supported
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varies between partition table revisions. V3 supports maximum 16 partitions
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and V4 supports 48 partitions.
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select: false
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properties:
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compatible:
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const: qcom,smem-part
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patternProperties:
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"^partition-[0-9a-z]+$":
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$ref: nvmem-cells.yaml
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required:
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- compatible
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additionalProperties: false
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examples:
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- |
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flash {
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partitions {
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compatible = "qcom,smem-part";
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};
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};
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- |
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/* Example declaring dynamic partition */
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flash {
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partitions {
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compatible = "qcom,smem-part";
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partition-art {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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label = "0:art";
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macaddr_art_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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macaddr_art_6: macaddr@6 {
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reg = <0x6 0x6>;
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};
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};
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};
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};
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