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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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4e976b1521
Boot ROM code on Meson requires that some pages on NAND must be written in special mode: "short" ECC mode where each block is 384 bytes and scrambling mode is on. Such pages are located on the chip in the following way (for example): [ p0 ][ p1 ][ p2 ][ p3 ][ p4 ][ p5 ][ p6 ][ p7 ] ... [ pN ] ^ ^ ^ ^ pX is page number "X". "^" means "special" page used by boot ROM - e.g. every 2nd page in the range of [0, 7]. Step (2 in example is set by 'amlogic,boot-page-step' field. Last page in range (7 in example) is set by 'amlogic,boot-pages' field. Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240507230903.3399594-2-avkrasnov@salutedevices.com
126 lines
2.9 KiB
YAML
126 lines
2.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
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allOf:
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- $ref: nand-controller.yaml
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maintainers:
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- liang.yang@amlogic.com
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properties:
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compatible:
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enum:
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- amlogic,meson-gxl-nfc
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- amlogic,meson-axg-nfc
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: nfc
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- const: emmc
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interrupts:
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maxItems: 1
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clocks:
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minItems: 2
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clock-names:
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items:
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- const: core
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- const: device
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patternProperties:
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"^nand@[0-7]$":
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type: object
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$ref: raw-nand-chip.yaml
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properties:
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reg:
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minimum: 0
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maximum: 1
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nand-ecc-mode:
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const: hw
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nand-ecc-step-size:
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enum: [512, 1024]
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nand-ecc-strength:
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enum: [8, 16, 24, 30, 40, 50, 60]
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description: |
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The ECC configurations that can be supported are as follows.
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meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
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meson-axg-nfc 8
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nand-rb:
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maxItems: 1
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items:
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maximum: 0
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amlogic,boot-pages:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Number of pages starting from offset 0, where a special ECC
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configuration must be used because it is accessed by the ROM
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code. This ECC configuration uses 384 bytes data blocks.
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Also scrambling mode is enabled for such pages.
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amlogic,boot-page-step:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Interval between pages, accessed by the ROM code. For example
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we have 8 pages [0, 7]. Pages 0,2,4,6 are accessed by the
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ROM code, so this field will be 2 (e.g. every 2nd page). Rest
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of pages - 1,3,5,7 are read/written without this mode.
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unevaluatedProperties: false
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dependencies:
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nand-ecc-strength: [nand-ecc-step-size]
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nand-ecc-step-size: [nand-ecc-strength]
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amlogic,boot-pages: [nand-is-boot-medium, "amlogic,boot-page-step"]
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amlogic,boot-page-step: [nand-is-boot-medium, "amlogic,boot-pages"]
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/axg-clkc.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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nand-controller@ffe07800 {
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compatible = "amlogic,meson-axg-nfc";
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reg = <0xffe07800 0x100>, <0xffe07000 0x800>;
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reg-names = "nfc", "emmc";
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interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc CLKID_SD_EMMC_C>, <&clkc CLKID_FCLK_DIV2>;
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clock-names = "core", "device";
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pinctrl-0 = <&nand_pins>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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nand@0 {
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reg = <0>;
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nand-rb = <0>;
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};
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};
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...
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