mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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7c43f89b17
Address warnings such as:
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: interrupt-controller@1e6c0080: 'valid-sources' does not match any of the regexes: 'pinctrl-[0-9]+'
and
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: /ahb/copro-interrupt-controller@1e6c2000: failed to match any schema with compatible: ['aspeed,ast2400-cvic', 'aspeed-cvic']
Note that the conversion to DT schema causes some further warnings to
be emitted, because the Aspeed devicetrees are not in great shape. These
new warnings are resolved in a separate series:
https://lore.kernel.org/lkml/20240802-dt-warnings-bmc-dts-cleanups-v1-0-1cb1378e5fcd@codeconstruct.com.au/
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240808-dt-warnings-irq-aspeed-dt-schema-v2-2-c2531e02633d@codeconstruct.com.au
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
61 lines
1.6 KiB
YAML
61 lines
1.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/misc/aspeed,ast2400-cvic.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Aspeed Coprocessor Vectored Interrupt Controller
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maintainers:
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- Andrew Jeffery <andrew@codeconstruct.com.au>
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description:
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The Aspeed AST2400 and AST2500 SoCs have a controller that provides interrupts
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to the ColdFire coprocessor. It's not a normal interrupt controller and it
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would be rather inconvenient to create an interrupt tree for it, as it
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somewhat shares some of the same sources as the main ARM interrupt controller
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but with different numbers.
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The AST2500 also supports a software generated interrupt.
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properties:
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compatible:
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items:
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- enum:
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- aspeed,ast2400-cvic
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- aspeed,ast2500-cvic
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- const: aspeed,cvic
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reg:
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maxItems: 1
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valid-sources:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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maxItems: 1
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description:
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A bitmap of supported sources for the implementation.
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copro-sw-interrupts:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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minItems: 1
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maxItems: 32
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description:
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A list of interrupt numbers that can be used as software interrupts from
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the ARM to the coprocessor.
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required:
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- compatible
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- reg
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- valid-sources
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additionalProperties: false
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examples:
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- |
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interrupt-controller@1e6c2000 {
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compatible = "aspeed,ast2500-cvic", "aspeed,cvic";
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reg = <0x1e6c2000 0x80>;
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valid-sources = <0xffffffff>;
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copro-sw-interrupts = <1>;
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};
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