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c20b3b8019
Instead of hacking the configuration of the FPI bus into the arch code add an own bus driver for this internal bus. The FPI bus is the main bus of the SoC. This bus driver makes sure the bus is configured correctly before the child drivers are getting initialized. This driver will probably also be used on different SoCs later. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: john@phrozen.org Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17122/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
32 lines
886 B
Plaintext
32 lines
886 B
Plaintext
Lantiq XWAY SoC FPI BUS binding
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============================
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-------------------------------------------------------------------------------
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Required properties:
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- compatible : Should be one of
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"lantiq,xrx200-fpi"
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- reg : The address and length of the XBAR
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configuration register.
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Address and length of the FPI bus itself.
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- lantiq,rcu : A phandle to the RCU syscon
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- lantiq,offset-endianness : Offset of the endianness configuration
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register
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-------------------------------------------------------------------------------
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Example for the FPI on the xrx200 SoCs:
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fpi@10000000 {
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compatible = "lantiq,xrx200-fpi";
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ranges = <0x0 0x10000000 0xf000000>;
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reg = <0x1f400000 0x1000>,
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<0x10000000 0xf000000>;
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lantiq,rcu = <&rcu0>;
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lantiq,offset-endianness = <0x4c>;
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#address-cells = <1>;
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#size-cells = <1>;
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gptu@e100a00 {
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......
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};
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};
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