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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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02ec75edaa
access-controllers is an optional property that allows a peripheral to refer to one or more domain access controller(s). Description of this property is added to all peripheral binding files of the peripheral under the STM32 firewall controller. It allows an accurate representation of the hardware, where various peripherals are connected to a firewall bus. The firewall can then check the peripheral accesses before allowing its device to probe. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
129 lines
3.4 KiB
YAML
129 lines
3.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics Flexible Memory Controller 2 (FMC2)
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description: |
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The FMC2 functional block makes the interface with: synchronous and
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asynchronous static devices (such as PSNOR, PSRAM or other memory-mapped
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peripherals) and NAND flash memories.
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Its main purposes are:
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- to translate AXI transactions into the appropriate external device
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protocol
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- to meet the access time requirements of the external devices
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All external devices share the addresses, data and control signals with the
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controller. Each external device is accessed by means of a unique Chip
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Select. The FMC2 performs only one access at a time to an external device.
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maintainers:
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- Christophe Kerello <christophe.kerello@foss.st.com>
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properties:
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compatible:
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enum:
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- st,stm32mp1-fmc2-ebi
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- st,stm32mp25-fmc2-ebi
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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power-domains:
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maxItems: 1
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"#address-cells":
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const: 2
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"#size-cells":
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const: 1
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ranges:
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description: |
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Reflects the memory layout with four integer values per bank. Format:
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<bank-number> 0 <address of the bank> <size>
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access-controllers:
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minItems: 1
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maxItems: 2
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patternProperties:
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"^.*@[0-4],[a-f0-9]+$":
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additionalProperties: true
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type: object
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$ref: mc-peripheral-props.yaml#
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required:
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- "#address-cells"
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- "#size-cells"
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- compatible
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- reg
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- clocks
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- ranges
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/stm32mp1-clks.h>
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#include <dt-bindings/reset/stm32mp1-resets.h>
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memory-controller@58002000 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "st,stm32mp1-fmc2-ebi";
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reg = <0x58002000 0x1000>;
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clocks = <&rcc FMC_K>;
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resets = <&rcc FMC_R>;
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ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
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<1 0 0x64000000 0x04000000>, /* EBI CS 2 */
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<2 0 0x68000000 0x04000000>, /* EBI CS 3 */
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<3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
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<4 0 0x80000000 0x10000000>; /* NAND */
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psram@0,0 {
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compatible = "mtd-ram";
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reg = <0 0x00000000 0x100000>;
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bank-width = <2>;
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st,fmc2-ebi-cs-transaction-type = <1>;
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st,fmc2-ebi-cs-address-setup-ns = <60>;
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st,fmc2-ebi-cs-data-setup-ns = <30>;
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st,fmc2-ebi-cs-bus-turnaround-ns = <5>;
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};
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nand-controller@4,0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32mp1-fmc2-nfc";
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reg = <4 0x00000000 0x1000>,
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<4 0x08010000 0x1000>,
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<4 0x08020000 0x1000>,
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<4 0x01000000 0x1000>,
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<4 0x09010000 0x1000>,
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<4 0x09020000 0x1000>;
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
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<&mdma1 20 0x2 0x12000a08 0x0 0x0>,
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<&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
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dma-names = "tx", "rx", "ecc";
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nand@0 {
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reg = <0>;
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nand-on-flash-bbt;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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};
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...
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