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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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93a7aedc4c
Document support for the Expanded Serial Peripheral Interface (xSPI) controller found on the Renesas RZ/V2H(P) (R9A09G057) and RZ/V2N (R9A09G056) SoCs. The xSPI hardware block on these SoCs is functionally identical to the one on the RZ/G3E (R9A09G047) SoC. Therefore, the existing driver can be reused without modification by using `renesas,r9a09g047-xspi` as a fallback compatible. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250624171605.469724-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
143 lines
3.4 KiB
YAML
143 lines
3.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/renesas,rzg3e-xspi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas Expanded Serial Peripheral Interface (xSPI)
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maintainers:
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- Biju Das <biju.das.jz@bp.renesas.com>
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description: |
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Renesas xSPI allows a SPI flash connected to the SoC to be accessed via
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the memory-mapping or the manual command mode.
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The flash chip itself should be represented by a subnode of the XSPI node.
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The flash interface is selected based on the "compatible" property of this
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subnode:
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- "jedec,spi-nor";
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allOf:
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- $ref: /schemas/spi/spi-controller.yaml#
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properties:
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compatible:
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oneOf:
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- const: renesas,r9a09g047-xspi # RZ/G3E
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- items:
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- enum:
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- renesas,r9a09g056-xspi # RZ/V2N
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- renesas,r9a09g057-xspi # RZ/V2H(P)
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- const: renesas,r9a09g047-xspi
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reg:
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items:
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- description: xSPI registers
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- description: direct mapping area
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reg-names:
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items:
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- const: regs
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- const: dirmap
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interrupts:
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items:
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- description: Interrupt pulse signal by factors excluding errors
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- description: Interrupt pulse signal by error factors
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interrupt-names:
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items:
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- const: pulse
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- const: err_pulse
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clocks:
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items:
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- description: AHB clock
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- description: AXI clock
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- description: SPI clock
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- description: Double speed SPI clock
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clock-names:
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items:
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- const: ahb
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- const: axi
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- const: spi
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- const: spix2
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power-domains:
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maxItems: 1
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resets:
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items:
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- description: Hardware reset
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- description: AXI reset
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reset-names:
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items:
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- const: hresetn
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- const: aresetn
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renesas,xspi-cs-addr-sys:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: |
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Phandle to the system controller (sys) that allows to configure
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xSPI CS0 and CS1 addresses.
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patternProperties:
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"flash@[0-9a-f]+$":
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type: object
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additionalProperties: true
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properties:
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compatible:
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contains:
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const: jedec,spi-nor
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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- power-domains
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- resets
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- reset-names
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- '#address-cells'
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- '#size-cells'
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/renesas,r9a09g047-cpg.h>
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spi@11030000 {
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compatible = "renesas,r9a09g047-xspi";
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reg = <0x11030000 0x10000>, <0x20000000 0x10000000>;
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reg-names = "regs", "dirmap";
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interrupts = <GIC_SPI 228 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 229 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "pulse", "err_pulse";
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clocks = <&cpg CPG_MOD 0x9f>, <&cpg CPG_MOD 0xa0>,
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<&cpg CPG_CORE 9>, <&cpg CPG_MOD 0xa1>;
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clock-names = "ahb", "axi", "spi", "spix2";
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power-domains = <&cpg>;
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resets = <&cpg 0xa3>, <&cpg 0xa4>;
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reset-names = "hresetn", "aresetn";
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#address-cells = <1>;
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#size-cells = <0>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <1>;
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};
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};
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