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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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95dfaf71b0
Samsung Exynos SROM peripheral properties were moved from the device
schema to separate "peripheral-props" schema for child node, but the
device schema does not reference the new one.
Reference the peripheral-props schema so the child nodes will be
properly validated from the device schema.
Fixes: 67bf606fcf ("dt-bindings: memory-controllers: samsung,exynos4210-srom: Split out child node properties")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250306085849.32852-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
94 lines
2.3 KiB
YAML
94 lines
2.3 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/exynos-srom.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung Exynos SoC SROM Controller driver
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maintainers:
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- Krzysztof Kozlowski <krzk@kernel.org>
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description: |+
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The SROM controller can be used to attach external peripherals. In this case
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extra properties, describing the bus behind it, should be specified.
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properties:
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compatible:
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items:
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- const: samsung,exynos4210-srom
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reg:
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maxItems: 1
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"#address-cells":
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const: 2
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"#size-cells":
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const: 1
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ranges:
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minItems: 1
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maxItems: 4
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description: |
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Reflects the memory layout with four integer values per bank. Format:
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<bank-number> 0 <parent address of bank> <size>
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Up to four banks are supported.
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patternProperties:
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"^.*@[0-3],[a-f0-9]+$":
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type: object
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$ref: mc-peripheral-props.yaml#
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additionalProperties: true
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properties:
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reg-io-width:
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enum: [1, 2]
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description:
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Data width in bytes (1 or 2). If omitted, default of 1 is used.
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required:
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- samsung,srom-timing
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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// Example: basic definition, no banks are configured
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memory-controller@12560000 {
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compatible = "samsung,exynos4210-srom";
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reg = <0x12560000 0x14>;
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};
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- |
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// Example: SROMc with SMSC911x ethernet chip on bank 3
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memory-controller@12570000 {
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x04000000 0x20000 // Bank0
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1 0 0x05000000 0x20000 // Bank1
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2 0 0x06000000 0x20000 // Bank2
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3 0 0x07000000 0x20000>; // Bank3
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compatible = "samsung,exynos4210-srom";
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reg = <0x12570000 0x14>;
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ethernet@3,0 {
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compatible = "smsc,lan9115";
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reg = <3 0 0x10000>; // Bank 3, offset = 0
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phy-mode = "mii";
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interrupt-parent = <&gpx0>;
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interrupts = <5 8>;
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reg-io-width = <2>;
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smsc,irq-push-pull;
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smsc,force-internal-phy;
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samsung,srom-page-mode;
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samsung,srom-timing = <9 12 1 9 1 1>;
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};
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};
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