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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present for any node. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230925212803.1976803-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
181 lines
4.4 KiB
YAML
181 lines
4.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/i2c/toshiba,tc358746.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Toshiba TC358746 Parallel to MIPI CSI2 Bridge
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maintainers:
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- Marco Felsch <kernel@pengutronix.de>
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description: |-
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The Toshiba TC358746 converts a parallel video stream into a MIPI CSI-2
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stream. The direction can be either parallel-in -> csi-out or csi-in ->
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parallel-out The chip is programmable through I2C and SPI but the SPI
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interface is only supported in parallel-in -> csi-out mode.
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Note that the current device tree bindings only support the
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parallel-in -> csi-out path.
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properties:
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compatible:
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const: toshiba,tc358746
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reg:
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maxItems: 1
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clocks:
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description:
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The phandle to the reference clock source. This corresponds to the
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hardware pin REFCLK.
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maxItems: 1
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clock-names:
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const: refclk
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"#clock-cells":
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description: |
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The bridge can act as clock provider for the sensor. To enable this
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support #clock-cells must be specified. Attention if this feature is used
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then the mclk rate must be at least: (2 * link-frequency) / 8
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`------------------´ ^
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internal PLL rate smallest possible
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mclk-div
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const: 0
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clock-output-names:
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description:
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The clock name of the MCLK output, the default name is tc358746-mclk.
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maxItems: 1
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vddc-supply:
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description: Digital core voltage supply, 1.2 volts
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vddio-supply:
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description: Digital I/O voltage supply, 1.8 volts
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vddmipi-supply:
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description: MIPI CSI phy voltage supply, 1.2 volts
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reset-gpios:
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description:
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The phandle and specifier for the GPIO that controls the chip reset.
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This corresponds to the hardware pin RESX which is physically active low.
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maxItems: 1
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: Input port
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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hsync-active: true
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vsync-active: true
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bus-type:
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enum: [ 5, 6 ]
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required:
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- hsync-active
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- vsync-active
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- bus-type
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port@1:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: Output port
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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data-lanes:
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minItems: 1
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maxItems: 4
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clock-noncontinuous: true
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link-frequencies: true
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required:
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- data-lanes
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- link-frequencies
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required:
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- port@0
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- port@1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- vddc-supply
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- vddio-supply
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- vddmipi-supply
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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csi-bridge@e {
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compatible = "toshiba,tc358746";
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reg = <0xe>;
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clocks = <&refclk>;
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clock-names = "refclk";
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reset-gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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vddc-supply = <&v1_2d>;
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vddio-supply = <&v1_8d>;
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vddmipi-supply = <&v1_2d>;
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/* sensor mclk provider */
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#clock-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* Input */
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port@0 {
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reg = <0>;
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tc358746_in: endpoint {
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remote-endpoint = <&sensor_out>;
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hsync-active = <0>;
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vsync-active = <0>;
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bus-type = <5>;
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};
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};
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/* Output */
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port@1 {
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reg = <1>;
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tc358746_out: endpoint {
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remote-endpoint = <&mipi_csi2_in>;
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data-lanes = <1 2>;
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clock-noncontinuous;
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link-frequencies = /bits/ 64 <216000000>;
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};
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};
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};
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};
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};
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