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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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ca26126a6c
The serializer's I2C address on the FPD-Link bus is usually communicated to the deserializer once the forward-channel is established. But in some cases it might be necessary to program the serializer (over the back-channel) before the forward-channel is established. This can be used e.g. to correct serializer configuration which otherwise would prevent the FC to be enabled. To be able to communicate to the serializer before the forward-channel is up, the deserializer driver neds to know the default i2c address of the serializer. Allow setting the serializer i2c address using the 'reg' property. This is optional, and usually not needed. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
439 lines
10 KiB
YAML
439 lines
10 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/i2c/ti,ds90ub960.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments DS90UB9XX Family FPD-Link Deserializer Hubs
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maintainers:
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- Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
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description:
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The TI DS90UB9XX devices are FPD-Link video deserializers with I2C and GPIO
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forwarding.
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allOf:
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- $ref: /schemas/i2c/i2c-atr.yaml#
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properties:
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compatible:
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enum:
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- ti,ds90ub960-q1
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- ti,ds90ub9702-q1
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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description:
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Reference clock connected to the REFCLK pin.
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clock-names:
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items:
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- const: refclk
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powerdown-gpios:
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maxItems: 1
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description:
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Specifier for the GPIO connected to the PDB pin.
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i2c-alias-pool:
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minItems: 1
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maxItems: 32
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links:
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type: object
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additionalProperties: false
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properties:
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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ti,manual-strobe:
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type: boolean
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description:
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Enable manual strobe position and EQ level
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patternProperties:
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'^link@[0-3]$':
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type: object
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additionalProperties: false
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properties:
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reg:
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description: The link number
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maxItems: 1
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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i2c-alias:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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The I2C address used for the serializer. Transactions to this
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address on the I2C bus where the deserializer resides are
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forwarded to the serializer.
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ti,rx-mode:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum:
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- 0 # RAW10
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- 1 # RAW12 HF
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- 2 # RAW12 LF
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- 3 # CSI2 SYNC
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- 4 # CSI2 NON-SYNC
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description:
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FPD-Link Input Mode. This should reflect the hardware and the
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default mode of the connected device.
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ti,cdr-mode:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum:
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- 0 # FPD-Link III
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- 1 # FPD-Link IV
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description:
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FPD-Link CDR Mode. This should reflect the hardware and the
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default mode of the connected device.
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ti,strobe-pos:
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$ref: /schemas/types.yaml#/definitions/int32
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minimum: -13
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maximum: 13
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description: Manual strobe position
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ti,eq-level:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 14
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description: Manual EQ level
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patternProperties:
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'^serializer(@[0-9a-f]+)*$':
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type: object
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description: FPD-Link Serializer node
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required:
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- reg
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- i2c-alias
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- ti,rx-mode
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: FPD-Link input 0
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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description:
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Endpoint for FPD-Link port. If the RX mode for this port is RAW,
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hsync-active and vsync-active must be defined.
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port@1:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: FPD-Link input 1
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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description:
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Endpoint for FPD-Link port. If the RX mode for this port is RAW,
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hsync-active and vsync-active must be defined.
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port@2:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: FPD-Link input 2
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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description:
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Endpoint for FPD-Link port. If the RX mode for this port is RAW,
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hsync-active and vsync-active must be defined.
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port@3:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: FPD-Link input 3
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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description:
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Endpoint for FPD-Link port. If the RX mode for this port is RAW,
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hsync-active and vsync-active must be defined.
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port@4:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: CSI-2 Output 0
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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data-lanes:
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minItems: 1
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maxItems: 4
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link-frequencies:
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maxItems: 1
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required:
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- data-lanes
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- link-frequencies
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port@5:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: CSI-2 Output 1
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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data-lanes:
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minItems: 1
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maxItems: 4
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link-frequencies:
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maxItems: 1
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required:
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- data-lanes
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- link-frequencies
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required:
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- port@0
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- port@1
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- port@2
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- port@3
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- port@4
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- port@5
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- ports
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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i2c {
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clock-frequency = <400000>;
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#address-cells = <1>;
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#size-cells = <0>;
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deser@3d {
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compatible = "ti,ds90ub960-q1";
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reg = <0x3d>;
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clock-names = "refclk";
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clocks = <&fixed_clock>;
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powerdown-gpios = <&pca9555 7 GPIO_ACTIVE_LOW>;
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i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* Port 0, Camera 0 */
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port@0 {
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reg = <0>;
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ub960_fpd3_1_in: endpoint {
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remote-endpoint = <&ub953_1_out>;
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};
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};
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/* Port 1, Camera 1 */
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port@1 {
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reg = <1>;
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ub960_fpd3_2_in: endpoint {
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remote-endpoint = <&ub913_2_out>;
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hsync-active = <0>;
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vsync-active = <1>;
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};
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};
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/* Port 2, unconnected */
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port@2 {
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reg = <2>;
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};
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/* Port 3, unconnected */
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port@3 {
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reg = <3>;
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};
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/* Port 4, CSI-2 TX */
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port@4 {
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reg = <4>;
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ds90ub960_0_csi_out: endpoint {
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data-lanes = <1 2 3 4>;
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link-frequencies = /bits/ 64 <800000000>;
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remote-endpoint = <&csi2_phy0>;
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};
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};
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/* Port 5, unconnected */
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port@5 {
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reg = <5>;
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};
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};
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links {
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#address-cells = <1>;
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#size-cells = <0>;
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/* Link 0 has DS90UB953 serializer and IMX274 sensor */
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link@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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i2c-alias = <0x44>;
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ti,rx-mode = <3>;
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serializer1: serializer@30 {
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compatible = "ti,ds90ub953-q1";
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reg = <0x30>;
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gpio-controller;
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#gpio-cells = <2>;
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#clock-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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ub953_1_in: endpoint {
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data-lanes = <1 2 3 4>;
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remote-endpoint = <&sensor_1_out>;
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};
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};
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port@1 {
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reg = <1>;
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ub953_1_out: endpoint {
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remote-endpoint = <&ub960_fpd3_1_in>;
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};
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};
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};
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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sensor@1a {
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compatible = "sony,imx274";
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reg = <0x1a>;
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reset-gpios = <&serializer1 0 GPIO_ACTIVE_LOW>;
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port {
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sensor_1_out: endpoint {
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remote-endpoint = <&ub953_1_in>;
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};
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};
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};
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};
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};
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}; /* End of link@0 */
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/* Link 1 has DS90UB913 serializer and MT9V111 sensor */
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link@1 {
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reg = <1>;
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i2c-alias = <0x45>;
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ti,rx-mode = <0>;
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serializer2: serializer {
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compatible = "ti,ds90ub913a-q1";
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gpio-controller;
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#gpio-cells = <2>;
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clocks = <&clk_cam_48M>;
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clock-names = "clkin";
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#clock-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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ub913_2_in: endpoint {
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remote-endpoint = <&sensor_2_out>;
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pclk-sample = <1>;
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};
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};
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port@1 {
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reg = <1>;
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ub913_2_out: endpoint {
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remote-endpoint = <&ub960_fpd3_2_in>;
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};
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};
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};
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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sensor@48 {
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compatible = "aptina,mt9v111";
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reg = <0x48>;
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clocks = <&serializer2>;
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port {
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sensor_2_out: endpoint {
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remote-endpoint = <&ub913_2_in>;
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};
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};
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};
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};
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};
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}; /* End of link@1 */
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};
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};
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};
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...
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