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270aaae0e7
Convert the Marvell SEI interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144749.1290862-1-robh@kernel.org Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
59 lines
1.4 KiB
YAML
59 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/marvell,ap806-sei.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Marvell SEI (System Error Interrupt) Controller
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maintainers:
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- Miquel Raynal <miquel.raynal@bootlin.com>
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description: >
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Marvell SEI (System Error Interrupt) controller is an interrupt aggregator. It
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receives interrupts from several sources and aggregates them to a single
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interrupt line (an SPI) on the parent interrupt controller.
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This interrupt controller can handle up to 64 SEIs, a set comes from the AP
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and is wired while a second set comes from the CPs by the mean of MSIs.
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properties:
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compatible:
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const: marvell,ap806-sei
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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'#interrupt-cells':
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const: 1
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interrupt-controller: true
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msi-controller: true
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required:
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- compatible
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- reg
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- interrupts
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- '#interrupt-cells'
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- interrupt-controller
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- msi-controller
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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interrupt-controller@3f0200 {
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compatible = "marvell,ap806-sei";
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reg = <0x3f0200 0x40>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <1>;
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interrupt-controller;
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msi-controller;
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};
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