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2235e494ba
Add bindings for BCM2712 MSI-X interrupt peripheral controller. Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Ivan T. Ivanov <iivanov@suse.de> Link: https://lore.kernel.org/r/20250224083559.47645-2-svarbanov@suse.de [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
61 lines
1.4 KiB
YAML
61 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2712-msix.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Broadcom bcm2712 MSI-X Interrupt Peripheral support
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maintainers:
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- Stanimir Varbanov <svarbanov@suse.de>
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description:
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This interrupt controller is used to provide interrupt vectors to the
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generic interrupt controller (GIC) on bcm2712. It will be used as
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external MSI-X controller for PCIe root complex.
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allOf:
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- $ref: /schemas/interrupt-controller/msi-controller.yaml#
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properties:
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compatible:
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const: brcm,bcm2712-mip
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reg:
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items:
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- description: Base register address
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- description: PCIe message address
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"#msi-cells":
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const: 0
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brcm,msi-offset:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Shift the allocated MSI's.
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- msi-controller
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- msi-ranges
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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axi {
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#address-cells = <2>;
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#size-cells = <2>;
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msi-controller@1000130000 {
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compatible = "brcm,bcm2712-mip";
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reg = <0x10 0x00130000 0x00 0xc0>,
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<0xff 0xfffff000 0x00 0x1000>;
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msi-controller;
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#msi-cells = <0>;
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msi-ranges = <&gicv2 GIC_SPI 128 IRQ_TYPE_EDGE_RISING 64>;
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};
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};
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