linux-loongson/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
Alexander Stein 72c1d11074 dt-bindings: iio: imx8qxp-adc: add missing vref-supply
Although this property is used right now for IIO_CHAN_INFO_SCALE,
this ADC has two internal reference voltages, which the driver currently
doesn't make use of.

Fixes: db73419d8c ("dt-bindings: iio: adc: Add binding documentation for NXP IMX8QXP ADC")
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230424092312.61746-1-alexander.stein@ew.tq-group.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2023-05-13 17:54:57 +01:00

86 lines
1.8 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP IMX8QXP ADC
maintainers:
- Cai Huoqing <caihuoqing@baidu.com>
description:
Supports the ADC found on the IMX8QXP SoC.
properties:
compatible:
const: nxp,imx8qxp-adc
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 2
clock-names:
items:
- const: per
- const: ipg
assigned-clocks:
maxItems: 1
assigned-clock-rates:
maxItems: 1
power-domains:
maxItems: 1
vref-supply:
description: |
External ADC reference voltage supply on VREFH pad. If VERID[MVI] is
set, there are additional, internal reference voltages selectable.
VREFH1 is always from VREFH pad.
"#io-channel-cells":
const: 1
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- assigned-clocks
- assigned-clock-rates
- power-domains
- "#io-channel-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/firmware/imx/rsrc.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
adc@5a880000 {
compatible = "nxp,imx8qxp-adc";
reg = <0x0 0x5a880000 0x0 0x10000>;
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX_SC_R_ADC_0>,
<&clk IMX_SC_R_ADC_0>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_ADC_0>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_ADC_0>;
vref-supply = <&reg_1v8>;
#io-channel-cells = <1>;
};
};
...