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13aa792c10
Document support for the I2C Bus Interface (RIIC) found on the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs. The RIIC IP on these parts is similar to that on RZ/V2H(P) but supports only four interrupts (including a combined error/event), lacks FM+ mode, and does not require reset. Introduce a new compatible string `renesas,riic-r9a09g077` for RZ/T2H and use it as a fallback for RZ/N2H. Unlike earlier SoCs that use eight distinct interrupts, the RZ/T2H uses only four. Update the binding schema to reflect this interrupt layout and skip the `resets` property check, as it is not required on these SoCs. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20250625104526.101004-3-prabhakar.mahadev-lad.rj@bp.renesas.com
163 lines
4.3 KiB
YAML
163 lines
4.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/renesas,riic.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RZ/A and RZ/G2L I2C Bus Interface (RIIC)
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maintainers:
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- Chris Brandt <chris.brandt@renesas.com>
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- Wolfram Sang <wsa+renesas@sang-engineering.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,riic-r7s72100 # RZ/A1H
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- renesas,riic-r7s9210 # RZ/A2M
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- renesas,riic-r9a07g043 # RZ/G2UL and RZ/Five
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- renesas,riic-r9a07g044 # RZ/G2{L,LC}
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- renesas,riic-r9a07g054 # RZ/V2L
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- const: renesas,riic-rz # RZ/A or RZ/G2L
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- items:
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- enum:
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- renesas,riic-r9a08g045 # RZ/G3S
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- renesas,riic-r9a09g047 # RZ/G3E
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- renesas,riic-r9a09g056 # RZ/V2N
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- const: renesas,riic-r9a09g057 # RZ/V2H(P)
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- enum:
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- renesas,riic-r9a09g057 # RZ/V2H(P)
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- renesas,riic-r9a09g077 # RZ/T2H
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- items:
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- const: renesas,riic-r9a09g087 # RZ/N2H
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- const: renesas,riic-r9a09g077 # RZ/T2H
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reg:
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maxItems: 1
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interrupts:
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oneOf:
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- items:
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- description: Transmit End Interrupt
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- description: Receive Data Full Interrupt
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- description: Transmit Data Empty Interrupt
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- description: Stop Condition Detection Interrupt
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- description: Start Condition Detection Interrupt
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- description: NACK Reception Interrupt
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- description: Arbitration-Lost Interrupt
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- description: Timeout Interrupt
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- items:
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- description: Transfer Error Or Event Generation
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- description: Receive Data Full Interrupt
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- description: Transmit Data Empty Interrupt
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- description: Transmit End Interrupt
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interrupt-names:
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oneOf:
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- items:
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- const: tei
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- const: ri
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- const: ti
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- const: spi
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- const: sti
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- const: naki
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- const: ali
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- const: tmoi
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- items:
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- const: eei
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- const: rxi
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- const: txi
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- const: tei
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clock-frequency:
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description:
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Desired I2C bus clock frequency in Hz. The absence of this property
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indicates the default frequency 100 kHz.
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-names
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- clocks
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- clock-frequency
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- power-domains
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- '#address-cells'
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- '#size-cells'
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: renesas,riic-r9a09g077
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then:
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properties:
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interrupts:
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maxItems: 4
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interrupt-names:
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maxItems: 4
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resets: false
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else:
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properties:
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interrupts:
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minItems: 8
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interrupt-names:
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minItems: 8
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,riic-r9a07g043
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- renesas,riic-r9a07g044
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- renesas,riic-r9a07g054
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- renesas,riic-r9a09g057
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then:
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required:
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- resets
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r7s72100-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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i2c0: i2c@fcfee000 {
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compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
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reg = <0xfcfee000 0x44>;
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interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali",
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"tmoi";
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clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
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clock-frequency = <100000>;
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power-domains = <&cpg_clocks>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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