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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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aff0a1701b
Convert the TI Keystone DSP GPIO binding to DT schema format. The "ti,syscon-dev" property was wrong and should be "gpio,syscon-dev" instead. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250714202850.3011952-1-robh@kernel.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
66 lines
1.7 KiB
YAML
66 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/ti,keystone-dsp-gpio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Keystone 2 DSP GPIO controller
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maintainers:
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- Grygorii Strashko <grygorii.strashko@ti.com>
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description: |
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HOST OS userland running on ARM can send interrupts to DSP cores using
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the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP core.
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This is one of the component used by the IPC mechanism used on Keystone SOCs.
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For example TCI6638K2K SoC has 8 DSP GPIO controllers:
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- 8 for C66x CorePacx CPUs 0-7
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Keystone 2 DSP GPIO controller has specific features:
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- each GPIO can be configured only as output pin;
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- setting GPIO value to 1 causes IRQ generation on target DSP core;
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- reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
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pending.
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properties:
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compatible:
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const: ti,keystone-dsp-gpio
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reg:
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maxItems: 1
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gpio-controller: true
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'#gpio-cells':
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const: 2
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gpio,syscon-dev:
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description:
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Phandle and offset of device's specific registers within the syscon state
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control registers
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: phandle to syscon
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- description: register offset within state control registers
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required:
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- compatible
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- reg
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- gpio-controller
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- '#gpio-cells'
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- gpio,syscon-dev
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additionalProperties: false
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examples:
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- |
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gpio@240 {
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compatible = "ti,keystone-dsp-gpio";
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reg = <0x240 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio,syscon-dev = <&devctrl 0x240>;
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};
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