mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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0e6e3c6f7c
Allow the generic gpio-ranges property so GPIOs can be mapped to their corresponding pin. This way control of GPIO on pins that are already used by other peripherals can be denied and basic pinconf can be done on pin controllers that support it. Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
146 lines
3.0 KiB
YAML
146 lines
3.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys DesignWare APB GPIO controller
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description: |
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Synopsys DesignWare GPIO controllers have a configurable number of ports,
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each of which are intended to be represented as child nodes with the generic
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GPIO-controller properties as described in this bindings file.
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maintainers:
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- Hoan Tran <hoan@os.amperecomputing.com>
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- Serge Semin <fancer.lancer@gmail.com>
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properties:
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$nodename:
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pattern: "^gpio@[0-9a-f]+$"
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compatible:
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const: snps,dw-apb-gpio
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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reg:
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maxItems: 1
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clocks:
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minItems: 1
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items:
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- description: APB interface clock source
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- description: DW GPIO debounce reference clock source
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clock-names:
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minItems: 1
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items:
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- const: bus
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- const: db
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resets:
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maxItems: 1
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patternProperties:
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"^gpio-(port|controller)@[0-9a-f]+$":
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type: object
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properties:
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compatible:
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const: snps,dw-apb-gpio-port
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reg:
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maxItems: 1
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gpio-controller: true
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'#gpio-cells':
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const: 2
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gpio-line-names:
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minItems: 1
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maxItems: 32
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gpio-ranges: true
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ngpios:
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default: 32
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minimum: 1
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maximum: 32
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snps,nr-gpios:
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description: The number of GPIO pins exported by the port.
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deprecated: true
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 32
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minimum: 1
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maximum: 32
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interrupts:
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description: |
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The interrupts to the parent controller raised when GPIOs generate
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the interrupts. If the controller provides one combined interrupt
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for all GPIOs, specify a single interrupt. If the controller provides
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one interrupt for each GPIO, provide a list of interrupts that
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correspond to each of the GPIO pins.
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minItems: 1
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maxItems: 32
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interrupt-controller: true
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'#interrupt-cells':
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const: 2
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required:
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- compatible
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- reg
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- gpio-controller
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- '#gpio-cells'
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dependencies:
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interrupt-controller: [ interrupts ]
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additionalProperties: false
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additionalProperties: false
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required:
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- compatible
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- reg
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- "#address-cells"
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- "#size-cells"
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examples:
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- |
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gpio: gpio@20000 {
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compatible = "snps,dw-apb-gpio";
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reg = <0x20000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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porta: gpio-port@0 {
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compatible = "snps,dw-apb-gpio-port";
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reg = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <8>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&vic1>;
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interrupts = <0>;
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};
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portb: gpio-port@1 {
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compatible = "snps,dw-apb-gpio-port";
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reg = <1>;
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <8>;
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};
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};
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...
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