mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-08-30 13:03:01 +00:00
f4271a891d
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. While re-indenting, drop unused labels. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Sander Vanheule <sander@svanheule.net> Reviewed-by: Manikandan Muralidharan <manikandan.m@microchip.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20250324125326.82270-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
136 lines
2.9 KiB
YAML
136 lines
2.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/gpio/gpio-mxs.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Freescale MXS GPIO controller
|
|
|
|
maintainers:
|
|
- Shawn Guo <shawnguo@kernel.org>
|
|
|
|
description: |
|
|
The Freescale MXS GPIO controller is part of MXS PIN controller.
|
|
The GPIOs are organized in port/bank, each port consists of 32 GPIOs.
|
|
As the GPIO controller is embedded in the PIN controller and all the
|
|
GPIO ports share the same IO space with PIN controller, the GPIO node
|
|
will be represented as sub-nodes of MXS pinctrl node.
|
|
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- fsl,imx23-pinctrl
|
|
- fsl,imx28-pinctrl
|
|
|
|
'#address-cells':
|
|
const: 1
|
|
'#size-cells':
|
|
const: 0
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
patternProperties:
|
|
"gpio@[0-9]+$":
|
|
type: object
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- fsl,imx23-gpio
|
|
- fsl,imx28-gpio
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
description: Should be the port interrupt shared by all 32 pins.
|
|
maxItems: 1
|
|
|
|
interrupt-controller: true
|
|
|
|
"#interrupt-cells":
|
|
const: 2
|
|
|
|
"#gpio-cells":
|
|
const: 2
|
|
|
|
gpio-controller: true
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- interrupts
|
|
- interrupt-controller
|
|
- "#interrupt-cells"
|
|
- "#gpio-cells"
|
|
- gpio-controller
|
|
|
|
additionalProperties: false
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- '#address-cells'
|
|
- '#size-cells'
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
pinctrl@80018000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,imx28-pinctrl";
|
|
reg = <0x80018000 0x2000>;
|
|
|
|
gpio@0 {
|
|
compatible = "fsl,imx28-gpio";
|
|
reg = <0>;
|
|
interrupts = <127>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
gpio@1 {
|
|
compatible = "fsl,imx28-gpio";
|
|
reg = <1>;
|
|
interrupts = <126>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
gpio@2 {
|
|
compatible = "fsl,imx28-gpio";
|
|
reg = <2>;
|
|
interrupts = <125>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
gpio@3 {
|
|
compatible = "fsl,imx28-gpio";
|
|
reg = <3>;
|
|
interrupts = <124>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
gpio@4 {
|
|
compatible = "fsl,imx28-gpio";
|
|
reg = <4>;
|
|
interrupts = <123>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
};
|