mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-01 06:39:05 +00:00
fa34005048
This helps validating DTS files. Introduced changes: 1. Adjusted "reg" in example 2. Added includes to example Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240213063919.20196-1-zajec5@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
64 lines
1.2 KiB
YAML
64 lines
1.2 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/dma/mediatek,mt7622-hsdma.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: MediaTek High-Speed DMA Controller
|
|
|
|
maintainers:
|
|
- Sean Wang <sean.wang@mediatek.com>
|
|
|
|
allOf:
|
|
- $ref: dma-controller.yaml#
|
|
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- mediatek,mt7622-hsdma
|
|
- mediatek,mt7623-hsdma
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
maxItems: 1
|
|
|
|
clock-names:
|
|
const: hsdma
|
|
|
|
power-domains:
|
|
maxItems: 1
|
|
|
|
"#dma-cells":
|
|
description: Channel number
|
|
const: 1
|
|
|
|
required:
|
|
- reg
|
|
- interrupts
|
|
- clocks
|
|
- clock-names
|
|
- power-domains
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/clock/mt2701-clk.h>
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
#include <dt-bindings/power/mt2701-power.h>
|
|
|
|
dma-controller@1b007000 {
|
|
compatible = "mediatek,mt7623-hsdma";
|
|
reg = <0x1b007000 0x1000>;
|
|
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>;
|
|
clocks = <ðsys CLK_ETHSYS_HSDMA>;
|
|
clock-names = "hsdma";
|
|
power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
|
|
#dma-cells = <1>;
|
|
};
|