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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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1c0ff333f2
Freescale i.MX8qxp Display Controller is implemented as construction set of building blocks with unified concept and standardized interfaces. Document all existing processing units. Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250414035028.1561475-2-victor.liu@nxp.com
97 lines
2.7 KiB
YAML
97 lines
2.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-store.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8qxp Display Controller Store Unit
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description: |
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The Store unit is the interface between the internal pixel processing
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pipeline, which is 30-bit RGB plus 8-bit Alpha, and the AXI bus for
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destination buffer access. It is used for the destination of Blit Engines.
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It comprises a set of built-in functions to generate a wide range of buffer
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formats. Note, that these are exactly inverse to corresponding functions in
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the Fetch Unit.
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+------X-------------------------+
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| | Store Unit |
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| V |
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| +-------+ |
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| | Gamma | Gamma apply |
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| +-------+ |
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| | |
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| V |
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| +-------+ |
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| | Color | RGB to YUV |
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| +-------+ |
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| | |
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| V |
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| +-------+ |
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| | Chroma| YUV444 to 422 |
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| +-------+ |
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| | |
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| V |
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| +-------+ |
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| | Reduce| Bit width reduction |
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| | | dithering |
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| +-------+ |
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| | |
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| V |
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| +-------+ |
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| | Pack | RGBA/YUV to RAW |
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| | Encode| or Compression |
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| +-------+ |
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| | |
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| V |
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+------X-------------------------+
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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properties:
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compatible:
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const: fsl,imx8qxp-dc-store
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: pec
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- const: cfg
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interrupts:
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maxItems: 3
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interrupt-names:
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items:
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- const: shdload
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- const: framecomplete
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- const: seqcomplete
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fsl,lts:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Optional Linear Tile Store associated with the Store Unit.
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- interrupt-names
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additionalProperties: false
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examples:
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- |
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store@56180940 {
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compatible = "fsl,imx8qxp-dc-store";
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reg = <0x56180940 0x1c>, <0x56184000 0x5c>;
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reg-names = "pec", "cfg";
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interrupt-parent = <&dc0_intc>;
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interrupts = <0>, <1>, <2>;
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interrupt-names = "shdload", "framecomplete", "seqcomplete";
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};
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