mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-01 06:39:05 +00:00

Freescale i.MX8qxp Display Controller is implemented as construction set of building blocks with unified concept and standardized interfaces. Document all existing processing units. Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250414035028.1561475-2-victor.liu@nxp.com
142 lines
6.0 KiB
YAML
142 lines
6.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-fetchunit.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Freescale i.MX8qxp Display Controller Fetch Unit
|
|
|
|
description: |
|
|
The Fetch Unit is the interface between the AXI bus for source buffer access
|
|
and the internal pixel processing pipeline, which is 30-bit RGB plus 8-bit
|
|
Alpha.
|
|
|
|
It is used to generate foreground planes in Display Controllers and source
|
|
planes in Blit Engines, and comprises the following built-in functions to
|
|
convert a wide range of frame buffer types.
|
|
|
|
+---------X-----------------------------------------+
|
|
| | Fetch Unit |
|
|
| V |
|
|
| +---------+ |
|
|
| | | |
|
|
| | Decode | Decompression [Decode] |
|
|
| | | |
|
|
| +---------+ |
|
|
| | |
|
|
| V |
|
|
| +---------+ |
|
|
| | Clip & | Clip Window [All] |
|
|
| | Overlay | Plane composition [Layer, Warp] |
|
|
| | | |
|
|
| +---------+ |
|
|
| | |
|
|
| V |
|
|
| +---------+ |
|
|
| | Re- | Flip/Rotate/Repl./Drop [All] |
|
|
X--> | sample | Perspective/Affine warping [Persp] |
|
|
| | | | Arbitrary warping [Warp, Persp] |
|
|
| | +---------+ |
|
|
| | | |
|
|
| | V |
|
|
| | +---------+ |
|
|
| | | | |
|
|
| | | Palette | Color Palette [Layer, Decode] |
|
|
| | | | |
|
|
| | +---------+ |
|
|
| | | |
|
|
| | V |
|
|
| | +---------+ |
|
|
| | | Extract | Raw to RGBA/YUV [All] |
|
|
| | | & | Bit width expansion [All] |
|
|
| | | Expand | |
|
|
| | +---------+ |
|
|
| | | |
|
|
| | V |
|
|
| | +---------+ |
|
|
| | | | Planar to packed |
|
|
| |->| Combine | [Decode, Warp, Persp] |
|
|
| | | | |
|
|
| | +---------+ |
|
|
| | | |
|
|
| | V |
|
|
| | +---------+ |
|
|
| | | | YUV422 to YUV444 |
|
|
| | | Chroma | [Decode, Persp] |
|
|
| | | | |
|
|
| | +---------+ |
|
|
| | | |
|
|
| | V |
|
|
| | +---------+ |
|
|
| | | | YUV to RGB |
|
|
| | | Color | [Warp, Persp, Decode, Layer] |
|
|
| | | | |
|
|
| | +---------+ |
|
|
| | | |
|
|
| | V |
|
|
| | +---------+ |
|
|
| | | | Gamma removal |
|
|
| | | Gamma | [Warp, Persp, Decode, Layer] |
|
|
| | | | |
|
|
| | +---------+ |
|
|
| | | |
|
|
| | V |
|
|
| | +---------+ |
|
|
| | | | Alpla multiply, RGB pre-multiply |
|
|
| ->| Multiply| [Warp, Persp, Decode, Layer] |
|
|
| | | |
|
|
| --------- |
|
|
| | |
|
|
| V |
|
|
| +---------+ |
|
|
| | | Bilinear filter |
|
|
| | Filter | [Warp, Persp] |
|
|
| | | |
|
|
| +---------+ |
|
|
| | |
|
|
| V |
|
|
+---------X-----------------------------------------+
|
|
|
|
Note that different derivatives of the Fetch Unit exist. Each implements a
|
|
specific subset only of the pipeline stages shown above. Restrictions for the
|
|
units are specified in [square brackets].
|
|
|
|
maintainers:
|
|
- Liu Ying <victor.liu@nxp.com>
|
|
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- fsl,imx8qxp-dc-fetchdecode
|
|
- fsl,imx8qxp-dc-fetcheco
|
|
- fsl,imx8qxp-dc-fetchlayer
|
|
- fsl,imx8qxp-dc-fetchwarp
|
|
|
|
reg:
|
|
maxItems: 2
|
|
|
|
reg-names:
|
|
items:
|
|
- const: pec
|
|
- const: cfg
|
|
|
|
fsl,prg:
|
|
$ref: /schemas/types.yaml#/definitions/phandle
|
|
description:
|
|
Optional Prefetch Resolve Gasket associated with the Fetch Unit.
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- reg-names
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
fetchlayer@56180ac0 {
|
|
compatible = "fsl,imx8qxp-dc-fetchlayer";
|
|
reg = <0x56180ac0 0xc>, <0x56188400 0x404>;
|
|
reg-names = "pec", "cfg";
|
|
};
|