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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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33ce317911
i.MX8qxp Display Controller display engine consists of all processing units that operate in a display clock domain. Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250414035028.1561475-4-victor.liu@nxp.com
153 lines
3.3 KiB
YAML
153 lines
3.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-display-engine.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8qxp Display Controller Display Engine
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description:
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All Processing Units that operate in a display clock domain. Pixel pipeline
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is driven by a video timing and cannot be stalled. Implements all display
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specific processing.
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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properties:
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compatible:
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const: fsl,imx8qxp-dc-display-engine
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: top
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- const: cfg
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resets:
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maxItems: 1
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interrupts:
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maxItems: 3
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interrupt-names:
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items:
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- const: shdload
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- const: framecomplete
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- const: seqcomplete
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power-domains:
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maxItems: 1
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"#address-cells":
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const: 1
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"#size-cells":
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const: 1
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ranges: true
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patternProperties:
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"^dither@[0-9a-f]+$":
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type: object
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additionalProperties: true
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properties:
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compatible:
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const: fsl,imx8qxp-dc-dither
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"^framegen@[0-9a-f]+$":
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type: object
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additionalProperties: true
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properties:
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compatible:
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const: fsl,imx8qxp-dc-framegen
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"^gammacor@[0-9a-f]+$":
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type: object
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additionalProperties: true
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properties:
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compatible:
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const: fsl,imx8qxp-dc-gammacor
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"^matrix@[0-9a-f]+$":
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type: object
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additionalProperties: true
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properties:
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compatible:
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const: fsl,imx8qxp-dc-matrix
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"^signature@[0-9a-f]+$":
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type: object
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additionalProperties: true
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properties:
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compatible:
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const: fsl,imx8qxp-dc-signature
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"^tcon@[0-9a-f]+$":
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type: object
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additionalProperties: true
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properties:
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compatible:
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const: fsl,imx8qxp-dc-tcon
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- interrupt-names
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- power-domains
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- "#address-cells"
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- "#size-cells"
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- ranges
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8-lpcg.h>
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#include <dt-bindings/firmware/imx/rsrc.h>
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display-engine@5618b400 {
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compatible = "fsl,imx8qxp-dc-display-engine";
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reg = <0x5618b400 0x14>, <0x5618b800 0x1c00>;
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reg-names = "top", "cfg";
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interrupt-parent = <&dc0_intc>;
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interrupts = <15>, <16>, <17>;
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interrupt-names = "shdload", "framecomplete", "seqcomplete";
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power-domains = <&pd IMX_SC_R_DC_0_PLL_0>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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framegen@5618b800 {
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compatible = "fsl,imx8qxp-dc-framegen";
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reg = <0x5618b800 0x98>;
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clocks = <&dc0_disp_lpcg IMX_LPCG_CLK_0>;
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interrupt-parent = <&dc0_intc>;
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interrupts = <18>, <19>, <20>, <21>, <41>, <42>, <43>, <44>;
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interrupt-names = "int0", "int1", "int2", "int3",
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"primsync_on", "primsync_off",
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"secsync_on", "secsync_off";
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};
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tcon@5618c800 {
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compatible = "fsl,imx8qxp-dc-tcon";
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reg = <0x5618c800 0x588>;
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port {
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dc0_disp0_dc0_pixel_combiner_ch0: endpoint {
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remote-endpoint = <&dc0_pixel_combiner_ch0_dc0_disp0>;
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};
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};
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};
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};
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