linux-loongson/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml
Liu Ying b71d3ace77 dt-bindings: display: imx: Add i.MX8qxp Display Controller blit engine
i.MX8qxp Display Controller contains a blit engine for raster graphics.
It may read up to 3 source images from memory and computes one destination
image from it, which is written back to memory.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250414035028.1561475-3-victor.liu@nxp.com
2025-05-14 15:06:05 +08:00

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4.5 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-blit-engine.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX8qxp Display Controller Blit Engine
description: |
A blit operation (block based image transfer) reads up to 3 source images
from memory and computes one destination image from it, which is written
back to memory. The following basic operations are supported:
* Buffer Fill
Fills a buffer with constant color
* Buffer Copy
Copies one source to a destination buffer.
* Image Blend
Combines two source images by a blending equation and writes result to
destination (which can be one of the sources).
* Image Rop2/3
Combines up to three source images by a logical equation (raster operation)
and writes result to destination (which can be one of the sources).
* Image Flip
Mirrors the source image in horizontal and/or vertical direction.
* Format Convert
Convert between the supported color and buffer formats.
* Color Transform
Modify colors by linear or non-linear transformations.
* Image Scale
Changes size of the source image.
* Image Rotate
Rotates the source image by any angle.
* Image Filter
Performs an FIR filter operation on the source image.
* Image Warp
Performs a re-sampling of the source image with any pattern. The sample
point positions are read from a compressed coordinate buffer.
* Buffer Pack
Writes an image with color components stored in up to three different
buffers (planar formats) into a single buffer (packed format).
* Chroma Resample
Converts between different YUV formats that differ in chroma sampling rate
(4:4:4, 4:2:2, 4:2:0).
maintainers:
- Liu Ying <victor.liu@nxp.com>
properties:
compatible:
const: fsl,imx8qxp-dc-blit-engine
reg:
maxItems: 2
reg-names:
items:
- const: pec
- const: cfg
"#address-cells":
const: 1
"#size-cells":
const: 1
ranges: true
patternProperties:
"^blitblend@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: fsl,imx8qxp-dc-blitblend
"^clut@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: fsl,imx8qxp-dc-clut
"^fetchdecode@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: fsl,imx8qxp-dc-fetchdecode
"^fetcheco@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: fsl,imx8qxp-dc-fetcheco
"^fetchwarp@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: fsl,imx8qxp-dc-fetchwarp
"^filter@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: fsl,imx8qxp-dc-filter
"^hscaler@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: fsl,imx8qxp-dc-hscaler
"^matrix@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: fsl,imx8qxp-dc-matrix
"^rop@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: fsl,imx8qxp-dc-rop
"^store@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: fsl,imx8qxp-dc-store
"^vscaler@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: fsl,imx8qxp-dc-vscaler
required:
- compatible
- reg
- reg-names
- "#address-cells"
- "#size-cells"
- ranges
additionalProperties: false
examples:
- |
blit-engine@56180820 {
compatible = "fsl,imx8qxp-dc-blit-engine";
reg = <0x56180820 0x13c>, <0x56181000 0x3400>;
reg-names = "pec", "cfg";
#address-cells = <1>;
#size-cells = <1>;
ranges;
fetchdecode@56180820 {
compatible = "fsl,imx8qxp-dc-fetchdecode";
reg = <0x56180820 0x10>, <0x56181000 0x404>;
reg-names = "pec", "cfg";
};
store@56180940 {
compatible = "fsl,imx8qxp-dc-store";
reg = <0x56180940 0x1c>, <0x56184000 0x5c>;
reg-names = "pec", "cfg";
interrupt-parent = <&dc0_intc>;
interrupts = <0>, <1>, <2>;
interrupt-names = "shdload", "framecomplete", "seqcomplete";
};
};