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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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f490d0cb93
Add binding for the i.MX8MP HDMI parallel video interface block. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20240203165307.7806-8-aford173@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20240203165307.7806-8-aford173@gmail.com
85 lines
1.9 KiB
YAML
85 lines
1.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8MP HDMI Parallel Video Interface
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maintainers:
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- Lucas Stach <l.stach@pengutronix.de>
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description:
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The HDMI parallel video interface is a timing and sync generator block in the
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i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
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properties:
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compatible:
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const: fsl,imx8mp-hdmi-pvi
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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power-domains:
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maxItems: 1
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description: Input from the LCDIF controller.
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: Output to the HDMI TX controller.
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required:
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- port@0
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- port@1
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required:
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- compatible
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- reg
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- interrupts
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- power-domains
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/power/imx8mp-power.h>
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display-bridge@32fc4000 {
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compatible = "fsl,imx8mp-hdmi-pvi";
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reg = <0x32fc4000 0x44>;
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interrupt-parent = <&irqsteer_hdmi>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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pvi_from_lcdif3: endpoint {
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remote-endpoint = <&lcdif3_to_pvi>;
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};
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};
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port@1 {
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reg = <1>;
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pvi_to_hdmi_tx: endpoint {
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remote-endpoint = <&hdmi_tx_from_pvi>;
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};
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};
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};
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};
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