mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-04 02:25:58 +00:00
223d32eb10
The addition of DT bindings for enabling and tuning spread spectrum
clocking generation is available only for the main PLL of stm32f{4,7}
platforms.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250114182021.670435-3-dario.binacchi@amarulasolutions.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
145 lines
3.6 KiB
YAML
145 lines
3.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/st,stm32-rcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 Reset Clock Controller
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maintainers:
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- Dario Binacchi <dario.binacchi@amarulasolutions.com>
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description: |
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The RCC IP is both a reset and a clock controller.
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The reset phandle argument is the bit number within the RCC registers bank,
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starting from RCC base address.
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- st,stm32f42xx-rcc
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- st,stm32f746-rcc
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- st,stm32h743-rcc
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- const: st,stm32-rcc
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- items:
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- enum:
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- st,stm32f469-rcc
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- const: st,stm32f42xx-rcc
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- const: st,stm32-rcc
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- items:
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- enum:
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- st,stm32f769-rcc
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- const: st,stm32f746-rcc
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- const: st,stm32-rcc
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reg:
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maxItems: 1
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'#reset-cells':
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const: 1
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'#clock-cells':
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enum: [1, 2]
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clocks:
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minItems: 2
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maxItems: 3
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st,syscfg:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to system configuration controller. It can be used to control the
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power domain circuitry.
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st,ssc-modfreq-hz:
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description:
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The modulation frequency for main PLL (in Hz)
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st,ssc-moddepth-permyriad:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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The modulation rate for main PLL (in permyriad, i.e. 0.01%)
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minimum: 25
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maximum: 200
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st,ssc-modmethod:
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$ref: /schemas/types.yaml#/definitions/string
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description:
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The modulation techniques for main PLL.
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items:
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enum:
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- center-spread
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- down-spread
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required:
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- compatible
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- reg
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- '#reset-cells'
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- '#clock-cells'
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- clocks
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- st,syscfg
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: st,stm32h743-rcc
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then:
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properties:
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'#clock-cells':
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const: 1
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description: |
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The clock index for the specified type.
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clocks:
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items:
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- description: high speed external (HSE) clock input
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- description: low speed external (LSE) clock input
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- description: Inter-IC sound (I2S) clock input
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st,ssc-modfreq-hz: false
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st,ssc-moddepth-permyriad: false
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st,ssc-modmethod: false
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else:
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properties:
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'#clock-cells':
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const: 2
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description: |
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- The first cell is the clock type, possible values are 0 for
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gated clocks and 1 otherwise.
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- The second cell is the clock index for the specified type.
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clocks:
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items:
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- description: high speed external (HSE) clock input
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- description: Inter-IC sound (I2S) clock input
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additionalProperties: false
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examples:
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# Reset and Clock Control Module node:
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- |
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clock-controller@40023800 {
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compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
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reg = <0x40023800 0x400>;
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#clock-cells = <2>;
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#reset-cells = <1>;
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clocks = <&clk_hse>, <&clk_i2s_ckin>;
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st,syscfg = <&pwrcfg>;
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st,ssc-modfreq-hz = <10000>;
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st,ssc-moddepth-permyriad = <200>;
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st,ssc-modmethod = "center-spread";
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};
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- |
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clock-controller@58024400 {
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compatible = "st,stm32h743-rcc", "st,stm32-rcc";
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reg = <0x58024400 0x400>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>;
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st,syscfg = <&pwrcfg>;
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};
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...
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