linux-loongson/Documentation/devicetree/bindings/clock/rockchip,rk3576-cru.yaml
Detlev Casanova 49c04453db dt-bindings: clock, reset: Add support for rk3576
Add clock and reset ID defines for rk3576.

Compared to the downstream bindings written by Elaine, this uses
continous gapless IDs starting at 0. Thus all numbers are
different between downstream and upstream, but names are kept
exactly the same.

Also add documentation for the rk3576 CRU core.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/0102019199a76766-f3a2b53f-d063-458b-b0d1-dfbc2ea1893c-000000@eu-west-1.amazonses.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29 10:28:16 +02:00

57 lines
1.2 KiB
YAML

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/rockchip,rk3576-cru.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip rk3576 Family Clock and Reset Control Module
maintainers:
- Elaine Zhang <zhangqing@rock-chips.com>
- Heiko Stuebner <heiko@sntech.de>
- Detlev Casanova <detlev.casanova@collabora.com>
description:
The RK3576 clock controller generates the clock and also implements a reset
controller for SoC peripherals. For example it provides SCLK_UART2 and
PCLK_UART2, as well as SRST_P_UART2 and SRST_S_UART2 for the second UART
module.
properties:
compatible:
const: rockchip,rk3576-cru
reg:
maxItems: 1
"#clock-cells":
const: 1
"#reset-cells":
const: 1
clocks:
maxItems: 2
clock-names:
items:
- const: xin24m
- const: xin32k
required:
- compatible
- reg
- "#clock-cells"
- "#reset-cells"
additionalProperties: false
examples:
- |
clock-controller@27200000 {
compatible = "rockchip,rk3576-cru";
reg = <0xfd7c0000 0x5c000>;
#clock-cells = <1>;
#reset-cells = <1>;
};