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Add clock and reset ID defines for rk3576. Compared to the downstream bindings written by Elaine, this uses continous gapless IDs starting at 0. Thus all numbers are different between downstream and upstream, but names are kept exactly the same. Also add documentation for the rk3576 CRU core. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/0102019199a76766-f3a2b53f-d063-458b-b0d1-dfbc2ea1893c-000000@eu-west-1.amazonses.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
57 lines
1.2 KiB
YAML
57 lines
1.2 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/rockchip,rk3576-cru.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip rk3576 Family Clock and Reset Control Module
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maintainers:
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- Elaine Zhang <zhangqing@rock-chips.com>
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- Heiko Stuebner <heiko@sntech.de>
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- Detlev Casanova <detlev.casanova@collabora.com>
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description:
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The RK3576 clock controller generates the clock and also implements a reset
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controller for SoC peripherals. For example it provides SCLK_UART2 and
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PCLK_UART2, as well as SRST_P_UART2 and SRST_S_UART2 for the second UART
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module.
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properties:
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compatible:
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const: rockchip,rk3576-cru
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reg:
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maxItems: 1
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"#clock-cells":
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const: 1
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"#reset-cells":
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const: 1
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: xin24m
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- const: xin32k
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required:
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- compatible
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- reg
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- "#clock-cells"
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- "#reset-cells"
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additionalProperties: false
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examples:
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- |
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clock-controller@27200000 {
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compatible = "rockchip,rk3576-cru";
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reg = <0xfd7c0000 0x5c000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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