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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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dd113c4fef
Document the device tree bindings of the rockchip rk3562 SoC clock and reset unit. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250227105916.2340856-2-kever.yang@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
56 lines
1.1 KiB
YAML
56 lines
1.1 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/rockchip,rk3562-cru.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip rk3562 Clock and Reset Control Module
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maintainers:
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- Elaine Zhang <zhangqing@rock-chips.com>
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- Heiko Stuebner <heiko@sntech.de>
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description:
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The RK3562 clock controller generates the clock and also implements a reset
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controller for SoC peripherals. For example it provides SCLK_UART2 and
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PCLK_UART2, as well as SRST_P_UART2 and SRST_S_UART2 for the second UART
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module.
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properties:
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compatible:
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const: rockchip,rk3562-cru
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reg:
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maxItems: 1
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"#clock-cells":
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const: 1
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"#reset-cells":
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const: 1
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: xin24m
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- const: xin32k
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required:
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- compatible
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- reg
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- "#clock-cells"
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- "#reset-cells"
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additionalProperties: false
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examples:
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- |
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clock-controller@ff100000 {
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compatible = "rockchip,rk3562-cru";
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reg = <0xff100000 0x40000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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