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386e0ac929
X1E80100 LPASS (Low Power Audio Subsystem) clock controller provides reset support when it is under the control of Q6DSP. Add x1e80100 compatible to the existing sc8280xp as these reset controllers have same reg layout and compatible. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240624-x1e-swr-reset-v2-2-8bc677fcfa64@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
68 lines
1.5 KiB
YAML
68 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,sc8280xp-lpasscc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm LPASS Core & Audio Clock Controller on SC8280XP
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maintainers:
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- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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description: |
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Qualcomm LPASS core and audio clock control module provides the clocks,
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and reset on SC8280XP.
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See also::
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include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h
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properties:
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compatible:
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oneOf:
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- enum:
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- qcom,sc8280xp-lpassaudiocc
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- qcom,sc8280xp-lpasscc
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- items:
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- const: qcom,x1e80100-lpassaudiocc
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- const: qcom,sc8280xp-lpassaudiocc
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- items:
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- const: qcom,x1e80100-lpasscc
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- const: qcom,sc8280xp-lpasscc
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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- '#clock-cells'
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- '#reset-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
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lpass_audiocc: clock-controller@32a9000 {
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compatible = "qcom,sc8280xp-lpassaudiocc";
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reg = <0x032a9000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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- |
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#include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
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lpasscc: clock-controller@33e0000 {
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compatible = "qcom,sc8280xp-lpasscc";
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reg = <0x033e0000 0x12000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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...
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