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On the QCM6490 boards, the LPASS firmware controls the complete clock controller functionalities and associated power domains. However, only the LPASS resets required to be controlled by the high level OS. Thus, add the new QCM6490 compatible to support the reset functionality for Low Power Audio subsystem. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250221-lpass_qcm6490_resets-v5-1-6be0c0949a83@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
203 lines
5.0 KiB
YAML
203 lines
5.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscorecc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm LPASS Core & Audio Clock Controller on SC7280
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maintainers:
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- Taniya Das <quic_tdas@quicinc.com>
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description: |
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Qualcomm LPASS core and audio clock control module provides the clocks and
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power domains on SC7280.
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See also::
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include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h
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include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h
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properties:
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compatible:
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enum:
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- qcom,qcm6490-lpassaudiocc
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- qcom,sc7280-lpassaoncc
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- qcom,sc7280-lpassaudiocc
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- qcom,sc7280-lpasscorecc
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- qcom,sc7280-lpasshm
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reg:
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minItems: 1
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maxItems: 2
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clocks:
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minItems: 1
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maxItems: 3
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clock-names:
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minItems: 1
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maxItems: 3
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'#clock-cells':
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const: 1
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power-domains:
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maxItems: 1
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'#power-domain-cells':
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const: 1
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'#reset-cells':
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const: 1
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qcom,adsp-pil-mode:
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description:
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Indicates if the LPASS would be brought out of reset using
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peripheral loader.
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type: boolean
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- '#clock-cells'
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- '#power-domain-cells'
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,qcm6490-lpassaudiocc
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- qcom,sc7280-lpassaudiocc
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then:
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properties:
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clocks:
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items:
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- description: Board XO source
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- description: LPASS_AON_CC_MAIN_RCG_CLK_SRC
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clock-names:
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items:
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- const: bi_tcxo
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- const: lpass_aon_cc_main_rcg_clk_src
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reg:
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items:
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- description: lpass core cc register
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- description: lpass audio csr register
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sc7280-lpassaoncc
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then:
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properties:
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clocks:
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items:
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- description: Board XO source
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- description: Board XO active only source
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- description: LPASS_AON_CC_MAIN_RCG_CLK_SRC
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clock-names:
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items:
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- const: bi_tcxo
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- const: bi_tcxo_ao
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- const: iface
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reg:
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maxItems: 1
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sc7280-lpasshm
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- qcom,sc7280-lpasscorecc
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then:
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properties:
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clocks:
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items:
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- description: Board XO source
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clock-names:
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items:
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- const: bi_tcxo
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reg:
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maxItems: 1
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/clock/qcom,gcc-sc7280.h>
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#include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
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#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
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lpass_audiocc: clock-controller@3300000 {
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compatible = "qcom,sc7280-lpassaudiocc";
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reg = <0x3300000 0x30000>,
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<0x32a9000 0x1000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
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clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";
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power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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#reset-cells = <1>;
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};
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/clock/qcom,gcc-sc7280.h>
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#include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
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#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
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lpass_hm: clock-controller@3c00000 {
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compatible = "qcom,sc7280-lpasshm";
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reg = <0x3c00000 0x28>;
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "bi_tcxo";
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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};
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/clock/qcom,gcc-sc7280.h>
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#include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
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#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
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lpasscore: clock-controller@3900000 {
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compatible = "qcom,sc7280-lpasscorecc";
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reg = <0x3900000 0x50000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "bi_tcxo";
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power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>;
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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};
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/clock/qcom,gcc-sc7280.h>
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#include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
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#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
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lpass_aon: clock-controller@3380000 {
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compatible = "qcom,sc7280-lpassaoncc";
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reg = <0x3380000 0x30000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>,
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<&lpasscore LPASS_CORE_CC_CORE_CLK>;
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clock-names = "bi_tcxo", "bi_tcxo_ao","iface";
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qcom,adsp-pil-mode;
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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