linux-loongson/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
Taniya Das c16e576b8a dt-bindings: clock: qcom: Add compatible for QCM6490 boards
On the QCM6490 boards, the LPASS firmware controls the complete clock
controller functionalities and associated power domains. However, only
the LPASS resets required to be controlled by the high level OS. Thus,
add the new QCM6490 compatible to support the reset functionality for
Low Power Audio subsystem.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250221-lpass_qcm6490_resets-v5-1-6be0c0949a83@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-13 16:45:22 -05:00

203 lines
5.0 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscorecc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm LPASS Core & Audio Clock Controller on SC7280
maintainers:
- Taniya Das <quic_tdas@quicinc.com>
description: |
Qualcomm LPASS core and audio clock control module provides the clocks and
power domains on SC7280.
See also::
include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h
include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h
properties:
compatible:
enum:
- qcom,qcm6490-lpassaudiocc
- qcom,sc7280-lpassaoncc
- qcom,sc7280-lpassaudiocc
- qcom,sc7280-lpasscorecc
- qcom,sc7280-lpasshm
reg:
minItems: 1
maxItems: 2
clocks:
minItems: 1
maxItems: 3
clock-names:
minItems: 1
maxItems: 3
'#clock-cells':
const: 1
power-domains:
maxItems: 1
'#power-domain-cells':
const: 1
'#reset-cells':
const: 1
qcom,adsp-pil-mode:
description:
Indicates if the LPASS would be brought out of reset using
peripheral loader.
type: boolean
required:
- compatible
- reg
- clocks
- clock-names
- '#clock-cells'
- '#power-domain-cells'
allOf:
- if:
properties:
compatible:
contains:
enum:
- qcom,qcm6490-lpassaudiocc
- qcom,sc7280-lpassaudiocc
then:
properties:
clocks:
items:
- description: Board XO source
- description: LPASS_AON_CC_MAIN_RCG_CLK_SRC
clock-names:
items:
- const: bi_tcxo
- const: lpass_aon_cc_main_rcg_clk_src
reg:
items:
- description: lpass core cc register
- description: lpass audio csr register
- if:
properties:
compatible:
contains:
enum:
- qcom,sc7280-lpassaoncc
then:
properties:
clocks:
items:
- description: Board XO source
- description: Board XO active only source
- description: LPASS_AON_CC_MAIN_RCG_CLK_SRC
clock-names:
items:
- const: bi_tcxo
- const: bi_tcxo_ao
- const: iface
reg:
maxItems: 1
- if:
properties:
compatible:
contains:
enum:
- qcom,sc7280-lpasshm
- qcom,sc7280-lpasscorecc
then:
properties:
clocks:
items:
- description: Board XO source
clock-names:
items:
- const: bi_tcxo
reg:
maxItems: 1
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,gcc-sc7280.h>
#include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
lpass_audiocc: clock-controller@3300000 {
compatible = "qcom,sc7280-lpassaudiocc";
reg = <0x3300000 0x30000>,
<0x32a9000 0x1000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";
power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
#clock-cells = <1>;
#power-domain-cells = <1>;
#reset-cells = <1>;
};
- |
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,gcc-sc7280.h>
#include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
lpass_hm: clock-controller@3c00000 {
compatible = "qcom,sc7280-lpasshm";
reg = <0x3c00000 0x28>;
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "bi_tcxo";
#clock-cells = <1>;
#power-domain-cells = <1>;
};
- |
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,gcc-sc7280.h>
#include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
lpasscore: clock-controller@3900000 {
compatible = "qcom,sc7280-lpasscorecc";
reg = <0x3900000 0x50000>;
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "bi_tcxo";
power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>;
#clock-cells = <1>;
#power-domain-cells = <1>;
};
- |
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,gcc-sc7280.h>
#include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
lpass_aon: clock-controller@3380000 {
compatible = "qcom,sc7280-lpassaoncc";
reg = <0x3380000 0x30000>;
clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>,
<&lpasscore LPASS_CORE_CC_CORE_CLK>;
clock-names = "bi_tcxo", "bi_tcxo_ao","iface";
qcom,adsp-pil-mode;
#clock-cells = <1>;
#power-domain-cells = <1>;
};
...