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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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3590dfbdd1
Add DT bindings for the Graphics clock on QCS615 platforms. Add the relevant DT include definitions as well. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-6-9c216e1615ab@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
50 lines
1.2 KiB
YAML
50 lines
1.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,qcs615-gpucc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Graphics Clock & Reset Controller on QCS615
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maintainers:
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- Taniya Das <quic_tdas@quicinc.com>
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description: |
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Qualcomm graphics clock control module provides clocks, resets and power
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domains on QCS615 Qualcomm SoCs.
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See also: include/dt-bindings/clock/qcom,qcs615-gpucc.h
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properties:
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compatible:
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const: qcom,qcs615-gpucc
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clocks:
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items:
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- description: Board XO source
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- description: GPLL0 main branch source
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- description: GPLL0 GPUCC div branch source
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/clock/qcom,qcs615-gcc.h>
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clock-controller@5090000 {
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compatible = "qcom,qcs615-gpucc";
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reg = <0x5090000 0x9000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&gcc GPLL0>,
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<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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