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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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63edb206a3
Add bindings documentation for the Milos (e.g. SM7635) Display Clock Controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-6-18f9faac4984@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
64 lines
1.7 KiB
YAML
64 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,milos-dispcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Display Clock & Reset Controller on Milos
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maintainers:
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- Luca Weiss <luca.weiss@fairphone.com>
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description: |
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Qualcomm display clock control module provides the clocks, resets and power
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domains on Milos.
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See also: include/dt-bindings/clock/qcom,milos-dispcc.h
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properties:
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compatible:
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const: qcom,milos-dispcc
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clocks:
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items:
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- description: Board XO source
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- description: Sleep clock source
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- description: Display's AHB clock
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- description: GPLL0 source from GCC
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- description: Byte clock from DSI PHY0
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- description: Pixel clock from DSI PHY0
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- description: Link clock from DP PHY0
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- description: VCO DIV clock from DP PHY0
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required:
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- compatible
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- clocks
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,milos-gcc.h>
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#include <dt-bindings/phy/phy-qcom-qmp.h>
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clock-controller@af00000 {
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compatible = "qcom,milos-dispcc";
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reg = <0x0af00000 0x20000>;
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clocks = <&bi_tcxo_div2>,
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<&sleep_clk>,
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<&gcc GCC_DISP_AHB_CLK>,
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<&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
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<&mdss_dsi0_phy 0>,
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<&mdss_dsi0_phy 1>,
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<&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>,
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<&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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