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4 Commits

Author SHA1 Message Date
Saeed Bishara
16bc90af15 [ARM] Dove: platform device registration for the sdio interfaces 
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
 2010-07-16 22:01:59 -04:00
H Hartley Sweeten
639b9be60e mach-dove/common.c: remove unnecessary (void *) casts 
The (void *) cast is not needed when setting dev.platform_data to the
address of the data. Remove the casts.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
 2010-02-05 00:27:03 -05:00
Lennert Buytenhek
573a652fb0 ARM: Add Tauros2 L2 cache controller support 
Support for the Tauros2 L2 cache controller as used with the PJ1
and PJ4 CPUs.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
 2009-11-27 15:43:21 -05:00
Saeed Bishara
edabd38e1a ARM: add base support for Marvell Dove SoC 
The Marvell Dove (88AP510) is a high-performance, highly integrated,
low power SoC with high-end ARM-compatible processor (known as PJ4),
graphics processing unit, high-definition video decoding acceleration
hardware, and a broad range of peripherals.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
 2009-11-27 15:43:06 -05:00