Commit Graph

1 Commits

Author SHA1 Message Date
Jiaxin Yu
58949aa35c
ASoC: mediatek: mt8186: support audsys clock control
Add mt8186 audio cg control. Audio clock gates are registered to
CCF for reference count and clock parent management.

Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220523132858.22166-4-jiaxin.yu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-06-06 16:00:42 +01:00