Commit Graph

24 Commits

Author SHA1 Message Date
Cezary Rojewski
38b1befc7a
ASoC: Intel: avs: Include missing string.h
File loader.c utilizes strscpy().

Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://patch.msgid.link/20250530141025.2942936-10-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-02 12:26:51 +01:00
Cezary Rojewski
75f3c607b1
ASoC: Intel: avs: Relocate DSP status registers
The firmware status and error registers are not part of SRAM on ACE
platforms. As these registers take part in IPC on ACE and cAVS platforms
both, relocate the field denoting their offset to Host-IPC descriptor.

In consequence, code remains cohesive with the ACE specs while still
maintaining high readability for the cAVS platforms.

Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Acked-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Link: https://patch.msgid.link/20250407112352.3720779-5-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-07 14:39:58 +01:00
Cezary Rojewski
b9a3ec6049
ASoC: Intel: avs: Read HW capabilities when possible
Starting with LunarLake (LNL) and onward, some hardware capabilities are
visible to the sound driver directly. At the same time, these may no
longer be visible to the AudioDSP firmware. Update resource allocation
function to rely on the registers when possible.

Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Acked-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Link: https://patch.msgid.link/20250407112352.3720779-4-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-07 14:39:57 +01:00
Cezary Rojewski
e995c51903
ASoC: Intel: avs: Move DSP-boot steps into individual functions
To make DSP-boot code more readable, move each logical step into an
individual function and add the configure step which will be utilized by
follow up changes. To summarize, the steps are: loading the firmware
code, configuring the base firmware and, allocating driver resources
based on FW and HW capabilities.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://patch.msgid.link/20250203141051.2361323-7-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-03 14:04:57 +00:00
Cezary Rojewski
3eede0fc99
ASoC: Intel: avs: Adjust DSP status register names
Both status and error are "codes". Update the wording to make code
cohesive.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://patch.msgid.link/20250109122216.3667847-12-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-01-09 12:14:26 +00:00
Cezary Rojewski
480d9bb9cf
ASoC: Intel: avs: Improve logging of firmware loading
Crucial debug information regarding the ROM/firmware status and last
known error code is missing in the code loading functions.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://patch.msgid.link/20250109122216.3667847-10-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-01-09 12:14:24 +00:00
Amadeusz Sławiński
33228036ff
ASoC: Intel: avs: Print IPC error messages in lower layer
It is preferred to send error message in handler itself instead of
leaving it to caller.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://patch.msgid.link/20250109122216.3667847-7-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-01-09 12:14:21 +00:00
Cezary Rojewski
bca0fa5f6b
ASoC: Intel: avs: Do not readq() u32 registers
Register reporting ROM status is 4-bytes wide.

Fixes: 092cf7b26a ("ASoC: Intel: avs: Code loading over HDA")
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://patch.msgid.link/20250109122216.3667847-2-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-01-09 12:14:17 +00:00
Pierre-Louis Bossart
94001147a0
ASoC: Intel: avs: clarify Copyright information
For some reason a number of files included the "All rights reserved"
statement. Good old copy-paste made sure this mistake proliferated.

Remove the "All rights reserved" in all Intel-copyright to align with
internal guidance.

Acked-by: Cezary Rojewski <cezary.rojewski@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://lore.kernel.org/r/20240503140359.259762-7-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-06 23:59:39 +09:00
Amadeusz Sławiński
c2b10acb62
ASoC: Intel: avs: Add assert_static to guarantee ABI sizes
In order to make sure that IPC interface is stable use assert_static to
check union and struct sizes that describe communication interface.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://msgid.link/r/20240405090929.1184068-13-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-05 13:13:11 +01:00
Cezary Rojewski
4771484759
ASoC: Intel: avs: Replace risky functions with safer variants
strscpy() and snprintf() are the recommended equivalents of their
riskier friends.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://msgid.link/r/20240405090929.1184068-7-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-05 13:13:06 +01:00
Cezary Rojewski
7576e2f4d9
ASoC: Intel: avs: Abstract IPC handling
Servicing IPCs on CNL platforms and onward differs from the existing
one. To make room for these, enrich platform descriptor with fields
representing crucial IPC registers and utilize them throughout the code.

While cleaning up device descriptors, reduce the number of code lines by
assigning 'min_fw_version' within a single line.

Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://msgid.link/r/20240220115035.770402-5-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-20 13:19:54 +00:00
Cezary Rojewski
615d13cb4f ASoC: Intel: avs: Switch to new stream-format interface
To provide option for selecting different bit-per-sample than just the
maximum one, use the new format calculation mechanism.

Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Acked-by: Jaroslav Kysela <perex@perex.cz>
Link: https://lore.kernel.org/r/20231117120610.1755254-14-cezary.rojewski@intel.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2023-11-27 17:28:40 +01:00
Wu Zhou
a5e6ea0126
ASoC: Intel: avs: Disable DSP before loading basefw
When audio controller is passed-through to the guest machine in
virtualized environment, the basefw load will fail the next time guest
OS reboots. Disable the DSP main core before loading the base firmware
to sanitize the environment.

Signed-off-by: Wu Zhou <wu.zhou@intel.com>
Signed-off-by: Libin Yang <libin.yang@intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20230929112436.787058-6-amadeuszx.slawinski@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-09-29 14:17:54 +02:00
Cezary Rojewski
758ba92f3a
ASoC: Intel: avs: Enact power gating policy
Update all firmware loading functions to also account for the power
gating policy. As module loading routine is missing the chicken bits
manipulation entirely, add the entire set there.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221027124702.1761002-10-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-28 13:04:39 +01:00
Mark Brown
d41a7d8787
ASoC: Merge HDA/ext cleanup
Merge branch 'topic/hda-ext-cleanup' of
https://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound into
asoc-6.2 for further AVS work.
2022-10-21 12:22:32 +01:00
Pierre-Louis Bossart
6258234129 ALSA/ASoC: hda: move SPIB/DRMS functionality from ext layer
The SPIB and DRMS capabilities are orthogonal to the DSP enablement
and can be used whether the stream is coupled or not.

The existing code partitioning makes limited sense, the capabilities
are parsed at the sound/hda level but helpers are located in
sound/hda/ext.

This patch moves all the SPIB/DRMS functionality to the sound/hda
layer. This reduces the complexity of the sound/hda/ext layer which is
now limited to handling the multi-link extensions and stream
coupling/decoupling helpers.

Note that this is an iso-functionality code move and rename, the
HDaudio legacy driver would need additional changes to make use of
these capabilities.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20221019162115.185917-11-pierre-louis.bossart@linux.intel.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2022-10-20 14:31:42 +02:00
Cezary Rojewski
263e3e2dfe
ASoC: Intel: avs: Simplify ignore_fw_version description
Reword the parameter description to drop any confusion regarding its
purpose.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-14-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:15 +01:00
Cezary Rojewski
f1eea11523
ASoC: Intel: avs: Update AVS_FW_INIT_TIMEOUT_US declaration
To reduce the number of places to update if timeouts would have to
change, modify the constant declaration.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20220707124153.1858249-13-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-07-08 18:53:29 +01:00
Cezary Rojewski
c8c960c109
ASoC: Intel: avs: APL-based platforms support
Define handlers specific to cAVS 1.5+ platforms, that is, APL and
similar platforms. These differ from SKL-alike ones in terms of AudioDSP
firmware generation and thus the '+' suffix. Introduciton of IMR,
removal of CLDMA, D0IX support and monolithic-ation of library/module
code are most impactful but are not the only changes brought with this
newer generation. Some generic and 1.5 operations are being re-used to
reduce code size.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20220516101116.190192-16-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-17 11:58:08 +01:00
Cezary Rojewski
81a299105d
ASoC: Intel: avs: Account for libraries when booting basefw
Not all modules are part of base firmware. Some are part of loadable
libraries. These need to be loaded after base firmware reports ready
status through FW_READY notification.

Their loading process is similar to the base firmware's one. Request the
binary file, verify and strip the manifest and load the actual code into
DSP memory with help of CLDMA or HD-Audio render stream, depending on
audio device generation.

List of libraries needed for loading is obtained through the topology -
vendor sections specifying the name of firmware files to request.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20220516101116.190192-2-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-17 11:57:52 +01:00
Cezary Rojewski
092cf7b26a
ASoC: Intel: avs: Code loading over HDA
Compared to SKL and KBL, more recent cAVS platforms are meant to re-use
one of HDAudio streams during boot procedure causing CLDMA to become
obsolete. Once transferred, given stream is returned to pool available
for audio streaming.

Module loading handler is stub as library and module code became
inseparable in later firmware generations.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20220311153544.136854-18-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-03-11 16:24:10 +00:00
Cezary Rojewski
65794fe1a5
ASoC: Intel: avs: Code loading over CLDMA
With CLDMA transfer implemented, make use of it to shape firmware,
library and module loading routines for SKL and KBL platforms.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20220311153544.136854-17-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-03-11 16:24:09 +00:00
Cezary Rojewski
b27f452317
ASoC: Intel: avs: General code loading flow
Code loading is a complex procedure and requires combined effort of DMA
and IPCs. With IPCs already in place, lay out ground for specific DMA
transfer operations.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20220311153544.136854-15-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-03-11 16:24:07 +00:00