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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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loongarch-next
3940 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Stephen Boyd
|
589eb11498 |
Merge branches 'clk-qcom', 'clk-rockchip', 'clk-sophgo' and 'clk-thead' into clk-next
- Add support for the AP sub-system clock controller in the T-Head TH1520 * clk-qcom: (71 commits) clk: qcom: Park shared RCGs upon registration clk: qcom: ipq9574: Use icc-clk for enabling NoC related clocks clk: qcom: common: Add interconnect clocks support interconnect: icc-clk: Add devm_icc_clk_register interconnect: icc-clk: Specify master/slave ids dt-bindings: clock: qcom: Add AHB clock for SM8150 clk: qcom: gcc-x1e80100: Set parent rate for USB3 sec and tert PHY pipe clks dt-bindings: interconnect: Add Qualcomm IPQ9574 support clk: qcom: kpss-xcc: Return of_clk_add_hw_provider to transfer the error clk: qcom: lpasscc-sc8280xp: Constify struct regmap_config clk: qcom: gcc-x1e80100: Fix halt_check for all pipe clocks clk: qcom: gcc-ipq6018: update sdcc max clock frequency clk: qcom: camcc-sm8650: Add SM8650 camera clock controller driver dt-bindings: clock: qcom: Add SM8650 camera clock controller dt-bindings: clock: qcom: Update the order of SC8280XP camcc header clk: qcom: videocc-sm8550: Add SM8650 video clock controller clk: qcom: videocc-sm8550: Add support for videocc XO clk ares dt-bindings: clock: qcom: Add SM8650 video clock controller dt-bindings: clock: qcom: Update SM8450 videocc header file name clk: qcom: gpucc-sa8775p: Update wait_val fields for GPU GDSC's ... * clk-rockchip: dt-bindings: clock: rk3188-cru-common: remove CLK_NR_CLKS clk: rockchip: rk3188: Drop CLK_NR_CLKS usage clk: rockchip: Switch to use kmemdup_array() clk: rockchip: rk3128: Add HCLK_SFC dt-bindings: clock: rk3128: Add HCLK_SFC dt-bindings: clock: rk3128: Drop CLK_NR_CLKS clk: rockchip: rk3128: Drop CLK_NR_CLKS usage clk: rockchip: rk3128: Add hclk_vio_h2p to critical clocks clk: rockchip: rk3128: Export PCLK_MIPIPHY dt-bindings: clock: rk3128: Add PCLK_MIPIPHY * clk-sophgo: clk: sophgo: Avoid -Wsometimes-uninitialized in sg2042_clk_pll_set_rate() clk/sophgo: Using BUG() instead of unreachable() in mmux_get_parent_id() clk: sophgo: Add SG2042 clock driver dt-bindings: clock: sophgo: add clkgen for SG2042 dt-bindings: clock: sophgo: add RP gate clocks for SG2042 dt-bindings: clock: sophgo: add pll clocks for SG2042 * clk-thead: clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks dt-bindings: clock: Document T-Head TH1520 AP_SUBSYS controller |
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Stephen Boyd
|
bc060e6bb7 |
Merge branches 'clk-renesas', 'clk-amlogic', 'clk-allwinner' and 'clk-samsung' into clk-next
* clk-renesas: clk: renesas: r9a08g045: Add clock, reset and power domain support for I2C clk: renesas: r8a779h0: Add Audio clocks clk: renesas: r9a08g045: Add clock, reset and power domain support for the VBATTB IP dt-bindings: clock: rcar-gen2: Remove obsolete header files dt-bindings: clock: r8a7779: Remove duplicate newline clk: renesas: Drop "Renesas" from individual driver descriptions clk: renesas: r8a779h0: Fix PLL2/PLL4 multipliers in comments clk: renesas: r8a779h0: Add VIN clocks dt-bindings: clock: renesas,rzg2l-cpg: Update description for #reset-cells clk: renesas: rcar-gen2: Use DEFINE_SPINLOCK() for static spinlock clk: renesas: cpg-lib: Use DEFINE_SPINLOCK() for global spinlock clk: renesas: r8a77970: Use common cpg_lock clk: renesas: r8a779h0: Add CSI-2 clocks clk: renesas: r8a779h0: Add ISPCS clocks * clk-amlogic: clk: meson: add missing MODULE_DESCRIPTION() macros dt-bindings: clock: meson: a1: peripherals: support sys_pll input dt-bindings: clock: meson: a1: pll: introduce new syspll bindings clk: meson: add 'NOINIT_ENABLED' flag to eliminate init for enabled PLL clk: meson: c3: add c3 clock peripherals controller driver clk: meson: c3: add support for the C3 SoC PLL clock dt-bindings: clock: add Amlogic C3 peripherals clock controller dt-bindings: clock: add Amlogic C3 SCMI clock controller support dt-bindings: clock: add Amlogic C3 PLL clock controller dt-bindings: clock: meson: Convert axg-audio-clkc to YAML format clk: meson: s4: fix pwm_j_div parent clock clk: meson: s4: fix fixed_pll_dco clock * clk-allwinner: clk: sunxi-ng r40: Constify struct regmap_config clk: sunxi-ng: h616: Add clock/reset for GPADC dt-bindings: clock: sun50i-h616-ccu: Add GPADC clocks clk: sunxi: Remove unused struct 'gates_data' clk: sunxi-ng: add missing MODULE_DESCRIPTION() macros * clk-samsung: clk: samsung: gs101: mark gout_hsi2_ufs_embd_i_clk_unipro as critical clk: samsung: Switch to use kmemdup_array() clk: samsung: exynos-clkout: Remove misleading of_match_table/MODULE_DEVICE_TABLE |
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Linus Torvalds
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d46ede3188 |
pmdomain core:
- Add support for HW-managed devices pmdomain providers: - amlogic: Add support for the A5 and the A4 power domains - arm: Enable system wakeups for the SCMI PM domain - qcom/clk: Add HW-mode callbacks to allow switching of GDSC mode pmdomain consumers: - qcom/media/venus: Enable support for switching GDSC HW-mode on V6 -----BEGIN PGP SIGNATURE----- iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmaU8RIXHHVsZi5oYW5z c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCnrbhAAqWQWOxXxZ9QHYgmE8K+fc96h 9e67dF2WjvBbipGEj63ijCRei9pChyHaIWPLSN/pHusfxTHaLqC2RTRf7Os/4TCm vwaITTvrIBxTHkocHVKDNUaODo/Mdc6WyhY8DUo+SyoZTvzKxy4QsmHDPsicJ6Q6 SxN01JrvNAHlOIRwgEm1BSuiL1qCOwg6vjdq/9I+3TVbFCLD8a9dYB8duWYTkupR HJqCeTQrrkucVi7LtGPwFZD50KnxK5/wMmug2jjHZ1jhS+iDI6WRoPGgyhlDyDNf 269Gveog7ewxK8Ny+h38FAgHwXvf0XuW47Zq4Pth7GdUnJH1n5AYGc0HETaFa0Xo +DnAm6xbWggSiAfzD63LwhRuv44hCE2vq3Ab10DYYcWC863qOis4t31VAyFsNq4m wQejAFPlZMQGUMjJMLRM9jPSYGakasvRjXwcVuv9DjFnku69lzroib8Z2eP6FR/t Q7DHVuq1lXbaVk4T4qV/yqgSjSOhEF5F/w1s+dYGygxfdY9Y5YH9dC8WBGtoqAUl K9w9UsA9qfVLvlLESRzHFF2oJaIdoqsTwcxykdq3WNaW+G2sGDf89rCpPvFvMLsj 43MWaxWs4dxS0okfr/hsGhBiCzIegqNbhxsrVdtn6BM/1qLnax7PjT2AEhP0oWL7 J4jvKcldHF4vNK5Kwlk= =ZIDp -----END PGP SIGNATURE----- Merge tag 'pmdomain-v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm Pull pmdomain updates from Ulf Hansson: "pmdomain core: - Add support for HW-managed devices pmdomain providers: - amlogic: Add support for the A5 and the A4 power domains - arm: Enable system wakeups for the SCMI PM domain - qcom/clk: Add HW-mode callbacks to allow switching of GDSC mode pmdomain consumers: - qcom/media/venus: Enable support for switching GDSC HW-mode on V6" * tag 'pmdomain-v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: pmdomain: amlogic: Constify struct meson_secure_pwrc_domain_desc venus: pm_helpers: Use dev_pm_genpd_set_hwmode to switch GDSC mode on V6 clk: qcom: videocc: Use HW_CTRL_TRIGGER for SM8250, SC7280 vcodec GDSC's clk: qcom: gdsc: Add set and get hwmode callbacks to switch GDSC mode PM: domains: Add the domain HW-managed mode to the summary PM: domains: Allow devices attached to genpd to be managed by HW pmdomain: amlogic: Add support for A5 power domains controller dt-bindings: power: add Amlogic A5 power domains pmdomain: amlogic: add missing MODULE_DESCRIPTION() macros pmdomain: arm: scmi_pm_domain: set flag GENPD_FLAG_ACTIVE_WAKEUP pmdomain: renesas: rmobile-sysc: Use for_each_child_of_node_scoped() pmdomain: core: Use genpd_is_irq_safe() helper pmdomain: amlogic: Add support for A4 power domains controller dt-bindings: power: add Amlogic A4 power domains |
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Linus Torvalds
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89c4913893 |
chrome platform changes for 6.11
* New
- Add "cros_ec_hwmon" driver to expose fan speed and temperature.
- Add "cros_charge-control" driver to control charge thresholds and
behaviour.
- Add module parameter "log_poll_period_ms" in cros_ec_debugfs for
tuning the poll period.
- Support version 3 of EC_CMD_GET_NEXT_EVENT and keyboard matrix.
* Fixes
- Fix a race condition in accessing MEC (Microchip EC) memory between
ACPI and kernel. Serialize the memory access by an AML (ACPI
Machine Language) mutex.
- Fix an issue of wrong EC message version in cros_ec_debugfs.
* Misc
- Fix kernel-doc errors and cleanups.
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Merge tag 'tag-chrome-platform-for-v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux
Pull chrome platform updates from Tzung-Bi Shih:
"New code:
- Add "cros_ec_hwmon" driver to expose fan speed and temperature
- Add "cros_charge-control" driver to control charge thresholds and
behaviour
- Add module parameter "log_poll_period_ms" in cros_ec_debugfs for
tuning the poll period
- Support version 3 of EC_CMD_GET_NEXT_EVENT and keyboard matrix
Fixes:
- Fix a race condition in accessing MEC (Microchip EC) memory between
ACPI and kernel. Serialize the memory access by an AML (ACPI
Machine Language) mutex
- Fix an issue of wrong EC message version in cros_ec_debugfs
Misc:
- Fix kernel-doc errors and cleanups"
* tag 'tag-chrome-platform-for-v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux: (28 commits)
power: supply: cros_charge-control: Fix signedness bug in charge_behaviour_store()
power: supply: cros_charge-control: Avoid accessing attributes out of bounds
power: supply: cros_charge-control: don't load if Framework control is present
power: supply: add ChromeOS EC based charge control driver
platform/chrome: cros_ec_proto: Introduce cros_ec_get_cmd_versions()
platform/chrome: Update binary interface for EC-based charge control
ACPI: battery: add devm_battery_hook_register()
dt-bindings: input: cros-ec-keyboard: Add keyboard matrix v3.0
platform/chrome: cros_ec_lpc: Handle zero length read/write
platform/chrome: cros_ec_lpc: Fix error code in cros_ec_lpc_mec_read_bytes()
platform/chrome: cros_ec_debugfs: fix wrong EC message version
platform/chrome: cros_ec_proto: update Kunit test for get_next_data_v3
platform/chrome: cros_ec_proto: add missing MODULE_DESCRIPTION() macro
hwmon: (cros_ec) Fix access to restricted __le16
hwmon: (cros_ec) Prevent read overflow in probe()
platform/chrome: cros_ec_lpc: Add quirks for Framework Laptop
platform/chrome: cros_ec_lpc: Add a new quirk for AML mutex
platform/chrome: cros_ec_lpc: Add a new quirk for ACPI id
platform/chrome: cros_ec_lpc: MEC access can use an AML mutex
platform/chrome: cros_ec_lpc: MEC access can return error code
...
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Julien Panis
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be3e224ec5 |
dt-bindings: thermal: mediatek: Fix thermal zone definitions for MT8188
Fix thermal zone names for consistency with the other SoCs:
- GPU0 must be used as the first GPU item.
- SOCx deal with audio DSP, video, and infra subsystems.
The naming must be fixed "atomically" so compilation does not break.
As a result, the change is made in the dt-bindings and in the LVTS
driver within a single commit, despite the checkpatch warning.
The definitions can be safely modified here because they are used only
in the LVTS driver, which is modified accordingly, and have not yet
been included in a released kernel.
Fixes:
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Julien Panis
|
6b04928e83 |
dt-bindings: thermal: mediatek: Fix thermal zone definition for MT8186
Fix a thermal zone name for consistency with the other SoCs:
MFG contains GPU, the latter is more specific and must be used here.
The naming must be fixed "atomically" so compilation does not break.
As a result, the change is made in the dt-bindings and in the LVTS
driver within a single commit, despite the checkpatch warning.
The definition can be safely modified here because it is used only
in the LVTS driver, which is modified accordingly, and has not yet
been included in a released kernel.
Fixes:
|
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Drew Fustini
|
1037885b30 |
dt-bindings: clock: Document T-Head TH1520 AP_SUBSYS controller
Document bindings for the T-Head TH1520 AP sub-system clock controller. Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf Co-developed-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Yangtao Li <frank.li@vivo.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Drew Fustini <dfustini@tenstorrent.com> Link: https://lore.kernel.org/r/20240623-th1520-clk-v2-1-ad8d6432d9fb@tenstorrent.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Arnd Bergmann
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28323a7561 |
A few more Arm64 DeviceTree updates for v6.11
This introduces support for Lenovo Thinkpad Yoga slim 7x, LG Leon LTE, and LG K10 (K420n). In addition to this, all Gen-1 platforms gets the DWC3 quirk to disable "SuperSpeed in park mode", which resolves an instabliity issue seen in host mode. For Fairphone 4, PM6150L and PMK8003 thermal sensors are added and thermal zones defined. Two fastrpc contexts on SM6350 are marked as non-secure, to allow non-secure usage. The video clock controller on SM8150 is introduced. IPQ9574 GCC is marked as a interconnect provider. The vibrator block in the PM6150 is described. On SC7280 the download mode register is defined for SCM, allowing it to enable/disable the ramdump support during a system crash. Lastly, add a mailmap entry for Luca Weiss. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaNjqMVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FdNwP/jMB1vTGZcaYwVGVEYIkUeuuflSr xdrUShN0EzNlB7XPo2yRZakAY4ndINQssC89Z4WYvMMytf+2qWQgGNrAbWme/Nmo /0r7Mqly2ueSN+fCG2s80HQRuuwjhM7KJ1WZ1PN46FNYOqis1eTchzv7Mi9biDgY 4HaVqqwNd6T6VZgIJJqV059XpmFw1RSKJdBjVD1ggn/7MMk2ueeY66iIJqSQC9KF zjqo5pXfwlpHJWUMATNEzfUQwqJ2vD/uR36I7qUVNq7WLZKeWjhp8pYERw1jLt76 93wwMlTXV3vX0yin0ZviQyv+YcxNmTF6V99TZiEs8kSsQ47HgwpTVvdq5dGuKVIg lfe+pfrltIoJn11wmz5hFFcRRvsLzDFOs5dY8kis3i+7nTzRE57gdM5YL4H+Z1VU VA0Z0NImSC+l6PwOZ+QW5v78xRrdDZplj0MpKNvcNERnTXipTcp65oqZY3E+GAro LrYAlLI3oAlNAKYSDk3YBRDami3WrjGy8BZwxKE/VXb0ZcEPCQKMt/17njwLBrqj rslU5tlyeuSxebg08mSIML6N1xOOndO6Ny0FDmqsNf1MiMxPQ+0Cw22P71bnb+8W VPhLmmq1YOAWPH6WKq1Ng4wId7J9GcwMOkvZZsFuwNx35RNLHhKH1Or961K0+vdI /qKRNZjWFV6h7yBC =Qc/t -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaNqgkACgkQYKtH/8kJ UicSKxAAkXAizZjc3PBOQMPH6AwkawwRR7hZDSS5lPLk42cjC5OiWP26q+guulJj SH6CYr9xftVshW9oSTlvEiI+pOp7lygaBNU76BPWmj9/cbS1pJPVBFz3BVdgCCZF 7Zxy7J1d01yIOtDTc+gpAsozWwRLN+frGgg5SJYPKt6sgnTtk4VaulW1rpvHXDJv xdkSlcc34AidKODZ1rCCXrCM5Pi/lxRw8rmj4foSSEW+BZtaCSFT8SbsQ0F3XezS xeIan3vN7uZydazKhefIrQlJfNiZ3gvYFsYYS//lCcGY7fim3pVwfHPnEq0MkPI3 b7YiqpGaLxUKg5pjqobo6ChvTISggbdS38gP/814IzusKIYE6xO4Ff5rEtBNtUMV uzS1ZLok82EOYFtL9DBz3BHdAHOGqKoU5+qW823Th+XTfKJNLxkPRZhM+JB6ChPl wJZDXc1YQdMrhjaP4MCZJL09b/pCfKh0ue8XJo9H7/7FtqSp6ACjvif47Rd36Yri wFBl/EB2qouY6hhsWASE4Ag+P5+DgtBnpybFv88O9dVx7STb5xXNzO45i+9BEDES HsAj+xHsNcMOW+YHhgHHZySYTYpFhvaO8AU4R6ZYgDi6Jg2VidBpvofgdzXslsKb e+kDNOEy4I20ci/it05lJjX2D2oxlT37ooC1aZskuUCa0vCiYzs= =naka -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt A few more Arm64 DeviceTree updates for v6.11 This introduces support for Lenovo Thinkpad Yoga slim 7x, LG Leon LTE, and LG K10 (K420n). In addition to this, all Gen-1 platforms gets the DWC3 quirk to disable "SuperSpeed in park mode", which resolves an instabliity issue seen in host mode. For Fairphone 4, PM6150L and PMK8003 thermal sensors are added and thermal zones defined. Two fastrpc contexts on SM6350 are marked as non-secure, to allow non-secure usage. The video clock controller on SM8150 is introduced. IPQ9574 GCC is marked as a interconnect provider. The vibrator block in the PM6150 is described. On SC7280 the download mode register is defined for SCM, allowing it to enable/disable the ramdump support during a system crash. Lastly, add a mailmap entry for Luca Weiss. * tag 'qcom-arm64-for-6.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (22 commits) mailmap: Update Luca Weiss's email address arm64: dts: qcom: msm8916-lg-c50: add initial dts for LG Leon LTE arm64: dts: qcom: msm8916-lg-m216: Add initial device tree dt-bindings: arm: qcom: Add msm8916 based LG devices arm64: dts: qcom: ipq9574: Add icc provider ability to gcc dt-bindings: interconnect: Add Qualcomm IPQ9574 support arm64: dts: qcom: sm8150: Add video clock controller node arm64: dts: qcom: pm6150: Add vibrator arm64: dts: qcom: sc7280: Enable download mode register write arm64: dts: qcom: sm7225-fairphone-fp4: Add PM6150L thermals arm64: dts: qcom: sm7225-fairphone-fp4: Add PMK8003 thermals arm64: dts: qcom: sm6350: Add missing qcom,non-secure-domain property arm64: dts: qcom: sdm845: Disable SS instance in Parkmode for USB arm64: dts: qcom: msm8996: Disable SS instance in Parkmode for USB arm64: dts: qcom: sm6350: Disable SS instance in Parkmode for USB arm64: dts: qcom: sm6115: Disable SS instance in Parkmode for USB arm64: dts: qcom: sdm630: Disable SS instance in Parkmode for USB arm64: dts: qcom: msm8998: Disable SS instance in Parkmode for USB arm64: dts: qcom: ipq8074: Disable SS instance in Parkmode for USB arm64: dts: qcom: ipq6018: Disable SS instance in Parkmode for USB ... Link: https://lore.kernel.org/r/20240709193406.3966-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Greg Kroah-Hartman
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9d2877a51f |
interconnect changes for 6.11
This pull request contains the interconnect changes for the 6.11-rc1 merge window. It contains just driver changes with the following highlights: Driver changes: - New driver for MediaTek MT8183/8195 platforms - New driver for MSM8953 platforms - New QoS support for RPMh-based platforms with SC7280 being the first one to benefit from it. - Fix incorrect master-id value in qcm2290 driver - Add missing MODULE_DESCRIPTION in a few drivers Signed-off-by: Georgi Djakov <djakov@kernel.org> -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJmjRPHAAoJEIDQzArG2BZjtssP/2puoPRF3rEEOiq0NTUN0pgx x/FyWa03i0nDGF/iTUZt7m3bLaMzRQPWl3iSWuADaSZVE4Sq9JSxdYTADstAMdJt RuM88u1LiU4q7kSxiXFVMUmUwts1364aD4P4CEki+v526gDTcxmAVv6RYBUTHI98 idxv2U70F71eWfQNyE5f68ist0s7r4QErvkMKgFW9sBB/qzOVECbtwOxAC8x08QW 0gEoqjv/1X43HHmx4uWflTUw5xwda1FE24JH0H5gc2kBtBf2fd+cdIcYu8Ke6Med eTC3dITqaPdN3ABQunsvGCXoT4eWw6UbqWFbZse3adKJ+jbwbYVcy7wJ8uwgnxNu cdqx1qUboyoDmz2/ijJGIDX3BiS9DllJbiKXiZ0J+2Z2GeoFYkVMt9OQouRR8iuu ENjHE0fsMVzJLC/7OLS/+B5v5z/eYThbwk3LPB76q0nvZgxuUEc5YB0bLXmduLrF W5KAbryrjFWuEtunUrXJUp/Fxn3BMk2hx5N4NZpzZwLSdEyigAuIkX+ENbnVaazX I3UGBX+9vs557DzbJKG/0EZ2UXNzAIdEAs98YaURwLe6SUwEAue6KcXLwsw8tgMv fIsHdk8ehDLifzzweq36rAUfHqjix/TEdkjF8fk032k2UChcCSkKjae+X8vqCndT wb+OYUMuSxuPXutXRhBN =aTzU -----END PGP SIGNATURE----- Merge tag 'icc-6.11-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: interconnect changes for 6.11 This pull request contains the interconnect changes for the 6.11-rc1 merge window. It contains just driver changes with the following highlights: Driver changes: - New driver for MediaTek MT8183/8195 platforms - New driver for MSM8953 platforms - New QoS support for RPMh-based platforms with SC7280 being the first one to benefit from it. - Fix incorrect master-id value in qcm2290 driver - Add missing MODULE_DESCRIPTION in a few drivers Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-6.11-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc: interconnect: qcom: Fix DT backwards compatibility for QoS interconnect: qcom: Add MSM8953 driver dt-bindings: interconnect: qcom: Add Qualcomm MSM8953 NoC interconnect: qcom: qcm2290: Fix mas_snoc_bimc RPM master ID interconnect: qcom: sc7280: enable QoS configuration interconnect: qcom: icc-rpmh: Add QoS configuration support dt-bindings: interconnect: add clock property to enable QOS on SC7280 interconnect: mediatek: remove unneeded semicolon interconnect: qcom: add missing MODULE_DESCRIPTION() macros interconnect: imx: add missing MODULE_DESCRIPTION() macros interconnect: mediatek: Add MediaTek MT8183/8195 EMI Interconnect driver dt-bindings: interconnect: Add MediaTek EMI Interconnect bindings |
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Xianwei Zhao
|
32625ac9e1 |
dt-bindings: power: add Amlogic A5 power domains
Add devicetree binding document and related header file for Amlogic A5 secure power domains. Signed-off-by: Hongyu Chen <hongyu.chen1@amlogic.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240627-a5_secpower-v1-1-1f47dde1270c@amlogic.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
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Arnd Bergmann
|
ee22fbd705 |
Qualcomm driver updates for v6.11
Support for Shared Memory (shm) Bridge is added, which provides a stricter interface for handling of buffers passed to TrustZone. The X1Elite platform is added to uefisecapp allow list, to instantiate the efivars implementation. A new in-kernel implementation of the pd-mapper (or servreg) service is introduced, to replace the userspace dependency for USB Type-C and battery management. Support for sharing interrupts across multiple bwmon instances is added, and a refcount imbalance issue is corrected. The LLCC support for recent platforms is corrected, and SA8775P support is added. A new interface is added to SMEM, to expose "feature codes". One example of the usecase for this is to indicate to the GPU driver which frequencies are available on the given device. The interrupt consumer and provider side of SMP2P is updated to provide more useful names in interrupt stats. Support for using the mailbox binding and driver for outgoing IPC interrupt in the SMSM driver is introduced. socinfo driver learns about SDM670 and IPQ5321, as well as get some updates to the X1E PMICs. pmic_glink is bumped to now support managing 3 USB Type-C ports. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaHa9UVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FUOYP/1Z2gwAlkGLQsSVGmDAbEAClFyhm JvgBn87fouKQ5pPwbdLLhylxwlkdtCQ/WL9Zm0Ue5wfXmRlLApVrEfBbG9HY4fG7 yTk0u5H0qcln5KqEB9XFxzHfPbjGBKrF5sRfFlTEncQ+/viwu4Jw2BdY9Hs2zCAV 0Qbc7mFVzOYOC+MTil8p0qMAxi/cCnWwi+NCfy7bKgvdW3lzuDrvw3vdwf0TbzwQ asTjjH2+VA3cHqosRx5vhvoO89w2V1JAEEkifu9TtF0j8+FUNql9h8SxMGi3aOqw uXh+lSBLPkSv3aptkqxl7bUX4axtdwPqhvNb4Fe0Z1EaMGZ3v6C/LynTsSwF36H0 fNYu5n1MW9Cl6ypxycSdcJxMbYv9Czy7GkwhTPZPWepvQC+XcjH/VyvzAmyDLpYe UZzYH/6AqT/lCSVQtb+ySML8BObXMZOfIAH2EtoyLw/jlKb2cAWwMXftSD9VgFH0 j0PAM43w2LYgFFy6Cmla4jX9pW2MooEF/3K1GM2rvsQzinZa5+EK1UKpqam5Kq+d h8FakZ6cl86y5pzg6QcVbm2pxKpAGFjArzpHKshLMp9Krkjhfopyl3tN7aXG3VOF qSeWdEP2TAUyQFGJNuUxeb7PZc+VdBHBPmaGDFhaLy+J1Huu8kc3TQuAkxxpXXIj /vpF+Aeyl14J1lQS =Eknv -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaM/jYACgkQYKtH/8kJ UieyzBAAjEB2YIKZzlt/OFca+NG3zYlnt2rYxjW0Jc4wI/LaJn6fshQ/fExjvUqB lfYIn5rLVXsB29+Xc1fK8rGEp5N2AtY5syAr2Ji44EXheCNa5HsxkLVS9K6bjUvr ljJYo23Gr3S9XnkClGVxuZX7QfS0DUPSr1mo4kJXiNhUg++YDTG6A0z/Njo/LziO pzSmc8vG0pPGG+B5GNwiQO2KW8ZFgT6L0A8neLIcols3o0Vcnce6MnT+OHpRFbjx bEvo9I/JbKFRRzYzztTb2Qtl3tzo230K/D5/8oaLKkLj7FZrULudrPYs0nT4l8tN qN/8gqsKxKTqPxFgQlSIT9G+14OqsKWcLs4qTNnZUsVweIoCnWj2IEkXY6C4KOHX 1LHTucglBK7LwBxBtbjE6bNwGuMnaZJycc9UDmDcGzuhEhFpUH6Jp6NG8Jf8xv7L Ua1JJbF4cnAFQMOxkukYqxu2G7j3qmK4irsoVUJDZsl6ZY3Qn7itkpsKCw24Gspz HvAASOp1wpkz4aFCR61kPOubsKKWMTe0zOTCDPHqeMX+PrjfH9nkuXCw0N44zlHB VuCl5yqVnWmmKbxZ5ahFgogZBu5gLF5LtMgLQAD2zzL01JT1kZydFtGvh5/uVdDC 8yym+fdL7UeolocK9Qj6M1KKfpiLr2OYGuk9ONG7E/9yknOfDJk= =lPdX -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.11 Support for Shared Memory (shm) Bridge is added, which provides a stricter interface for handling of buffers passed to TrustZone. The X1Elite platform is added to uefisecapp allow list, to instantiate the efivars implementation. A new in-kernel implementation of the pd-mapper (or servreg) service is introduced, to replace the userspace dependency for USB Type-C and battery management. Support for sharing interrupts across multiple bwmon instances is added, and a refcount imbalance issue is corrected. The LLCC support for recent platforms is corrected, and SA8775P support is added. A new interface is added to SMEM, to expose "feature codes". One example of the usecase for this is to indicate to the GPU driver which frequencies are available on the given device. The interrupt consumer and provider side of SMP2P is updated to provide more useful names in interrupt stats. Support for using the mailbox binding and driver for outgoing IPC interrupt in the SMSM driver is introduced. socinfo driver learns about SDM670 and IPQ5321, as well as get some updates to the X1E PMICs. pmic_glink is bumped to now support managing 3 USB Type-C ports. * tag 'qcom-drivers-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (48 commits) soc: qcom: smp2p: Use devname for interrupt descriptions soc: qcom: smsm: Add missing mailbox dependency to Kconfig soc: qcom: add missing pd-mapper dependencies soc: qcom: icc-bwmon: Allow for interrupts to be shared across instances dt-bindings: interconnect: qcom,msm8998-bwmon: Add X1E80100 BWMON instances dt-bindings: interconnect: qcom,msm8998-bwmon: Remove opp-table from the required list firmware: qcom: tzmem: export devm_qcom_tzmem_pool_new() soc: qcom: add pd-mapper implementation soc: qcom: pdr: extract PDR message marshalling data soc: qcom: pdr: fix parsing of domains lists soc: qcom: pdr: protect locator_addr with the main mutex firmware: qcom: scm: clarify the comment in qcom_scm_pas_init_image() firmware: qcom: scm: add support for SHM bridge memory carveout firmware: qcom: tzmem: enable SHM Bridge support firmware: qcom: scm: add support for SHM bridge operations firmware: qcom: qseecom: convert to using the TZ allocator firmware: qcom: scm: make qcom_scm_qseecom_app_get_id() use the TZ allocator firmware: qcom: scm: make qcom_scm_lmh_dcvsh() use the TZ allocator firmware: qcom: scm: make qcom_scm_ice_set_key() use the TZ allocator firmware: qcom: scm: make qcom_scm_assign_mem() use the TZ allocator ... Link: https://lore.kernel.org/r/20240705034410.13968-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Lorenzo Bianconi
|
7aa291962f |
dt-bindings: clock: airoha: Add reset support to EN7581 clock binding
Introduce reset capability to EN7581 device-tree clock binding
documentation. Add reset register mapping between misc scu and pb scu
ones in order to follow the memory order. This change is not
introducing any backward compatibility issue since the EN7581 dts is not
upstream yet.
Fixes:
|
||
|
Bjorn Andersson
|
b3d57c5582 |
Merge branch '20240430064214.2030013-3-quic_varada@quicinc.com' into clk-for-6.11
Merge the IPQ9574 interconnect binding through a topic branch, to make it possible to use the constants in the DeviceTree source branch as well. |
||
|
Arnd Bergmann
|
2d61b9303c |
Qualcomm Arm64 DeviceTree updates for v6.11
This introduces 11 new boards, namely: * ASUS Vivobook S 15 * Lenovo Smart Tab M10 DTS * Motorola Moto E 2015 LTE (surnia) * Motorola Moto G 2015 (osprey) * Motorola Moto G4 Play (harpia) * Qualcomm AIM300 AIoT development board * Qualcomm SM8650 Hardware Development Kit (HDK) * SHIFTphone 8 * Samsung Galaxy Z Fold5 * Schneider HMIBSC board DTS * TP-Link Archer AX55 v1 Of particular interest here is the Asus Vivobook, the first supported X1 Elite consumer laptop. For IPQ6018 an SDHCI controller is added and on IPQ9574 an MDIO bus is described. The improvements to MSM8916-based devices continues, with sound and mdoem support added to Acer Iconia Talk S and GPLUS FL8005A, the latter also gaining BMS support. Samsung Galaxy devices gains PMIC and charger definitions, NFC support and MUIC. Accelerometer and magnetometer support is added to the Samsung Galaxy Grand Prime devices. On MSM8976 definitions for IOMMU, the display subsystem, wifi subsystem, and Adreno GPU are added. On MSM8996 UFS core clock frequencies are specified, FastRPC nodes are added for the audio DSP, glink-edges are described where available, the display subsystem reset is added. Venus is introduced on MSM8998 and the "No MSA Ready" quirk is added to allow ath10k to come up. GPU support is added to QCM2290 and enabled on the RB1 development board. The I2C controller used for communicating with the LT9611UXC HDMI bridge is temporarily replaced with i2c-gpio while issues with the builtin controller is diagnosed. The same is done for RB2, on the QRB4210 platform. On RB2 TCPM max current draw is corrected and the vreg_l9a regulator is marked as always on to match expectations. On the QDU1000 platform, USB is added, secure QFPROM is introduced to allow LLCC to access OTP data. USB is enabled on the two IDP boards. SA8775p gains PCIe endpoint definitions, LLCCC support, IMEM and PIL info regions. Nodes are marked as dma-coherent as needed, a dedicated carveout for shared memory bridge allocations is introduced. The SA8775P ride device is split in the two versions r2 and r3. The SC7180 Trogdor clamshell/detachable fragments are refactored for convenience, and pwmleds are disabled where unused. On SC7280 the APR nodes for interfacing with the audio services in audio DSP firmware are introduced. The Qualcomm SMMU TBUs are described, to enable improved debug support. QoS clocks are added to interconnects, as needed in order to operate the QoS settings on some buses. SuperSpeed in park is disabled for the primary DWC3 instance to address host controller issues under load. The PM8008 (camera PMIC) is introduced in Fairphone 5, regulators are named for better output, and firmware name for IPA is adjusted to the preferred file format. The HDMI bridge on Rb3gen2 is described, rtc, gpi-dma and qup nodes are enabled. The Type-C port manager found in PM7250b is enabled, for targets not using pmic-glink firmware for Type-C management. SC8180X gets a number of smaller corrections, and some cleanups - related to both functional issues and DeviceTree validation. The PSHOLD node is marked reserved, after reports that this causes issues during shutdown. Description of the USB signals are updated to match the signal path. The PM8008 camera PMIC is added to Lenovo ThinkPad X13s. The PM660 PMIC is extended with charger and rradc definitions, and the SDM670 gains a SMEM region definition. On SDM845 the Qualcomm SMMU TBU nodes are described, to enable improved debug output during faults etc. The UFS PHY is associated with its GDSC, and the DisplayPort controller is wired up to the QMP PHY. The Lenovo Yoga C630 Embedded Controller is introduced, adding battery and Type-C port management and altmode support. The C630 also gains WiFI calibration variant information, to cause selection of the right data. The missing IPA firmware path is corrected. For the SDX75 platform, AOSS, IPCC, SDHCI, TCSR, modem SMP2P, I2C and SPI nodes are introduced. SD-card support is added to the IDP board. CPUfreq support is introduced for the SM4450 platform. Missing reset is added to the SDHC controller of SM6115. The UFS PHY is associated with its GDSC, so is the PHY on SM6350. On Fairphone 4, the camera pmic (PM8008) is introduced, regulators are named for more informative debug output, and USB role switching is enabled. On the Fairphone 3, vibrator support is added and enabled. On SM8250, the USB signal paths are properly described in the OF graph, the UFS PHY gains its required power-domains description. Thanks to the introduction of PCI power sequence support, the QRB5165 RB5 WiFi chip can now be powered up, so this is added. Touchscreen interrupt flags are corrected accross a number of Sony Xperia devices, to remove the unexpected traces from downstream. On SM8450 an OPP-table is introduced for the PCIe controllers, to specify the bandwidth and performance state requirements for the different genrations and link widths. For this the PCIe controllers also gains interconnect path definitions. The LLCC register layout is corrected, and the UFS PHY is associated with its GDSC. On the SM8550 development boards speaker port mapping is added. WiFi support is finally enabled on the QRD board. The new AIM300 development platform/board is introduced. For SM8650 video and camera clock controller are introduced. SCM node gains details necessary to trigger USB ramdump (download mode) upon a system crash. WiFi support and speaker port mapping is added to the QRD and the newly introduced HDK. On the MTP the USB Type-C connector is describe to be routed to the PHY. In addition to the base HDK, a Display Card overlay is also introduced. For X1 Elite bwmon, fastrpc and GPU support, tsens, and the missing PCIe 6a instance are added. Thermal zones are described. Pmic-glink is introduced for both CRD and QCP devices, and remaining PMICs are described. Audio support is also added to the QCP. An explicit, larger, chunk of CMA memory is added to the various devices, in order to compensate for the lack of IOMMU for PCIe. Across a wide range of platforms, the thermal zone polling delays are removed as supplies are interrupt driven anyways. Also thermal related is the introduction of GPU thermal throttling, across many SoCs. The old SMSM implementation is finally transitioned to using the mailbox-based description and implementation for invoking interrupts on remote processors. As such interrupt-triggering is converted to use this mechanism on related platforms. The usb-role-switch property is removed for all USB instances hard coded to either host or peripheral across a range of boards. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaJfz0VHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FxOMQALOlJsncvYy+WBZ+ganw3VTY43x+ CYtmM+cvy/oEEmqLLKWO63XyPtiDuhwjjmjO9H7019Zhi7dB2odXfr8PH4Wz315G /nW99uEoR1kgdHtMwMhBv+gMSf00c6D5X3fbFxVbt2lqlaB9blZeqbA/PsAcC2Dr FId/ji6/cMdEmC1qbWtvBMSc9Cku7WNt/90qe9q5KuwKbRVF/FKPj+lfBxGnrjQ8 vaKHmqVOYSV+cfuWqA/HrIe3WUds9eXv/F+O2nx22BTqEiBmlOxVR63LwQGFV9D+ fOpRaIR30TxBk+DK/i4jnNu7UEA9lPf//0RDiKeyySAffLfQWBpURGcRUrF6X+yz 7qdi8Ep/L1v7M+FKdPdCDooVxM91JHErPB65+/T/gLbI2Oe7MZED+hY/3UcTY8cr SkSH+3VeZk8M4DDFuVdgXcTBk1d/d1zqaKKokm9IkIqdAspDYJNvlOHMfgg1bsQe Ny9epqR+RR5wFulJ0W0YWGibOYkcubduAytvtad1lawmSTCmMI8SZb8K9n1l2RI3 vYEgaSfOo0SHprgZlpULc+LqPF9n9W2RrME8iFIqpfsZ9ovFccr3QgNbHdtVZyoN t0DhAUk5UKEM4iQ4vf/7+T2WjFA2LMAg1Bznv8X4L69BVkAH/VwRudbwQe429Yqm psehVa9nc/+upil7 =Hsda -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL+k8ACgkQYKtH/8kJ UiffeBAAlBRO7Pp8MCFco+63SXZQTGJ0UXmmrkWLiXW6iCGDuUrllCLuygOGZx8O FVQ9dBQ5AXQbOy++LTYvHIzWt3pCJSIlnbhiv9Na04IgBFnZ3Uy+e+Iikq25o51M gC2lIvLfwDaTVe8KMvLdNoTUN7jWFv6dZerNo35K6mLxf5nwU6bucljM2Vn0naSK 6G4HMXA+ByvCMgSVOp4/5Qd3+XadH8604W+48n6aRM9YtLhTgV2bRRNY23y8hiAI IItgCMjzS30mbd6yrnXJOix0IoNhe9IxNKoKh8P0+G0CvAzH8s7KcVAlU+tiTsnR 0vMKYcYPK6PW8T4umHSvTTEG3HR+uvC5vyWAnCKvlx2OElD80JoVp/IWvmy4n9Fv U3hltgntDkn8raupGgQ9oeM6EoVR6fq5UtzuaZgkElWyuSigVK9jOsG8hrqf1gdo w7I6APX4c1D8ArEvCbBUmff0hy4LqnScwz+7evFwZORMDYiYxhy2ybRZVYGknozA miEkVGZr+MHLCszF8kzetHOFhhddqvTWx6IEh/5SMPTkqnGfaOTc667rJ/hfHt8/ 8AYw3dfpKrXsf3KxeNVlVpJDNexZU3yHK2glNEpr0yvXAuYYXfmXhhNo2DHNDzyg VHd6J24UoWMpQisszsfFPBtBsianBTzsPhfCfmprg8um2f0MaKY= =2vUa -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm Arm64 DeviceTree updates for v6.11 This introduces 11 new boards, namely: * ASUS Vivobook S 15 * Lenovo Smart Tab M10 DTS * Motorola Moto E 2015 LTE (surnia) * Motorola Moto G 2015 (osprey) * Motorola Moto G4 Play (harpia) * Qualcomm AIM300 AIoT development board * Qualcomm SM8650 Hardware Development Kit (HDK) * SHIFTphone 8 * Samsung Galaxy Z Fold5 * Schneider HMIBSC board DTS * TP-Link Archer AX55 v1 Of particular interest here is the Asus Vivobook, the first supported X1 Elite consumer laptop. For IPQ6018 an SDHCI controller is added and on IPQ9574 an MDIO bus is described. The improvements to MSM8916-based devices continues, with sound and mdoem support added to Acer Iconia Talk S and GPLUS FL8005A, the latter also gaining BMS support. Samsung Galaxy devices gains PMIC and charger definitions, NFC support and MUIC. Accelerometer and magnetometer support is added to the Samsung Galaxy Grand Prime devices. On MSM8976 definitions for IOMMU, the display subsystem, wifi subsystem, and Adreno GPU are added. On MSM8996 UFS core clock frequencies are specified, FastRPC nodes are added for the audio DSP, glink-edges are described where available, the display subsystem reset is added. Venus is introduced on MSM8998 and the "No MSA Ready" quirk is added to allow ath10k to come up. GPU support is added to QCM2290 and enabled on the RB1 development board. The I2C controller used for communicating with the LT9611UXC HDMI bridge is temporarily replaced with i2c-gpio while issues with the builtin controller is diagnosed. The same is done for RB2, on the QRB4210 platform. On RB2 TCPM max current draw is corrected and the vreg_l9a regulator is marked as always on to match expectations. On the QDU1000 platform, USB is added, secure QFPROM is introduced to allow LLCC to access OTP data. USB is enabled on the two IDP boards. SA8775p gains PCIe endpoint definitions, LLCCC support, IMEM and PIL info regions. Nodes are marked as dma-coherent as needed, a dedicated carveout for shared memory bridge allocations is introduced. The SA8775P ride device is split in the two versions r2 and r3. The SC7180 Trogdor clamshell/detachable fragments are refactored for convenience, and pwmleds are disabled where unused. On SC7280 the APR nodes for interfacing with the audio services in audio DSP firmware are introduced. The Qualcomm SMMU TBUs are described, to enable improved debug support. QoS clocks are added to interconnects, as needed in order to operate the QoS settings on some buses. SuperSpeed in park is disabled for the primary DWC3 instance to address host controller issues under load. The PM8008 (camera PMIC) is introduced in Fairphone 5, regulators are named for better output, and firmware name for IPA is adjusted to the preferred file format. The HDMI bridge on Rb3gen2 is described, rtc, gpi-dma and qup nodes are enabled. The Type-C port manager found in PM7250b is enabled, for targets not using pmic-glink firmware for Type-C management. SC8180X gets a number of smaller corrections, and some cleanups - related to both functional issues and DeviceTree validation. The PSHOLD node is marked reserved, after reports that this causes issues during shutdown. Description of the USB signals are updated to match the signal path. The PM8008 camera PMIC is added to Lenovo ThinkPad X13s. The PM660 PMIC is extended with charger and rradc definitions, and the SDM670 gains a SMEM region definition. On SDM845 the Qualcomm SMMU TBU nodes are described, to enable improved debug output during faults etc. The UFS PHY is associated with its GDSC, and the DisplayPort controller is wired up to the QMP PHY. The Lenovo Yoga C630 Embedded Controller is introduced, adding battery and Type-C port management and altmode support. The C630 also gains WiFI calibration variant information, to cause selection of the right data. The missing IPA firmware path is corrected. For the SDX75 platform, AOSS, IPCC, SDHCI, TCSR, modem SMP2P, I2C and SPI nodes are introduced. SD-card support is added to the IDP board. CPUfreq support is introduced for the SM4450 platform. Missing reset is added to the SDHC controller of SM6115. The UFS PHY is associated with its GDSC, so is the PHY on SM6350. On Fairphone 4, the camera pmic (PM8008) is introduced, regulators are named for more informative debug output, and USB role switching is enabled. On the Fairphone 3, vibrator support is added and enabled. On SM8250, the USB signal paths are properly described in the OF graph, the UFS PHY gains its required power-domains description. Thanks to the introduction of PCI power sequence support, the QRB5165 RB5 WiFi chip can now be powered up, so this is added. Touchscreen interrupt flags are corrected accross a number of Sony Xperia devices, to remove the unexpected traces from downstream. On SM8450 an OPP-table is introduced for the PCIe controllers, to specify the bandwidth and performance state requirements for the different genrations and link widths. For this the PCIe controllers also gains interconnect path definitions. The LLCC register layout is corrected, and the UFS PHY is associated with its GDSC. On the SM8550 development boards speaker port mapping is added. WiFi support is finally enabled on the QRD board. The new AIM300 development platform/board is introduced. For SM8650 video and camera clock controller are introduced. SCM node gains details necessary to trigger USB ramdump (download mode) upon a system crash. WiFi support and speaker port mapping is added to the QRD and the newly introduced HDK. On the MTP the USB Type-C connector is describe to be routed to the PHY. In addition to the base HDK, a Display Card overlay is also introduced. For X1 Elite bwmon, fastrpc and GPU support, tsens, and the missing PCIe 6a instance are added. Thermal zones are described. Pmic-glink is introduced for both CRD and QCP devices, and remaining PMICs are described. Audio support is also added to the QCP. An explicit, larger, chunk of CMA memory is added to the various devices, in order to compensate for the lack of IOMMU for PCIe. Across a wide range of platforms, the thermal zone polling delays are removed as supplies are interrupt driven anyways. Also thermal related is the introduction of GPU thermal throttling, across many SoCs. The old SMSM implementation is finally transitioned to using the mailbox-based description and implementation for invoking interrupts on remote processors. As such interrupt-triggering is converted to use this mechanism on related platforms. The usb-role-switch property is removed for all USB instances hard coded to either host or peripheral across a range of boards. * tag 'qcom-arm64-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (279 commits) dt-bindings: arm: qcom: Document samsung,ms013g arm64: dts: qcom: Add device tree for ASUS Vivobook S 15 dt-bindings: arm: qcom: Add ASUS Vivobook S 15 arm64: dts: qcom: qrb4210-rb2: Correct max current draw for VBUS arm64: dts: qcom: msm8998: add venus node arm64: dts: qcom: sa8775p-ride-r3: add new board file arm64: dts: qcom: move common parts for sa8775p-ride variants into a .dtsi dt-bindings: arm: qcom: add sa8775p-ride Rev 3 arm64: dts: qcom: sm8550-qrd: add port mapping to speakers arm64: dts: qcom: sm8550-mtp: add port mapping to speakers arm64: dts: qcom: sm8550-hdk: add port mapping to speakers arm64: dts: qcom: sm8650-qrd: add port mapping to speakers arm64: dts: qcom: sm8650-mtp: add port mapping to speakers arm64: dts: qcom: sm8650-hdk: add port mapping to speakers arm64: dts: qcom: sm7225-fairphone-fp4: Name the regulators arm64: dts: qcom: pm8916: correct thermal zone name arm64: dts: qcom: x1e80100: Add gpu support arm64: dts: qcom: x1e80100: Fix USB HS PHY 0.8V supply arm64: dts: qcom: qcs6490-rb3gen2: enable hdmi bridge arm64: dts: qcom: sm6115: add resets for sdhc_1 ... Link: https://lore.kernel.org/r/20240706173140.18887-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
03b4edd51f |
STM32 DT for v6.11, round 1
Highlights:
----------
-MCU:
- Add syscfg missing clock on stm32f429.
- MPU:
- STM32MP13:
- Add camera support on stm32mp135f-dk bord using DCMIPP and
GC2145 sensor.
- Document PWM output for stm32mp135f-dk
- Add goodix touchscreen support on stm32mp135f-dk board.
- Add new DH DHCOR / DHSBC board (Som + carrier board) based on
STM32MP135F SoC.
SOM part contains: STM32MP135F SoC, 512MB DDR2L RAM and
eMMC/SDIO wifi module.
The carrier boards embedds 2 RGMII ETH ports, USB-A,USB-C
and an extansion connector.
- Add Ethernet controller support on stm32mp135f-dk.
It uses LAN8742A PHY based on RMII.
- STMP32MP15:
- Rework Octavo OSD32MP1 split for USB phy.
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- STM32MP25:
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- Enable firewall for RCC.
- Add all U(s)ART nodes for stm32mp25.
- Add 3 power domains for low power modes.
- Add HPDMA support.
- Add Ethernet controller (ETH2) support on stm32mp257f-ev1.
It uses Realtek PHY based on RGMII.
- Add and enable SCMI regulator support.
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Merge tag 'stm32-dt-for-v6.11-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.11, round 1
Highlights:
----------
-MCU:
- Add syscfg missing clock on stm32f429.
- MPU:
- STM32MP13:
- Add camera support on stm32mp135f-dk bord using DCMIPP and
GC2145 sensor.
- Document PWM output for stm32mp135f-dk
- Add goodix touchscreen support on stm32mp135f-dk board.
- Add new DH DHCOR / DHSBC board (Som + carrier board) based on
STM32MP135F SoC.
SOM part contains: STM32MP135F SoC, 512MB DDR2L RAM and
eMMC/SDIO wifi module.
The carrier boards embedds 2 RGMII ETH ports, USB-A,USB-C
and an extansion connector.
- Add Ethernet controller support on stm32mp135f-dk.
It uses LAN8742A PHY based on RMII.
- STMP32MP15:
- Rework Octavo OSD32MP1 split for USB phy.
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- STM32MP25:
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- Enable firewall for RCC.
- Add all U(s)ART nodes for stm32mp25.
- Add 3 power domains for low power modes.
- Add HPDMA support.
- Add Ethernet controller (ETH2) support on stm32mp257f-ev1.
It uses Realtek PHY based on RGMII.
- Add and enable SCMI regulator support.
* tag 'stm32-dt-for-v6.11-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (31 commits)
arm64: dts: st: describe power supplies for stm32mp257f-ev1 board
arm64: dts: st: add scmi regulators on stm32mp25
regulator: Add STM32MP25 regulator bindings
ARM: dts: stm32: omit unused pinctrl groups from stm32mp13 dtb files
arm64: dts: st: enable Ethernet2 on stm32mp257f-ev1 board
arm64: dts: st: add eth2 pinctrl entries in stm32mp25-pinctrl.dtsi
arm64: dts: st: add ethernet1 and ethernet2 support on stm32mp25
arm64: dts: st: add HPDMA nodes on stm32mp251
ARM: dts: stm32: Add ethernet support for DH STM32MP13xx DHCOR DHSBC board
ARM: dts: stm32: order stm32mp13-pinctrl nodes
ARM: dts: stm32: add ethernet1 for STM32MP135F-DK board
ARM: dts: stm32: add ethernet1/2 RMII pins for STM32MP13F-DK board
ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13
ARM: dts: stm32: Document output pins for PWMs on stm32mp135f-dk
ARM: dts: stm32: OP-TEE async notif interrupt for ST STM32MP15x boards
ARM: dts: stm32: Missing clocks for stm32f429's syscfg.
ARM: dts: stm32: Add support for STM32MP13xx DHCOR SoM and DHSBC board
ARM: dts: stm32: Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board
dt-bindings: arm: stm32: Add compatible string for DH electronics STM32MP13xx DHCOR DHSBC board
ARM: dts: stm32: osd32: move pwr_regulators to common
...
Link: https://lore.kernel.org/r/8f10bd29-d067-4060-89ff-2e1a605f3141@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
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Arnd Bergmann
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9289b97a67 |
Allwinner SoC device tree changes for 6.11
This includes a commit shared with the clk tree. This commit adds clock and reset indices to the device tree binding, and thus is needed for both the device tree and driver changes. ARM64 device tree and binding-only changes - Add LRADC (low resolution ADC for resistor network based keys) for H616 SoC - Add cache information for A64, H6, and H616 SoCs - Correct model names and descriptions for Pine64 boards - Add GPADC (general purpose ADC) for H616 SoC - Add ADC joysticks based on GPADC for anbernic-rg35xx-h board - Add additional CPU OPPs for the H700 on top of existing H616 ones - Enable DVFS for rg35xx boards - Add IOMMU for H616 SoC RISC-V device tree changes - Add system LDOs to D1s/T113 SoC - Add ClockworkPi and DevTerm device trees -----BEGIN PGP SIGNATURE----- iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmaC5BEOHHdlbnNAY3Np ZS5vcmcACgkQOJpUIZwPJDDszRAAohtAXVlhcOZUyY6jnToNDRhRDe4WR2dKNuth D/sM93uBxEtHkHsV11xKdmXALYszT3c1IxA84Cj3uwBvutIK4/KQUDbtDvGedz/o 90v3bgAR1ETf7RrQFCxpQUFYNufpnXb5ZHA5jRSdxyg9coLR7sDab0r6UCh/EzyN rykvB2oSmjxyG0OjBUU3IcR0B5nliGRc9esVhdSW4cGblaJaT/NrlsmUGL39hXP2 BayJ3FFfS2izs5uHMOeQUaveadBGssc/kzJvnwy/jeM+76uY4SlH58/dl0ivWM0/ h5mifWbMIdl5kUEkUz7OaPT9O6K/1O1/heQYrQSHNKtgD6NN9uS4QWuGyfsWcpUo iRXnYrscWuGQH8ICAG9upNCto2RXn1nS3+FYv/CmNQ+Nl39RpGGWKW9KPesCttdr OgjWGgspyBT3xh4NhrxLbEOmZaCg6ZGfr8Vp4VrXLMbSOrV6Qu8VsJcRWkfwm3yb tg9ONSFrSBNwmWQIqjtpWt3j81sOKkz2WYV6+hNgDyQ5HZQZWNHhOUVQ2W912TNh vJ9d+3jgtn9wj2DyPdkzPRaNaVK+KqRbpUIXLc7TUAJaMcHzX6+ekt1576ZBNUYL hFOoMvzu6k02Fmr8qUe9PX2p5Ie6ubF+2/aWGkZ0pF2cdht1Q6IDiXsSX3PW+VBU acB1TT0= =3vmg -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9/8ACgkQYKtH/8kJ UifiHRAA0qHvjj5uaQiQnjJgOFF+Rmf3goNje2S9f35ziO2AGKqsfp651mBbZFpJ yFkIMlELMBLmgB9cEXfvoWlvUjITxduiMjn0aNfu4czRhhk1qiqwy+CVhDHT681g 71s1crZ0gT/B9hNQkfHz6AmrvMl6k9NPHioaci4abRNXsGNrZuuSFNOAC82l8nrb PLJZtNOEbtkVP5pdBatTlsdJywOLpl1KwYvXbbC8oXvMobywUSsW/gjcHV0hUjlp 4kwDEyi1cUGeNEuPAcp2Pp0H+WtHJsaTN1BhIy3kyCGiCXX3ShkZiaYIPwBGdUrz NJihJ/WoU2pMzlX5OH2L2d1KybZhOPB+kzSqw2TWyZuKNc+HY3BaXeZ8uVUz59Tv WSml2dz4+T816jDcBrK9sFC1uiJlbieKNJsH8Ol0FykJcfjD48tP7Y1uMhqN3ict y/FZ6nvPNEf7YPGGTXDjn0d5ifXAyGXLhIWxRXBP701HAzTkUPeTEdMLwj+6H1eh HBxFaa4yeAtH9+0c/Tf1Ge244OxbavwjJU4ufyD7X440nHqFVXQvF2FD451tBd5F HbXZ3cm+E8/zg55L0sAcY++5W+Aa2S+TvK64nrKcGEEDonBj3WwdNL5iwtzugWCv /AQg1UP3uQIyPvrwcyyoG8lenyHjOhZnACH3qbxpO9JnnwEIXQk= =Emn4 -----END PGP SIGNATURE----- Merge tag 'sunxi-dt-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt Allwinner SoC device tree changes for 6.11 This includes a commit shared with the clk tree. This commit adds clock and reset indices to the device tree binding, and thus is needed for both the device tree and driver changes. ARM64 device tree and binding-only changes - Add LRADC (low resolution ADC for resistor network based keys) for H616 SoC - Add cache information for A64, H6, and H616 SoCs - Correct model names and descriptions for Pine64 boards - Add GPADC (general purpose ADC) for H616 SoC - Add ADC joysticks based on GPADC for anbernic-rg35xx-h board - Add additional CPU OPPs for the H700 on top of existing H616 ones - Enable DVFS for rg35xx boards - Add IOMMU for H616 SoC RISC-V device tree changes - Add system LDOs to D1s/T113 SoC - Add ClockworkPi and DevTerm device trees * tag 'sunxi-dt-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: riscv: dts: allwinner: Add ClockworkPi and DevTerm devicetrees riscv: dts: allwinner: d1s-t113: Add system LDOs arm64: dts: allwinner: h616: add IOMMU node arm64: dts: allwinner: rg35xx: Enable DVFS CPU frequency scaling arm64: dts: allwinner: h616: add additional CPU OPPs for the H700 arm64: dts: allwinner: anbernic-rg35xx-h: Add ADC joysticks arm64: dts: allwinner: h616: Add GPADC device node dt-bindings: clock: sun50i-h616-ccu: Add GPADC clocks ARM: dts: sunxi: remove duplicated entries in makefile arm64: dts: allwinner: Add cache information to the SoC dtsi for H616 arm64: dts: allwinner: Add cache information to the SoC dtsi for A64 arm64: dts: allwinner: Correct the model names for Pine64 boards dt-bindings: arm: sunxi: Correct the descriptions for Pine64 boards arm64: dts: allwinner: Add cache information to the SoC dtsi for H6 ARM: dts: sun50i: Add LRADC node dt-bindings: input: sun4i-lradc-keys: Add H616 compatible Link: https://lore.kernel.org/r/ZoQa8r1N8yi7FlPV@wens.tw Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
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Bjorn Andersson
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47c7823be6 |
Merge branch '20240430064214.2030013-3-quic_varada@quicinc.com' into arm64-for-6.11
Merge IPQ9574 interconnect clock DeviceTree binding to gain access to the interconnect constants. |
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Varadarajan Narayanan
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d1f1570f3d |
dt-bindings: interconnect: Add Qualcomm IPQ9574 support
Add interconnect-cells to clock provider so that it can be used as icc provider. Add master/slave ids for Qualcomm IPQ9574 Network-On-Chip interfaces. This will be used by the gcc-ipq9574 driver that will for providing interconnect services using the icc-clk framework. Acked-by: Georgi Djakov <djakov@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20240430064214.2030013-3-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Pascal Paillet
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87b6426ab9 |
regulator: Add STM32MP25 regulator bindings
These bindings will be used for the SCMI voltage domain. Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
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Georgi Djakov
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19990ff048 |
Merge branch 'icc-msm8953' into icc-next
Add interconnect driver for MSM8953-based devices. * icc-msm8953 dt-bindings: interconnect: qcom: Add Qualcomm MSM8953 NoC interconnect: qcom: Add MSM8953 driver Link: https://lore.kernel.org/r/20240628-msm8953-interconnect-v3-0-a70d582182dc@mainlining.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Johan Jonker
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d89e809695 |
dt-bindings: clock: rk3188-cru-common: remove CLK_NR_CLKS
CLK_NR_CLKS should not be part of the binding. Remove since the kernel code no longer uses it. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/6f21c09b-e8d2-4749-aca6-572c79df775d@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Etienne Carriere
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1d845319dc |
dt-bindings: mfd: Dual licensing for st,stpmic1 bindings
Change include/dt-bindings/mfd/st,stpmic1.h license model from GPLv2.0 only to dual GPLv2.0 or BSD-2-Clause. I have every legitimacy to request this change on behalf of STMicroelectronics. This change clarifies that this DT binding header file can be shared with software components as bootloaders and OSes that are not published under GPLv2 terms. In CC are all the contributors to this header file. Cc: Pascal Paillet <p.paillet@st.com> Cc: Lee Jones <lee@kernel.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240617092016.2958046-1-etienne.carriere@foss.st.com Signed-off-by: Lee Jones <lee@kernel.org> |
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AngeloGioacchino Del Regno
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4d8aa43062 |
dt-bindings: iio: adc: Add MediaTek MT6359 PMIC AUXADC
Add a new binding for the MT6350 Series (MT6357/8/9) PMIC AUXADC, providing various ADC channels for both internal temperatures and voltages, audio accessory detection (hp/mic/hp+mic and buttons, usually on a 3.5mm jack) other than some basic battery statistics on boards where the battery is managed by this PMIC. Also add the necessary dt-binding headers for devicetree consumers. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://patch.msgid.link/20240604123008.327424-2-angelogioacchino.delregno@collabora.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> |
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Arnd Bergmann
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35b94a99fc |
Amlogic ARM64 DT changes for v6.11:
- New Boards: - OSMC Vero 4K - Dreambox One & Two - GXLX/S905L p271 Reference Boards - Amlogic A4 Power Domain - A bunch of DT fixes to allmost solve all remaining check errors - Amlogic S4 PWM - Fixes for: - SM1 SPDIF compatibles - Bump G12 SPDIF driver strength - Add power domain to HDMI TX - Correct HDMI TX clocks -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmaCaVoACgkQd9zb2sjI SdH12Q//cjh5uKcQ0vwxQUCXRViQA2oTQA+YsAiI7CW3/e3iZOTtgTdf/vlp7eKt fboSw8RDbzI0B+Jr/jyi1gToyNuqlttmGAsBmBe0ETdTRG2wtd7Im+RVPS0shy0/ GqDBemOpyXj08Vn/rB48g7YJGGOXfutvpK1/MPnBM0q+lYuy+gM6WatgVB1sZL4p mMY6feEwdemfWhXP3oX4HSrvj6AuuI/VVfbreueY0CRfieyWTDGLllsnEeBucU7V zm10iLG3ufalUiWMzswOSEMQUeqaA2OG8OWEKI7ie+hWcwJDlBBv3m5xSvVLd14J RqXwkeKTY1vT4ROi655yY70eZ5xU9/yb+C9QjgkG8ox6RKl2CI9qOsyhrPZysBx6 CIY6C8qGw9hpJn9Yc2lXRqnJMUVK+zGujU/nAfopVAQ3W0r2xUJwi7XhWDFyQYG/ lOo5pWf7mB688olngd2pHjhWlMEEJxniVtRpyDD9AInJ+90BB55bKhA0OXYOfBkn gxCa77wKjAqc6Rgib5mJ36ELy/WsBuIoHkDEhwxviSjnWqUN1VJwk74aTbvkyoSb Uphan5bjGVt2SRbW290M6bIUFiSz+Wg+CadnSdpoBzr5gRoFeJzAWZVuTwL4IWX4 HFmvRI2o8ShZE0YmsbvbLF22XzaZxZ3lyEBo+HzZyUbOd63SuKE= =/Qxt -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaCtFIACgkQYKtH/8kJ Uifl+xAArmGlq94Rm2y6RMy52qiV3C2kPV+JaLW3jSGXhtV3yQwUN2yFZeRMq3qc VNF/TOM4OJc848J63BztnvmP2uvHWdCrkU9AU8c5OR0zZa5GkiujFtOPE2cCUe2r 9eiyxRbShhS/aO5mvOiL2bSmt3vg1To+rBBC5olUGgpYcfPEK+652ly8hsgLdBBc 8okcCqsreNaLHUmaV+Q1SOFsQX/6nGKTO33BV8RDVper6VHF5HKlSwh7bc2uweyd iSWzYwisF5Z5SlTN10YRAt67eNBLjQGr5plshks604JO3JxeR8oTVzYiLY4EnO+l Xf2e3XVBBadmb9CAKiqxlRVFSwYBI7CeY6DTAl7dYDi0eLq7bnP3BB3u6Zc5MszX AuKLw635oTY8+BtFN0NWpl2U0Pkm0+2d/ebenaiEpODZMmMX57/+Nb/mo3xIvLJN XB8OFQJWb0I8gK9kMRz6bprVdf3SWn28H/quJSc152EjTrXIzT/lrMgGaiNAwR+W Tq2AyX/nYTHoDrd1vs8kqo9ncGghR4flb57l0FnxWj/qsQrjP8zEaNBn8jJmmXhX DAS2pjiPJpp1PyrI30sY80oyn/JGLZ2pcJFl4X19lGaHNpfH6CGTjiI/23ploZzT MDz70J/c7FRxbDM7iX7mqBha/hDa5453Xs47PPTIHbdlTvFo7R4= =jZg+ -----END PGP SIGNATURE----- Merge tag 'amlogic-arm64-dt-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM64 DT changes for v6.11: - New Boards: - OSMC Vero 4K - Dreambox One & Two - GXLX/S905L p271 Reference Boards - Amlogic A4 Power Domain - A bunch of DT fixes to allmost solve all remaining check errors - Amlogic S4 PWM - Fixes for: - SM1 SPDIF compatibles - Bump G12 SPDIF driver strength - Add power domain to HDMI TX - Correct HDMI TX clocks * tag 'amlogic-arm64-dt-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: (32 commits) arm64: dts: amlogic: setup hdmi system clock arm64: dts: amlogic: gx: correct hdmi clocks arm64: dts: amlogic: Add Amlogic S4 PWM arm64: dts: amlogic: add power domain to hdmitx arm64: dts: amlogic: g12: bump spdif output drive strength arm64: dts: amlogic: sm1: fix spdif compatibles arm64: dts: amlogic: ad402: fix thermal zone node name arm64: dts: meson: add initial support for Dreambox One/Two dt-bindings: arm: amlogic: add support for Dreambox One/Two dt-bindings: add dream vendor prefix arm64: dts: meson: add support for OSMC Vero 4K dt-bindings: arm: amlogic: add OSMC Vero 4K arm64: dts: amlogic: gxbb-odroidc2: fix invalid reset-gpio property arm64: dts: amlogic: a1: drop the invalid reset-name for usb@fe004400 arm64: dts: amlogic: a1: use correct node name for mmc controller arm64: dts: amlogic: c3: use correct compatible for gpio_intc node arm64: dts: amlogic: axg: fix tdm audio-controller clock order arm64: dts: amlogic: g12a-u200: add missing AVDD-supply to acodec arm64: dts: amlogic: g12a-u200: drop invalid sound-dai-cells arm64: dts: amlogic: sm1: fix tdm controllers compatible ... Link: https://lore.kernel.org/r/7f71e76c-c793-429a-b0ed-7296553a3eff@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Daisuke Nojiri
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5b8feca8de |
dt-bindings: input: cros-ec-keyboard: Add keyboard matrix v3.0
Add support for keyboard matrix version 3.0, which reduces keyboard ghosting. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Link: https://lore.kernel.org/r/9ae4d96cc2ce8c9de8755b9beffb78c641100fe7.1719531519.git.dnojiri@chromium.org Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> |
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Vladimir Lypak
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791ed23f73 |
dt-bindings: interconnect: qcom: Add Qualcomm MSM8953 NoC
Add the device-tree bindings for interconnect providers used on MSM8953 platform. Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20240628-msm8953-interconnect-v3-1-a70d582182dc@mainlining.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Arnd Bergmann
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c5003718cb |
More attention for the rk3128 soc (dsi, i2c, spdif, sfc), hdmi-sound
for a rk3066a board and some minor cleanups. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmZ938wQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgcqdB/sG3WZ6hIWShGF20oDTREtJlxkOGenvGZDO d3DjFoq7s2zmsucDy95zsHB0Y3xd6yfZnKBqVs0UlYoegCA/Q+67Itj4o7g7nCn+ SdgsTrc4B+EbS1OuHjeKGQbyDkk/vZ3Bhb37RBYMsfN0v5kErMdb5fh72ApXY3I3 vMDlEMdSE4vYxChy3X+arW29EDQvExfk+aNRogksQdDDo4JbJYBrKXU5YiIJV7LN 64jvzAyC83sy3wajmLf6p67wVaFAfWbKdh2oHP7s+Ra4dzsfnIDT30EDaMtic7gx YOpXxk+GJywGabYtHdUPDN5O39BQsebVkrCh3RjFVlDxXG1DVwkK =uH5O -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmZ+3BsACgkQYKtH/8kJ UieZahAAy8/8lVgeJPNAhSXD5j6Ov+gLaJBRYaVJJ29LV7PVYvlwxVzgZS8GAY9g F5KJ0EN7TewhUCm++6sZ+u1vm6chf8tk7ijOVjeiMJL25ECAvz1RnSg/qGMYTC24 ZI47IQYF+oOrV8cA3HT+5UnbsT/Jejbf4gTrLXKjvqOXjc1pXI95X74WMsnr5hH1 EM5kLVhqiMJPuDHknQavkywf4HgByMdUf6UJKboUAymHzICgwxZOcUva/QIJWZui /Wx+GrVwGPrtGgtUwsraKg3bY/eFvNso0UWGU7LWOaSk/rytTPzU7sVwInaT3qaY 6imlD27FMjmoKv5hBWK++ZN6IXMd+qCrRl1ZXTFHXN8z/ppfFnWwuhm1dqYC6dDP ypmGxC+KkEF+m8Y098XA+h1Ksdtad7XHrJuha5cvgD6ogGzfIX4/OWWpT5ia4DL2 WkMPvx0U7cUWhSwX9jRRlmLTl8ulIMmAFtPapnR/QjVlZxoRSMYs18J/m9/RXMIa N5DrHdfSl3cCX7cN4652m+F39KOnGloG0CqVe6KFkRf1eweCSKrT6W0+IZywHqVx 2Ko/2I8PoatbzLgq+b9+e+3DNWLbzGdYp6XPKOurz7rI8e6DWoU68aXIAc17rlPH 1G11r3K7UX9dNPWnZKcsbPSSwSmhoUbJt7iQ1bOMSnyJ64aUxRM= =ZCNf -----END PGP SIGNATURE----- Merge tag 'v6.11-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt More attention for the rk3128 soc (dsi, i2c, spdif, sfc), hdmi-sound for a rk3066a board and some minor cleanups. * tag 'v6.11-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add #sound-dai-cells to hdmi node on rk3128 ARM: dts: rockchip: add #sound-dai-cells to hdmi node no rk3036 ARM: dts: rockchip: enable hdmi_sound and i2s0 for mk808 hdmi ARM: dts: rockchip: Add SFC for RK3128 ARM: dts: rockchip: add hdmi-sound node to rk3066a ARM: dts: rockchip: Add spdif node for RK3128 ARM: dts: rockchip: Add i2s nodes for RK3128 ARM: dts: rockchip: Add DSI for RK3128 ARM: dts: rockchip: Add D-PHY for RK3128 dt-bindings: clock: rk3128: Add PCLK_MIPIPHY Link: https://lore.kernel.org/r/2187283.irdbgypaU6@diego Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Kuninori Morimoto
|
fafc20ded3
|
ASoC: audio-graph-port: add link-trigger-order
Sound Card need to consider/adjust HW control ordering based on the combination of CPU/Codec. The controlling feature is already supported on ASoC, but Simple Audio Card / Audio Graph Card still not support it. Let's support it. Cc: Maxim Kochetkov <fido_max@inbox.ru> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/87sexizojx.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org> |
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Bjorn Andersson
|
e2ebc65958 |
Merge branch '20240602114439.1611-1-quic_jkona@quicinc.com' into arm64-for-6.11
Merge the SM8650 video and clock controller drivers to gain access to the constants from the DeviceTree binding. |
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Bjorn Andersson
|
03675e398b |
Merge branch '20240602114439.1611-1-quic_jkona@quicinc.com' into clk-for-6.11
Merge SM8650 video and camera clock drivers through topic branch, to make available the DeviceTree binding includes to the DeviceTree source branches as well. |
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Jagadeesh Kona
|
1ae3f0578e |
dt-bindings: clock: qcom: Add SM8650 camera clock controller
Add device tree bindings for the camera clock controller on Qualcomm SM8650 platform. Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20240602114439.1611-7-quic_jkona@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Jagadeesh Kona
|
a6a61b9701 |
dt-bindings: clock: qcom: Add SM8650 video clock controller
SM8650 video clock controller has most clocks same as SM8450, but it also has few additional clocks and resets. Add device tree bindings for the video clock controller on Qualcomm SM8650 platform by defining these additional clocks and resets on top of SM8450. Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20240602114439.1611-3-quic_jkona@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Geert Uytterhoeven
|
d6c5fc9add |
dt-bindings: clock: rcar-gen2: Remove obsolete header files
The clock definitions in <dt-bindings/clock/r8a779?-clock.h> were superseded by those in <dt-bindings/clock/r8a779?-cpg-mssr.h> a long time ago. The last DTS user of these files was removed in commit |
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Marek Vasut
|
c5d1e53040 |
dt-bindings: clock: r8a7779: Remove duplicate newline
Drop duplicate newline. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240616160038.45937-1-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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|
Alex Bee
|
f9da49c3c4 |
dt-bindings: clock: rk3128: Add HCLK_SFC
Add a clock id for SFC's AHB clock. Signed-off-by: Alex Bee <knaerzche@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240606143401.32454-5-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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|
Alex Bee
|
b7f5e0636f |
dt-bindings: clock: rk3128: Drop CLK_NR_CLKS
CLK_NR_CLKS should not be part of the binding. Let's drop it, since the kernel code no longer uses it either. Signed-off-by: Alex Bee <knaerzche@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240606143401.32454-4-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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|
Chris Morgan
|
532857c2a7 |
dt-bindings: clock: sun50i-h616-ccu: Add GPADC clocks
Add the required clock bindings for the GPADC. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240605172049.231108-2-macroalpha82@gmail.com Signed-off-by: Chen-Yu Tsai <wens@csie.org> |
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|
Chen Wang
|
5911423798 |
dt-bindings: clock: sophgo: add clkgen for SG2042
Add bindings for the clock generator of divider/mux and gates working for other subsystem than RP subsystem for Sophgo SG2042. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Rob Herring <robh@kernel.org> |
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Chen Wang
|
5a7144d61d |
dt-bindings: clock: sophgo: add RP gate clocks for SG2042
Add bindings for the gate clocks of RP subsystem for Sophgo SG2042. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Rob Herring <robh@kernel.org> |
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|
Chen Wang
|
88a26c3c24 |
dt-bindings: clock: sophgo: add pll clocks for SG2042
Add bindings for the pll clocks for Sophgo SG2042. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Guo Ren <guoren@kernel.org> |
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|
Johan Hovold
|
288b550463 |
mfd: pm8008: Rework to match new DT binding
Rework the pm8008 driver to match the new devicetree binding which no longer describes internal details like interrupts and register offsets (including which of the two consecutive I2C addresses the registers belong to). Instead make the interrupt controller implementation internal and pass interrupts to the subdrivers using MFD cell resources. Note that subdrivers may either get their resources, like register block offsets, from the parent MFD or this can be included in the subdrivers directly. In the current implementation, the temperature alarm driver is generic enough to just get its base address and alarm interrupt from the parent driver, which already uses this information to implement the interrupt controller. The regulator driver, however, needs additional information like parent supplies and regulator characteristics so in that case it is easier to just augment its table with the regulator register base addresses. Similarly, the current GPIO driver already holds the number of pins and that lookup table can therefore also be extended with register offsets. Note that subdrivers can now access the two regmaps by name, even if the primary regmap is registered last so that it is returned by default when no name is provided in lookups. Finally, note that the temperature alarm and GPIO subdrivers need some minor rework before they can be used with non-SPMI devices like the PM8008. The temperature alarm MFD cell name specifically uses a "qpnp" rather than "spmi" prefix to prevent binding until the driver has been updated. Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20240608155526.12996-11-johan+linaro@kernel.org Signed-off-by: Lee Jones <lee@kernel.org> |
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AngeloGioacchino Del Regno
|
1a8009e108 |
dt-bindings: interconnect: Add MediaTek EMI Interconnect bindings
Add bindings for the MediaTek External Memory Interface Interconnect, which providers support system bandwidth requirements through Dynamic Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. This adds bindings for MediaTek MT8183 and MT8195 SoCs. Note that this is modeled as a subnode of DVFSRC for multiple reasons: - Some SoCs have more than one interconnect on the DVFSRC (and two different kinds of EMI interconnect, and also a SMI interconnect); - Some boards will want to not enable the interconnect driver because some of those are not battery powered (so they just keep the knobs at full thrust from the bootloader and never care scaling busses); - Some DVFSRC interconnect features may depend on firmware. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240610085735.147134-3-angelogioacchino.delregno@collabora.com Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Bjorn Andersson
|
ea5594aa3e |
Merge branch '20240606-topic-rb1_gpu-v4-1-4bc0c19da4af@linaro.org' into clk-for-6.11
Merge the QCM2290 GPUCC binding through a topic branch to allow for it to also be merged into the DeviceTree branch. |
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Konrad Dybcio
|
525b42832b |
dt-bindings: clock: Add Qcom QCM2290 GPUCC
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's QCM2290 SoCs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240606-topic-rb1_gpu-v4-1-4bc0c19da4af@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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|
Luo Jie
|
80bbd1c355 |
dt-bindings: clock: add qca8386/qca8084 clock and reset definitions
QCA8386/QCA8084 includes the clock & reset controller that is accessed by MDIO bus. Two work modes are supported, qca8386 works as switch mode, qca8084 works as PHY mode. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://lore.kernel.org/r/20240605124541.2711467-3-quic_luoj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Dmitry Rokosov
|
41056416ed |
dt-bindings: clock: meson: a1: peripherals: support sys_pll input
The 'sys_pll' input is an optional clock that can be used to generate 'sys_pll_div16', which serves as one of the sources for the GEN clock. Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240515185103.20256-5-ddrokosov@salutedevices.com Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Dmitry Rokosov
|
96f3b97873 |
dt-bindings: clock: meson: a1: pll: introduce new syspll bindings
The 'syspll' PLL is a general-purpose PLL designed specifically for the CPU clock. It is capable of producing output frequencies within the range of 768MHz to 1536MHz. The 'syspll_in' source clock is an optional parent connection from the peripherals clock controller. Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240515185103.20256-3-ddrokosov@salutedevices.com Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Udit Kumar
|
b472b996a4 |
dt-bindings: net: dp8386x: Add MIT license along with GPL-2.0
Modify license to include dual licensing as GPL-2.0-only OR MIT license for TI specific phy header files. This allows for Linux kernel files to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Trent Piepho <tpiepho@impinj.com> Cc: Wadim Egorov <w.egorov@phytec.de> Cc: Kip Broadhurst <kbroadhurst@ti.com> Signed-off-by: Udit Kumar <u-kumar1@ti.com> Acked-by: Wadim Egorov <w.egorov@phytec.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net> |
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Xianwei Zhao
|
5bbe5872fe |
dt-bindings: power: add Amlogic A4 power domains
Add devicetree binding document and related header file for Amlogic A4 secure power domains. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20240529-a4_secpowerdomain-v2-1-47502fc0eaf3@amlogic.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
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Xianwei Zhao
|
fc1c7f941c |
dt-bindings: clock: add Amlogic C3 peripherals clock controller
Add the peripherals clock controller dt-bindings for Amlogic C3 SoC family Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Co-developed-by: Chuan Liu <chuan.liu@amlogic.com> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20240522082727.3029656-4-xianwei.zhao@amlogic.com Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Xianwei Zhao
|
d309989a0a |
dt-bindings: clock: add Amlogic C3 SCMI clock controller support
Add the SCMI clock controller dt-bindings for Amlogic C3 SoC family Acked-by: Rob Herring (Arm) <robh@kernel.org> Co-developed-by: Chuan Liu <chuan.liu@amlogic.com> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20240522082727.3029656-3-xianwei.zhao@amlogic.com Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Xianwei Zhao
|
0e6be855a9 |
dt-bindings: clock: add Amlogic C3 PLL clock controller
Add the PLL clock controller dt-bindings for Amlogic C3 SoC family. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Chuan Liu <chuan.liu@amlogic.com> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20240522082727.3029656-2-xianwei.zhao@amlogic.com Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Alexandru Gagniuc
|
475beea0b9 |
dt-bindings: clock: Add PCIe pipe related clocks for IPQ9574
Add defines for the missing PCIe PIPE clocks. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240501040800.1542805-2-mr.nuke.me@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Alex Bee
|
14a1d1dc35 |
dt-bindings: clock: rk3128: Add PCLK_MIPIPHY
The DPHY's APB clock is required to be exposed in order to be able to enable it and access the phy's registers. Signed-off-by: Alex Bee <knaerzche@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240509140653.168591-3-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Richard Acayan
|
1866407831 |
dt-bindings: arm: qcom,ids: Add SoC ID for SDM670
The socinfo driver uses SoC IDs from the device tree bindings. Add the SoC ID for SDM670. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240524012023.318965-6-mailingradian@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Kathiravan Thirumoorthy
|
27c42e9253 |
dt-bindings: arm: qcom,ids: Add SoC ID for IPQ5321
Add the ID for the Qualcomm IPQ5321 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> Link: https://lore.kernel.org/r/20240325-ipq5321-sku-support-v2-1-f30ce244732f@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Danila Tikhonov
|
a4be1860b9 |
dt-bindings: clock: qcom: Add SM7150 VIDEOCC clocks
Add device tree bindings for the video clock controller on Qualcomm SM7150 platform. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240505201038.276047-8-danila@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Danila Tikhonov
|
0fd2a04836 |
dt-bindings: clock: qcom: Add SM7150 CAMCC clocks
Add device tree bindings for the camera clock controller on Qualcomm SM7150 platform. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240505201038.276047-6-danila@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Danila Tikhonov
|
ca3a91063a |
dt-bindings: clock: qcom: Add SM7150 DISPCC clocks
Add device tree bindings for the display clock controller on Qualcomm SM7150 platform. Co-developed-by: David Wronek <david@mainlining.org> Signed-off-by: David Wronek <david@mainlining.org> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240505201038.276047-4-danila@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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|
Linus Torvalds
|
f3033eb791 |
- Core Frameworks
- Ensure seldom updated triggers have a brightness value before first update
- New Device Support
- Add support for Simatic IPC Device BX_59A to IPC LEDs Core
- Add support for Qualcomm PMI8950 PWM to LPG Core
- New Functionality
- Add a bunch of new LED function identifiers
- Add support for High Resolution Timers in LED Trigger Patten
- Fix-ups
- Shift out Audio Trigger to the Sound subsystem
- Convert suitable calls to devm_* managed resources
- Device Tree binding adaptions/conversions/creation
- Remove superfluous code/variables/attributes and simplify overall
- Use/convert to new/better APIs/helpers/MACROs instead of hand-rolling implementations
- Bug Fixes
- Repair enabling Torch Mode from V4L2 on the second LED
- Ensure PWM is disabled when suspending
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Merge tag 'leds-next-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds
Pull LED updates from Lee Jones:
"Core Frameworks:
- Ensure seldom updated triggers have a brightness value before first
update
New Device Support:
- Add support for Simatic IPC Device BX_59A to IPC LEDs Core
- Add support for Qualcomm PMI8950 PWM to LPG Core
New Functionality:
- Add a bunch of new LED function identifiers
- Add support for High Resolution Timers in LED Trigger Patten
Fix-ups:
- Shift out Audio Trigger to the Sound subsystem
- Convert suitable calls to devm_* managed resources
- Device Tree binding adaptions/conversions/creation
- Remove superfluous code/variables/attributes and simplify overall
- Use/convert to new/better APIs/helpers/MACROs instead of
hand-rolling implementations
Bug Fixes:
- Repair enabling Torch Mode from V4L2 on the second LED
- Ensure PWM is disabled when suspending"
* tag 'leds-next-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds: (28 commits)
leds: mt6370: Remove unused field 'reg_cfgs' from 'struct mt6370_priv'
leds: lp50xx: Remove unused field 'num_of_banked_leds' from 'struct lp50xx'
leds: lp50xx: Remove unused field 'bank_modules' from 'struct lp50xx_led'
leds: aat1290: Remove unused field 'torch_brightness' from 'struct aat1290_led'
leds: sun50i-a100: Use match_string() helper to simplify the code
leds: pwm: Disable PWM when going to suspend
leds: trigger: pattern: Add support for hrtimer
leds: mt6360: Fix the second LED can not enable torch mode by V4L2
dt-bindings: leds: leds-qcom-lpg: Add support for PMI8950 PWM
leds: qcom-lpg: Add support for PMI8950 PWM
leds: apu: Remove duplicate DMI lookup data
leds: trigger: netdev: Remove not needed call to led_set_brightness in deactivate
dt-bindings: leds: Add LED_FUNCTION_SPEED_* for link speed on LAN/WAN
dt-bindings: leds: Add LED_FUNCTION_MOBILE for mobile network
leds: simatic-ipc-leds-gpio: Add support for module BX-59A
dt-bindings: leds: qcom-lpg: Document PM6150L compatible
dt-bindings: leds: pca963x: Convert text bindings to YAML
leds: an30259a: Use devm_mutex_init() for mutex initialization
leds: mlxreg: Use devm_mutex_init() for mutex initialization
leds: nic78bx: Use devm API to cleanup module's resources
...
|
||
|
Linus Torvalds
|
8053d2ffc4 |
phy-for-6.10
- New Support
- Support for Embedded DisplayPort and DisplayPort submodes and driver
support on Qualcomm X1E80100 edp driver
- Qualcomm QMP UFS PHY for SM8475, QMP USB phy for QDU1000/QRU1000 and
eusb2-repeater for SMB2360
- Samsung HDMI PHY for i.MX8MP, gs101 UFS phy
- Mediatek XFI T-PHY support for mt7988
- Rockchip usbdp combo phy driver
- Updates
- Qualcomm x4 lane EP support for sa8775p, v4 ad v6 support for X1E80100,
SM8650 tables for UFS Gear 4 & 5 and correct voltage swing tables
- Freescale imx8m-pci pcie link-up updates
- Rockchip rx-common-refclk-mode support
- More platform remove callback returning void conversions
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Merge tag 'phy-for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull generic phy updates from Vinod Koul:
"New HW Support:
- Support for Embedded DisplayPort and DisplayPort submodes and
driver support on Qualcomm X1E80100 edp driver
- Qualcomm QMP UFS PHY for SM8475, QMP USB phy for QDU1000/QRU1000
and eusb2-repeater for SMB2360
- Samsung HDMI PHY for i.MX8MP, gs101 UFS phy
- Mediatek XFI T-PHY support for mt7988
- Rockchip usbdp combo phy driver
Updates:
- Qualcomm x4 lane EP support for sa8775p, v4 ad v6 support for
X1E80100, SM8650 tables for UFS Gear 4 & 5 and correct voltage
swing tables
- Freescale imx8m-pci pcie link-up updates
- Rockchip rx-common-refclk-mode support
- More platform remove callback returning void conversions"
* tag 'phy-for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (43 commits)
dt-bindings: phy: qcom,usb-snps-femto-v2: use correct fallback for sc8180x
dt-bindings: phy: qcom,sc8280xp-qmp-ufs-phy: fix msm899[68] power-domains
dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: fix x1e80100-gen3x2 schema
phy: qcpm-qmp-usb: Add support for QDU1000/QRU1000
dt-bindings: phy: qcom,qmp-usb: Add QDU1000 USB3 PHY
dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for QDU1000
phy: qcom-qmp-pcie: add x4 lane EP support for sa8775p
phy: samsung-ufs: ufs: exit on first reported error
phy: samsung-ufs: ufs: remove superfluous mfd/syscon.h header
phy: rockchip: fix CONFIG_TYPEC dependency
phy: rockchip: usbdp: fix uninitialized variable
phy: rockchip-snps-pcie3: add support for rockchip,rx-common-refclk-mode
dt-bindings: phy: rockchip,pcie3-phy: add rockchip,rx-common-refclk-mode
phy: rockchip: add usbdp combo phy driver
dt-bindings: phy: add rockchip usbdp combo phy document
phy: add driver for MediaTek XFI T-PHY
dt-bindings: phy: mediatek,mt7988-xfi-tphy: add new bindings
phy: freescale: fsl-samsung-hdmi: Convert to platform remove callback returning void
phy: qcom: qmp-ufs: update SM8650 tables for Gear 4 & 5
MAINTAINERS: Add phy-gs101-ufs file to Tensor GS101.
...
|
||
|
Linus Torvalds
|
34dcc46610 |
omap: redo the driver from legacy to mailbox api
zynqmp: enable bufferless IPI arm: add mhu-v3 driver common: convert from tasklet to BH workqueue qcom: MSM8974 APCS compatible -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmZMrLAACgkQf9lkf8eY P5UWFRAAhdtfFtdw3MgabOEd47kybvr+gkBcPEHb83CIuCP8K10LPraAzDC/TIj/ lJi56JCO7BNoZyZs/Hpk9TZvf5X7D437TGEUCCJzz4HSgVmjR2fGtHlDTanx+Pot jk/UOMLgtTxwt95DkIsyDs6UFXHuQ8MG3ItJmybuZs28S3fgoYRd0n+xQMz6rZm4 iJoGGxYBv9tRbS+lkEaeu3DZb0429SXLSpx4MrRvjBpo0ms4RO/m0lphLJntkhoZ ic73P8UhdbKjOkNL1SM6riw3fm3szdWourcirwFbjkI2aaVbUUUt+HRCjrm+DD6l RfL3LT7w+uSMSuiLhDzG0Nj/8q05fSNMZ/qbXOcBawM7BeqzPJA59ysuIsYdTTSO RlQtQCQIHpdv5+GDcOrPGXePavDOFSapcFdcWE5yHOCmxweVLt6HeEk+uXCAq1/i f0+VymcsHLNcRpNA2ERuBzk+1oz1l866VpzNLVcvTaR5qWETFJAsDS2DyZveJ6V7 xDnvqGMWsyLNzBrPtHQg3NigiaCrcaM6QBVow8kveZuYoYtmNJ4Iq2SH1KHauNXA 1yatWf2UtjebBT7vvdptYra278szcpJ7b3NlJCJ6xsAP4ZUoH136Ib2kVWsZTId1 HpZxrrGRngLNNwUU6fB2NtPSzXpYRzkCdwi4mitxjHA4pmfAsNQ= =i6Oe -----END PGP SIGNATURE----- Merge tag 'mailbox-v6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox Pull mailbox updates from Jassi Brar: - redo the omap driver from legacy to mailbox api - enable bufferless IPI for zynqmp - add mhu-v3 driver - convert from tasklet to BH workqueue - add qcom MSM8974 APCS compatible IDs * tag 'mailbox-v6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox: (24 commits) dt-bindings: mailbox: qcom-ipcc: Document the SDX75 IPCC dt-bindings: mailbox: qcom: Add MSM8974 APCS compatible mailbox: Convert from tasklet to BH workqueue mailbox: mtk-cmdq: Fix pm_runtime_get_sync() warning in mbox shutdown mailbox: mtk-cmdq-mailbox: fix module autoloading mailbox: zynqmp: handle SGI for shared IPI mailbox: arm_mhuv3: Add driver dt-bindings: mailbox: arm,mhuv3: Add bindings mailbox: omap: Remove kernel FIFO message queuing mailbox: omap: Reverse FIFO busy check logic mailbox: omap: Remove mbox_chan_to_omap_mbox() mailbox: omap: Use mbox_controller channel list directly mailbox: omap: Use function local struct mbox_controller mailbox: omap: Merge mailbox child node setup loops mailbox: omap: Use devm_pm_runtime_enable() helper mailbox: omap: Remove device class mailbox: omap: Remove unneeded header omap-mailbox.h mailbox: omap: Move fifo size check to point of use mailbox: omap: Move omap_mbox_irq_t into driver mailbox: omap: Remove unused omap_mbox_request_channel() function ... |
||
|
Linus Torvalds
|
2de68638aa |
Pin control changes for the v6.10 kernel cycle:
Core changes: - Use DEFINE_SHOW_STORE_ATTRIBUTE() in debugfs entries. New drivers: - Qualcomm PMIH0108, PMD8028, PMXR2230 and PM6450 pin control support. Improvements: - Serious cleanup of the recently merged aw9523 driver. - Fix PIN_CONFIG_BIAS_DISABLE handling in pinctrl-single. - A slew of device tree binding cleanups. - Support a bus clock in the Samsung driver. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmZLAM8ACgkQQRCzN7AZ XXNxcRAAhkMY+TH2J83NTFZ9ATMguQGaozLM3eGiVXGtOQmNqDo7aHmP/zTi+0Ve wC6UTQG0/s+MCkbEQPGN5DzEuEJxEJzWKiGjqNV4gl07QcHV8ZeSWu1lRHvW21PB LcRBYmw+wAI0tXCz5t3gAkjs8fc5Vj0uqbWdkgreukULbhikXLmcm5meQ9maZleT 9GSK/nDqfHahp9hmALz8n1/niPtF4JzNnEfVcVcnBFlX/oszD6vxc0foM0TBEWKI q3HYOj1tw0ei+ke01eTlivi+suXDkrw0bDLozWYtFMhs9juJbEhf2RkKKfs4r1iW gukzogalaUDEgFK9MRboCqNEbnRkX8yNZQhAVqt5Q0yhaepl2UVgLfGI9TwQY/17 r8f10fp7sKuf9bhRlVr+fMYT0M2QqowMgO8jpA+m4QeKrZKfYvuHFJUIKhtYV1zK 6lGicvu5LBIbF2NOmoFvp1XiiWnoD1abrHxmEH/HRfm62bOEQYO/KKWuDY3WIuNb xtgQmkt6+WFMF693ygKErbtJKAR3IlFVZ/3mgL1areKp0fOETxqRng0ImYOaFwTG gijYm9MLJIlzX/yht/X7V77Sp4kIPz6WCqBIIataHpvDbEL4SBGjLIv/H1+pXtxi SHSuOPygJLzURogkVeANWQ2jT9LJVR1A/m9xoeA2HejEOlbFMnA= =9Ty5 -----END PGP SIGNATURE----- Merge tag 'pinctrl-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Core changes: - Use DEFINE_SHOW_STORE_ATTRIBUTE() in debugfs entries New drivers: - Qualcomm PMIH0108, PMD8028, PMXR2230 and PM6450 pin control support Improvements: - Serious cleanup of the recently merged aw9523 driver - Fix PIN_CONFIG_BIAS_DISABLE handling in pinctrl-single - A slew of device tree binding cleanups - Support a bus clock in the Samsung driver" * tag 'pinctrl-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits) pinctrl: bcm2835: Make pin freeing behavior configurable dt-bindings: pinctrl: qcom,pmic-gpio: Fix "comptaible" typo for PMIH0108 pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regs dt-bindings: pinctrl: mediatek: mt7622: add "antsel" function dt-bindings: pinctrl: mediatek: mt7622: fix array properties pinctrl: samsung: drop redundant drvdata assignment pinctrl: samsung: support a bus clock dt-bindings: pinctrl: samsung: google,gs101-pinctrl needs a clock pinctrl: renesas: rzg2l: Limit 2.5V power supply to Ethernet interfaces pinctrl: renesas: r8a779h0: Add INTC-EX pins, groups, and function pinctrl: renesas: r8a779h0: Fix IRQ suffixes pinctrl: renesas: rzg2l: Remove extra space in function parameter dt-bindings: pinctrl: qcom,pmic-mpp: add support for PM8901 pinctrl: pinconf-generic: print hex value pinctrl: realtek: fix module autoloading pinctrl: qcom: sm7150: fix module autoloading pinctrl: loongson2: fix module autoloading pinctrl: mediatek: fix module autoloading pinctrl: freescale: imx8ulp: fix module autoloading dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes ... |
||
|
Cristian Marussi
|
cd251970b1 |
dt-bindings: mailbox: arm,mhuv3: Add bindings
Add bindings for the ARM MHUv3 Mailbox controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com> |
||
|
Linus Torvalds
|
619b92b9c8 |
I'm actually surprised this time. There aren't any new Qualcomm SoC clk
drivers. And there's zero diff in the core clk framework. Instead we have new
clk drivers for STM and Sophgo, with Samsung^WGoogle in third for the diffstat
because they introduced HSI0 and HSI2 clk drivers for Google's GS101 SoC (high
speed interface things like PCIe, UFS, and MMC). Beyond those big diffs there's
the usual updates to various clk drivers for incorrect parent descriptions or
mising MODULE_DEVICE_TABLE()s, etc. Nothing in particular stands out as super
interesting here.
New Drivers:
- STM32MP257 SoC clk driver
- Airoha EN7581 SoC clk driver
- Sophgo CV1800B, CV1812H and SG2000 SoC clk driver
- Loongson-2k0500 and Loongson-2k2000 SoC clk driver
- Add HSI0 and HSI2 clock controllers for Google GS101
- Add i.MX95 BLK CTL clock driver
Updates:
- Allocate clk_ops dynamically for SCMI clk driver
- Add support in qcom RCG and RCG2 for multiple configurations for the same frequency
- Use above support for IPQ8074 NSS port 5 and 6 clocks to resolve issues
- Fix the Qualcomm APSS IPQ5018 PLL to fix boot failures of some boards
- Cleanups and fixes for Qualcomm Stromer PLLs
- Reduce max CPU frequency on Qualcomm APSS IPQ5018
- Fix Kconfig dependencies of Qualcomm SM8650 GPU and SC8280XP camera
clk drivers
- Make Qualcomm MSM8998 Venus clocks functional
- Cleanup downstream remnants related to DisplayPort across Qualcomm
SM8450, SM6350, SM8550, and SM8650
- Reuse the Huayra APSS register map on Qualcomm MSM8996 CBF PLL
- Use a specific Qualcomm QCS404 compatible for the otherwise generic
HFPLL
- Remove Qualcomm SM8150 CPUSS AHB clk as it is unused
- Remove an unused field in the Qualcomm RPM clk driver
- Add missing MODULE_DEVICE_TABLE to Qualcomm MSM8917 and MSM8953
global clock controller drivers
- Allow choice of manual or firmware-driven control over PLLs, needed
to fully implement CPU clock controllers on Exynos850
- Correct PLL clock IDs on ExynosAutov9
- Propagate certain clock rates to allow setting proper SPI clock
rates on Google GS101
- Mark certain Google GS101 clocks critical
- Convert old S3C64xx clock controller bindings to DT schema
- Add new PLL rate and missing mux on Rockchip rk3568
- Add missing reset line on Rockchip rk3588
- Removal of an unused field in struct rockchip_mmc_clock
- Amlogic s4/a1: add regmap maximum register for proper debugfs dump
- Amlogic s4: add MODULE_DEVICE_TABLE() on pll and periph controllers
- Amlogic pll driver: print clock name on lock error to help debug
- Amlogic vclk: finish dsi clock path support
- Amlogic license: fix occurence "GPL v2" as reported by checkpatch
- Add PM runtime support to i.MX8MP Audiomix
- Add DT schema for i.MX95 Display Master Block Control
- Convert to platform remove callback returning void for i.MX8MP
Audiomix
- Add SPI (MSIOF) and external interrupt (INTC-EX) clocks on Renesas R-Car V4M
- Add interrupt controller (PLIC) clock and reset on Renesas RZ/Five
- Prepare power domain support for Renesas RZ/G2L family members, and add
actual support on Renesas RZ/G3S SoC
- Add thermal, serial (SCIF), and timer (CMT/TMU) clocks on Renesas R-Car V4M
- Add additional constraints to Allwinner A64 PLL MIPI clock
- Fix autoloading sunxi-ng clocks when build as a module
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"I'm actually surprised this time. There aren't any new Qualcomm SoC
clk drivers. And there's zero diff in the core clk framework.
Instead we have new clk drivers for STM and Sophgo, with
Samsung^WGoogle in third for the diffstat because they introduced HSI0
and HSI2 clk drivers for Google's GS101 SoC (high speed interface
things like PCIe, UFS, and MMC).
Beyond those big diffs there's the usual updates to various clk
drivers for incorrect parent descriptions or mising
MODULE_DEVICE_TABLE()s, etc. Nothing in particular stands out as super
interesting here.
New Drivers:
- STM32MP257 SoC clk driver
- Airoha EN7581 SoC clk driver
- Sophgo CV1800B, CV1812H and SG2000 SoC clk driver
- Loongson-2k0500 and Loongson-2k2000 SoC clk driver
- Add HSI0 and HSI2 clock controllers for Google GS101
- Add i.MX95 BLK CTL clock driver
Updates:
- Allocate clk_ops dynamically for SCMI clk driver
- Add support in qcom RCG and RCG2 for multiple configurations for
the same frequency
- Use above support for IPQ8074 NSS port 5 and 6 clocks to resolve
issues
- Fix the Qualcomm APSS IPQ5018 PLL to fix boot failures of some
boards
- Cleanups and fixes for Qualcomm Stromer PLLs
- Reduce max CPU frequency on Qualcomm APSS IPQ5018
- Fix Kconfig dependencies of Qualcomm SM8650 GPU and SC8280XP camera
clk drivers
- Make Qualcomm MSM8998 Venus clocks functional
- Cleanup downstream remnants related to DisplayPort across Qualcomm
SM8450, SM6350, SM8550, and SM8650
- Reuse the Huayra APSS register map on Qualcomm MSM8996 CBF PLL
- Use a specific Qualcomm QCS404 compatible for the otherwise generic
HFPLL
- Remove Qualcomm SM8150 CPUSS AHB clk as it is unused
- Remove an unused field in the Qualcomm RPM clk driver
- Add missing MODULE_DEVICE_TABLE to Qualcomm MSM8917 and MSM8953
global clock controller drivers
- Allow choice of manual or firmware-driven control over PLLs, needed
to fully implement CPU clock controllers on Exynos850
- Correct PLL clock IDs on ExynosAutov9
- Propagate certain clock rates to allow setting proper SPI clock
rates on Google GS101
- Mark certain Google GS101 clocks critical
- Convert old S3C64xx clock controller bindings to DT schema
- Add new PLL rate and missing mux on Rockchip rk3568
- Add missing reset line on Rockchip rk3588
- Removal of an unused field in struct rockchip_mmc_clock
- Amlogic s4/a1: add regmap maximum register for proper debugfs dump
- Amlogic s4: add MODULE_DEVICE_TABLE() on pll and periph controllers
- Amlogic pll driver: print clock name on lock error to help debug
- Amlogic vclk: finish dsi clock path support
- Amlogic license: fix occurence "GPL v2" as reported by checkpatch
- Add PM runtime support to i.MX8MP Audiomix
- Add DT schema for i.MX95 Display Master Block Control
- Convert to platform remove callback returning void for i.MX8MP
Audiomix
- Add SPI (MSIOF) and external interrupt (INTC-EX) clocks on Renesas
R-Car V4M
- Add interrupt controller (PLIC) clock and reset on Renesas RZ/Five
- Prepare power domain support for Renesas RZ/G2L family members, and
add actual support on Renesas RZ/G3S SoC
- Add thermal, serial (SCIF), and timer (CMT/TMU) clocks on Renesas
R-Car V4M
- Add additional constraints to Allwinner A64 PLL MIPI clock
- Fix autoloading sunxi-ng clocks when build as a module"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (118 commits)
clk: samsung: Don't register clkdev lookup for the fixed rate clocks
clk, reset: microchip: mpfs: fix incorrect preprocessor conditions
clk: qcom: clk-alpha-pll: fix rate setting for Stromer PLLs
clk: qcom: apss-ipq-pll: fix PLL rate for IPQ5018
clk: qcom: Fix SM_GPUCC_8650 dependencies
clk: qcom: Fix SC_CAMCC_8280XP dependencies
dt-bindings: clocks: stm32mp25: add access-controllers description
clock, reset: microchip: move all mpfs reset code to the reset subsystem
clk: samsung: gs101: drop unused HSI2 clock parent data
clk: rockchip: rk3568: Add PLL rate for 724 MHz
clk: rockchip: Remove an unused field in struct rockchip_mmc_clock
dt-bindings: clock: fixed: Define a preferred node name
clk: meson: s4: fix module autoloading
clk: samsung: gs101: mark some apm UASC and XIU clocks critical
clk: imx: imx8mp: Convert to platform remove callback returning void
clk: imx: imx8mp: Switch to RUNTIME_PM_OPS()
clk: bcm: rpi: Assign ->num before accessing ->hws
clk: bcm: dvp: Assign ->num before accessing ->hws
clk: samsung: gs101: add support for cmu_hsi2
clk: samsung: gs101: add support for cmu_hsi0
...
|
||
|
Stephen Boyd
|
03be434863 |
Merge branches 'clk-microchip', 'clk-samsung' and 'clk-qcom' into clk-next
* clk-microchip: clk, reset: microchip: mpfs: fix incorrect preprocessor conditions clock, reset: microchip: move all mpfs reset code to the reset subsystem * clk-samsung: clk: samsung: Don't register clkdev lookup for the fixed rate clocks clk: samsung: gs101: drop unused HSI2 clock parent data clk: samsung: gs101: mark some apm UASC and XIU clocks critical clk: samsung: gs101: add support for cmu_hsi2 clk: samsung: gs101: add support for cmu_hsi0 dt-bindings: clock: google,gs101-clock: add HSI2 clock management unit dt-bindings: clock: google,gs101-clock: add HSI0 clock management unit clk: samsung: gs101: propagate PERIC1 USI SPI clock rate clk: samsung: gs101: propagate PERIC0 USI SPI clock rate clk: samsung: exynosautov9: fix wrong pll clock id value dt-bindings: clock: samsung,s3c6400-clock: convert to DT Schema clk: samsung: exynos850: Add CMU_CPUCL0 and CMU_CPUCL1 clk: samsung: Implement manual PLL control for ARM64 SoCs * clk-qcom: (27 commits) clk: qcom: clk-alpha-pll: fix rate setting for Stromer PLLs clk: qcom: apss-ipq-pll: fix PLL rate for IPQ5018 clk: qcom: Fix SM_GPUCC_8650 dependencies clk: qcom: Fix SC_CAMCC_8280XP dependencies clk: qcom: mmcc-msm8998: fix venus clock issue clk: qcom: dispcc-sm8650: fix DisplayPort clocks clk: qcom: dispcc-sm8550: fix DisplayPort clocks clk: qcom: dispcc-sm6350: fix DisplayPort clocks clk: qcom: dispcc-sm8450: fix DisplayPort clocks clk: qcom: clk-cbf-8996: use HUAYRA_APSS register map for cbf_pll clk: qcom: apss-ipq-pll: constify clk_init_data structures clk: qcom: apss-ipq-pll: constify match data structures clk: qcom: apss-ipq-pll: move Huayra register map to 'clk_alpha_pll_regs' clk: qcom: apss-ipq-pll: reuse Stromer reg offsets from 'clk_alpha_pll_regs' clk: qcom: apss-ipq-pll: use stromer ops for IPQ5018 to fix boot failure clk: qcom: gcc-ipq8074: rework nss_port5/6 clock to multiple conf clk: qcom: clk-rcg2: add support for rcg2 freq multi ops clk: qcom: clk-rcg: introduce support for multiple conf for same freq clk: qcom: hfpll: Add QCS404-specific compatible dt-bindings: clock: qcom,hfpll: Convert to YAML ... |
||
|
Stephen Boyd
|
4a35e6fc41 |
Merge branches 'clk-counted', 'clk-imx', 'clk-amlogic', 'clk-binding' and 'clk-rockchip' into clk-next
* clk-counted: clk: bcm: rpi: Assign ->num before accessing ->hws clk: bcm: dvp: Assign ->num before accessing ->hws * clk-imx: clk: imx: imx8mp: Convert to platform remove callback returning void clk: imx: imx8mp: Switch to RUNTIME_PM_OPS() clk: imx: add i.MX95 BLK CTL clk driver dt-bindings: clock: support i.MX95 Display Master CSR module dt-bindings: clock: support i.MX95 BLK CTL module dt-bindings: clock: add i.MX95 clock header clk: imx: imx8mp: Add pm_runtime support for power saving * clk-amlogic: clk: meson: s4: fix module autoloading clk: meson: fix module license to GPL only clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF clk: meson: add vclk driver clk: meson: pll: print out pll name when unable to lock it clk: meson: s4: pll: determine maximum register in regmap config clk: meson: s4: peripherals: determine maximum register in regmap config clk: meson: a1: pll: determine maximum register in regmap config clk: meson: a1: peripherals: determine maximum register in regmap config * clk-binding: dt-bindings: clock: fixed: Define a preferred node name * clk-rockchip: clk: rockchip: rk3568: Add PLL rate for 724 MHz clk: rockchip: Remove an unused field in struct rockchip_mmc_clock clk: rockchip: rk3588: Add reset line for HDMI Receiver clk: rockchip: rk3568: Add missing USB480M_PHY mux dt-bindings: reset: Define reset id used for HDMI Receiver dt-bindings: clock: rockchip: add USB480M_PHY mux |
||
|
Stephen Boyd
|
7552d1b935 |
Merge branches 'clk-stm', 'clk-renesas', 'clk-scmi' and 'clk-allwinner' into clk-next
- STM32MP257 SoC clk driver - Allocate clk_ops dynamically for SCMI clk driver * clk-stm: dt-bindings: clocks: stm32mp25: add access-controllers description clk: stm32: introduce clocks for STM32MP257 platform dt-bindings: clocks: stm32mp25: add description of all parents clk: stm32mp13: use platform device APIs * clk-renesas: clk: renesas: r9a08g045: Add support for power domains clk: renesas: rzg2l: Extend power domain support dt-bindings: clock: renesas,rzg2l-cpg: Update #power-domain-cells = <1> for RZ/G3S dt-bindings: clock: r9a08g045-cpg: Add power domain IDs dt-bindings: clock: r9a07g054-cpg: Add power domain IDs dt-bindings: clock: r9a07g044-cpg: Add power domain IDs dt-bindings: clock: r9a07g043-cpg: Add power domain IDs clk: renesas: shmobile: Remove unused CLK_ENABLE_ON_INIT clk: renesas: r8a7740: Remove unused div4_clk.flags field clk: renesas: r9a07g043: Add clock and reset entry for PLIC clk: renesas: r8a779h0: Add INTC-EX clock clk: renesas: r8a779h0: Add MSIOF clocks clk: renesas: r8a779a0: Fix CANFD parent clock clk: rs9: fix wrong default value for clock amplitude clk: renesas: r8a779h0: Add timer clocks clk: renesas: r8a779h0: Add SCIF clocks clk: renesas: r9a07g044: Mark resets array as const clk: renesas: r9a07g043: Mark mod_clks and resets arrays as const clk: renesas: r8a779h0: Add thermal clock dt-bindings: clock: r9a07g043-cpg: Annotate RZ/G2UL-only core clocks * clk-scmi: clk: scmi: Add support for get/set duty_cycle operations clk: scmi: Add support for re-parenting restricted clocks clk: scmi: Add support for rate change restricted clocks clk: scmi: Add support for state control restricted clocks clk: scmi: Allocate CLK operations dynamically * clk-allwinner: clk: sunxi-ng: fix module autoloading clk: sunxi-ng: a64: Add constraints on PLL-MIPI's n/m ratio and parent rate clk: sunxi-ng: nkm: Support constraints on m/n ratio and parent rate |
||
|
Linus Torvalds
|
ea5f6ad9ad |
platform-drivers-x86 for v6.10-1
Highlights:
- New drivers/platform/arm64 directory for arm64 embedded-controller drivers
- New drivers for:
- Acer Aspire 1 embedded controllers (for arm64 models)
- ACPI quickstart PNP0C32 buttons
- Dell All-In-One backlight support (dell-uart-backlight)
- Lenovo WMI camera buttons
- Lenovo Yoga Tablet 2 Pro 1380F/L fast charging
- MeeGoPad ANX7428 Type-C Cross Switch (power sequencing only)
- MSI WMI sensors (fan speed sensors only for now)
- Asus WMI:
- 2024 ROG Mini-LED support
- MCU powersave support
- Vivobook GPU MUX support
- Misc. other improvements
- Ideapad laptop:
- Export FnLock LED as LED class device
- Switch platform profiles using thermal management key
- Intel drivers:
- IFS: various improvements
- PMC: Lunar Lake support
- SDSI: various improvements
- TPMI/ISST: various improvements
- tools: intel-speed-select: various improvements
- MS Surface drivers:
- Fan profile switching support
- Surface Pro thermal sensors support
- ThinkPad ACPI:
- Reworked hotkey support to use sparse keymaps
- Add support for new trackpoint-doubletap, Fn+N and Fn+G hotkeys
- WMI core:
- New WMI driver development guide
- x86 Android tablets:
- Lenovo Yoga Tablet 2 Pro 1380F/L support
- Xiaomi MiPad 2 status LED and bezel touch buttons backlight support
- Miscellaneous cleanups / fixes / improvements
The following is an automated git shortlog grouped by driver:
ACPI:
- platform-profile: add platform_profile_cycle()
Add ACPI quickstart button (PNP0C32) driver:
- Add ACPI quickstart button (PNP0C32) driver
Add lenovo-yoga-tab2-pro-1380-fastcharger driver:
- Add lenovo-yoga-tab2-pro-1380-fastcharger driver
Add new Dell UART backlight driver:
- Add new Dell UART backlight driver
Add lenovo WMI camera button driver:
- Add lenovo WMI camera button driver
Add new MeeGoPad ANX7428 Type-C Cross Switch driver:
- Add new MeeGoPad ANX7428 Type-C Cross Switch driver
ISST:
- Support SST-BF and SST-TF per level
- Add missing MODULE_DESCRIPTION
- Add dev_fmt
- Use in_range() to check package ID validity
- Support partitioned systems
- Shorten the assignments for power_domain_info
- Use local variable for auxdev->dev
MAINTAINERS:
- drop Daniel Oliveira Nascimento
arm64:
- dts: qcom: acer-aspire1: Add embedded controller
asus-laptop:
- Use sysfs_emit() and sysfs_emit_at() to replace sprintf()
asus-wmi:
- cleanup main struct to avoid some holes
- Add support for MCU powersave
- ROG Ally increase wait time, allow MCU powersave
- adjust formatting of ppt-<name>() functions
- store a min default for ppt options
- support toggling POST sound
- add support variant of TUF RGB
- add support for Vivobook GPU MUX
- add support for 2024 ROG Mini-LED
- use sysfs_emit() instead of sprintf()
classmate-laptop:
- Add missing MODULE_DESCRIPTION()
devm-helpers:
- Fix a misspelled cancellation in the comments
dt-bindings:
- leds: Add LED_FUNCTION_FNLOCK
- platform: Add Acer Aspire 1 EC
hp-wmi:
- use sysfs_emit() instead of sprintf()
huawei-wmi:
- use sysfs_emit() instead of sprintf()
ideapad-laptop:
- switch platform profiles using thermal management key
- add FnLock LED class device
- add fn_lock_get/set functions
intel-vbtn:
- Log event code on unexpected button events
intel/pmc:
- Enable S0ix blocker show in Lunar Lake
- Add support to show S0ix blocker counter
- Update LNL signal status map
msi-laptop:
- Use sysfs_emit() to replace sprintf()
p2sb:
- Don't init until unassigned resources have been assigned
- Make p2sb_get_devfn() return void
platform:
- arm64: Add Acer Aspire 1 embedded controller driver
- Add ARM64 platform directory
platform/surface:
- aggregator: Log critical errors during SAM probing
- aggregator_registry: Add support for thermal sensors on the Surface Pro 9
- platform_profile: add fan profile switching
platform/x86/amd:
- pmc: Add new ACPI ID AMDI000B
- pmf: Add new ACPI ID AMDI0105
platform/x86/amd/hsmp:
- switch to use device_add_groups()
platform/x86/amd/pmc:
- Fix implicit declaration error on i386
- Add AMD MP2 STB functionality
platform/x86/fujitsu-laptop:
- Replace sprintf() with sysfs_emit()
platform/x86/intel-uncore-freq:
- Don't present root domain on error
platform/x86/intel/ifs:
- Disable irq during one load stage
- trace: display batch num in hex
- Classify error scenarios correctly
platform/x86/intel/pmc:
- Fix PCH names in comments
platform/x86/intel/sdsi:
- Add attribute to read the current meter state
- Add in-band BIOS lock support
- Combine read and write mailbox flows
- Set message size during writes
platform/x86/intel/tpmi:
- Add additional TPMI header fields
- Align comments in kernel-doc
- Check major version change for TPMI Information
- Handle error from tpmi_process_info()
quickstart:
- Fix race condition when reporting input event
- fix Kconfig selects
- Miscellaneous improvements
samsung-laptop:
- Use sysfs_emit() to replace the old interface sprintf()
think-lmi:
- Convert container_of() macros to static inline
thinkpad_acpi:
- Use false to set acpi_send_ev to false
- Support hotkey to disable trackpoint doubletap
- Support for system debug info hotkey
- Support for trackpoint doubletap
- Simplify known_ev handling
- Add mappings for adaptive kbd clipping-tool and cloud keys
- Switch to using sparse-keymap helpers
- Drop KEY_RESERVED special handling
- Use correct keycodes for volume and brightness keys
- Change hotkey_reserved_mask initialization
- Do not send ACPI netlink events for unknown hotkeys
- Move tpacpi_driver_event() call to tpacpi_input_send_key()
- Move hkey > scancode mapping to tpacpi_input_send_key()
- Drop tpacpi_input_send_key_masked() and hotkey_driver_event()
- Always call tpacpi_driver_event() for hotkeys
- Move hotkey_user_mask check to tpacpi_input_send_key()
- Move special original hotkeys handling out of switch-case
- Move adaptive kbd event handling to tpacpi_driver_event()
- Make tpacpi_driver_event() return if it handled the event
- Do hkey to scancode translation later
- Use tpacpi_input_send_key() in adaptive kbd code
- Drop ignore_acpi_ev
- Drop setting send_/ignore_acpi_ev defaults twice
- Provide hotkey_poll_stop_sync() dummy
- Take hotkey_mutex during hotkey_exit()
- change sprintf() to sysfs_emit()
- use platform_profile_cycle()
tools arch x86:
- Add dell-uart-backlight-emulator
tools/arch/x86/intel_sdsi:
- Add current meter support
- Simplify ascii printing
- Fix meter_certificate decoding
- Fix meter_show display
- Fix maximum meter bundle length
tools/power/x86/intel-speed-select:
- v1.19 release
- Display CPU as None for -1
- SST BF/TF support per level
- Increase number of CPUs displayed
- Present all TRL levels for turbo-freq
- Fix display for unsupported levels
- Support multiple dies
- Increase die count
toshiba_acpi:
- Add quirk for buttons on Z830
uv_sysfs:
- use sysfs_emit() instead of sprintf()
wmi:
- Add MSI WMI Platform driver
- Add driver development guide
- Mark simple WMI drivers as legacy-free
- Avoid returning AE_OK upon unknown error
- Support reading/writing 16 bit EC values
x86-android-tablets:
- Create LED device for Xiaomi Pad 2 bottom bezel touch buttons
- Xiaomi pad2 RGB LED fwnode updates
- Pass struct device to init()
- Add Lenovo Yoga Tablet 2 Pro 1380F/L data
- Unregister devices in reverse order
- Add swnode for Xiaomi pad2 indicator LED
- Use GPIO_LOOKUP() macro
xiaomi-wmi:
- Drop unnecessary NULL checks
- Fix race condition when reporting key events
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Merge tag 'platform-drivers-x86-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86
Pull x86 platform driver updates from Hans de Goede:
- New drivers/platform/arm64 directory for arm64 embedded-controller
drivers
- New drivers:
- Acer Aspire 1 embedded controllers (for arm64 models)
- ACPI quickstart PNP0C32 buttons
- Dell All-In-One backlight support (dell-uart-backlight)
- Lenovo WMI camera buttons
- Lenovo Yoga Tablet 2 Pro 1380F/L fast charging
- MeeGoPad ANX7428 Type-C Cross Switch (power sequencing only)
- MSI WMI sensors (fan speed sensors only for now)
- Asus WMI:
- 2024 ROG Mini-LED support
- MCU powersave support
- Vivobook GPU MUX support
- Misc. other improvements
- Ideapad laptop:
- Export FnLock LED as LED class device
- Switch platform profiles using thermal management key
- Intel drivers:
- IFS: various improvements
- PMC: Lunar Lake support
- SDSI: various improvements
- TPMI/ISST: various improvements
- tools: intel-speed-select: various improvements
- MS Surface drivers:
- Fan profile switching support
- Surface Pro thermal sensors support
- ThinkPad ACPI:
- Reworked hotkey support to use sparse keymaps
- Add support for new trackpoint-doubletap, Fn+N and Fn+G hotkeys
- WMI core:
- New WMI driver development guide
- x86 Android tablets:
- Lenovo Yoga Tablet 2 Pro 1380F/L support
- Xiaomi MiPad 2 status LED and bezel touch buttons backlight
support
- Miscellaneous cleanups / fixes / improvements
* tag 'platform-drivers-x86-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (128 commits)
platform/x86: Add new MeeGoPad ANX7428 Type-C Cross Switch driver
devm-helpers: Fix a misspelled cancellation in the comments
tools arch x86: Add dell-uart-backlight-emulator
platform/x86: Add new Dell UART backlight driver
platform/x86: x86-android-tablets: Create LED device for Xiaomi Pad 2 bottom bezel touch buttons
platform/x86: x86-android-tablets: Xiaomi pad2 RGB LED fwnode updates
platform/x86: x86-android-tablets: Pass struct device to init()
platform/x86/amd: pmc: Add new ACPI ID AMDI000B
platform/x86/amd: pmf: Add new ACPI ID AMDI0105
platform/x86: p2sb: Don't init until unassigned resources have been assigned
platform/surface: aggregator: Log critical errors during SAM probing
platform/x86: ISST: Support SST-BF and SST-TF per level
platform/x86/fujitsu-laptop: Replace sprintf() with sysfs_emit()
tools/power/x86/intel-speed-select: v1.19 release
tools/power/x86/intel-speed-select: Display CPU as None for -1
tools/power/x86/intel-speed-select: SST BF/TF support per level
tools/power/x86/intel-speed-select: Increase number of CPUs displayed
tools/power/x86/intel-speed-select: Present all TRL levels for turbo-freq
tools/power/x86/intel-speed-select: Fix display for unsupported levels
tools/power/x86/intel-speed-select: Support multiple dies
...
|
||
|
Linus Torvalds
|
f952b6c863 |
Thermal control updates for 6.10-rc1
- Redesign the thermal governor interface to allow the governors to
work in a more straightforward way (Rafael Wysocki).
- Make thermal governors take the current trip point thresholds into
account in their computations which allows trip hysteresis to be
observed more accurately (Rafael Wysocki).
- Make the thermal core manage passive polling for thermal zones and
remove passive polling management from thermal governors (Rafael
Wysocki).
- Refactor trip point representation and move the definition of
thermal governor and thermal zone device structures to the thermal
core (Rafael Wysocki).
- Sort trip point crossing notifications and debug recording of trip
point crossing events by temperature (Rafael Wysocki).
- Improve the handling of cooling device states and thermal mitigation
episodes in progress in the thermal debug code (Rafael Wysocki).
- Avoid excessive updates of trip point statistics and clean up the
printing of thermal mitigation episode information (Rafael Wysocki).
- Clean up thermal governors and thermal core (Rafael Wysocki).
- Allow thermal drivers to register notifiers that will be invoked
on netlink events like BIND and UNBIND, so that they can adjust
their activity depending on whether or not there are any
subscribers of netlink messages coming from them, and make
the Intel HFI driver use this mechanism (Stanislaw Gruszka).
- Adjust the update delay and capabilities-per-event values in the
Intel HFI thermal driver to prevent it from missing events and allow
it to process more data in one go (Ricardo Neri).
- Add missing MODULE_DESCRIPTION() to multiple files in the
int340x_thermal and intel_soc_dts_iosf drivers (Srinivas Pandruvada).
- Replace deprecated strncpy() with strscpy() in the int340x_thermal
driver (Justin Stitt).
- Add QCM2290 compatible DT bindings for Lmh and fix a NULL pointer
dereference in the lmh driver when the SCM is not present (Konrad
Dybcio).
- Use the strreplace() function instead of doing it manually in the
Armada driver (Rasmus Villemoes).
- Convert st,stih407-thermal to DT schema and fix up missing
properties (Raphael Gallais-Pou).
- Add suspend/resume by restoring the context of the tsens sensor
(Priyansh Jain).
- Support A1 SoC family Thermal Sensor controller and add the DT
bindings (Dmitry Rokosov).
- Improve the temperature approximation calculation and consolidate
the Tj constant into a shared area of the structure instead of
duplicating it on the Rcar Gen3 (Niklas Söderlund).
- Fix the Mediatek LVTS sensor coefficient for the MT8192 in order to support
it correctly (Hsin-Te Yuan).
- Fix a NULL pointer dereference in the tsens driver when the function
compute_intercept_slope() is called with a NULL parameter (Aleksandr
Mishin).
- Remove some unused fields in struct qpnp_tm_chip and k3_bandgap
(Christophe Jaillet).
- Fix up calibration efuse data decoding, consolidate the code by
checking boundaries and refactor some part of the LVTS Mediatek
driver. After setting the scene, add MT8186 and MT8188 along with
the DT bindings (Nicolas Pitre).
- Add Loongson-2K2000 support after some minor code adjustements and
providing the DT bindings definition (Binbin Zhou).
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Merge tag 'thermal-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull thermal control updates from Rafael Wysocki:
"The most significant part of this is a rework of thermal governors,
including a redesign of the thermal governor interface and changes to
make some of them take trip point hysteresis into account properly, as
well as some related cleanups of the thermal governors and thermal
core.
The above is based on preliminary changes refactoring thermal data
structures and moving the definitions of some of them into the thermal
core which also ensure that trip point crossing notifications will be
sent to user space via netlink and recorded in the debug statistics in
temperature order.
In addition, netlink bind/unbind notifications are added to the
thermal core and the Intel HFI driver is modified to use them to avoid
sending netlink messages until there are subscribers.
Apart from that, multiple thermal drivers are updated which includes
new hardware support (MediaTek MT8188 and MT8186, Amlogic A1 thermal
sensor, Loongson-2K2000, Lmh QCM2290), fixes, cleanups and
documentation updates, and the recently added thermal debug code is
fixed and cleaned up.
Specifics:
- Redesign the thermal governor interface to allow the governors to
work in a more straightforward way (Rafael Wysocki)
- Make thermal governors take the current trip point thresholds into
account in their computations which allows trip hysteresis to be
observed more accurately (Rafael Wysocki)
- Make the thermal core manage passive polling for thermal zones and
remove passive polling management from thermal governors (Rafael
Wysocki)
- Refactor trip point representation and move the definition of
thermal governor and thermal zone device structures to the thermal
core (Rafael Wysocki)
- Sort trip point crossing notifications and debug recording of trip
point crossing events by temperature (Rafael Wysocki)
- Improve the handling of cooling device states and thermal
mitigation episodes in progress in the thermal debug code (Rafael
Wysocki)
- Avoid excessive updates of trip point statistics and clean up the
printing of thermal mitigation episode information (Rafael Wysocki)
- Clean up thermal governors and thermal core (Rafael Wysocki)
- Allow thermal drivers to register notifiers that will be invoked on
netlink events like BIND and UNBIND, so that they can adjust their
activity depending on whether or not there are any subscribers of
netlink messages coming from them, and make the Intel HFI driver
use this mechanism (Stanislaw Gruszka)
- Adjust the update delay and capabilities-per-event values in the
Intel HFI thermal driver to prevent it from missing events and
allow it to process more data in one go (Ricardo Neri)
- Add missing MODULE_DESCRIPTION() to multiple files in the
int340x_thermal and intel_soc_dts_iosf drivers (Srinivas
Pandruvada)
- Replace deprecated strncpy() with strscpy() in the int340x_thermal
driver (Justin Stitt)
- Add QCM2290 compatible DT bindings for Lmh and fix a NULL pointer
dereference in the lmh driver when the SCM is not present (Konrad
Dybcio)
- Use the strreplace() function instead of doing it manually in the
Armada driver (Rasmus Villemoes)
- Convert st,stih407-thermal to DT schema and fix up missing
properties (Raphael Gallais-Pou)
- Add suspend/resume by restoring the context of the tsens sensor
(Priyansh Jain)
- Support A1 SoC family Thermal Sensor controller and add the DT
bindings (Dmitry Rokosov)
- Improve the temperature approximation calculation and consolidate
the Tj constant into a shared area of the structure instead of
duplicating it on the Rcar Gen3 (Niklas Söderlund)
- Fix the Mediatek LVTS sensor coefficient for the MT8192 in order to
support it correctly (Hsin-Te Yuan)
- Fix a NULL pointer dereference in the tsens driver when the
function compute_intercept_slope() is called with a NULL parameter
(Aleksandr Mishin)
- Remove some unused fields in struct qpnp_tm_chip and k3_bandgap
(Christophe Jaillet)
- Fix up calibration efuse data decoding, consolidate the code by
checking boundaries and refactor some part of the LVTS Mediatek
driver. After setting the scene, add MT8186 and MT8188 along with
the DT bindings (Nicolas Pitre)
- Add Loongson-2K2000 support after some minor code adjustements and
providing the DT bindings definition (Binbin Zhou)"
* tag 'thermal-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (72 commits)
thermal: intel: hfi: Increase the number of CPU capabilities per netlink event
thermal: intel: hfi: Rename HFI_MAX_THERM_NOTIFY_COUNT
thermal: intel: hfi: Shorten the thermal netlink event delay to 100ms
thermal: intel: hfi: Rename HFI_UPDATE_INTERVAL
thermal: intel: Add missing module description
thermal: core: Move passive polling management to the core
thermal: core: Do not call handle_thermal_trip() if zone temperature is invalid
thermal: trip: Add missing empty code line
thermal/debugfs: Avoid printing zero duration for mitigation events in progress
thermal/debugfs: Pass cooling device state to thermal_debug_cdev_add()
thermal/debugfs: Create records for cdev states as they get used
thermal: core: Introduce thermal_governor_trip_crossed()
thermal/debugfs: Make tze_seq_show() skip invalid trips and trips with no stats
thermal/debugfs: Rename thermal_debug_update_temp() to thermal_debug_update_trip_stats()
thermal/debugfs: Clean up thermal_debug_update_temp()
thermal/debugfs: Avoid excessive updates of trip point statistics
thermal: core: Relocate critical and hot trip handling
thermal: core: Drop the .throttle() governor callback
thermal: gov_user_space: Use .trip_crossed() instead of .throttle()
thermal: gov_fair_share: Eliminate unnecessary integer divisions
...
|
||
|
Linus Torvalds
|
14a60290ed |
soc: drivers for 6.10
As usual, these are updates for drivers that are specific to certain
SoCs or firmware running on them. Notable updates include
- The new STMicroelectronics STM32 "firewall" bus driver that is
used to provide a barrier between different parts of an SoC
- Lots of updates for the Qualcomm platform drivers, in particular
SCM, which gets a rewrite of its initialization code
- Firmware driver updates for Arm FF-A notification interrupts
and indirect messaging, SCMI firmware support for pin control
and vendor specific interfaces, and TEE firmware interface
changes across multiple TEE drivers
- A larger cleanup of the Mediatek CMDQ driver and some related bits
- Kconfig changes for riscv drivers to prepare for adding Kanaan
k230 support
- Multiple minor updates for the TI sysc bus driver, memory controllers,
hisilicon hccs and more
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Merge tag 'soc-drivers-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann:
"As usual, these are updates for drivers that are specific to certain
SoCs or firmware running on them.
Notable updates include
- The new STMicroelectronics STM32 "firewall" bus driver that is used
to provide a barrier between different parts of an SoC
- Lots of updates for the Qualcomm platform drivers, in particular
SCM, which gets a rewrite of its initialization code
- Firmware driver updates for Arm FF-A notification interrupts and
indirect messaging, SCMI firmware support for pin control and
vendor specific interfaces, and TEE firmware interface changes
across multiple TEE drivers
- A larger cleanup of the Mediatek CMDQ driver and some related bits
- Kconfig changes for riscv drivers to prepare for adding Kanaan k230
support
- Multiple minor updates for the TI sysc bus driver, memory
controllers, hisilicon hccs and more"
* tag 'soc-drivers-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (103 commits)
firmware: qcom: uefisecapp: Allow on sc8180x Primus and Flex 5G
soc: qcom: pmic_glink: Make client-lock non-sleeping
dt-bindings: soc: qcom,wcnss: fix bluetooth address example
soc/tegra: pmc: Add EQOS wake event for Tegra194 and Tegra234
bus: stm32_firewall: fix off by one in stm32_firewall_get_firewall()
bus: etzpc: introduce ETZPC firewall controller driver
firmware: arm_ffa: Avoid queuing work when running on the worker queue
bus: ti-sysc: Drop legacy idle quirk handling
bus: ti-sysc: Drop legacy quirk handling for smartreflex
bus: ti-sysc: Drop legacy quirk handling for uarts
bus: ti-sysc: Add a description and copyrights
bus: ti-sysc: Move check for no-reset-on-init
soc: hisilicon: kunpeng_hccs: replace MAILBOX dependency with PCC
soc: hisilicon: kunpeng_hccs: Add the check for obtaining complete port attribute
firmware: arm_ffa: Fix memory corruption in ffa_msg_send2()
bus: rifsc: introduce RIFSC firewall controller driver
of: property: fw_devlink: Add support for "access-controller"
soc: mediatek: mtk-socinfo: Correct the marketing name for MT8188GV
soc: mediatek: mtk-socinfo: Add entry for MT8395AV/ZA Genio 1200
soc: mediatek: mtk-mutex: Add support for MT8188 VPPSYS
...
|
||
|
Arnd Bergmann
|
f89d22439f |
Samsung DTS ARM64 changes for v6.10, part two
Few changes exclusively for Google GS101:
1. Add HSI0 and HSI2 clock controllers (CMUs).
2. Add USB 3.1 Dual Role Device (DRD) support.
3. Add UFS (Universal Flash Storage) support.
4. Document bus clocks in pin controllers necessary for accessing
registers.
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Merge tag 'samsung-dt64-6.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.10, part two
Few changes exclusively for Google GS101:
1. Add HSI0 and HSI2 clock controllers (CMUs).
2. Add USB 3.1 Dual Role Device (DRD) support.
3. Add UFS (Universal Flash Storage) support.
4. Document bus clocks in pin controllers necessary for accessing
registers.
* tag 'samsung-dt64-6.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: gs101: specify empty clocks for remaining pinctrl
arm64: dts: exynos: gs101: specify bus clock for pinctrl_hsi2
arm64: dts: exynos: gs101: specify bus clock for pinctrl_peric[01]
arm64: dts: exynos: gs101: specify bus clock for pinctrl (far) alive
arm64: dts: exynos: gs101: enable ufs, phy on oriole & define ufs regulator
arm64: dts: exynos: gs101: Add ufs and ufs-phy dt nodes
arm64: dts: exynos: gs101: Add the hsi2 sysreg node
dt-bindings: soc: google: exynos-sysreg: add dedicated hsi2 sysreg compatible
arm64: dts: exynos: gs101-oriole: enable USB on this board
arm64: dts: exynos: gs101: add USB & USB-phy nodes
arm64: dts: exynos: gs101: enable cmu-hsi2 clock controller
arm64: dts: exynos: gs101: enable cmu-hsi0 clock controller
dt-bindings: clock: google,gs101-clock: add HSI2 clock management unit
dt-bindings: clock: google,gs101-clock: add HSI0 clock management unit
Link: https://lore.kernel.org/r/20240504121233.7589-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Peter Griffin
|
01aea123b1 |
dt-bindings: clock: google,gs101-clock: add HSI2 clock management unit
Add dt schema documentation and clock IDs for the High Speed Interface
2 (HSI2) clock management unit. This CMU feeds high speed interfaces
such as PCIe and UFS.
[AD: * keep CMUs in google,gs101.h sorted alphabetically
* resolve minor merge conflicts in google,gs101-clock.yaml
* s/ufs_embd/ufs s/mmc_card/mmc
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20240429-hsi0-gs101-v3-1-f233be0a2455@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||
|
Claudiu Beznea
|
2d03ce9cd7 |
dt-bindings: clock: r9a08g045-cpg: Add power domain IDs
Add power domain IDs for the RZ/G3S (R9A08G045) SoC. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20240422105355.1622177-5-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Claudiu Beznea
|
5b9979fda3 |
dt-bindings: clock: r9a07g054-cpg: Add power domain IDs
Add power domain IDs for the RZ/V2L (R9A07G054) SoC. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20240422105355.1622177-4-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Claudiu Beznea
|
d744e45674 |
dt-bindings: clock: r9a07g044-cpg: Add power domain IDs
Add power domain IDs for the RZ/G2L (R9A07G044) SoC. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20240422105355.1622177-3-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Claudiu Beznea
|
b6cc692ac6 |
dt-bindings: clock: r9a07g043-cpg: Add power domain IDs
Add power domain IDs for the RZ/G2UL (R9A07G043) SoC. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20240422105355.1622177-2-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
André Draszik
|
dbf76c0d3d |
dt-bindings: clock: google,gs101-clock: add HSI0 clock management unit
Add dt-schema documentation and clock IDs for the high speed interface
0 HSI0 clock management unit. This is used (amongst others) for USB.
While the usual (sed) script has been used to derive the linux clock
IDs from the data sheet, one manual tweak was applied to fix a typo
which we don't want to carry:
HSI0_USPDPDBG_USER -> HSI0_USBDPDBG_USER (note USB vs USP).
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240423-hsi0-gs101-v1-1-2c3ddb50c720@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||
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Nicolas Pitre
|
78c88534e5 |
dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT8188
Add LVTS thermal controller definition for MT8188. Signed-off-by: Nicolas Pitre <npitre@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20240402032729.2736685-13-nico@fluxnic.net |
||
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Nicolas Pitre
|
a2ca202350 |
dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT8186
Add LVTS thermal controller definition for MT8186. Signed-off-by: Nicolas Pitre <npitre@baylibre.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20240402032729.2736685-7-nico@fluxnic.net |
||
|
Peng Fan
|
977b07f769 |
dt-bindings: clock: add i.MX95 clock header
Add clock header for i.MX95 BLK CTL modules Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240401-imx95-blk-ctl-v6-1-84d4eca1e759@nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org> |
||
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Gergo Koteles
|
7ab6c64663 |
dt-bindings: leds: Add LED_FUNCTION_FNLOCK
Newer laptops have FnLock LED. Add a define for this very common function. Signed-off-by: Gergo Koteles <soyer@irl.hu> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Lee Jones <lee@kernel.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/8ac95e85a53dc0b8cce1e27fc1cab6d19221543b.1712063200.git.soyer@irl.hu Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
||
|
INAGAKI Hiroshi
|
77b9f2d6fd |
dt-bindings: leds: Add LED_FUNCTION_SPEED_* for link speed on LAN/WAN
Add LED_FUNCTION_SPEED_LAN and LED_FUNCTION_SPEED_WAN for LEDs that indicate link speed of ethernet ports on LAN/WAN. This is useful to distinguish those LEDs from LEDs that indicate link status (up/down). example: Fortinet FortiGate 30E/50E have LEDs that indicate link speed on each of the ethernet ports in addition to LEDs that indicate link status (up/down). - 1000 Mbps: green:speed-(lan|wan)-N - 100 Mbps: amber:speed-(lan|wan)-N - 10 Mbps: (none, turned off) Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240323074326.1428-3-musashino.open@gmail.com Signed-off-by: Lee Jones <lee@kernel.org> |
||
|
INAGAKI Hiroshi
|
7d36c35733 |
dt-bindings: leds: Add LED_FUNCTION_MOBILE for mobile network
Add LED_FUNCTION_MOBILE for LEDs that indicate status of mobile network connection. This is useful to distinguish those LEDs from LEDs that indicates status of wired "wan" connection. example (on stock fw): IIJ SA-W2 has "Mobile" LEDs that indicate status (no signal, too low, low, good) of mobile network connection via dongle connected to USB port. - no signal: (none, turned off) - too low: green:mobile & red:mobile (amber, blink) - low: green:mobile & red:mobile (amber, turned on) - good: green:mobile (turned on) Suggested-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240323074326.1428-2-musashino.open@gmail.com Signed-off-by: Lee Jones <lee@kernel.org> |
||
|
Gabriel Fernandez
|
df5df1257c |
dt-bindings: clocks: stm32mp25: add description of all parents
RCC driver uses '.index' to define all parent clocks instead '.names'
because the use of a name to define a parent clock is discouraged. This
is an ABI change, but the RCC driver has not yet merged, unlike all
others drivers besides Linux.
Fixes:
|
||
|
Binbin Zhou
|
0b1bfd15f3 |
dt-bindings: clock: Add Loongson-2K expand clock index
In the new Loongson-2K family of SoCs, more clock indexes are needed, such as clock gates. The patch adds these clock indexes Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/76844e0e4dae290425f7c8025f7f36810cb3a3a8.1712731524.git.zhoubinbin@loongson.cn Acked-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Shreeya Patel
|
ca151fd56b |
dt-bindings: reset: Define reset id used for HDMI Receiver
Add reset id used for HDMI Receiver in RK3588 SoCs Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com> Link: https://lore.kernel.org/r/20240327225057.672304-2-shreeya.patel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
||
|
Sascha Hauer
|
575bc7b477 |
dt-bindings: clock: rockchip: add USB480M_PHY mux
The USB480M clock can source from a MUX that selects the clock to come from either of the USB-phy internal 480MHz PLLs. These clocks are provided by the USB phy driver. This adds the define for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240405-clk-rk3568-usb480m-phy-mux-v1-1-6c89de20a6ff@pengutronix.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
||
|
Neil Armstrong
|
72bea132f3 |
dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: document PHY AUX clock on SM8[456]50 SoCs
The PCIe Gen4x2 PHY found in the SM8[456]50 SoCs have a second clock named "PHY_AUX_CLK" which is an input of the Global Clock Controller (GCC) which is muxed & gated then returned to the PHY as an input. Document the clock IDs to select the PIPE clock or the AUX clock, also enforce a second clock-output-names and a #clock-cells value of 1 for the PCIe Gen4x2 PHY found in the SM8[456]50 SoCs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240322-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v2-1-3ec0a966d52f@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org> |
||
|
Bjorn Andersson
|
bdfe9fd845 |
Merge branch 'drivers-for-6.10' onto 'v6.9-rc1'
Merge the patches that was picked up for v6.10 before v6.9-rc1 became available onto v6.9-rc1 to reduce the risk for conflicts etc. |
||
|
Geert Uytterhoeven
|
002b831076 |
dt-bindings: clock: r9a07g043-cpg: Annotate RZ/G2UL-only core clocks
The M2 (CRU main clock), M3 (LCDC Video Clock), and AT (Cortex-A55 Debug clock) core clocks are only present on RZ/G2UL, not on RZ/Five. Annotate this in the comments, like is already done for module clocks and resets. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/ffcdcd479c76b92f67481836a33ec86e97f85634.1708944903.git.geert+renesas@glider.be |
||
|
Geert Uytterhoeven
|
ecc79ab919 |
ARM: dts: renesas: r8a73a4: Add TMU nodes
Add device nodes for the Timer Units (TMU) on the R-Mobile APE6 SoC, and the clocks serving them. Note that TMU channels 1 and 2 are not added, as their interrupts are not wired to the interrupt controller for the AP-System Core (INTC-SYS), only to the interrupt controller for the AP-Realtime Core (INTC-RT). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/1a60832f3ba37afb4a5791f4e5db4610ab31beb3.1710864964.git.geert+renesas@glider.be |
||
|
Krzysztof Kozlowski
|
4184e4912c |
dt-bindings: pinctrl: samsung: drop unused header with register constants
The bindings header for Samsung pin controller DTS pin values (holding
register values in fact) was deprecated in v6.1 kernel in
commit
|
||
|
Linus Torvalds
|
bb41fe35dc |
Char/Misc and other driver subsystem updates for 6.9-rc1
Here is the big set of char/misc and a number of other driver subsystem
updates for 6.9-rc1. Included in here are:
- IIO driver updates, loads of new ones and evolution of existing ones
- coresight driver updates
- const cleanups for many driver subsystems
- speakup driver additions
- platform remove callback void cleanups
- mei driver updates
- mhi driver updates
- cdx driver updates for MSI interrupt handling
- nvmem driver updates
- other smaller driver updates and cleanups, full details in the
shortlog
All of these have been in linux-next for a long time with no reported
issue, other than a build warning with some older versions of gcc for a
speakup driver, fix for that will come in a few days when I catch up
with my pending patch queues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc and other driver subsystem updates from Greg KH:
"Here is the big set of char/misc and a number of other driver
subsystem updates for 6.9-rc1. Included in here are:
- IIO driver updates, loads of new ones and evolution of existing ones
- coresight driver updates
- const cleanups for many driver subsystems
- speakup driver additions
- platform remove callback void cleanups
- mei driver updates
- mhi driver updates
- cdx driver updates for MSI interrupt handling
- nvmem driver updates
- other smaller driver updates and cleanups, full details in the
shortlog
All of these have been in linux-next for a long time with no reported
issue, other than a build warning for the speakup driver"
The build warning hits clang and is a gcc (and C23) extension, and is
fixed up in the merge.
Link: https://lore.kernel.org/all/20240321134831.GA2762840@dev-arch.thelio-3990X/
* tag 'char-misc-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (279 commits)
binder: remove redundant variable page_addr
uio_dmem_genirq: UIO_MEM_DMA_COHERENT conversion
uio_pruss: UIO_MEM_DMA_COHERENT conversion
cnic,bnx2,bnx2x: use UIO_MEM_DMA_COHERENT
uio: introduce UIO_MEM_DMA_COHERENT type
cdx: add MSI support for CDX bus
pps: use cflags-y instead of EXTRA_CFLAGS
speakup: Add /dev/synthu device
speakup: Fix 8bit characters from direct synth
parport: sunbpp: Convert to platform remove callback returning void
parport: amiga: Convert to platform remove callback returning void
char: xillybus: Convert to platform remove callback returning void
vmw_balloon: change maintainership
MAINTAINERS: change the maintainer for hpilo driver
char: xilinx_hwicap: Fix NULL vs IS_ERR() bug
hpet: remove hpets::hp_clocksource
platform: goldfish: move the separate 'default' propery for CONFIG_GOLDFISH
char: xilinx_hwicap: drop casting to void in dev_set_drvdata
greybus: move is_gb_* functions out of greybus.h
greybus: Remove usage of the deprecated ida_simple_xx() API
...
|
||
|
Linus Torvalds
|
78c3925c04 |
ARM: late SoC changes for 6.9
These are changes that for some reason ended up not making it into the
first four branches but that should still make it into 6.9:
- A rework of the omap clock support that touches both drivers and
device tree files
- The reset controller branch changes that had a dependency on late
bugfixes. Merging them here avoids a backmerge of 6.8-rc5 into the
drivers branch
- The RISC-V/starfive, RISC-V/microchip and ARM/Broadcom devicetree
changes that got delayed and needed some extra time in linux-next
for wider testing.
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Merge tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull more ARM SoC updates from Arnd Bergmann:
"These are changes that for some reason ended up not making it into the
first four branches but that should still make it into 6.9:
- A rework of the omap clock support that touches both drivers and
device tree files
- The reset controller branch changes that had a dependency on late
bugfixes. Merging them here avoids a backmerge of 6.8-rc5 into the
drivers branch
- The RISC-V/starfive, RISC-V/microchip and ARM/Broadcom devicetree
changes that got delayed and needed some extra time in linux-next
for wider testing"
* tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
soc: fsl: dpio: fix kcalloc() argument order
bus: ts-nbus: Improve error reporting
bus: ts-nbus: Convert to atomic pwm API
riscv: dts: starfive: jh7110: Add camera subsystem nodes
ARM: bcm: stop selecing CONFIG_TICK_ONESHOT
ARM: dts: omap3: Update clksel clocks to use reg instead of ti,bit-shift
ARM: dts: am3: Update clksel clocks to use reg instead of ti,bit-shift
clk: ti: Improve clksel clock bit parsing for reg property
clk: ti: Handle possible address in the node name
dt-bindings: pwm: opencores: Add compatible for StarFive JH8100
dt-bindings: riscv: cpus: reg matches hart ID
reset: Instantiate reset GPIO controller for shared reset-gpios
reset: gpio: Add GPIO-based reset controller
cpufreq: do not open-code of_phandle_args_equal()
of: Add of_phandle_args_equal() helper
reset: simple: add support for Sophgo SG2042
dt-bindings: reset: sophgo: support SG2042
riscv: dts: microchip: add specific compatible for mpfs pdma
riscv: dts: microchip: add missing CAN bus clocks
ARM: brcmstb: Add debug UART entry for 74165
...
|
||
|
Abel Vesa
|
734364d0dd |
dt-bindings: arm: qcom,ids: Add SoC ID for X1E80100
Add the ID for the Qualcomm X1E80100 SoC. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240223-x1e80100-socinfo-v1-1-be581ca60f27@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Linus Torvalds
|
ab522e1478 |
Devicetree updates for v6.9:
DT core:
- Add cleanup.h based auto release of struct device_node pointers via
__free marking and new for_each_child_of_node_scoped() iterator to use
it.
- Always create a base skeleton DT when CONFIG_OF is enabled. This
supports several usecases of adding DT data on non-DT booted systems.
- Move around some /reserved-memory code in preparation for further
improvements
- Add a stub for_each_property_of_node() for !OF
- Adjust the printk levels on some messages
- Fix __be32 sparse warning
- Drop RESERVEDMEM_OF_DECLARE usage from Freescale qbman driver
(currently orphaned)
- Add Saravana Kannan and drop Frank Rowand as DT maintainers
DT bindings:
- Convert Mediatek timer, Mediatek sysirq, fsl,imx6ul-tsc,
fsl,imx6ul-pinctrl, Atmel AIC, Atmel HLCDC, FPGA region, and
xlnx,sd-fec to DT schemas
- Add existing, but undocumented fsl,imx-anatop binding
- Add bunch of undocumented vendor prefixes used in compatible strings
- Drop obsolete brcm,bcm2835-pm-wdt binding
- Drop obsolete i2c.txt which as been replaced with schema in dtschema
- Add DPS310 device and sort trivial-devices.yaml
- Enable undocumented compatible checks on DT binding examples
- More QCom maintainer fixes/updates
- Updates to writing-schema.rst and DT submitting-patches.rst to cover
some frequent review comments
- Clean-up SPDX tags to use 'OR' rather than 'or'
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Merge tag 'devicetree-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT core:
- Add cleanup.h based auto release of struct device_node pointers via
__free marking and new for_each_child_of_node_scoped() iterator to
use it.
- Always create a base skeleton DT when CONFIG_OF is enabled. This
supports several usecases of adding DT data on non-DT booted
systems.
- Move around some /reserved-memory code in preparation for further
improvements
- Add a stub for_each_property_of_node() for !OF
- Adjust the printk levels on some messages
- Fix __be32 sparse warning
- Drop RESERVEDMEM_OF_DECLARE usage from Freescale qbman driver
(currently orphaned)
- Add Saravana Kannan and drop Frank Rowand as DT maintainers
DT bindings:
- Convert Mediatek timer, Mediatek sysirq, fsl,imx6ul-tsc,
fsl,imx6ul-pinctrl, Atmel AIC, Atmel HLCDC, FPGA region, and
xlnx,sd-fec to DT schemas
- Add existing, but undocumented fsl,imx-anatop binding
- Add bunch of undocumented vendor prefixes used in compatible
strings
- Drop obsolete brcm,bcm2835-pm-wdt binding
- Drop obsolete i2c.txt which as been replaced with schema in
dtschema
- Add DPS310 device and sort trivial-devices.yaml
- Enable undocumented compatible checks on DT binding examples
- More QCom maintainer fixes/updates
- Updates to writing-schema.rst and DT submitting-patches.rst to
cover some frequent review comments
- Clean-up SPDX tags to use 'OR' rather than 'or'"
* tag 'devicetree-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (56 commits)
dt-bindings: soc: imx: fsl,imx-anatop: add imx6q regulators
of: unittest: Use for_each_child_of_node_scoped()
of: Introduce for_each_*_child_of_node_scoped() to automate of_node_put() handling
of: Add cleanup.h based auto release via __free(device_node) markings
of: Move all FDT reserved-memory handling into of_reserved_mem.c
of: Add KUnit test to confirm DTB is loaded
of: unittest: treat missing of_root as error instead of fixing up
x86/of: Unconditionally call unflatten_and_copy_device_tree()
um: Unconditionally call unflatten_device_tree()
of: Create of_root if no dtb provided by firmware
of: Always unflatten in unflatten_and_copy_device_tree()
dt-bindings: timer: mediatek: Convert to json-schema
dt-bindings: interrupt-controller: fsl,intmux: Include power-domains support
soc: fsl: qbman: Remove RESERVEDMEM_OF_DECLARE usage
dt-bindings: fsl-imx-sdma: fix HDMI audio index
dt-bindings: soc: imx: fsl,imx-iomuxc-gpr: add imx6
dt-bindings: soc: imx: fsl,imx-anatop: add binding
dt-bindings: input: touchscreen: fsl,imx6ul-tsc convert to YAML
dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML
of: make for_each_property_of_node() available to to !OF
...
|
||
|
Linus Torvalds
|
6dff52b828 |
Not a ton of stuff happening in the clk framework in this pull request. We got
some more devm helpers and we seem to be going in the direction of "just turn
this stuff on already and leave me alone!" with the addition of a
devm_clk_bulk_get_all_enable() API. I'm hoping that we can make that into a
genpd that drivers attach instead, but this API should help drivers simplify in
the meantime.
Outside of the devm wrappers, we've got the usual clk driver updates that are
dominated by the major phone SoC vendors (Samsung and Qualcomm) and the
non-critical driver fixes for things like incorrect topology descriptions and
wrong registers or bit fields. More details are below, but I'd say that it
looks pretty ordinary. The only thing that really jumps out at me is the
Renesas clk driver that's ignoring clks that are assigned to remote processors
in DeviceTree. That's a new feature that they're using to avoid marking clks as
CLK_IGNORE_UNUSED based on the configuration of the system.
Core:
- Increase dev_id len for clkdev lookups
- Add a devm_clk_bulk_get_all_enable() API to get and enable all clks
for a device
- Add a devm variant of clk_rate_exclusive_get()
New Drivers:
- Display, TCSR, GPU, and Camera clock controllers for Qualcomm's X1 Elite SoC
- Google GS101 PERIC0 and PERIC1 clock controllers
- Exynos850 PDMA clocks
- Exynos850 CPU cluster 0 and 1 (CMU_CPUCLK0/CMU_CPUCLK1) clock controllers
Removed Drivers:
- Remove the unused Qualcomm sc7180 modem clk driver
Updates:
- Fix some static checker errors in the Hisilicon clk driver
- Polarfire MSSPLL hardware has 4 output clocks (the driver supported
previously only one output); each of these 4 outputs feed dividers and the
output of each divider feed individual hardware blocks (e.g. CAN, Crypto,
eMMC); individual hardware block drivers need to control their clocks thus
clock driver support was added for all MSSPLL output clocks
- Typo fixes in the Qualcomm IPQ5018 GCC driver
- Add "qdss_at" clk on Qualcomm IPQ6018, needed for WiFi
- Properly terminate frequency tables in different Qualcomm clk drivers
- Add MDSS, crypto, and SDCC resets on Qualcomm MSM8953
- Add missing UFS CLKREF clks on Qualcomm SC8180X
- Avoid significant delays during boot by adding a softdep on rpmhpd to
Qualcomm SDM845 gcc driver
- Add QUPv3 RCGS w/ DFS and video resets to Qualcomm SM8150 GCC driver
- Fix the custom GPU GX "do-nothing" method in the Qualcomm GDSC driver
- Add an external regulator to GX GDSC on Qualcomm SC8280XP GPU clk driver
- Switch display, GPU, video, and camera Qualcomm clk drivers to
module_platform_driver()
- Set a longer delay for Venus resets on many Qualcomm SoCs
- Correct the GDSC wait times in the Qualcomm SDM845 display clk driver
- Fix clock listing Oops on Amlogic axg
- New pll-rate for Rockchip rk3568
- i2s rate improvements for Rockchip rk3399
- Rockchip rk3588 syscon clock fixes and removal of overall clock-number from
the rk3588 binding header
- A prerequisite for later improvements to the Rockchip rk3588 linked clocks
- Minor clean-ups and error handling improvements in both composite-8m and SCU
i.MX clock drivers
- Fix for SAI_MCLK_SEL definition for i.MX8MP
- Register the Samsung CMU MISC clock controller earlier, so the Multi Core
Timer clocksource can use it on Google GS101
- Propagate Exynos850 SPI IPCLK rate change to parents, so the SPI will get
proper clock rates
- Refactor the generic Samsung CPU clock controllers code, preparing it for
supporting Exynos850 CPU clocks
- Fix some clk kerneldoc warnings
- Add Ethernet, SDHI, DMA, and HyperFLASH/QSPI (RPC-IF) clocks on Renesas
R-Car V4M
- Ignore all clocks which are assigned to a non-Linux system in the Renesas
clk driver
- Add watchdog clock on Renesas RZ/G3S
- Add camera (CRU) clock and reset on Renesas RZ/G2UL
- Add support for the Renesas R-Car V4M (R8A779H0) SoC
- Convert some clk bindings to YAML so they can be validated
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"Not a ton of stuff happening in the clk framework. We got some more
devm helpers and we seem to be going in the direction of "just turn
this stuff on already and leave me alone!" with the addition of a
devm_clk_bulk_get_all_enable() API. I'm hoping that we can make that
into a pmdomain that drivers attach instead, but this API should help
drivers simplify in the meantime.
Outside of the devm wrappers, we've got the usual clk driver updates
that are dominated by the major phone SoC vendors (Samsung and
Qualcomm) and the non-critical driver fixes for things like incorrect
topology descriptions and wrong registers or bit fields. More details
are below, but I'd say that it looks pretty ordinary. The only thing
that really jumps out at me is the Renesas clk driver that's ignoring
clks that are assigned to remote processors in DeviceTree. That's a
new feature that they're using to avoid marking clks as
CLK_IGNORE_UNUSED based on the configuration of the system.
Core:
- Increase dev_id len for clkdev lookups
- Add a devm_clk_bulk_get_all_enable() API to get and enable all clks
for a device
- Add a devm variant of clk_rate_exclusive_get()
New Drivers:
- Display, TCSR, GPU, and Camera clock controllers for Qualcomm's X1
Elite SoC
- Google GS101 PERIC0 and PERIC1 clock controllers
- Exynos850 PDMA clocks
- Exynos850 CPU cluster 0 and 1 (CMU_CPUCLK0/CMU_CPUCLK1) clock
controllers
Removed Drivers:
- Remove the unused Qualcomm sc7180 modem clk driver
Updates:
- Fix some static checker errors in the Hisilicon clk driver
- Polarfire MSSPLL hardware has 4 output clocks (the driver supported
previously only one output); each of these 4 outputs feed dividers
and the output of each divider feed individual hardware blocks
(e.g. CAN, Crypto, eMMC); individual hardware block drivers need to
control their clocks thus clock driver support was added for all
MSSPLL output clocks
- Typo fixes in the Qualcomm IPQ5018 GCC driver
- Add "qdss_at" clk on Qualcomm IPQ6018, needed for WiFi
- Properly terminate frequency tables in different Qualcomm clk
drivers
- Add MDSS, crypto, and SDCC resets on Qualcomm MSM8953
- Add missing UFS CLKREF clks on Qualcomm SC8180X
- Avoid significant delays during boot by adding a softdep on rpmhpd
to Qualcomm SDM845 gcc driver
- Add QUPv3 RCGS w/ DFS and video resets to Qualcomm SM8150 GCC
driver
- Fix the custom GPU GX "do-nothing" method in the Qualcomm GDSC
driver
- Add an external regulator to GX GDSC on Qualcomm SC8280XP GPU clk
driver
- Switch display, GPU, video, and camera Qualcomm clk drivers to
module_platform_driver()
- Set a longer delay for Venus resets on many Qualcomm SoCs
- Correct the GDSC wait times in the Qualcomm SDM845 display clk
driver
- Fix clock listing Oops on Amlogic axg
- New pll-rate for Rockchip rk3568
- i2s rate improvements for Rockchip rk3399
- Rockchip rk3588 syscon clock fixes and removal of overall
clock-number from the rk3588 binding header
- A prerequisite for later improvements to the Rockchip rk3588 linked
clocks
- Minor clean-ups and error handling improvements in both
composite-8m and SCU i.MX clock drivers
- Fix for SAI_MCLK_SEL definition for i.MX8MP
- Register the Samsung CMU MISC clock controller earlier, so the
Multi Core Timer clocksource can use it on Google GS101
- Propagate Exynos850 SPI IPCLK rate change to parents, so the SPI
will get proper clock rates
- Refactor the generic Samsung CPU clock controllers code, preparing
it for supporting Exynos850 CPU clocks
- Fix some clk kerneldoc warnings
- Add Ethernet, SDHI, DMA, and HyperFLASH/QSPI (RPC-IF) clocks on
Renesas R-Car V4M
- Ignore all clocks which are assigned to a non-Linux system in the
Renesas clk driver
- Add watchdog clock on Renesas RZ/G3S
- Add camera (CRU) clock and reset on Renesas RZ/G2UL
- Add support for the Renesas R-Car V4M (R8A779H0) SoC
- Convert some clk bindings to YAML so they can be validated"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
clk: zynq: Prevent null pointer dereference caused by kmalloc failure
clk: fractional-divider: Use bit operations consistently
clk: fractional-divider: Move mask calculations out of lock
clk: Fix clk_core_get NULL dereference
clk: starfive: jh7110-vout: Convert to platform remove callback returning void
clk: starfive: jh7110-isp: Convert to platform remove callback returning void
clk: imx: imx8-acm: Convert to platform remove callback returning void
clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset
clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk'
clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk'
clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc
clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays
clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays
clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays
clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays
clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays
clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays
clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays
clk: mediatek: clk-mt8173-apmixedsys: Use common error handling code in clk_mt8173_apmixed_probe()
clk: Add a devm variant of clk_rate_exclusive_get()
...
|
||
|
Linus Torvalds
|
f5c31bcf60 |
- Core Frameworks
- Introduce ExpressWire library
- New Drivers
- Add support for ON Semiconductor NCP5623 RGB LED Driver
- New Device Support
- Add support for PM660L to Qualcomm's LPG driver
- New Functionality
- Dynamically load modules required for the default-trigger
- Add some support for suspend and resume
- Allow LEDs to remain lit during suspend
- Fix-ups
- Device Tree binding adaptions/conversions/creation
- Fix include lists; alphabetise, remove unused, explicitly add used
- Add new led_match_default_trigger to avoid duplication
- Add module alias' to aid auto-loading
- Default to hw_control if no others are specified
- De-bloat the supported link speed attribute lists
- Remove superfluous code and simplify overall
- Constify some variables
- Bug Fixes
- Prevent kernel panic when renaming the net interface
- Fix Kconfig related build errors
- Ensure mutexes are unlocked prior to destroying them
- Provide clean-up between state changes to avoid invalid state
- Fix some broken kernel-doc headers
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Merge tag 'leds-next-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds
Pull LED updates from Lee Jones:
"Core Framework:
- Introduce ExpressWire library
New Drivers:
- Add support for ON Semiconductor NCP5623 RGB LED Driver
New Device Support:
- Add support for PM660L to Qualcomm's LPG driver
New Functionality:
- Dynamically load modules required for the default-trigger
- Add some support for suspend and resume
- Allow LEDs to remain lit during suspend
Fix-ups:
- Device Tree binding adaptions/conversions/creation
- Fix include lists; alphabetise, remove unused, explicitly add used
- Add new led_match_default_trigger to avoid duplication
- Add module alias' to aid auto-loading
- Default to hw_control if no others are specified
- De-bloat the supported link speed attribute lists
- Remove superfluous code and simplify overall
- Constify some variables
Bug Fixes:
- Prevent kernel panic when renaming the net interface
- Fix Kconfig related build errors
- Ensure mutexes are unlocked prior to destroying them
- Provide clean-up between state changes to avoid invalid state
- Fix some broken kernel-doc headers"
* tag 'leds-next-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds: (41 commits)
leds: ncp5623: Add MS suffix to time defines
leds: Add NCP5623 multi-led driver
dt-bindings: leds: Add NCP5623 multi-LED Controller
leds: mlxreg: Drop an excess struct mlxreg_led_data member
leds: leds-mlxcpld: Fix struct mlxcpld_led_priv member name
leds: lm3601x: Fix struct lm3601_led kernel-doc warnings
leds: Fix ifdef check for gpio_led_register_device()
dt-bindings: leds: qcom-lpg: Narrow nvmem for other variants
dt-bindings: leds: qcom-lpg: Drop redundant qcom,pm8550-pwm in if:then:
dt-bindings: leds: Add LED_FUNCTION_WAN_ONLINE for Internet access
leds: sgm3140: Add missing timer cleanup and flash gpio control
leds: expresswire: Don't depend on NEW_LEDS
Revert "leds: Only descend into leds directory when CONFIG_NEW_LEDS is set"
leds: aw2013: Unlock mutex before destroying it
leds: qcom-lpg: Add QCOM_PBS dependency
leds: rgb: leds-group-multicolor: Allow LEDs to stay on in suspend
leds: trigger: netdev: Fix kernel panic on interface rename trig notify
leds: qcom-lpg: Add PM660L configuration and compatible
leds: spi-byte: Use devm_led_classdev_register_ext()
leds: pca963x: Add support for suspend and resume
...
|
||
|
Stephen Boyd
|
3066c521be |
Merge branches 'clk-samsung', 'clk-imx', 'clk-rockchip', 'clk-clkdev' and 'clk-rate-exclusive' into clk-next
- Increase dev_id len for clkdev lookups * clk-samsung: (25 commits) clk: samsung: Add CPU clock support for Exynos850 clk: samsung: Pass mask to wait_until_mux_stable() clk: samsung: Keep register offsets in chip specific structure clk: samsung: Keep CPU clock chip specific data in a dedicated struct clk: samsung: Pass register layout type explicitly to CLK_CPU() clk: samsung: Pass actual CPU clock registers base to CPU_CLK() clk: samsung: Group CPU clock functions by chip clk: samsung: Use single CPU clock notifier callback for all chips clk: samsung: Reduce params count in exynos_register_cpu_clock() clk: samsung: Pull struct exynos_cpuclk into clk-cpu.c clk: samsung: Improve clk-cpu.c style dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1 clk: samsung: gs101: add support for cmu_peric1 clk: samsung: gs101: drop extra empty line dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit clk: samsung: exynos850: Propagate SPI IPCLK rate change clk: samsung: gs101: gpio_peric0_pclk needs to be kept on clk: samsung: exynos850: Add PDMA clocks dt-bindings: clock: tesla,fsd: Fix spelling mistake clk: samsung: gs101: add support for cmu_peric0 ... * clk-imx: clk: imx: imx8mp: Fix SAI_MCLK_SEL definition clk: imx: scu: Use common error handling code in imx_clk_scu_alloc_dev() clk: imx: composite-8m: Delete two unnecessary initialisations in __imx8m_clk_hw_composite() clk: imx: composite-8m: Less function calls in __imx8m_clk_hw_composite() after error detection * clk-rockchip: clk: rockchip: rk3399: Allow to set rate of clk_i2s0_frac's parent clk: rockchip: rk3588: use linked clock ID for GATE_LINK clk: rockchip: rk3588: fix indent clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grf dt-bindings: clock: rk3588: add missing PCLK_VO1GRF dt-bindings: clock: rk3588: drop CLK_NR_CLKS clk: rockchip: rk3588: fix CLK_NR_CLKS usage clk: rockchip: rk3568: Add PLL rate for 128MHz * clk-clkdev: clkdev: Update clkdev id usage to allow for longer names * clk-rate-exclusive: clk: Add a devm variant of clk_rate_exclusive_get() |
||
|
Stephen Boyd
|
68e4ebd542 |
Merge branches 'clk-remove', 'clk-amlogic', 'clk-qcom', 'clk-parent' and 'clk-microchip' into clk-next
* clk-remove: clk: starfive: jh7110-vout: Convert to platform remove callback returning void clk: starfive: jh7110-isp: Convert to platform remove callback returning void clk: imx: imx8-acm: Convert to platform remove callback returning void * clk-amlogic: clk: meson: Add missing clocks to axg_clk_regmaps * clk-qcom: (62 commits) clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk' clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk' clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays clk: qcom: dispcc-sdm845: Adjust internal GDSC wait times dt-bindings: clk: qcom: drop the SC7180 Modem subsystem clock controller clk: qcom: drop the SC7180 Modem subsystem clock driver clk: qcom: Use qcom_branch_set_clk_en() clk: qcom: branch: Add a helper for setting the enable bit clk: qcom: dispcc-sm8250: Make clk_init_data and pll_vco const clk: qcom: gcc-sc8180x: Add missing UFS QREF clocks clk: qcom: gcc-msm8953: add more resets clk: qcom: videocc-*: switch to module_platform_driver ... * clk-parent: clk: Fix clk_core_get NULL dereference * clk-microchip: clk: microchip: mpfs: convert MSSPLL outputs to clk_divider clk: microchip: mpfs: add missing MSSPLL outputs clk: microchip: mpfs: setup for using other mss pll outputs clk: microchip: mpfs: split MSSPLL in two dt-bindings: can: mpfs: add missing required clock dt-bindings: clock: mpfs: add more MSSPLL output definitions |
||
|
Stephen Boyd
|
ee2d2a4e9c |
Merge branches 'clk-aspeed', 'clk-keystone', 'clk-mobileye' and 'clk-allwinner' into clk-next
* clk-aspeed: clk: ast2600: Add FSI parent clock with correct rate dt-bindings: clock: ast2600: Add FSI clock * clk-keystone: clk: keystone: sci-clk: Adding support for non contiguous clocks * clk-mobileye: dt-bindings: reset: mobileye,eyeq5-reset: add bindings dt-bindings: clock: mobileye,eyeq5-clk: add bindings clk: fixed-factor: add fwname-based constructor functions clk: fixed-factor: add optional accuracy support * clk-allwinner: clk: sunxi: usb: fix kernel-doc warnings clk: sunxi: sun9i-cpus: fix kernel-doc warnings clk: sunxi: a20-gmac: fix kernel-doc warnings |
||
|
Stephen Boyd
|
cf5f06c8ee |
Merge branches 'clk-renesas', 'clk-cleanup', 'clk-hisilicon', 'clk-mediatek' and 'clk-bulk' into clk-next
- Add a devm_clk_bulk_get_all_enable() API to get and enable all clks for a device - Fix some static checker errors in the hisilicon clk driver * clk-renesas: (25 commits) clk: renesas: r8a779h0: Add RPC-IF clock clk: renesas: r8a779h0: Add SYS-DMAC clocks clk: renesas: r8a779h0: Add SDHI clock clk: renesas: r8a779h0: Add EtherAVB clocks clk: renesas: r9a07g04[34]: Fix typo for sel_shdi variable clk: renesas: r9a07g04[34]: Use SEL_SDHI1_STS status configuration for SD1 mux clk: renesas: r8a779f0: Correct PFC/GPIO parent clock clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks clk: renesas: r8a779h0: Add I2C clocks clk: renesas: r8a779h0: Add watchdog clock clk: renesas: r8a779h0: Add PFC/GPIO clocks clk: renesas: r8a779g0: Fix PCIe clock name clk: renesas: cpg-mssr: Add support for R-Car V4M clk: renesas: rcar-gen4: Add support for FRQCRC1 clk: renesas: r9a07g043: Add clock and reset entries for CRU clk: renesas: r9a08g045: Add clock and reset support for watchdog dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions dt-bindings: clock: renesas,cpg-mssr: Document R-Car V4M support dt-bindings: power: Add r8a779h0 SYSC power domain definitions dt-bindings: power: renesas,rcar-sysc: Document R-Car V4M support ... * clk-cleanup: clk: zynq: Prevent null pointer dereference caused by kmalloc failure clk: fractional-divider: Use bit operations consistently clk: fractional-divider: Move mask calculations out of lock clk: ti: dpll3xxx: use correct function names in kernel-doc clk: clocking-wizard: Remove redundant initialization of pointer div_addr clk: keystone: sci-clk: match func name comment to actual clk: cdce925: Remove redundant assignment to variable 'rate' MAINTAINERS: drop Sekhar Nori * clk-hisilicon: clk: hisilicon: Use devm_kcalloc() instead of devm_kzalloc() clk: hisilicon: hi3559a: Fix an erroneous devm_kfree() clk: hisilicon: hi3519: Release the correct number of gates in hi3519_clk_unregister() * clk-mediatek: clk: mediatek: clk-mt8173-apmixedsys: Use common error handling code in clk_mt8173_apmixed_probe() clk: mediatek: add infracfg reset controller for mt7988 dt-bindings: reset: mediatek: add MT7988 infracfg reset IDs dt-bindings: clock: mediatek: convert SSUSBSYS to the json-schema clock dt-bindings: clock: mediatek: convert PCIESYS to the json-schema clock dt-bindings: clock: mediatek: convert hifsys to the json-schema clock clk: mediatek: mt7981-topckgen: flag SGM_REG_SEL as critical clk: mediatek: mt8183: Correct parent of CLK_INFRA_SSPM_32K_SELF clk: mediatek: mt7622-apmixedsys: Fix an error handling path in clk_mt8135_apmixed_probe() clk: mediatek: mt8135: Fix an error handling path in clk_mt8135_apmixed_probe() * clk-bulk: clk: Provide managed helper to get and enable bulk clocks |
||
|
Linus Torvalds
|
a070a08d00 |
Core:
- Log a message when unused PM domains gets disabled
- Scale down parent/child performance states in the reverse order
Providers:
- qcom: rpmpd: Add power domains support for MSM8974, MSM8974PRO, PMA8084
and PM8841
- renesas: rcar-gen4-sysc: Reduce atomic delays
- renesas: rcar-sysc: Adjust the waiting time to cover the worst case
- renesas: r8a779h0-sysc: Add support for the r8a779h0 PM domains
- imx: imx8mp-blk-ctrl: Add the fdcc clock to the hdmimix domains
- imx: imx8mp-blk-ctrl: Error out if domains are missing in DT
Improve support for multiple PM domains:
- Add two helper functions to attach/detach multiple PM domains
- Convert a couple of drivers to use the new helper functions
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Merge tag 'pmdomain-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm
Pull pmdomain updates from Ulf Hansson:
"Core:
- Log a message when unused PM domains gets disabled
- Scale down parent/child performance states in the reverse order
Providers:
- qcom: rpmpd: Add power domains support for MSM8974, MSM8974PRO,
PMA8084 and PM8841
- renesas: rcar-gen4-sysc: Reduce atomic delays
- renesas: rcar-sysc: Adjust the waiting time to cover the worst case
- renesas: r8a779h0-sysc: Add support for the r8a779h0 PM domains
- imx: imx8mp-blk-ctrl: Add the fdcc clock to the hdmimix domains
- imx: imx8mp-blk-ctrl: Error out if domains are missing in DT
Improve support for multiple PM domains:
- Add two helper functions to attach/detach multiple PM domains
- Convert a couple of drivers to use the new helper functions"
* tag 'pmdomain-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (22 commits)
pmdomain: renesas: rcar-gen4-sysc: Reduce atomic delays
pmdomain: renesas: Adjust the waiting time to cover the worst case
pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 power domains
pmdomain: qcom: rpmpd: Add MSM8974+PM8841 power domains
pmdomain: core: constify of_phandle_args in add device and subdomain
pmdomain: core: constify of_phandle_args in xlate
media: venus: Convert to dev_pm_domain_attach|detach_list() for vcodec
remoteproc: qcom_q6v5_adsp: Convert to dev_pm_domain_attach|detach_list()
remoteproc: imx_rproc: Convert to dev_pm_domain_attach|detach_list()
remoteproc: imx_dsp_rproc: Convert to dev_pm_domain_attach|detach_list()
PM: domains: Add helper functions to attach/detach multiple PM domains
pmdomain: imx8mp-blk-ctrl: imx8mp_blk: Add fdcc clock to hdmimix domain
pmdomain: mediatek: Use devm_platform_ioremap_resource() in init_scp()
pmdomain: renesas: r8a779h0-sysc: Add r8a779h0 support
pmdomain: imx8mp-blk-ctrl: Error out if domains are missing in DT
pmdomain: ti: Add a null pointer check to the omap_prm_domain_init
pmdomain: renesas: rcar-gen4-sysc: Remove unneeded includes
pmdomain: core: Print a message when unused power domains are disabled
pmdomain: qcom: rpmpd: Keep one RPM handle for all RPMPDs
pmdomain: core: Scale down parent/child performance states in reverse order
...
|
||
|
Linus Torvalds
|
2184dbcde4 |
ARM: SoC drivers for 6.9
This is the usual mix of updates for drivers that are used on (mostly
ARM) SoCs with no other top-level subsystem tree, including:
- The SCMI firmware subsystem gains support for version 3.2 of the
specification and updates to the notification code.
- Feature updates for Tegra and Qualcomm platforms for added
hardware support.
- A number of platforms get soc_device additions for identifying newly
added chips from Renesas, Qualcomm, Mediatek and Google.
- Trivial improvements for firmware and memory drivers amongst
others, in particular 'const' annotations throughout multiple
subsystems.
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Merge tag 'soc-drivers-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"This is the usual mix of updates for drivers that are used on (mostly
ARM) SoCs with no other top-level subsystem tree, including:
- The SCMI firmware subsystem gains support for version 3.2 of the
specification and updates to the notification code
- Feature updates for Tegra and Qualcomm platforms for added hardware
support
- A number of platforms get soc_device additions for identifying
newly added chips from Renesas, Qualcomm, Mediatek and Google
- Trivial improvements for firmware and memory drivers amongst
others, in particular 'const' annotations throughout multiple
subsystems"
* tag 'soc-drivers-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
tee: make tee_bus_type const
soc: qcom: aoss: add missing kerneldoc for qmp members
soc: qcom: geni-se: drop unused kerneldoc struct geni_wrapper param
soc: qcom: spm: fix building with CONFIG_REGULATOR=n
bus: ti-sysc: constify the struct device_type usage
memory: stm32-fmc2-ebi: keep power domain on
memory: stm32-fmc2-ebi: add MP25 RIF support
memory: stm32-fmc2-ebi: add MP25 support
memory: stm32-fmc2-ebi: check regmap_read return value
dt-bindings: memory-controller: st,stm32: add MP25 support
dt-bindings: bus: imx-weim: convert to YAML
watchdog: s3c2410_wdt: use exynos_get_pmu_regmap_by_phandle() for PMU regs
soc: samsung: exynos-pmu: Add regmap support for SoCs that protect PMU regs
MAINTAINERS: Update SCMI entry with HWMON driver
MAINTAINERS: samsung: gs101: match patches touching Google Tensor SoC
memory: tegra: Fix indentation
memory: tegra: Add BPMP and ICC info for DLA clients
memory: tegra: Correct DLA client names
dt-bindings: memory: renesas,rpc-if: Document R-Car V4M support
firmware: arm_scmi: Update the supported clock protocol version
...
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Rafał Miłecki
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64e558500d |
dt-bindings: leds: Add LED_FUNCTION_WAN_ONLINE for Internet access
It's common for routers to have LED indicating link on the WAN port. Some devices however have an extra LED that's meant to be used if WAN connection is actually "online" (there is Internet access available). It was suggested to add #define for such use case. Link: https://lore.kernel.org/linux-devicetree/80e92209-5578-44e7-bd4b-603a29053ddf@collabora.com/T/#u Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240223112223.1368-1-zajec5@gmail.com Signed-off-by: Lee Jones <lee@kernel.org> |
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Rafał Miłecki
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ec18a2a83b |
dt-bindings: leds: Add FUNCTION defines for per-band WLANs
Most wireless routers and access points can operate in multiple bands simultaneously. Vendors often equip their devices with per-band LEDs. Add defines for those very common functions to allow cleaner & clearer bindings. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240117151736.27440-1-zajec5@gmail.com Signed-off-by: Lee Jones <lee@kernel.org> |
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Arnd Bergmann
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b74638bbda |
Initial support for the rk3568 Qnap TS433 NAS, the rk3588-based Tiger SoM
from Theobroma-Systems and the rk3588-based Toybrick TB-RK3588X. Some fixes to conform to dt-bindings for i2s (rk3588, rk356x) and rk356x video-decoder (missing interrupt-names). Correcting the vendor in the compatible for OrangePi RK3399 and BananaPi R2 Pro (discussed with DT-maintainers beforehand of course). The VO1-GRF syscon needs its clock to work, and that clock also needed to be actually exported forst, so we're sharing a branch with the Rockchip clock-tree (that already got merged into the main clock-tree for 6.9) for this small shared code. And as another step on the long road to graphics output on rk3588, 6.9 will get the hdmi-phy via the phy-tree, so here the dts node is added. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmXjFSEQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgZ12CACL8EGrdL32f+Yg+4pgKiC79C0WFh05F56I KAgK4nRs3IjOR8zRUx5Wez3uKd7vbH/3GhqSurJQ894FNqpOKYJ48cnokaG/hUV3 dimEr5dPcSZGVdRcaQRH+B7Pe5hFmw98dZxIDfWOZzZ4XwShcfDYFx6xlGmcba+e KyMwjrVHyjh3M384yDx14oJw8bqn2b+oFFaZxCoz93zX9g1FUFbF6IuOsJ0KXXDR SRHP+s2jGxUyBltsXyQc4sa4e9i8hDbAZuBwgozLReSgTy+GJqxj87pcsc/4uCAE w8MW9RW/xwuFrU+BLs0UNOtdSn8BdHjEyEFc0SEtFAW9HVtoCozP =awlr -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXleR4ACgkQYKtH/8kJ UifN5w//dcJ1v6HXK31S0Egneku8WUV4ytQuLXvYeg41zIIIEv36sBeqDQxd5taa z2/Vy4plHCECvXWjZFEGfK44Hn/0KevrG3rHOzhNUhZV10M1KBHP5uxUYVtrmcYr crZsLGy90ZLnZqdKjep1bSxMv1o5QdU9LUjBZmclZEeMky4CH3ZB+sMY9shN6YZM wWewSwsLSoa2pAxP9g3izJjFKcwALDjNapmuXe/KFWOIOfJrm3kvASu993sfILYA /Wx3IRMerM9tsxAz1/KfKyKYnfT4HbF2RlNTf8OaYdypXU4eLpMboL31k8jCBoTT TNVkY5M722r9rbg5hTM4LTRRuEC4rfuDJEyEdHWEgqPIdXK4pwMncQDBVwimunIN sEG5TajVI34e9ZInptJQ/ZBCKCllC5gpAPcLw9GrRw7guuCfIbpQj0F+2lDFR9Ob FtYW7Ua6Nbw7jPbOCW6qrF/ujnbG3X317aYugpuqiakPW/G+kv11CtRsWZV+OBTv SXgRqtYTKprFJxOY5nMnlkG7+ps/B2ctgOGuq1mjcoodsZDF8WW6q00U9Jf9IbVF f78ed9DOJ+M70NKJ1QLBIXDLhcZ/Mlv2m9akG8YqmVvBs9efRPQc0mnFQUvWiMDq 7xFXZRl2i2xe5IX0JIE7Ujvox/APZARrHhQldHfkC9S5jSlCi0E= =SbMB -----END PGP SIGNATURE----- Merge tag 'v6.9-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt Initial support for the rk3568 Qnap TS433 NAS, the rk3588-based Tiger SoM from Theobroma-Systems and the rk3588-based Toybrick TB-RK3588X. Some fixes to conform to dt-bindings for i2s (rk3588, rk356x) and rk356x video-decoder (missing interrupt-names). Correcting the vendor in the compatible for OrangePi RK3399 and BananaPi R2 Pro (discussed with DT-maintainers beforehand of course). The VO1-GRF syscon needs its clock to work, and that clock also needed to be actually exported forst, so we're sharing a branch with the Rockchip clock-tree (that already got merged into the main clock-tree for 6.9) for this small shared code. And as another step on the long road to graphics output on rk3588, 6.9 will get the hdmi-phy via the phy-tree, so here the dts node is added. * tag 'v6.9-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Fix name for UART pin header on qnap-ts433 arm64: dts: rockchip: Add basic support for QNAP TS-433 dt-bindings: arm: rockchip: Add QNAP TS-433 arm64: dts: rockchip: add Haikou baseboard with RK3588-Q7 SoM arm64: dts: rockchip: add RK3588-Q7 (Tiger) SoM dt-bindings: arm: rockchip: Add Theobroma-Systems RK3588 Q7 with baseboard arm64: dts: rockchip: drop rockchip,trcm-sync-tx-only from rk3588 i2s arm64: dts: rockchip: fix reset-names for rk356x i2s2 controller arm64: dts: rockchip: add missing interrupt-names for rk356x vdpu arm64: dts: rockchip: add clock to vo1-grf syscon on rk3588 dt-bindings: arm: rockchip: Add Toybrick TB-RK3588X arm64: dts: rockchip: Add devicetree support for TB-RK3588X board arm64: dts: rockchip: adjust vendor on orangepi rk3399 board arm64: dts: rockchip: adjust vendor on Banana Pi R2 Pro board dt-bindings: arm: rockchip: Correct vendor for Banana Pi R2 Pro dt-bindings: arm: rockchip: Correct vendor for Orange Pi RK3399 board arm64: dts: rockchip: Add HDMI0 PHY to rk3588 dt-bindings: clock: rk3588: add missing PCLK_VO1GRF dt-bindings: clock: rk3588: drop CLK_NR_CLKS clk: rockchip: rk3588: fix CLK_NR_CLKS usage Link: https://lore.kernel.org/r/3695004.ElGaqSPkdT@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
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Arnd Bergmann
|
f011770485 |
STM32 DT for v6.9, round 1
Highlights:
----------
- MCU:
- Add DSI support on stm32f769.
- Add display support on stm32f769-disco.
- Add stm32f769-disco-mb1166-reva09 board support which belongs to
the novatek NT35510 panel.
- MPU:
- STM32MP13:
- Add CRC support an enable it on stm32mp135f-dk.
- Enable CRYP on stm32mp135f-dk.
- STMP32MP15:
- Fix DSI peripheral clock: use bus clock instead of kernel clock
for pclk.
- LXA: driver powerboard lines as open drain.
- LXA: reduce RGMII drive strenght to reduce EMI emmissions.
- STM32MP25:
- Add video encoder / video decoder support.
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Merge tag 'stm32-dt-for-v6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.9, round 1
Highlights:
----------
- MCU:
- Add DSI support on stm32f769.
- Add display support on stm32f769-disco.
- Add stm32f769-disco-mb1166-reva09 board support which belongs to
the novatek NT35510 panel.
- MPU:
- STM32MP13:
- Add CRC support an enable it on stm32mp135f-dk.
- Enable CRYP on stm32mp135f-dk.
- STMP32MP15:
- Fix DSI peripheral clock: use bus clock instead of kernel clock
for pclk.
- LXA: driver powerboard lines as open drain.
- LXA: reduce RGMII drive strenght to reduce EMI emmissions.
- STM32MP25:
- Add video encoder / video decoder support.
* tag 'stm32-dt-for-v6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
arm64: dts: st: add video encoder support to stm32mp255
arm64: dts: st: add video decoder support to stm32mp255
ARM: dts: stm32: enable crypto accelerator on stm32mp135f-dk
ARM: dts: stm32: enable CRC on stm32mp135f-dk
ARM: dts: stm32: add CRC on stm32mp131
ARM: dts: add stm32f769-disco-mb1166-reva09
ARM: dts: stm32: add display support on stm32f769-disco
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco
ARM: dts: stm32: add DSI support on stm32f769
dt-bindings: mfd: stm32f7: Add binding definition for DSI
dt-bindings: nt35510: document 'port' property
ARM: dts: stm32: lxa-tac: reduce RGMII interface drive strength
ARM: dts: stm32: fix DSI peripheral clock on stm32mp15 boards
ARM: dts: stm32: lxa-tac: drive powerboard lines as open-drain
Link: https://lore.kernel.org/r/a7ae1058-e24d-4a6b-900f-401f0e3ae17c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Arnd Bergmann
|
aefe054f2c |
Qualcomm ARM64 DeviceTree updates for v6.9
Four variants of Samsung Galaxy Core Prime and Grand Prime, built on MSM8916, and the Hardware Development Kit (HDK) for SM8550, are introduced. On X Elite audio and compute remoteprocs, IPCC, PCIe, AOSS QMP, SMP2P, TCSR, USB, display, audio, and soundwire support is introduced, and enabled across the CRD and QCP devices. For SM8650 PCIe controllers are moved to GIC-ITS and msi-map-mask is defined. Missing qlink-logging reserved-memory region is added for the modem remoteproc. FastRPC compute contexts are marked dma-coherent. Audio, USB Type-C and PM8010 support is introduced across MTP and QRD devices. GPU cooling devices are hooked up across MSM8916, MSM8939, SC8180X, SDM630, SDM845, SM6115, SM8150, SM8250, SM8350, and SM8550. UFS PHY clocks are corrected across MSM8996, MSM8998, SC8180X, SC8280XP, SDM845, SM6115, SM6125, SM8150, SM8250, SM8350, SM8550, and SM8650. PCI MSI interrupts are wired up across SM8150, SM8250, SM8350, SM8450, SM8550, SM8650, SC7280, and SC8180X On IPQ6018 QUP5 I2C, tsens sand thermal zones are defined. The Inline Crypto Engine (ICE) is enabled for IPQ9574. On MSM8953 the GPU and its IOMMU is introduced, the reset for the display subsystem is also wired up. VLS CLAMP registers are specified for USB3 PHYs on MSM8998, QCM2290, and SM6115. USB Type-C port management is enabled on QRB4210 RB2. On the SA8295P ADP the MAX20411 regulator powering the GPU rails is introduced and the GPU is enabled. The first PCI instance on SA8540P Ride is disabled for now, as a fix for the interrupt storm produced here has not been presented. On SA8775P the firmware memory map has changed and is updated. Safety IRQ is added to the Ethernet controller. On SC7180 UFS support is introduced and the cros-ec-spi is marked as wakeup source. For SC7280 capacity and DPC properties are added, cryptobam definition is improved to work in more firmware environments, more Chrome-specific properties are moved out from main dtsi, and cros-ec-spi is maked as a wakeup source. Slimbus definition is added to the platform. A missing reserved-memory range is added to Fairphone FP5, PMIC GLINK and Venus are enabled. LEDs are introduced and voltage settings corrected on the QCM6490 IDP, and RB3gen2 sees the same voltage changes and GCC protected clocks are introduced to make the board boot properly. RPMh sleep stats and a variety of cleanups and fixes are introduced for SC8180X. On SC8280XP the additional tsens instances are introduced. Camera Subsystem and Camera Control Interface (CCI) are added. PMIC die-temp vadc channels are introduced on the CRD, to allow ADC channels to be tied to the shared PMIC temp-alarms, to actually report temperature. On SDM630 USB QMP PHY support is introduced and enabled on the Inforce IFC6560 board. On the various Sony Xperia XA2 variants WLED is enabled and configured. On SM6350 display subsystem interconnects and tsens-based thermal zones are added. On SM7125 UFS support is added. On Fairphone FP4, on SM7225, display and GPU are enabled, and firmware paths are corrected. SM8150 PCIe controller definitions are corrected. As with SM8650, the SM8550 the fastrpc compute contexts are marked dm-coherent, and PCIe controllers are moved to use GIC-ITS. The UFS controller frequency definition is moved to the generic opp-table. Touchscreen is enabled on the QRD device. As usual, a variety of smaller cleanups and corrections to match DeviceTree bindings and style guidelines are introduced across the various files. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmXayZYVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FtLcQAJyCQ/wRZ2BVVr3afFqWaAIQQ4+X mTywp/1dtWDbLMew2WIcv1KLHVDynsPWYr/AWM3w0kjgbiqr+EzZl18GVAqf53QB CCkgbLClEKl8NyGQGKWRfp0PF5K/ujv50+6WxwJ+46Sm63odAHe1MZFQQsyuMACn uP7R9yiKt39ztwXp24KbbS6OKNnxtvqeI2OTYFiQV6kR/AqTONrIedqNhvMfgAw9 jOF5ZkqDTlTqJhcszOkzfBC18bnTLvhKP0TG4YhlUpDwJVIaGVp3vzIzX7PJgVIA XxbWqc6I91PIPTHCu4gCcklQXLdu3Uc1cBqufiE70+GgDo4+P4nJkSDNeSrOUuQA NXUULnFyum7U0S3yIQHD2wiUIqRwgwfLJeKe7Z8kya4cCWkcvUBWBw+e8GCADlEI R22pY4bpJwJYO66TCHT/5A05HjnSh/wY1O56fLepJ5ywGQKX7U71mZsGehSgwp4u /OuWgRqnMmcyNAZKE/NMFfGUCRLRWwzWTl4VQ1Fiq+JN3jcySFyAm+cW8NXQ3q6y oDcxx8TyWn+nBS/oErNZ9Q0I7jQun4DzUyYszeBEzffyWPie3KI6KtqlkJGSmK/y Z1kCOnlJSfDNnRYHR82fNFSuHpIpBYhdSWUduweLwiX36ZfFcZ8QA8eTsDANNgf4 TZflGJSXL8YMBucn =LM9R -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXhqwQACgkQYKtH/8kJ Uie8thAAk7/ASn/Q8PcHAEamCk34HFADaVnUpU6OTtQwiBDr3amRx8IfrGqxbW6e BVZOFnasehDLl68433XrFTQfaRLFxRJEoY5sZ1PFOCZvqoO8IfjawokpjzKzq6PK 0HprU82+CVl9UwYjcAEWD2y/alQ4Q48YUF971q7dzBCTey8gXUZtyW2fk7ZptzR1 utq3rE3zK+WRvijTdHNsjw3qdwoM3K8QrryocKqYqzQM9RKNu2JfJgH1VL+8W70x eZvASON8wYgByaKke5WrK9k1ZGCj01Qy7bfdv/hzz+DZ+KkvvJce+/gy1zB5klzV fP6qSP5BP8zTzaQx/pqK3TDb/QMXNndwmWYufAtQ4LE0c5AwDnd9ZJN29yb4ASME cSUfc0cfrL/JrWlk17FWPo94z9InWBurZg/L8ljS3ms6MWUQcaZjIPrUYz+scAdF dVlJJrX1eJVNj95q/79DfjNeRgMOzj8E5dm/qGDEM/XxQvCLo3pEWAiauIYRkGFE NsG1uZsW833gx3M0ZEtGtP9Nl2Mai5gyZjXFa+P5Of9TQ1/FYWghyn7hmfajGqlJ gQzsBwbJSQv9H40X907NbLE9fULHHfAfTY0SFHaH1U6LmxrGfXpKm44+KKoEABAH Lkx4k8da0ALK+YsYbXtPkd95zdIUx2567GwJaAZg46QKaBAjk9o= =+uiX -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 DeviceTree updates for v6.9 Four variants of Samsung Galaxy Core Prime and Grand Prime, built on MSM8916, and the Hardware Development Kit (HDK) for SM8550, are introduced. On X Elite audio and compute remoteprocs, IPCC, PCIe, AOSS QMP, SMP2P, TCSR, USB, display, audio, and soundwire support is introduced, and enabled across the CRD and QCP devices. For SM8650 PCIe controllers are moved to GIC-ITS and msi-map-mask is defined. Missing qlink-logging reserved-memory region is added for the modem remoteproc. FastRPC compute contexts are marked dma-coherent. Audio, USB Type-C and PM8010 support is introduced across MTP and QRD devices. GPU cooling devices are hooked up across MSM8916, MSM8939, SC8180X, SDM630, SDM845, SM6115, SM8150, SM8250, SM8350, and SM8550. UFS PHY clocks are corrected across MSM8996, MSM8998, SC8180X, SC8280XP, SDM845, SM6115, SM6125, SM8150, SM8250, SM8350, SM8550, and SM8650. PCI MSI interrupts are wired up across SM8150, SM8250, SM8350, SM8450, SM8550, SM8650, SC7280, and SC8180X On IPQ6018 QUP5 I2C, tsens sand thermal zones are defined. The Inline Crypto Engine (ICE) is enabled for IPQ9574. On MSM8953 the GPU and its IOMMU is introduced, the reset for the display subsystem is also wired up. VLS CLAMP registers are specified for USB3 PHYs on MSM8998, QCM2290, and SM6115. USB Type-C port management is enabled on QRB4210 RB2. On the SA8295P ADP the MAX20411 regulator powering the GPU rails is introduced and the GPU is enabled. The first PCI instance on SA8540P Ride is disabled for now, as a fix for the interrupt storm produced here has not been presented. On SA8775P the firmware memory map has changed and is updated. Safety IRQ is added to the Ethernet controller. On SC7180 UFS support is introduced and the cros-ec-spi is marked as wakeup source. For SC7280 capacity and DPC properties are added, cryptobam definition is improved to work in more firmware environments, more Chrome-specific properties are moved out from main dtsi, and cros-ec-spi is maked as a wakeup source. Slimbus definition is added to the platform. A missing reserved-memory range is added to Fairphone FP5, PMIC GLINK and Venus are enabled. LEDs are introduced and voltage settings corrected on the QCM6490 IDP, and RB3gen2 sees the same voltage changes and GCC protected clocks are introduced to make the board boot properly. RPMh sleep stats and a variety of cleanups and fixes are introduced for SC8180X. On SC8280XP the additional tsens instances are introduced. Camera Subsystem and Camera Control Interface (CCI) are added. PMIC die-temp vadc channels are introduced on the CRD, to allow ADC channels to be tied to the shared PMIC temp-alarms, to actually report temperature. On SDM630 USB QMP PHY support is introduced and enabled on the Inforce IFC6560 board. On the various Sony Xperia XA2 variants WLED is enabled and configured. On SM6350 display subsystem interconnects and tsens-based thermal zones are added. On SM7125 UFS support is added. On Fairphone FP4, on SM7225, display and GPU are enabled, and firmware paths are corrected. SM8150 PCIe controller definitions are corrected. As with SM8650, the SM8550 the fastrpc compute contexts are marked dm-coherent, and PCIe controllers are moved to use GIC-ITS. The UFS controller frequency definition is moved to the generic opp-table. Touchscreen is enabled on the QRD device. As usual, a variety of smaller cleanups and corrections to match DeviceTree bindings and style guidelines are introduced across the various files. * tag 'qcom-arm64-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (176 commits) arm64: dts: qcom: sm6115: fix USB PHY configuration arm64: dts: sm8650: Add msi-map-mask for PCIe nodes arm64: dts: qcom: replace underscores in node names dt-bindings: arm: qcom: Add Samsung Galaxy Tab 4 10.1 LTE arm64: dts: qcom: pm4125: define USB-C related blocks arm64: dts: qcom: sa8540p-ride: disable pcie2a node arm64: dts: qcom: sc7280: add slimbus DT node arm64: dts: qcom: sc7280: Add capacity and DPC properties arm64: dts: qcom: pmi632: Add PBS client and use in LPG node arm64: dts: qcom: sm8550: Use GIC-ITS for PCIe0 and PCIe1 arm64: dts: qcom: sm8150: correct PCIe wake-gpios arm64: dts: qcom: sdm845-db845c: correct PCIe wake-gpios arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU arm64: dts: qcom: sm6350: Remove "disabled" state of GMU arm64: dts: qcom: msm8916-samsung-fortuna/rossa: Add fuel gauge arm64: dts: qcom: sm6350: Add interconnect for MDSS arm64: dts: qcom: msm8916-samsung-fortuna/rossa: Add initial device trees arm64: dts: qcom: sm8550: Switch UFS from opp-table-hz to opp-v2 arm64: dts: qcom: sc8180x: describe all PCI MSI interrupts arm64: dts: qcom: minor whitespace cleanup ... Link: https://lore.kernel.org/r/20240225050146.484422-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
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Georgi Djakov
|
d1c1649113 |
Merge branch 'icc-sm7150' into icc-next
Add dt-bindings and interconnect driver support for the Qualcomm SM7150 SoC. * icc-sm7150 dt-bindings: interconnect: Add Qualcomm SM7150 DT bindings interconnect: qcom: Add SM7150 driver support Link: https://lore.kernel.org/r/20240222174250.80493-1-danila@jiaxyga.com Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Danila Tikhonov
|
9c4058493b |
dt-bindings: interconnect: Add Qualcomm SM7150 DT bindings
The Qualcomm SM7150 platform has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240222174250.80493-2-danila@jiaxyga.com Signed-off-by: Georgi Djakov <djakov@kernel.org> |
||
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Arnd Bergmann
|
1422eb8585 |
Samsung DTS ARM64 changes for v6.9
Mostly work around Google GS101 SoC and Pixel phone (Oriole) adding
support for:
1. Multi Core Timer (MCT) clocksource.
2. Several clock controllers (DTS and DT bindings) and use new clocks in
several other device nodes.
3. More serial-interface instances: USI8 and USI12 with I2C.
Exynos850:
1. SPI and DMA controllers (PL330).
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Merge tag 'samsung-dt64-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.9
Mostly work around Google GS101 SoC and Pixel phone (Oriole) adding
support for:
1. Multi Core Timer (MCT) clocksource.
2. Several clock controllers (DTS and DT bindings) and use new clocks in
several other device nodes.
3. More serial-interface instances: USI8 and USI12 with I2C.
Exynos850:
1. SPI and DMA controllers (PL330).
* tag 'samsung-dt64-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: fsd: Add fifosize for UART in Device Tree
arm64: dts: exynos: gs101: minor whitespace cleanup
arm64: dts: exynos: gs101: enable i2c bus 12 on gs101-oriole
arm64: dts: exynos: gs101: define USI12 with I2C configuration
arm64: dts: exynos: gs101: enable cmu-peric1 clock controller
dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
arm64: dts: exynos: Add SPI nodes for Exynos850
arm64: dts: exynos: Add PDMA node for Exynos850
arm64: dts: exynos: gs101: use correct clocks for usi_uart
arm64: dts: exynos: gs101: use correct clocks for usi8
arm64: dts: exynos: gs101: sysreg_peric0 needs a clock
arm64: dts: exynos: gs101: enable eeprom on gs101-oriole
arm64: dts: exynos: gs101: define USI8 with I2C configuration
arm64: dts: exynos: gs101: update USI UART to use peric0 clocks
arm64: dts: exynos: gs101: enable cmu-peric0 clock controller
arm64: dts: exynos: gs101: remove reg-io-width from serial
arm64: dts: exynos: gs101: define Multi Core Timer (MCT) node
dt-bindings: clock: exynos850: Add PDMA clocks
dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit
Link: https://lore.kernel.org/r/20240218182141.31213-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
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Dario Binacchi
|
55e963738a |
dt-bindings: mfd: stm32f7: Add binding definition for DSI
Add binding definition for MIPI DSI Host controller. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Lee Jones <lee@kernel.org> Reviewed-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
||
|
Sebastian Reichel
|
c81798cf9d |
dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
Add PCLK_VO1GRF to complement PCLK_VO0GRF. This will be needed for HDMI support. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240126182919.48402-4-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
||
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Sebastian Reichel
|
11a29dc2e4 |
dt-bindings: clock: rk3588: drop CLK_NR_CLKS
CLK_NR_CLKS should not be part of the binding. Let's drop it, since the kernel code no longer uses it either. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240126182919.48402-3-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
||
|
Georgi Djakov
|
6025a81ae6 |
Merge branch 'icc-cleanup' into icc-next
* icc-cleanup interconnect: qcom: sm8550: Remove bogus per-RSC BCMs and nodes dt-bindings: interconnect: Remove bogus interconnect nodes interconnect: qcom: x1e80100: Remove bogus per-RSC BCMs and nodes interconnect: qcom: sa8775p: constify pointer to qcom_icc_node interconnect: qcom: sm8250: constify pointer to qcom_icc_node interconnect: qcom: sm6115: constify pointer to qcom_icc_node interconnect: qcom: sa8775p: constify pointer to qcom_icc_bcm interconnect: qcom: x1e80100: constify pointer to qcom_icc_bcm dt-bindings: interconnect: qcom,rpmh: Fix bouncing @codeaurora address interconnect: constify of_phandle_args in xlate Signed-off-by: Georgi Djakov <djakov@kernel.org> |
||
|
Sam Protsenko
|
76dedb9c0b |
dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1
Document CPU clock management unit compatibles and add corresponding
clock indices. Exynos850 has two CPU clusters (CL0 and CL1), each
containing 4 Cortex-A55 cores. CPU PLLs are generating main CPU clocks
for each cluster, and there are alternate ("switch") clocks that can be
used temporarily while re-configuring the PLL for the new rate. ACLK,
ATCLK, PCLKDBG and PERIPHCLK clocks are driving corresponding buses.
CLK_CLUSTERx_SCLK are actual leaf CPU clocks and should be used to
change CPU rates. Also some CoreSight clocks can be derived from
DBG_USER (debug clock).
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20240224202053.25313-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
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|
Théo Lebrun
|
4a85e82658 |
dt-bindings: clock: mobileye,eyeq5-clk: add bindings
Add DT schema bindings for the EyeQ5 clock controller driver. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://lore.kernel.org/r/20240221-mbly-clk-v7-3-31d4ce3630c3@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Eddie James
|
692678b69c |
dt-bindings: clock: ast2600: Add FSI clock
Add a definition for the FSI clock. Signed-off-by: Eddie James <eajames@linux.ibm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240215220759.976998-2-eajames@linux.ibm.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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|
Frank Wunderlich
|
c9d9bea92c |
dt-bindings: reset: mediatek: add MT7988 infracfg reset IDs
Add reset constants for using as index in driver and dts. Value is starting again from 0 because resets are used in another device than existing constants. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240201182409.39878-2-linux@fw-web.de Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Chen Wang
|
41197eb5f9 |
dt-bindings: reset: sophgo: support SG2042
Add bindings for the reset generator on the SOPHGO SG2042 RISC-V SoC. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Inochi Amaoto <inochiama@outlook.com> Link: https://lore.kernel.org/r/35c348437b6e18972ccaf90d9c38040caccd1f11.1706577450.git.unicorn_wang@outlook.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
||
|
Danila Tikhonov
|
307b7d8f70 |
dt-bindings: arm: qcom,ids: Add IDs for SM8475 family
Add Qualcomm SM8475/SM8475P/SM8475_2 (cape) SoC IDs. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240212201428.87151-2-danila@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Krzysztof Kozlowski
|
6e71647145 |
dt-bindings: use capital "OR" for multiple licenses in SPDX
Documentation/process/license-rules.rst and checkpatch expect the SPDX identifier syntax for multiple licenses to use capital "OR". Correct it to keep consistent format and avoid copy-paste issues. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240208105327.129159-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org> |
||
|
Geert Uytterhoeven
|
abb3fa662b |
clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks
According to the R-Car V4H Series Hardware User’s Manual Rev.1.00, the parent clock of the Pin Function (PFC/GPIO) module clocks is the CP clock. Fix this by adding the missing CP clock, and correcting the PFC parents. Fixes: |
||
|
Luca Weiss
|
05d1039503 |
dt-bindings: power: rpmpd: Add MSM8974 power domains
Add the compatibles and indexes for the rpmpd in MSM8974, both with the standard PM8841+PM8941 PMICs but also devices found with PMA8084. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240210-msm8974-rpmpd-v2-1-595e2ff80ea1@z3ntu.xyz Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
||
|
Bjorn Andersson
|
286ffaafa6 |
Merge branch '20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org' into clk-for-6.9
Merge the two SC8180X reset defines through a topic branch, to allow them being picked up in the DeviceTree source tree as well. |
||
|
Bjorn Andersson
|
d3b2afb925 |
Merge branch '20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz' into clk-for-6.9
Merge MSM8953 GCC DeviceTree binding update through topic branch, to allow it to be merged into DeviceTree source tree as well. |
||
|
André Draszik
|
455061eb32 |
dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
Add dt-schema documentation and clock IDs for the Connectivity Peripheral 1 (PERIC1) clock management unit. Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240201161258.1013664-3-andre.draszik@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
||
|
Bjorn Andersson
|
cc2bc7a7ab |
Merge branch '20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org' into HEAD
Merge clock topic branch that introduces the SC8180X CLK_REF enable clocks. |
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|
Manivannan Sadhasivam
|
26447dad81 |
dt-bindings: clock: qcom: Add missing UFS QREF clocks
Add missing QREF clocks for UFS MEM and UFS CARD controllers.
Fixes:
|
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|
Bjorn Andersson
|
5ca4cd8eaa |
Merge branch '20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz' into arm64-for-6.9
Merge MSM8953 GCC DeviceTree binding update from topic branch, to get access to newly introduced MDSS reset constants. |
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|
Vladimir Lypak
|
18ba9974b8 |
dt-bindings: clock: gcc-msm8953: add more resets
Add new defines for some more BCRs found on MSM8953. Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com> [luca: expand commit message, add more resets] Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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|
Bjorn Andersson
|
78654850f7 |
Merge branch '20240202-x1e80100-clock-controllers-v4-5-7fb08c861c7c@linaro.org' into clk-for-6.9
Merge X1E clock bindings through a topic branch, to make the defines available for inclusion in DeviceTree branches as well. |
||
|
Rajendra Nayak
|
7180f3685d |
dt-bindings: clock: qcom: Document the X1E80100 Camera Clock Controller
Add bindings documentation for the X1E80100 Camera Clock Controller. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-5-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Abel Vesa
|
80de9d9dfb |
dt-bindings: clock: qcom: Document the X1E80100 TCSR Clock Controller
Add bindings documentation for the X1E80100 TCSR Clock Controller. Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-4-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Rajendra Nayak
|
bb213e13ce |
dt-bindings: clock: qcom: Document the X1E80100 GPU Clock Controller
Add bindings documentation for the X1E80100 Graphics Clock Controller. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-3-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Rajendra Nayak
|
4f70a09bde |
dt-bindings: clock: qcom: Document the X1E80100 Display Clock Controller
Add bindings documentation for the X1E80100 Display Clock Controller. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-2-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Conor Dooley
|
c886b7297e |
dt-bindings: clock: mpfs: add more MSSPLL output definitions
There are 3 undocumented outputs of the MSSPLL that are used for the CAN bus, "user crypto" module and eMMC. Add their clock IDs so that they can be hooked up in DT. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
||
|
Konrad Dybcio
|
e92c932674 |
dt-bindings: interconnect: Remove bogus interconnect nodes
The downstream kernel has infrastructure for passing votes from different interconnect nodes onto different RPMh RSCs. This neither implemented, not is going to be implemented upstream (in favor of a different solution using ICC tags through the same node). Unfortunately, as it happens, meaningless (in the upstream context) parts of the vendor driver were copied, ending up causing havoc - since all "per-RSC" (in quotes because they all point to the main APPS one) BCMs defined within the driver overwrite the value in RPMh on every aggregation. To both avoid keeping bogus code around and possibly introducing impossible-to-track-down bugs (busses shutting down for no reason), get rid of the duplicated ICC node definitions. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240102-topic-x1e_fixes-v1-2-70723e08d5f6@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
||
|
Adam Skladowski
|
47878b4512 |
dt-bindings: interconnect: Add Qualcomm MSM8909 DT bindings
Add bindings for Qualcomm MSM8909 Network-On-Chip interconnect devices. [Stephan: Drop separate mm-snoc that exists downstream since it's actually the same NoC as SNoC in hardware] Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Link: https://lore.kernel.org/r/20231220-icc-msm8909-v2-1-3b68bbed2891@kernkonzept.com Signed-off-by: Georgi Djakov <djakov@kernel.org> |
||
|
Duy Nguyen
|
3bbdf8c3d3 |
dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be |
||
|
Duy Nguyen
|
8923149ffc |
dt-bindings: power: Add r8a779h0 SYSC power domain definitions
Add power domain indices for the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/c5cbef71178cada761e9da7bcbb6f21334f93ef8.1706194617.git.geert+renesas@glider.be Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
||
|
Satya Priya Kakitapalli
|
4b3dbd706a |
dt-bindings: clock: qcom,gcc-sm8150: Add gcc video resets for sm8150
Add gcc video axic, axi0 and axi1 resets for the global clock controller on sm8150. Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240111-sm8150-dfs-support-v2-2-6edb44c83d3b@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Tengfei Fan
|
3019d8f7ea |
dt-bindings: arm: qcom,ids: add SoC ID for QCM8550 and QCS8550
Add the ID for the Qualcomm QCM8550 and QCS8550 SoC, QCS8550 is a QCS version of QCM8550. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20240119100621.11788-3-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Sam Protsenko
|
bc8cc7fb55 |
dt-bindings: clock: exynos850: Add PDMA clocks
Add constants for Peripheral DMA (PDMA) clocks in CMU_CORE controller: - PDMA_ACLK: clock for PDMA0 (regular DMA) - SPDMA_ACLK: clock for PDMA1 (secure DMA) Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20240120012948.8836-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
||
|
Tudor Ambarus
|
f80c43887a |
dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit
Add dt-schema documentation for the Connectivity Peripheral 0 (PERIC0) clock management unit. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240119111132.1290455-2-tudor.ambarus@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
||
|
Linus Torvalds
|
65163d16fc |
dmaengine fixes for v6.8-rc1
Driver fixes for:
- Xilinx xdma driver operator precedence and initialization fix
- Excess kernel-doc warning fix in imx-sdma xilinx xdma drivers
- format-overflow warning fix for rz-dmac, sh usb dmac drivers
- 'output may be truncated' fix for shdma, fsl-qdma and dw-edma drivers
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Merge tag 'dmaengine-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul:
"New support:
- Loongson LS2X APB DMA controller
- sf-pdma: mpfs-pdma support
- Qualcomm X1E80100 GPI dma controller support
Updates:
- Xilinx XDMA updates to support interleaved DMA transfers
- TI PSIL threads for AM62P and J722S and cfg register regions
description
- axi-dmac Improving the cyclic DMA transfers
- Tegra Support dma-channel-mask property
- Remaining platform remove callback returning void conversions
Driver fixes for:
- Xilinx xdma driver operator precedence and initialization fix
- Excess kernel-doc warning fix in imx-sdma xilinx xdma drivers
- format-overflow warning fix for rz-dmac, sh usb dmac drivers
- 'output may be truncated' fix for shdma, fsl-qdma and dw-edma
drivers"
* tag 'dmaengine-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (58 commits)
dmaengine: dw-edma: increase size of 'name' in debugfs code
dmaengine: fsl-qdma: increase size of 'irq_name'
dmaengine: shdma: increase size of 'dev_id'
dmaengine: xilinx: xdma: Fix kernel-doc warnings
dmaengine: usb-dmac: Avoid format-overflow warning
dmaengine: sh: rz-dmac: Avoid format-overflow warning
dmaengine: imx-sdma: fix Excess kernel-doc warnings
dmaengine: xilinx: xdma: Fix initialization location of desc in xdma_channel_isr()
dmaengine: xilinx: xdma: Fix operator precedence in xdma_prep_interleaved_dma()
dmaengine: xilinx: xdma: statify xdma_prep_interleaved_dma
dmaengine: xilinx: xdma: Workaround truncation compilation error
dmaengine: pl330: issue_pending waits until WFP state
dmaengine: xilinx: xdma: Implement interleaved DMA transfers
dmaengine: xilinx: xdma: Prepare the introduction of interleaved DMA transfers
dmaengine: xilinx: xdma: Add transfer error reporting
dmaengine: xilinx: xdma: Add error checking in xdma_channel_isr()
dmaengine: xilinx: xdma: Rework xdma_terminate_all()
dmaengine: xilinx: xdma: Ease dma_pool alignment requirements
dmaengine: xilinx: xdma: Add necessary macro definitions
dmaengine: xilinx: xdma: Get rid of unused code
...
|
||
|
Linus Torvalds
|
0c4b09cb54 |
Core:
- Move the generic PM domain and its governor to the pmdomain subsystem
- Drop the unused pm_genpd_opp_to_performance_state()
Providers:
- Convert some providers to let the ->remove() callback return void
- amlogic: Add support for G12A ISP power domain
- arm: Move the SCPI power-domain driver to the pmdomain subsystem
- arm: Move Kconfig options to the pmdomain subsystem
- qcom: Update part number to X1E80100 for the rpmhpd
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Merge tag 'pmdomain-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm
Pull pmdomain updates from Ulf Hansson:
"Core:
- Move the generic PM domain and its governor to the pmdomain
subsystem
- Drop the unused pm_genpd_opp_to_performance_state()
Providers:
- Convert some providers to let the ->remove() callback return void
- amlogic: Add support for G12A ISP power domain
- arm: Move the SCPI power-domain driver to the pmdomain subsystem
- arm: Move Kconfig options to the pmdomain subsystem
- qcom: Update part number to X1E80100 for the rpmhpd"
* tag 'pmdomain-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm:
PM: domains: Move genpd and its governor to the pmdomain subsystem
PM: domains: Drop redundant header for genpd
PM: domains: Drop the unused pm_genpd_opp_to_performance_state()
PM: domains: fix domain_governor kernel-doc warnings
pmdomain: xilinx/zynqmp: Convert to platform remove callback returning void
pmdomain: qcom-cpr: Convert to platform remove callback returning void
pmdomain: imx93-pd: Convert to platform remove callback returning void
pmdomain: imx93-blk-ctrl: Convert to platform remove callback returning void
pmdomain: imx8mp-blk-ctrl: Convert to platform remove callback returning void
pmdomain: imx8m-blk-ctrl: Convert to platform remove callback returning void
pmdomain: imx-gpcv2: Convert to platform remove callback returning void
pmdomain: imx-gpc: Convert to platform remove callback returning void
pmdomain: imx-pgc: Convert to platform remove callback returning void
pmdomain: amlogic: meson-ee-pwrc: add support for G12A ISP power domain
dt-bindings: power: meson-g12a-power: document ISP power domain
firmware: arm_scpi: Move power-domain driver to the pmdomain dir
pmdomain: arm_scmi: Move Kconfig options to the pmdomain subsystem
pmdomain: qcom: rpmhpd: Update part number to X1E80100
dt-bindings: power: rpmpd: Update part number to X1E80100
|
||
|
Linus Torvalds
|
c736c9a955 |
Only a couple new SoCs have support added this time, primarily for Qualcomm
SM8650 based on the diffstat. Otherwise this is a collection of non-critical
fixes and cleanups to various clk drivers and their DT bindings. Nothing is
changed in the core clk framework this time, although there's a patch to fix a
basic clk type initialization function. In general, this pile looks to be on
the smaller side.
New Drivers:
- Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
- Mediatek MT7988 SoC clocks
Updates:
- Update Zynqmp driver for Versal NET platforms
- Add clk driver for Versal clocking wizard IP
- Support for stm32mp25 clks
- Add glitch free PLL setting support to si5351 clk driver
- Add DSI clocks on Amlogic g12/sm1
- Add CSI and ISP clocks on Amlogic g12/sm1
- Document bindings for i.MX93 ANATOP clock driver
- Free clk_node in i.MX SCU driver for resource with different owner
- Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
- Fix the name of the fvco in i.MX pll14xx by renaming it to fout
- Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
- Add interrupt controller and Ethernet clocks and resets on Renesas RZ/G3S
- Check reset monitor registers on Renesas RZ/G2L-alike SoCs
- Reuse reset functionality in the Renesas RZ/G2L clock driver
- Global and RPMh clock support for the Qualcomm X1E80100 SoC
- Support for the Stromer APCS PLL found in Qualcomm IPQ5018
- Add a new type of branch clock, with support for controlling separate
memory control bits, to the Qualcomm clk driver
- Use above new branch type in Qualcomm ECPRI clk driver for QDU1000 and
QRU1000
- Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
- Add support for the camera clock controller on Qualcomm SC8280XP
- Correct PLL configuration in GPU and video clock controllers for
Qualcomm SM8150
- Add runtime PM support and a few missing resets to Qualcomm SM8150
video clock controller
- Fix configuration of various GCC GDSCs on Qualcomm SM8550
- Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
- Fix up GPU and display clock controllers PLL configuration settings
on Qualcomm SM8550
- Cleanup variable init in Allwinner nkm module
- Convert various DT bindings to YAML
- A few kernel-doc fixes for Samsung SoC clock controllers
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"Only a couple new SoCs have support added this time, primarily for
Qualcomm SM8650 based on the diffstat. Otherwise this is a collection
of non-critical fixes and cleanups to various clk drivers and their DT
bindings.
Nothing is changed in the core clk framework this time, although
there's a patch to fix a basic clk type initialization function. In
general, this pile looks to be on the smaller side.
New Drivers:
- Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
- Mediatek MT7988 SoC clocks
Updates:
- Update Zynqmp driver for Versal NET platforms
- Add clk driver for Versal clocking wizard IP
- Support for stm32mp25 clks
- Add glitch free PLL setting support to si5351 clk driver
- Add DSI clocks on Amlogic g12/sm1
- Add CSI and ISP clocks on Amlogic g12/sm1
- Document bindings for i.MX93 ANATOP clock driver
- Free clk_node in i.MX SCU driver for resource with different owner
- Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
- Fix the name of the fvco in i.MX pll14xx by renaming it to fout
- Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
- Add interrupt controller and Ethernet clocks and resets on Renesas
RZ/G3S
- Check reset monitor registers on Renesas RZ/G2L-alike SoCs
- Reuse reset functionality in the Renesas RZ/G2L clock driver
- Global and RPMh clock support for the Qualcomm X1E80100 SoC
- Support for the Stromer APCS PLL found in Qualcomm IPQ5018
- Add a new type of branch clock, with support for controlling
separate memory control bits, to the Qualcomm clk driver
- Use above new branch type in Qualcomm ECPRI clk driver for QDU1000
and QRU1000
- Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
- Add support for the camera clock controller on Qualcomm SC8280XP
- Correct PLL configuration in GPU and video clock controllers for
Qualcomm SM8150
- Add runtime PM support and a few missing resets to Qualcomm SM8150
video clock controller
- Fix configuration of various GCC GDSCs on Qualcomm SM8550
- Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
- Fix up GPU and display clock controllers PLL configuration settings
on Qualcomm SM8550
- Cleanup variable init in Allwinner nkm module
- Convert various DT bindings to YAML
- A few kernel-doc fixes for Samsung SoC clock controllers"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits)
clk: mediatek: add drivers for MT7988 SoC
clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
dt-bindings: clock: mediatek: add clock controllers of MT7988
dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
dt-bindings: clock: mediatek: add MT7988 clock IDs
clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
clk: mediatek: clk-mux: Support custom parent indices for muxes
dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx
clk: starfive: Add flags argument to JH71X0__MUX macro
clk: imx: pll14xx: change naming of fvco to fout
clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
clk: fixed-rate: fix clk_hw_register_fixed_rate_with_accuracy_parent_hw
clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
clk: qcom: dispcc-sm8550: Update disp PLL settings
clk: qcom: gpucc-sm8550: Update GPU PLL settings
...
|
||
|
Linus Torvalds
|
cf65598d59 |
drm-next for 6.8:
new drivers:
- imagination - new driver for Imagination Technologies GPU
- xe - new driver for Intel GPUs using core drm concepts
core:
- add CLOSE_FB ioctl
- remove old UMS ioctls
- increase max objects to accomodate AMD color mgmt
encoder:
- create per-encoder debugfs directory
edid:
- split out drm_eld
- SAD helpers
- drop edid_firmware module parameter
format-helper:
- cache format conversion buffers
sched:
- move from kthread to workqueue
- rename some internals
- implement dynamic job-flow control
gpuvm:
- provide more features to handle GEM objects
client:
- don't acquire module reference
displayport:
- add mst path property documentation
fdinfo:
- alignment fix
dma-buf:
- add fence timestamp helper
- add fence deadline support
bridge:
- transparent aux-bridge for DP/USB-C
- lt8912b: add suspend/resume support and power regulator support
panel:
- edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49
- chromebook panel support
- elida-kd35t133: rework pm
- powkiddy RK2023 panel
- himax-hx8394: drop prepare/unprepare and shutdown logic
- BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G
- Evervision VGG644804, SDC ATNA45AF01
- nv3052c: register docs, init sequence fixes, fascontek FS035VG158
- st7701: Anbernic RG-ARC support
- r63353 panel controller
- Ilitek ILI9805 panel controller
- AUO G156HAN04.0
simplefb:
- support memory regions
- support power domains
amdgpu:
- add new 64-bit sequence number infrastructure
- add AMD specific color management
- ACPI WBRF support for RF interference handling
- GPUVM updates
- RAS updates
- DCN 3.5 updates
- Rework PCIe link speed handling
- Document GPU reset types
- DMUB fixes
- eDP fixes
- NBIO 7.9/7.11 updates
- SubVP updates
- XGMI PCIe state dumping for aqua vanjaram
- GFX11 golden register updates
- enable tunnelling on high pri compute
amdkfd:
- Migrate TLB flushing logic to amdgpu
- Trap handler fixes
- Fix restore workers handling on suspend/resume
- Fix possible memory leak in pqm_uninit()
- support import/export of dma-bufs using GEM handles
radeon:
- fix possible overflows in command buffer checking
- check for errors in ring_lock
i915:
- reorg display code for reuse in xe driver
- fdinfo memory stats printing
- DP MST bandwidth mgmt improvements
- DP panel replay enabling
- MTL C20 phy state verification
- MTL DP DSC fractional bpp support
- Audio fastset support
- use dma_fence interfaces instead of i915_sw_fence
- Separate gem and display code
- AUX register macro refactoring
- Separate display module/device parameters
- Move display capabilities debugfs under display
- Makefile cleanups
- Register cleanups
- Move display lock inits under display/
- VLV/CHV DPIO PHY register and interface refactoring
- DSI VBT sequence refactoring
- C10/C20 PHY PLL hardware readout
- DPLL code cleanups
- Cleanup PXP plane protection checks
- Improve display debug msgs
- PSR selective fetch fixes/improvements
- DP MST fixes
- Xe2LPD FBC restrictions removed
- DGFX uses direct VBT pin mapping
- more MTL WAs
- fix MTL eDP bug
- eliminate use of kmap_atomic
habanalabs:
- sysfs entry to identify a device minor id with debugfs path
- sysfs entry to expose device module id
- add signed device info retrieval through INFO ioctl
- add Gaudi2C device support
- pcie reset prepare/done hooks
msm:
- Add support for SDM670, SM8650
- Handle the CFG interconnect to fix the obscure hangs / timeouts
- Kconfig fix for QMP dependency
- use managed allocators
- DPU: SDM670, SM8650 support
- DPU: Enable SmartDMA on SM8350 and SM8450
- DP: enable runtime PM support
- GPU: add metadata UAPI
- GPU: move devcoredumps to GPU device
- GPU: convert to drm_exec
ivpu:
- update FW API
- new debugfs file
- a new NOP job submission test mode
- improve suspend/resume
- PM improvements
- MMU PT optimizations
- firmware profile frequency support
- support for uncached buffers
- switch to gem shmem helpers
- replace kthread with threaded irqs
rockchip:
- rk3066_hdmi: convert to atomic
- vop2: support nv20 and nv30
- rk3588 support
mediatek:
- use devm_platform_ioremap_resource
- stop using iommu_present
- MT8188 VDOSYS1 display support
panfrost:
- PM improvements
- improve interrupt handling as poweroff
qaic:
- allow to run with single MSI
- support host/device time sync
- switch to persistent DRM devices
exynos:
- fix potential error pointer dereference
- fix wrong error checking
- add missing call to drm_atomic_helper_shutdown
omapdrm:
- dma-fence lockdep annotation fix
tidss:
- dma-fence lockdep annotation fix
- support for AM62A7
v3d:
- BCM2712 - rpi5 support
- fdinfo + gputop support
- uapi for CPU job handling
virtio-gpu:
- add context debug name
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Merge tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm
Pull drm updates from Dave Airlie:
"This contains two major new drivers:
- imagination is a first driver for Imagination Technologies devices,
it only covers very specific devices, but there is hope to grow it
- xe is a reboot of the i915 GPU (shares display) side using a more
upstream focused development model, and trying to maximise code
sharing. It's not enabled for any hw by default, and will hopefully
get switched on for Intel's Lunarlake.
This also drops a bunch of the old UMS ioctls. It's been dead long
enough.
amdgpu has a bunch of new color management code that is being used in
the Steam Deck.
amdgpu also has a new ACPI WBRF interaction to help avoid radio
interference.
Otherwise it's the usual lots of changes in lots of places.
Detailed summary:
new drivers:
- imagination - new driver for Imagination Technologies GPU
- xe - new driver for Intel GPUs using core drm concepts
core:
- add CLOSE_FB ioctl
- remove old UMS ioctls
- increase max objects to accomodate AMD color mgmt
encoder:
- create per-encoder debugfs directory
edid:
- split out drm_eld
- SAD helpers
- drop edid_firmware module parameter
format-helper:
- cache format conversion buffers
sched:
- move from kthread to workqueue
- rename some internals
- implement dynamic job-flow control
gpuvm:
- provide more features to handle GEM objects
client:
- don't acquire module reference
displayport:
- add mst path property documentation
fdinfo:
- alignment fix
dma-buf:
- add fence timestamp helper
- add fence deadline support
bridge:
- transparent aux-bridge for DP/USB-C
- lt8912b: add suspend/resume support and power regulator support
panel:
- edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49
- chromebook panel support
- elida-kd35t133: rework pm
- powkiddy RK2023 panel
- himax-hx8394: drop prepare/unprepare and shutdown logic
- BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G
- Evervision VGG644804, SDC ATNA45AF01
- nv3052c: register docs, init sequence fixes, fascontek FS035VG158
- st7701: Anbernic RG-ARC support
- r63353 panel controller
- Ilitek ILI9805 panel controller
- AUO G156HAN04.0
simplefb:
- support memory regions
- support power domains
amdgpu:
- add new 64-bit sequence number infrastructure
- add AMD specific color management
- ACPI WBRF support for RF interference handling
- GPUVM updates
- RAS updates
- DCN 3.5 updates
- Rework PCIe link speed handling
- Document GPU reset types
- DMUB fixes
- eDP fixes
- NBIO 7.9/7.11 updates
- SubVP updates
- XGMI PCIe state dumping for aqua vanjaram
- GFX11 golden register updates
- enable tunnelling on high pri compute
amdkfd:
- Migrate TLB flushing logic to amdgpu
- Trap handler fixes
- Fix restore workers handling on suspend/resume
- Fix possible memory leak in pqm_uninit()
- support import/export of dma-bufs using GEM handles
radeon:
- fix possible overflows in command buffer checking
- check for errors in ring_lock
i915:
- reorg display code for reuse in xe driver
- fdinfo memory stats printing
- DP MST bandwidth mgmt improvements
- DP panel replay enabling
- MTL C20 phy state verification
- MTL DP DSC fractional bpp support
- Audio fastset support
- use dma_fence interfaces instead of i915_sw_fence
- Separate gem and display code
- AUX register macro refactoring
- Separate display module/device parameters
- Move display capabilities debugfs under display
- Makefile cleanups
- Register cleanups
- Move display lock inits under display/
- VLV/CHV DPIO PHY register and interface refactoring
- DSI VBT sequence refactoring
- C10/C20 PHY PLL hardware readout
- DPLL code cleanups
- Cleanup PXP plane protection checks
- Improve display debug msgs
- PSR selective fetch fixes/improvements
- DP MST fixes
- Xe2LPD FBC restrictions removed
- DGFX uses direct VBT pin mapping
- more MTL WAs
- fix MTL eDP bug
- eliminate use of kmap_atomic
habanalabs:
- sysfs entry to identify a device minor id with debugfs path
- sysfs entry to expose device module id
- add signed device info retrieval through INFO ioctl
- add Gaudi2C device support
- pcie reset prepare/done hooks
msm:
- Add support for SDM670, SM8650
- Handle the CFG interconnect to fix the obscure hangs / timeouts
- Kconfig fix for QMP dependency
- use managed allocators
- DPU: SDM670, SM8650 support
- DPU: Enable SmartDMA on SM8350 and SM8450
- DP: enable runtime PM support
- GPU: add metadata UAPI
- GPU: move devcoredumps to GPU device
- GPU: convert to drm_exec
ivpu:
- update FW API
- new debugfs file
- a new NOP job submission test mode
- improve suspend/resume
- PM improvements
- MMU PT optimizations
- firmware profile frequency support
- support for uncached buffers
- switch to gem shmem helpers
- replace kthread with threaded irqs
rockchip:
- rk3066_hdmi: convert to atomic
- vop2: support nv20 and nv30
- rk3588 support
mediatek:
- use devm_platform_ioremap_resource
- stop using iommu_present
- MT8188 VDOSYS1 display support
panfrost:
- PM improvements
- improve interrupt handling as poweroff
qaic:
- allow to run with single MSI
- support host/device time sync
- switch to persistent DRM devices
exynos:
- fix potential error pointer dereference
- fix wrong error checking
- add missing call to drm_atomic_helper_shutdown
omapdrm:
- dma-fence lockdep annotation fix
tidss:
- dma-fence lockdep annotation fix
- support for AM62A7
v3d:
- BCM2712 - rpi5 support
- fdinfo + gputop support
- uapi for CPU job handling
virtio-gpu:
- add context debug name"
* tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm: (2340 commits)
drm/amd/display: Allow z8/z10 from driver
drm/amd/display: fix bandwidth validation failure on DCN 2.1
drm/amdgpu: apply the RV2 system aperture fix to RN/CZN as well
drm/amd/display: Move fixpt_from_s3132 to amdgpu_dm
drm/amd/display: Fix recent checkpatch errors in amdgpu_dm
Revert "drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole"
drm/amd/display: avoid stringop-overflow warnings for dp_decide_lane_settings()
drm/amd/display: Fix power_helpers.c codestyle
drm/amd/display: Fix hdcp_log.h codestyle
drm/amd/display: Fix hdcp2_execution.c codestyle
drm/amd/display: Fix hdcp_psp.h codestyle
drm/amd/display: Fix freesync.c codestyle
drm/amd/display: Fix hdcp_psp.c codestyle
drm/amd/display: Fix hdcp1_execution.c codestyle
drm/amd/pm/smu7: fix a memleak in smu7_hwmgr_backend_init
drm/amdkfd: Fix iterator used outside loop in 'kfd_add_peer_prop()'
drm/amdgpu: Drop 'fence' check in 'to_amdgpu_amdkfd_fence()'
drm/amdkfd: Confirm list is non-empty before utilizing list_first_entry in kfd_topology.c
drm/amdgpu: Fix '*fw' from request_firmware() not released in 'amdgpu_ucode_request()'
drm/amdgpu: Fix variable 'mca_funcs' dereferenced before NULL check in 'amdgpu_mca_smu_get_mca_entry()'
...
|
||
|
Linus Torvalds
|
f6597d1706 |
SoC: driver updates for 6.8
A new drivers/cache/ subsystem is added to contain drivers for abstracting
cache flush methods on riscv and potentially others, as this is needed for
handling non-coherent DMA but several SoCs require nonstandard hardware
methods for it.
op-tee gains support for asynchronous notification with FF-A, as well
as support for a system thread for executing in secure world.
The tee, reset, bus, memory and scmi subsystems have a couple of minor
updates.
Platform specific soc driver changes include:
- Samsung Exynos gains driver support for Google GS101 (Tensor G1)
across multiple subsystems
- Qualcomm Snapdragon gains support for SM8650 and X1E along with
added features for some other SoCs
- Mediatek adds support for "Smart Voltage Scaling" on MT8186 and MT8195,
and driver support for MT8188 along with some code refactoring.
- Microchip Polarfire FPGA support for "Auto Update" of the FPGA bitstream
- Apple M1 mailbox driver is rewritten into a SoC driver
- minor updates on amlogic, mvebu, ti, zynq, imx, renesas and hisilicon
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Merge tag 'soc-drivers-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann:
"A new drivers/cache/ subsystem is added to contain drivers for
abstracting cache flush methods on riscv and potentially others, as
this is needed for handling non-coherent DMA but several SoCs require
nonstandard hardware methods for it.
op-tee gains support for asynchronous notification with FF-A, as well
as support for a system thread for executing in secure world.
The tee, reset, bus, memory and scmi subsystems have a couple of minor
updates.
Platform specific soc driver changes include:
- Samsung Exynos gains driver support for Google GS101 (Tensor G1)
across multiple subsystems
- Qualcomm Snapdragon gains support for SM8650 and X1E along with
added features for some other SoCs
- Mediatek adds support for "Smart Voltage Scaling" on MT8186 and
MT8195, and driver support for MT8188 along with some code
refactoring.
- Microchip Polarfire FPGA support for "Auto Update" of the FPGA
bitstream
- Apple M1 mailbox driver is rewritten into a SoC driver
- minor updates on amlogic, mvebu, ti, zynq, imx, renesas and
hisilicon"
* tag 'soc-drivers-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (189 commits)
memory: ti-emif-pm: Convert to platform remove callback returning void
memory: ti-aemif: Convert to platform remove callback returning void
memory: tegra210-emc: Convert to platform remove callback returning void
memory: tegra186-emc: Convert to platform remove callback returning void
memory: stm32-fmc2-ebi: Convert to platform remove callback returning void
memory: exynos5422-dmc: Convert to platform remove callback returning void
memory: renesas-rpc-if: Convert to platform remove callback returning void
memory: omap-gpmc: Convert to platform remove callback returning void
memory: mtk-smi: Convert to platform remove callback returning void
memory: jz4780-nemc: Convert to platform remove callback returning void
memory: fsl_ifc: Convert to platform remove callback returning void
memory: fsl-corenet-cf: Convert to platform remove callback returning void
memory: emif: Convert to platform remove callback returning void
memory: brcmstb_memc: Convert to platform remove callback returning void
memory: brcmstb_dpfe: Convert to platform remove callback returning void
soc: qcom: llcc: Fix LLCC_TRP_ATTR2_CFGn offset
firmware: qcom: qseecom: fix memory leaks in error paths
dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
soc: qcom: llcc: Fix typo in kernel-doc
dt-bindings: soc: qcom,aoss-qmp: document the X1E80100 Always-On Subsystem side channel
...
|
||
|
Stephen Boyd
|
a4dcb2f84b |
Merge branches 'clk-zynq', 'clk-xilinx' and 'clk-stm' into clk-next
- Update Zynqmp driver for Versal NET platforms - Add clk driver for Versal clocking wizard IP * clk-zynq: drivers: clk: zynqmp: update divider round rate logic drivers: clk: zynqmp: calculate closest mux rate * clk-xilinx: clocking-wizard: Add support for versal clocking wizard dt-bindings: clock: xilinx: add versal compatible * clk-stm: dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform clk: stm32mp1: use stm32mp13 reset driver clk: stm32mp1: move stm32mp1 clock driver into stm32 directory |
||
|
Stephen Boyd
|
23bd8c4ad1 |
Merge branches 'clk-imx', 'clk-qcom', 'clk-amlogic' and 'clk-mediatek' into clk-next
* clk-imx: clk: imx: pll14xx: change naming of fvco to fout clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu() dt-bindings: clock: support i.MX93 ANATOP clock module * clk-qcom: (41 commits) clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config clk: qcom: dispcc-sm8550: Use the correct PLL configuration function clk: qcom: dispcc-sm8550: Update disp PLL settings clk: qcom: gpucc-sm8550: Update GPU PLL settings clk: qcom: gcc-sm8550: Mark RCGs shared where applicable clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votable clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flag clk: qcom: camcc-sc8280xp: Prevent error pointer dereference clk: qcom: videocc-sm8150: Add runtime PM support clk: qcom: videocc-sm8150: Add missing PLL config property clk: qcom: videocc-sm8150: Update the videocc resets dt-bindings: clock: Update the videocc resets for sm8150 clk: qcom: rpmh: Add support for X1E80100 rpmh clocks clk: qcom: Add Global Clock controller (GCC) driver for X1E80100 dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100 dt-bindings: clock: qcom: Add X1E80100 GCC clocks clk: qcom: Add ECPRICC driver support for QDU1000 and QRU1000 clk: qcom: branch: Add mem ops support for branch2 clocks ... * clk-amlogic: clk: meson: g12a: add CSI & ISP gates clocks clk: meson: g12a: add MIPI ISP clocks dt-bindings: clock: g12a-clkc: add MIPI ISP & CSI PHY clock ids clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocks dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids * clk-mediatek: clk: mediatek: add drivers for MT7988 SoC clk: mediatek: add pcw_chg_bit control for PLLs of MT7988 dt-bindings: clock: mediatek: add clock controllers of MT7988 dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs dt-bindings: clock: mediatek: add MT7988 clock IDs clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes clk: mediatek: clk-mux: Support custom parent indices for muxes dt-bindings: clock: brcm,kona-ccu: convert to YAML dt-bindings: arm: mediatek: move ethsys controller & convert to DT schema dt-bindings: Remove alt_ref from versal |
||
|
Daniel Golle
|
5cfa3beb77 |
dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
Add reset ID for ethwarp subsystem allowing to reset the built-in Ethernet switch of the MediaTek MT7988 SoC. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/0c14bbacf471683af67ffa7572bfa1d5c45a0b5d.1702849494.git.daniel@makrotopia.org Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Sam Shih
|
8187e001de |
dt-bindings: clock: mediatek: add MT7988 clock IDs
Add MT7988 clock dt-bindings for topckgen, apmixedsys, infracfg, ethernet and xfipll subsystem clocks. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/27f99db432e9ccc804cc5b6501d7d17d72cae879.1702849494.git.daniel@makrotopia.org Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Inochi Amaoto
|
5a72f07111 |
dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
Add definition for the clock controller of the CV1800 series SoC. For CV181X, it has a clock that CV180X does not have. To avoid misuse, also add a compatible string to identify CV181X series SoC. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Link: https://github.com/milkv-duo/duo-files/blob/main/hardware/CV1800B/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/IA1PR20MB49535E448097F6FFC1218C39BB90A@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Arnd Bergmann
|
2d7123c7e1 |
Qualcomm ARM64 updates for v6.8
Support is added for the new Snapdragon 8 Gen 3 mobile platform, with support for the MTP and QRD development devices, the new Snapdragon X Elite compute platform with QCP and CRD development/references devices, the QCS6590/QCM6490 platform with support for the IDP development device and the Robotics RB3gen2 board, the Huawei Honor 5X/GR5 handset built on MSM8939, and Xiaomi Pad 6 on SM8250. On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one additional QUP SPI controller is added. CPU OPP tables are selectively enabled based on fuses, for both IPQ5332 and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes. Common elements of the IPQ9574 RDP boards are refactored into a common include file. IPQ9574 also gains description of its LEDs and WPS busttons. MSM8916 finally gets the DSP-based audio described, and this is enabled for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains notification LED, battery and charger support is added to Loncheer L8150, and GPU is enabled for Samsung Galaxy Tab A. Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is enabled as well. The Longcheer L9100 gains RGB notification LED support, and the wireless subsystem is enabled. Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is enabled, to allow using wakeup interrupts. Interconnect providers, MPM and display are added to QCM2290. UFS, remoteprocs and WiFi is enabled for Fairphone FP5. On Fairphone FP3 audio, WiFi and Bluetooth are enabled. On the Robotics RB1, HDMI and the CAN bus controller are added. On Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled. Bluetooth is enabled on the Robotics RB5. On SA8775P tsens and thermal is added, as well as the random number generator. Sound and RTC support is added for the Acer Aspire 1. On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices to inherit the base dtsi. Support for UFS, crypto, TrustZone based remoteprocs, the Camera Control Interface (CCI) and random number generator support are added. Additionally a variety of smaller fixes are introduced. A variety of fixes are introduced for SC8180X, in particular missing power-domains and interconnects. On SC8280XP the camera clock controller is added, and a number of smaller fixes are introduced. The display subsystem in SDM670 is described. On SDX75 interconnect providers are added, as is USB3 and the related PHY, which is then enabled on the IDP device. On SM6115 interconnect providers are added and existing clients are wired up. A UART controller is added as well. The MPM is added, to provide wakeup interrutps, on SM6375. The modem subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator supplies are corrected. On SM8150 the DisplayPort controller is added, for USB Type-C output, which together with the addition of HDMI is described on the HDK board. GPU and random number generator support are added to SM8450, and enabled on the HDK board. On SM8550 GPU, IPA, random number generator, missing SoundWire ports are added, and enabled on both MTP and QRD devices. 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On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one additional QUP SPI controller is added. CPU OPP tables are selectively enabled based on fuses, for both IPQ5332 and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes. Common elements of the IPQ9574 RDP boards are refactored into a common include file. IPQ9574 also gains description of its LEDs and WPS busttons. MSM8916 finally gets the DSP-based audio described, and this is enabled for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains notification LED, battery and charger support is added to Loncheer L8150, and GPU is enabled for Samsung Galaxy Tab A. Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is enabled as well. The Longcheer L9100 gains RGB notification LED support, and the wireless subsystem is enabled. Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is enabled, to allow using wakeup interrupts. Interconnect providers, MPM and display are added to QCM2290. UFS, remoteprocs and WiFi is enabled for Fairphone FP5. On Fairphone FP3 audio, WiFi and Bluetooth are enabled. On the Robotics RB1, HDMI and the CAN bus controller are added. On Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled. Bluetooth is enabled on the Robotics RB5. On SA8775P tsens and thermal is added, as well as the random number generator. Sound and RTC support is added for the Acer Aspire 1. On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices to inherit the base dtsi. Support for UFS, crypto, TrustZone based remoteprocs, the Camera Control Interface (CCI) and random number generator support are added. Additionally a variety of smaller fixes are introduced. A variety of fixes are introduced for SC8180X, in particular missing power-domains and interconnects. On SC8280XP the camera clock controller is added, and a number of smaller fixes are introduced. The display subsystem in SDM670 is described. On SDX75 interconnect providers are added, as is USB3 and the related PHY, which is then enabled on the IDP device. On SM6115 interconnect providers are added and existing clients are wired up. A UART controller is added as well. The MPM is added, to provide wakeup interrutps, on SM6375. The modem subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator supplies are corrected. On SM8150 the DisplayPort controller is added, for USB Type-C output, which together with the addition of HDMI is described on the HDK board. GPU and random number generator support are added to SM8450, and enabled on the HDK board. On SM8550 GPU, IPA, random number generator, missing SoundWire ports are added, and enabled on both MTP and QRD devices. Additionally a large number of smaller functional and DeviceTree binding validation issues are corrected across a variety of platforms. * tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (288 commits) arm64: dts: qcom: sc8180x-primus: Allow UFS regulators load/mode setting arm64: dts: qcom: sc8180x: Describe the GIC redistributor arm64: dts: qcom: sc8180x: Add interconnects to UFS arm64: dts: qcom: sc8180x: Add missing MDP clocks arm64: dts: qcom: sc8180x: Add UFS GDSC arm64: dts: qcom: sc7280*: move MPSS and WPSS memory to dtsi arm64: dts: qcom: sc7280: Rename reserved-memory nodes arm64: dts: qcom: sc7280: Remove unused second MPSS reg arm64: dts: qcom: sdm670: add display subsystem arm64: dts: qcom: sm8150-hdk: enable DisplayPort and USB-C altmode arm64: dts: qcom: sm8150: add USB-C ports to the OTG USB host arm64: dts: qcom: sm8150: add USB-C ports to the USB+DP QMP PHY arm64: dts: qcom: sm8150: add DisplayPort controller arm64: dts: qcom: sm8150-hdk: fix SS USB regulators arm64: dts: qcom: sm8150-hdk: enable HDMI output arm64: dts: qcom: sm8150: make dispcc cast minimal vote on MMCX arm64: dts: qcom: sm8650: add fastrpc-compute-cb nodes arm64: dts: qcom: sm8550-qrd: add PM8010 regulators arm64: dts: qcom: sm8550-mtp: Add pm8010 regulators arm64: dts: qcom: qcm2290: Hook up MPM ... Link: https://lore.kernel.org/r/20231219145402.874161-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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feb69ea40a |
Reset controller updates for v6.8
Make use of devm_platform_get_and_ioremap_resource() and device_get_match_data() in several drivers, support the Amlogic C3 reset controller, and improve various device tree binding documents. -----BEGIN PGP SIGNATURE----- iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCZXnObhcccC56YWJlbEBw ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwK/cAQDfkw0rO9u3T5gdsbbEWBFaHoMc /R7fBR1e9u+zqdW2SgD/X9Jszc2zOVzZuuG7uyidscCz9+UkM4HAMqlOip8j/gM= =3iPp -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWFdLAACgkQYKtH/8kJ UifxBxAAiJ8JgLPKhGSWVAPQCkGzfJl9ONDjGWxH4j3U0vdnlfBkjzlVFy9yQoK5 QG+IzLNoaLlLh17x6Sy12fFDaQErFHeWL3a9sTBlCT2csrBMrle10XRCbVFBYn+j 0RfgcIBbj3BBJlNXlvAk1mpdwuRTkRbQJPDeBNiCoJArFYb1GV4Kqxy840+jfICZ FpEDttL+7OSLKItDgVwImGqCBdfsPOzL+GY4Rvj7lE9FMsfrYbUxA+61kSBSPwbO JIsQ52LFpO8KvheeXEt71oS57jO0lAKGx0nM1mqe7gxED69bff1G8QjRojzYIDul mC0DQtG0cFjsGO4GuTHUQd1/5H1uCjjJKDwynDpXLG8rl+3GFCpwYxSYbKF+RCqJ R2SSVP0pCkiW9F8svDyK5h1NgoUZdoXptUYxzufJpnc+wwYuAPVV+zMhOnUlsSjg XOCQu29ql7N2SugIhLsNzcgOHCsxCOvki0yOt96kYKwtRGBv+1UX5oJzdE/XpjZn ATs08gcpK45rJfcFOYZ1kjmS0nSi95hsY+IvUNfSPs5ttBhbid8EEdZc73U1db/Y tlkqO4OKqqAcmpk0CJg3mwU1jX04/OAlNv9ifxzfUUR4tiONspk5rfp+klf5YbiR Qs1GGNt5N8hlBuiU3SqClayl3Lr3NKRqLiDeREdiDBaRzvJxqLw= =hbni -----END PGP SIGNATURE----- Merge tag 'reset-for-v6.8' of git://git.pengutronix.de/pza/linux into soc/drivers Reset controller updates for v6.8 Make use of devm_platform_get_and_ioremap_resource() and device_get_match_data() in several drivers, support the Amlogic C3 reset controller, and improve various device tree binding documents. * tag 'reset-for-v6.8' of git://git.pengutronix.de/pza/linux: dt-bindings: reset: hisilicon,hi3660-reset: Drop providers and consumers from example dt-bindings: reset: imx-src: Simplify compatible schema and drop unneeded quotes dt-bindings: reset: qcom: drop unneeded quotes dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/Five SoC reset: Use device_get_match_data() reset: reset-meson: add support for Amlogic C3 SoC Reset Controller dt-bindings: reset: Add compatible and DT bindings for Amlogic C3 Reset Controller reset: uniphier-glue: Use devm_platform_get_and_ioremap_resource() reset: sunplus: Use devm_platform_get_and_ioremap_resource() reset: simple: Convert to devm_platform_get_and_ioremap_resource() reset: qcom: Convert to devm_platform_ioremap_resource() reset: qcom-aoss: Convert to devm_platform_ioremap_resource() reset: meson-audio-arb: Convert to devm_platform_ioremap_resource() reset: brcmstb: Use devm_platform_get_and_ioremap_resource() Link: https://lore.kernel.org/r/20231213153313.278867-1-p.zabel@pengutronix.de Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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ec5b7be617 |
Samsung SoC driver changes for v6.8
1. Add support for Google GS101 SoC to different drivers: clock
controller, serial and watchdog.
The clock driver changes depend on few bindings headers, which I put
in a topic branch with the bindings refactoring and GS101 support,
therefore this this pull request includes that bindings topic branch.
The rest of the bindings topic branch is not necessary here, however
keeping everything together makes it easier to share between
branches. The bindings topic branch is mostly refactoring all the
compatibles to add SoC-specific compatible followed by fallback.
2. Exynos ChipID: recognize ExynosAutov920.
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Merge tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers
Samsung SoC driver changes for v6.8
1. Add support for Google GS101 SoC to different drivers: clock
controller, serial and watchdog.
The clock driver changes depend on few bindings headers, which I put
in a topic branch with the bindings refactoring and GS101 support,
therefore this this pull request includes that bindings topic branch.
The rest of the bindings topic branch is not necessary here, however
keeping everything together makes it easier to share between
branches. The bindings topic branch is mostly refactoring all the
compatibles to add SoC-specific compatible followed by fallback.
2. Exynos ChipID: recognize ExynosAutov920.
* tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (40 commits)
dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
watchdog: s3c2410_wdt: Add support for Google gs101 SoC
watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro
watchdog: s3c2410_wdt: Add support for WTCON register DBGACK_MASK bit
tty: serial: samsung: Add gs101 compatible and common fifoszdt_serial_drv_data
clk: samsung: clk-gs101: Add cmu_top, cmu_misc and cmu_apm support
clk: samsung: clk-pll: Add support for pll_{0516,0517,518}
dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix
dt-bindings: soc: samsung: usi: add google,gs101-usi compatible
dt-bindings: serial: samsung: Make samsung,uart-fifosize a required property
dt-bindings: serial: samsung: Add google-gs101-uart compatible
dt-bindings: watchdog: Document Google gs101 watchdog bindings
dt-bindings: samsung: exynos-sysreg: combine exynosautov920 with other enum
dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101
dt-bindings: clock: Add Google gs101 clock management unit bindings
dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible
dt-bindings: watchdog: samsung: add specific compatible for Tesla FSD
dt-bindings: samsung: exynos-pmu: add specific compatible for Tesla FSD
dt-bindings: serial: samsung: add specific compatible for Tesla FSD
dt-bindings: pwm: samsung: add specific compatible for Tesla FSD
...
Link: https://lore.kernel.org/r/20231220084722.22149-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Frank Li
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1e9b052582 |
dt-bindings: dma: fsl-edma: Add fsl-edma.h to prevent hardcoding in dts
Introduce a common dt-bindings header file, fsl-edma.h, shared between the driver and dts files. This addition aims to eliminate hardcoded values in dts files, promoting maintainability and consistency. DTS header file not support BIT() macro yet. Directly use 2^n number. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231114154824.3617255-3-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org> |
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Arnd Bergmann
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76955bc85b |
MediaTek ARM64 DeviceTree updates for v6.8
This adds devicetree bindings and nodes for: - Media Data Path 3 (MDP3) bindings and enablement on MT8195 - Smart Voltage Scaling (SVS) on MT8195 - LVTS SoC thermal on MT8192 - MT8188 SoC along with its resets, display bindings, and more - MT8183 hardware video decoder (mtk-vcodec-dec) Adds the following new machines: - MT8188 Evaluation Board (EVB) - MT8183 Chromebooks: Kukui-Katsu, Jacuzzi-Makomo, Pico, Pico6 Performs cleanups for various MediaTek SoCs and PMICs, and also includes some spare fixes. -----BEGIN PGP SIGNATURE----- iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCZXhCnigcYW5nZWxvZ2lv YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4z/MA+QEF perQb8WaodkzI8h7ENStPr/OSMAOp9VFSebIK5XfAP409tC9+Pue2BroIW+CN6ok 556iGXdWS+1U5NtpA0q2CQ== =x4gT -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWEXZEACgkQYKtH/8kJ UidbJA/7BHLNX6We69IW+PVoEG29Ex3zMFXNDPxa3DUquoPmm0jy/FnMb6l31CDB l4qLXp/4hsnvt/4TZjMhbblmmK+JG1iEj9wVNQANLynrErQLJZhqBeyYHr9DShM6 A4JJu/EeXXvcIXBmAHr/rLFKNe0xVix53aMm1lAzPUs6MaoVSrLhvmFckDiVQuZg sFVfPgvzZC4qzRJFqHoQWi7gNJtgM8/YxyCWHizhv4jms50pfuNWFiSDnc8fES5M 30gg7mmyJ/Hp+05BvT7ZRLhGAcQTIK5FJJLupzSzsShIiNTxDtku/S5JFd34Hv3a kstj3//pCI62gO8L4foJWS+5olR1THnb2unWd85hI24Uowg8QXwKdA53533ISj5A wdBufRu4RFVwu74u0h9tU6WmhYnEDehgmjw7cYqmYtPoTe3asReNx2UC8H5ggs/p cv82FVHKXscSaAW/LUqunW/YLe+1MLSsgV5aFYi0bQ4tICOeBEQzG8fBq1a9HAet xZMsNRmguQ8899l4VcnIk3Bur+zYqAYItClK4P+I7sqNoIPwJxRbpCKvx+AxnxRw P9JcsKnCcYvnoeJ4jvpntEySvdsl3hs1nMZIs/wkmV4/tX4gFET7bItm+P9ey6sG Q6wm3582y34mVodloNRLwlc6UfcJ6K7OeMOLXLQCQAGnIp0EzSM= =UohC -----END PGP SIGNATURE----- Merge tag 'mtk-dts64-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt MediaTek ARM64 DeviceTree updates for v6.8 This adds devicetree bindings and nodes for: - Media Data Path 3 (MDP3) bindings and enablement on MT8195 - Smart Voltage Scaling (SVS) on MT8195 - LVTS SoC thermal on MT8192 - MT8188 SoC along with its resets, display bindings, and more - MT8183 hardware video decoder (mtk-vcodec-dec) Adds the following new machines: - MT8188 Evaluation Board (EVB) - MT8183 Chromebooks: Kukui-Katsu, Jacuzzi-Makomo, Pico, Pico6 Performs cleanups for various MediaTek SoCs and PMICs, and also includes some spare fixes. * tag 'mtk-dts64-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (60 commits) arm64: dts: mediatek: mt8192: Add Smart Voltage Scaling node arm64: dts: mediatek: mt8195: Add SVS node and reduce LVTS_AP iospace arm64: dts: mediatek: mt8183: Change iospaces for thermal and svs arm64: dts: mediatek: mt8186: fix address warning for ADSP mailboxes arm64: dts: mediatek: mt8186: Fix alias prefix for ovl_2l0 arm64: dts: mt6358: Drop bogus "regulator-fixed" compatible properties arm64: dts: mt8183: kukui-jacuzzi: Drop bogus anx7625 panel_flag property arm64: dts: Add MediaTek MT8188 dts and evaluation board and Makefile dt-bindings: soc: mediatek: pwrap: Modify compatible for MT8188 dt-bindings: arm: mediatek: Add mt8188 pericfg compatible dt-bindings: arm: Add compatible for MediaTek MT8188 arm64: dts: mediatek: mt8195: add DSI and MIPI DPHY nodes dt-bindings: display: mediatek: dsi: add compatible for MediaTek MT8195 arm64: dts: mediatek: mt6358: Merge ldo_vcn33_* regulators dt-bindings: arm: mediatek: convert audsys and mt2701-afe-pcm to yaml arm64: dts: mediatek: mt8195: add MDP3 nodes arm64: dts: mediatek: mt8195: revise VDOSYS RDMA node name arm64: dts: mediatek: mt8183: correct MDP3 DMA-related nodes dt-bindings: display: mediatek: padding: add compatible for MT8195 dt-bindings: display: mediatek: split: add compatible for MT8195 ... Link: https://lore.kernel.org/r/20231212114515.121695-1-angelogioacchino.delregno@collabora.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Tudor Ambarus
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35f32e39b4 |
dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
The gs101 clock defines from the bindings header are derived from the
clock register names found in the datasheet under some certain rules.
The CMU TOP gate clock defines missed to include the required "CMU"
differentiator which will cause collisions with the gate clock defines
of other clock units. Rename the TOP gate clock defines to include "CMU".
Update the clock driver to use the new defines in order to not break
compilation and bisect-ability. There are no device trees that use the
previous defines.
Fixes:
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Gabriel Fernandez
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b5be49db3d |
dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform
Adds clock and reset binding entries for STM32MP25 SoC family Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231208143700.354785-4-gabriel.fernandez@foss.st.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Bjorn Andersson
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ea0b1a4c5a |
Merge branch 'icc-sm6115' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into HEAD
Merge the SM6115 interconnect binding to allow referecing the interconnect header files and the ports defined in these. |
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Bjorn Andersson
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d00e87f0e2 |
Merge branch '20231201-videocc-8150-v3-1-56bec3a5e443@quicinc.com' into clk-for-6.8
Merge SM8150 Video clock controller through a topic branch, to allow constants to be made available in the DeviceTree branch as well. |
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Satya Priya Kakitapalli
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3185f96968 |
dt-bindings: clock: Update the videocc resets for sm8150
Add all the available resets for the video clock controller on sm8150. Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231201-videocc-8150-v3-1-56bec3a5e443@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Andy Yan
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dc7226acac |
dt-bindings: rockchip,vop2: Add more endpoint definition
There are 2 HDMI, 2 DP, 2 eDP on rk3588, so add corresponding endpoint definition for it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20231211115907.1785377-1-andyshrk@163.com |
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Peter Griffin
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5b02a863ba |
dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix
166 was skipped by mistake and two clocks:
* CLK_MOUT_CMU_HSI0_USBDPDGB
* CLK_GOUT_HSI0_USBDPDGB
Have an incorrect DGB ending instead of DBG.
This is an ABI break, but as the patch was only applied yesterday this
header has never been in an actual release so it seems better to fix
this early than ignore it.
Fixes:
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Hsiao Chien Sung
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3526cfaed2
|
dt-bindings: reset: mt8188: Add VDOSYS reset control bits
Add MT8188 VDOSYS0 and VDOSYS1 reset control bits. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
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Peter Griffin
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0a910f1606 |
dt-bindings: clock: Add Google gs101 clock management unit bindings
Provide dt-schema documentation for Google gs101 SoC clock controller. Currently this adds support for cmu_top, cmu_misc and cmu_apm. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231209233106.147416-3-peter.griffin@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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Bjorn Andersson
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779266b127 |
Merge branch 'icc-x1e80100' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.8
Merge the X1E80100 interconnect binding to get access to the interconnect port constants. |
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Bjorn Andersson
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d64254b46a |
Merge branch '20231205061002.30759-4-quic_sibis@quicinc.com' into arm64-for-6.8
Merge the X1E80100 clock bindings to get access to the clock constants. |
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Bjorn Andersson
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12c4ffcd3b |
Merge branch '20231205061002.30759-4-quic_sibis@quicinc.com' into clk-for-6.8
Merge the X1E80100 DeviceTree bindings through a topic branch, to allow the clock constants to be shared with the DeviceTree branch. |
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Rajendra Nayak
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4dc7e7d2ee |
dt-bindings: clock: qcom: Add X1E80100 GCC clocks
Add device tree bindings for global clock controller on X1E80100 SoCs. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231205061002.30759-2-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Bjorn Andersson
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5ceab14eb6 |
Merge branch 'icc-sm8650' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.8
Merge the SM8650 interconnect binding, to gain access to the interconnect port constants. |
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Bjorn Andersson
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40d9c6ea64 |
Merge branch '20231106-topic-sm8650-upstream-clocks-v3-5-761a6fadb4c0@linaro.org' into arm64-for-6.8
Merge the SM8650 clock bindings, to gain access to the clock constants. |
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Bjorn Andersson
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cdf1c63d23 |
Merge branch '20231123064735.2979802-2-quic_imrashai@quicinc.com' into clk-for-6.8
Merge the ECPI clock controller through a topic branch to make it possible to merge the clock constants into the DeviceTree branch as well. |
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Imran Shaik
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d4a599c59d |
dt-bindings: clock: qcom: Add ECPRICC clocks for QDU1000 and QRU1000
Add device tree bindings for qcom ecpri clock controller on QDU1000 and QRU1000 SoCs. Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231123064735.2979802-2-quic_imrashai@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Nia Espera
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7bf421f445 |
dt-bindings: iio: adc: qcom: Add Qualcomm smb139x
Bindings for a charger controller chip found on sm8350 Signed-off-by: Nia Espera <nespera@igalia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20231111-nia-sm8350-for-upstream-v4-1-3a638b02eea5@igalia.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Bjorn Andersson
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6514b6efdd |
Merge branch '20231106-topic-sm8650-upstream-clocks-v3-5-761a6fadb4c0@linaro.org' into clk-for-6.8
Merge SM8650 GCC, TCSRCC, DISPCC, GPUCC and RPMHCC bindings through a topic branch to make it possible to also merge and use the constants in the DeviceTree branch. |
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Neil Armstrong
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a0aa7fa5c3 |
dt-bindings: clock: qcom: document the SM8650 GPU Clock Controller
Add bindings documentation for the SM8650 Graphics Clock Controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-4-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Neil Armstrong
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c1120359d4 |
dt-bindings: clock: qcom: document the SM8650 Display Clock Controller
Add bindings documentation for the SM8650 Display Clock Controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-3-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Neil Armstrong
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b69d932154 |
dt-bindings: clock: qcom: document the SM8650 General Clock Controller
Add bindings documentation for the SM8650 General Clock Controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-2-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Neil Armstrong
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1a3b3bd142 |
dt-bindings: clock: qcom: document the SM8650 TCSR Clock Controller
Add bindings documentation for the SM8650 TCSR Clock Controller. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-1-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Vincent Knecht
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3f373de6da |
dt-bindings: clock: qcom,gcc-msm8939: Add CSI2 related clocks
When adding in the indexes for this clock-controller we missed GCC_CAMSS_CSI2_AHB_CLK, GCC_CAMSS_CSI2_CLK, GCC_CAMSS_CSI2PHY_CLK, GCC_CAMSS_CSI2PIX_CLK and GCC_CAMSS_CSI2RDI_CLK. Add them in now. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231029061948.505883-1-vincent.knecht@mailoo.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Bjorn Andersson
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7a56e64a56 |
Merge branch '20231026105345.3376-3-bryan.odonoghue@linaro.org' into arm64-for-6.8
Merge the SC8280XP Camera Clock Controller binding updates from the topic branch, to gain access to clock defines to be used in DeviceTree source. |
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Bryan O'Donoghue
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206cd759fb |
dt-bindings: clock: Add SC8280XP CAMCC
Add device tree bindings for the camera clock controller on Qualcomm SC8280XP platform. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231026105345.3376-3-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Neil Armstrong
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216382b155 |
dt-bindings: arm: qcom,ids: Add SoC ID for SM8650
Add the ID for the Qualcomm SM8650 SoC. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com> Link: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-socinfo-v2-1-4751e7391dc9@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Konrad Dybcio
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658902913c |
dt-bindings: interconnect: Add Qualcomm SM6115 NoC
Add bindings for Qualcomm SM6115 Network-On-Chip interconnect. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231125-topic-6115icc-v3-1-bd8907b8cfd7@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Luca Weiss
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18c74d56fe |
iio: adc: Add PM7325 PMIC7 ADC bindings
Add the defines for the ADC channels found on the PM7325. The list is taken from downstream msm-5.4 and adjusted for mainline. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20231013-fp5-thermals-v1-1-f14df01922e6@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Neil Armstrong
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f32f977fa8 |
dt-bindings: power: meson-g12a-power: document ISP power domain
Add MIPI ISP power domain ID to the G12A Power domains bindings header Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Daniel Scally <dan.scally@ideasonboard.com> Tested-by: Daniel Scally <dan.scally@ideasonboard.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231123-topic-amlogic-upstream-isp-pmdomain-v2-1-61f2fcf709e5@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
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Zelong Dong
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0c0ea61c9b |
dt-bindings: reset: Add compatible and DT bindings for Amlogic C3 Reset Controller
Add new compatible and DT bindings for Amlogic C3 Reset Controller Signed-off-by: Zelong Dong <zelong.dong@amlogic.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230914064018.18790-2-zelong.dong@amlogic.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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Neil Armstrong
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439d3404ad |
dt-bindings: clock: g12a-clkc: add MIPI ISP & CSI PHY clock ids
Add MIPI ISP & CSI PHY clock ids to G12A clock bindings header Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Daniel Scally <dan.scally@ideasonboard.com> Tested-by: Daniel Scally <dan.scally@ideasonboard.com> Link: https://lore.kernel.org/r/20231114-topic-amlogic-upstream-isp-clocks-v1-1-223958791501@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Neil Armstrong
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bd5ef3f21d |
dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids
Add new CLK ids for the CTS_ENCL and CTS_ENCL_SEL clocks on G12A compatible SoCs. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231124-amlogic-v6-4-upstream-dsi-ccf-vim3-v9-1-95256ed139e6@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Rajendra Nayak
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dc84a76f05 |
dt-bindings: interconnect: Add Qualcomm X1E80100 SoC
The Qualcomm X1E80100 SoC has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand. Co-developed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231123135028.29433-2-quic_sibis@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Neil Armstrong
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80abebd9bf |
dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in Qualcomm SM8650 SoC
Document the RPMh Network-On-Chip Interconnect of the SM8650 platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231123-topic-sm8650-upstream-interconnect-v2-1-7e050874f59b@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Linus Torvalds
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12418ece0d |
linux-watchdog 6.7-rc1 tag
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.14 (GNU/Linux) iEYEABECAAYFAmVL2nUACgkQ+iyteGJfRspY0gCgu/eCCZ1E/CU/xLQ7YtLQ7i7L qtYAn07XudrdaCkbSwW6MiBsiCA33ae4 =NU1w -----END PGP SIGNATURE----- Merge tag 'linux-watchdog-6.7-rc1' of git://www.linux-watchdog.org/linux-watchdog Pull watchdog updates from Wim Van Sebroeck: - add support for Amlogic C3 and S4 SoCs - add IT8613 ID - add MSM8226 and MSM8974 compatibles - other small fixes and improvements * tag 'linux-watchdog-6.7-rc1' of git://www.linux-watchdog.org/linux-watchdog: (24 commits) dt-bindings: watchdog: Add support for Amlogic C3 and S4 SoCs watchdog: mlx-wdt: Parameter desctiption warning fix watchdog: aspeed: Add support for aspeed,reset-mask DT property dt-bindings: watchdog: aspeed-wdt: Add aspeed,reset-mask property watchdog: apple: Deactivate on suspend dt-bindings: watchdog: qcom-wdt: Add MSM8226 and MSM8974 compatibles dt-bindings: watchdog: fsl-imx7ulp-wdt: Add 'fsl,ext-reset-output' wdog: imx7ulp: Enable wdog int_en bit for watchdog any reset drivers: watchdog: marvell_gti: Program the max_hw_heartbeat_ms drivers: watchdog: marvell_gti: fix zero pretimeout handling watchdog: marvell_gti: Replace of_platform.h with explicit includes watchdog: imx_sc_wdt: continue if the wdog already enabled watchdog: st_lpc: Use device_get_match_data() watchdog: wdat_wdt: Add timeout value as a param in ping method watchdog: gpio_wdt: Make use of device properties sbsa_gwdt: Calculate timeout with 64-bit math watchdog: ixp4xx: Make sure restart always works watchdog: it87_wdt: add IT8613 ID watchdog: marvell_gti_wdt: Fix error code in probe() Watchdog: marvell_gti_wdt: Remove redundant dev_err_probe() for platform_get_irq() ... |
||
|
Linus Torvalds
|
90b0c2b2ed |
Pin control changes for the v6.7 kernel cycle
New drivers:
- Realtek RTD family pin control driver and RTD1619B,
RTD1319D and RTD1315E subdrivers.
- Nuvoton NPCM8xx combined pin control and GPIO driver.
- Amlogic T7 pin control driver.
- Renesas RZ/G3S pin control driver.
Improvements:
- A number of additional UART groups added to the Mediatek
MT7981 driver.
- MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125
and SDM660.
- Extra GPIO banks for the Sunxi H616.
- MLSP I2C6 function support in Qualcomm MSM8226.
- Some __counted_by() annotations for dynamic arrays.
- Ongoing work to make remove() return void.
- LSBC groups and functions in the Renesas R8A7778.
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Merge tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"No pin control core changes this time.
New drivers:
- Realtek RTD family pin control driver and RTD1619B, RTD1319D and
RTD1315E subdrivers
- Nuvoton NPCM8xx combined pin control and GPIO driver
- Amlogic T7 pin control driver
- Renesas RZ/G3S pin control driver
Improvements:
- A number of additional UART groups added to the Mediatek MT7981
driver
- MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125 and SDM660
- Extra GPIO banks for the Sunxi H616
- MLSP I2C6 function support in Qualcomm MSM8226
- Some __counted_by() annotations for dynamic arrays
- Ongoing work to make remove() return void
- LSBC groups and functions in the Renesas R8A7778"
* tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (110 commits)
pinctrl: Use device_get_match_data()
dt-bindings: pinctrl: qcom,sa8775p-tlmm: add missing wakeup-parent
dt-bindings: pinctrl: nuvoton,npcm845: Add missing additionalProperties on gpio child nodes
dt-bindings: pinctrl: brcm: Ensure all child node properties are documented
pinctrl: renesas: rzn1: Convert to platform remove callback returning void
pinctrl: renesas: rzg2l: Add RZ/G3S support
dt-bindings: pinctrl: renesas: Document RZ/G3S SoC
pinctrl: renesas: rzg2l: Add support for different DS values on different groups
pinctrl: renesas: rzg2l: Move DS and OI to SoC-specific configuration
pinctrl: renesas: rzg2l: Adapt function number for RZ/G3S
pinctrl: renesas: rzg2l: Adapt for different SD/PWPR register offsets
pinctrl: renesas: rzg2l: Index all registers based on port offset
pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request()
pinctrl: renesas: r8a7778: Add LBSC pins, groups, and functions
pinctrl: intel: fetch community only when we need it
pinctrl: cherryview: reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case
pinctrl: cherryview: Convert to platform remove callback returning void
pinctrl: sprd-sc9860: Convert to platform remove callback returning void
pinctrl: qcom/msm: Convert to platform remove callback returning void
pinctrl: qcom/lpi: Convert to platform remove callback returning void
...
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||
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Linus Torvalds
|
d99b91a99b |
Char/Misc and other driver changes for 6.7-rc1
Here is the big set of char/misc and other small driver subsystem
changes for 6.7-rc1. Included in here are:
- IIO subsystem driver updates and additions (largest part of this
pull request)
- FPGA subsystem driver updates
- Counter subsystem driver updates
- ICC subsystem driver updates
- extcon subsystem driver updates
- mei driver updates and additions
- nvmem subsystem driver updates and additions
- comedi subsystem dependency fixes
- parport driver fixups
- cdx subsystem driver and core updates
- splice support for /dev/zero and /dev/full
- other smaller driver cleanups
All of these have been in linux-next for a while with no reported
issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc updates from Greg KH:
"Here is the big set of char/misc and other small driver subsystem
changes for 6.7-rc1. Included in here are:
- IIO subsystem driver updates and additions (largest part of this
pull request)
- FPGA subsystem driver updates
- Counter subsystem driver updates
- ICC subsystem driver updates
- extcon subsystem driver updates
- mei driver updates and additions
- nvmem subsystem driver updates and additions
- comedi subsystem dependency fixes
- parport driver fixups
- cdx subsystem driver and core updates
- splice support for /dev/zero and /dev/full
- other smaller driver cleanups
All of these have been in linux-next for a while with no reported
issues"
* tag 'char-misc-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (326 commits)
cdx: add sysfs for subsystem, class and revision
cdx: add sysfs for bus reset
cdx: add support for bus enable and disable
cdx: Register cdx bus as a device on cdx subsystem
cdx: Create symbol namespaces for cdx subsystem
cdx: Introduce lock to protect controller ops
cdx: Remove cdx controller list from cdx bus system
dts: ti: k3-am625-beagleplay: Add beaglecc1352
greybus: Add BeaglePlay Linux Driver
dt-bindings: net: Add ti,cc1352p7
dt-bindings: eeprom: at24: allow NVMEM cells based on old syntax
dt-bindings: nvmem: SID: allow NVMEM cells based on old syntax
Revert "nvmem: add new config option"
MAINTAINERS: coresight: Add missing Coresight files
misc: pci_endpoint_test: Add deviceID for J721S2 PCIe EP device support
firmware: xilinx: Move EXPORT_SYMBOL_GPL next to zynqmp_pm_feature definition
uacce: make uacce_class constant
ocxl: make ocxl_class constant
cxl: make cxl_class constant
misc: phantom: make phantom_class constant
...
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||
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Linus Torvalds
|
385903a7ec |
SoC driver updates for 6.7
The highlights for the driver support this time are
- Qualcomm platforms gain support for the Qualcomm Secure Execution
Environment firmware interface to access EFI variables on certain
devices, and new features for multiple platform and firmware drivers.
- Arm FF-A firmware support gains support for v1.1 specification features,
in particular notification and memory transaction descriptor changes.
- SCMI firmware support now support v3.2 features for clock and DVFS
configuration and a new transport for Qualcomm platforms.
- Minor cleanups and bugfixes are added to pretty much all the active
platforms: qualcomm, broadcom, dove, ti-k3, rockchip, sifive, amlogic,
atmel, tegra, aspeed, vexpress, mediatek, samsung and more.
In particular, this contains portions of the treewide conversion to
use __counted_by annotations and the device_get_match_data helper.
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Merge tag 'soc-drivers-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann:
"The highlights for the driver support this time are
- Qualcomm platforms gain support for the Qualcomm Secure Execution
Environment firmware interface to access EFI variables on certain
devices, and new features for multiple platform and firmware
drivers.
- Arm FF-A firmware support gains support for v1.1 specification
features, in particular notification and memory transaction
descriptor changes.
- SCMI firmware support now support v3.2 features for clock and DVFS
configuration and a new transport for Qualcomm platforms.
- Minor cleanups and bugfixes are added to pretty much all the active
platforms: qualcomm, broadcom, dove, ti-k3, rockchip, sifive,
amlogic, atmel, tegra, aspeed, vexpress, mediatek, samsung and
more.
In particular, this contains portions of the treewide conversion to
use __counted_by annotations and the device_get_match_data helper"
* tag 'soc-drivers-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (156 commits)
soc: qcom: pmic_glink_altmode: Print return value on error
firmware: qcom: scm: remove unneeded 'extern' specifiers
firmware: qcom: scm: add a missing forward declaration for struct device
firmware: qcom: move Qualcomm code into its own directory
soc: samsung: exynos-chipid: Convert to platform remove callback returning void
soc: qcom: apr: Add __counted_by for struct apr_rx_buf and use struct_size()
soc: qcom: pmic_glink: fix connector type to be DisplayPort
soc: ti: k3-socinfo: Avoid overriding return value
soc: ti: k3-socinfo: Fix typo in bitfield documentation
soc: ti: knav_qmss_queue: Use device_get_match_data()
firmware: ti_sci: Use device_get_match_data()
firmware: qcom: qseecom: add missing include guards
soc/pxa: ssp: Convert to platform remove callback returning void
soc/mediatek: mtk-mmsys: Convert to platform remove callback returning void
soc/mediatek: mtk-devapc: Convert to platform remove callback returning void
soc/loongson: loongson2_guts: Convert to platform remove callback returning void
soc/litex: litex_soc_ctrl: Convert to platform remove callback returning void
soc/ixp4xx: ixp4xx-qmgr: Convert to platform remove callback returning void
soc/ixp4xx: ixp4xx-npe: Convert to platform remove callback returning void
soc/hisilicon: kunpeng_hccs: Convert to platform remove callback returning void
...
|
||
|
Linus Torvalds
|
3c86a44d62 |
- Move Kconfig files into the pmdomain subsystem
- Drop use of genpd's redundant ->opp_to_performance_state() callback
- amlogic: Add support for the T7 power-domains controller
- amlogic: Fix mask for the second NNA mem power-domain
- bcm: Fixup ASB register read and comparison for bcm2835-power
- imx: Fix device link problem for consumers of the pgc power-domain
- mediatek: Add support for the MT8365 power domains
- qcom: Add support for the rpmhpds for SC8380XP power-domains
- qcom: Add support for the rpmhpds for SM8650 power-domains
- qcom: Add support for the rpmhpd clocks for SM7150
- qcom: Add support for the rpmpds for MSM8917 (families) power-domains
- starfive: Add support for the JH7110 AON PMU
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Merge tag 'pmdomain-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm
Pull pmdomain updates from Ulf Hansson:
- Move Kconfig files into the pmdomain subsystem
- Drop use of genpd's redundant ->opp_to_performance_state() callback
- amlogic:
- Add support for the T7 power-domains controller
- Fix mask for the second NNA mem power-domain
- bcm: Fixup ASB register read and comparison for bcm2835-power
- imx: Fix device link problem for consumers of the pgc power-domain
- mediatek: Add support for the MT8365 power domains
- qcom:
- Add support for the rpmhpds for SC8380XP power-domains
- Add support for the rpmhpds for SM8650 power-domains
- Add support for the rpmhpd clocks for SM7150
- Add support for the rpmpds for MSM8917 (families) power-domains
- starfive: Add support for the JH7110 AON PMU
* tag 'pmdomain-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (56 commits)
pmdomain: amlogic: Fix mask for the second NNA mem PD domain
pmdomain: qcom: rpmhpd: Add SC8380XP power domains
pmdomain: qcom: rpmhpd: Add SM8650 RPMh Power Domains
dt-bindings: power: rpmpd: Add SC8380XP support
dt-bindings: power: qcom,rpmhpd: Add GMXC PD index
dt-bindings: power: qcom,rpmpd: document the SM8650 RPMh Power Domains
pmdomain: imx: Make imx pgc power domain also set the fwnode
pmdomain: qcom: rpmpd: Add QM215 power domains
pmdomain: qcom: rpmpd: Add MSM8917 power domains
dt-bindings: power: rpmpd: Add MSM8917, MSM8937 and QM215
pmdomain: bcm: bcm2835-power: check if the ASB register is equal to enable
pmdomain: qcom: rpmhpd: Drop the ->opp_to_performance_state() callback
pmdomain: qcom: rpmpd: Drop the ->opp_to_performance_state() callback
pmdomain: qcom: cpr: Drop the ->opp_to_performance_state() callback
pmdomain: Use device_get_match_data()
pmdomain: ti: add missing of_node_put
pmdomain: mediatek: Add support for MT8365
pmdomain: mediatek: Add support for MTK_SCPD_STRICT_BUS_PROTECTION cap
pmdomain: mediatek: Add support for WAY_EN operations
pmdomain: mediatek: Unify configuration for infracfg and smi
...
|
||
|
Linus Torvalds
|
fe4ae2fab0 |
Herein lies a smallish collection of clk driver updates and some core
clk framework changes for the merge window. The core framework changes
are only improving the debugfs interface to allow phase adjustments and
report which consumers of a clk there are. These are most likely only of
interest to kernel developers.
On the clk driver side, it's a ghastly amount of updates with only a
handful of new clk drivers. We have a couple new clk drivers for
Qualcomm, per usual, and a driver for Renesas, Amlogic, and TI
respectively. The updates are spread throughout the clk drivers. Some
highlights are fixing kunit tests for different configurations like
lockdep and big-endian, avoiding integer overflow in rate settable clks,
moving clk_hw_onecell_data to the end of allocations so that drivers
don't corrupt their private data, and migrating clk drivers to the
regmap maple tree. Otherwise it's the usual fixes to clk drivers that
only come along with testing the drivers on real hardware.
New Drivers:
- Add clock driver for TWL6032
- Initial support for the Qualcomm SM4450 Global Clock Controller and
SM4450 RPMh clock controllers
- Add Camera Clock Controller on Qualcomm SM8550
- Add support for the Renesas RZ/G3S (R9A08G045) SoC
- Add Amlogic s4 main clock controller support
Updates:
- Make clk kunit tests work with lockdep
- Fix clk gate kunit test for big-endian
- Convert more than a handful of clk drivers to use regmap maple tree
- Consider the CLK_FRAC_DIVIDER_ZERO_BASED in fractional divider clk
implementation
- Add consumer info to clk debugfs
- Fix various clk drivers that have clk_hw_onecell_data not at the end
of an allocation
- Drop CLK_SET_RATE_PARENT for clocks with fixed-rate GPLLs across a
variety of Qualcomm IPQ platforms
- Add missing parent of APCS PLL on Qualcomm IPQ6018
- Add I2C QUP6 clk on Qualcomm IPQ6018 but mark it critical to avoid
problems with RPM
- Implement safe source switching for a53pll and use on Qualcomm
IPQ5332
- Add support for Stromer Plus PLLs to Qualcomm clk driver
- Switch Qualcomm SM8550 Video and GPU clock controllers to use OLE PLL
configure method
- Non critical fixes to halt bit checks in Qualcomm clk drivers
- Add SMMU GDSC for Qualcomm MSM8998
- Fix possible integer overflow in Qualcomm RCG frequency calculation
code
- Remove RPM managed clks from Qualcomm MSM8996 GCC driver
- Add HFPLL configuration for the three HFPLLs in Qualcomm MSM8976
- Switch Qualcomm MSM8996 CBF clock driver's remove function to return
void
- Fix missing dependency for s4 clock controllers
- Select MXC_CLK when building in the CLK_IMX8QXP
- Fixes for error handling paths in i.MX8 ACM driver
- Move the clocks check in i.MX8 ACM driver in order to log any error
- Drop the unused return value of clk_imx_acm_detach_pm_domains
- Drop non-existant IMX8MP_CLK_AUDIOMIX_PDM_ROOT clock
- Fix error handling in i.MX8MQ clock driver
- Allow a different LCDIF1 clock parent if DT describes it for i.MX6SX
- Keep the SCU resource table sorted in the i.MX8DXL rsrc driver
- Move the elcdif PLL clock registration above lcd_clk, as it is its
parent
- Correct some ENET specific clocks for i.MX8DXL platform
- Drop the VPU_UART and VPUCORE from i.MX8QM as latest HW revision
doesn't have them
- Remove "de-featured" MLB support from i.MX8QM/QXP/DXL platforms
- Skip registering clocks owned by Cortex-A partition SCU-based
platforms
- Add CAN_1/2 to i.MX8QM and M4_0, PI_0_PWM_0 and PI_0_I2C_0 to
i.MX8QXP resources
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk driver updates from Stephen Boyd:
"Herein lies a smallish collection of clk driver updates and some core
clk framework changes for the merge window. The core framework changes
are only improving the debugfs interface to allow phase adjustments
and report which consumers of a clk there are. These are most likely
only of interest to kernel developers.
On the clk driver side, it's a ghastly amount of updates with only a
handful of new clk drivers. We have a couple new clk drivers for
Qualcomm, per usual, and a driver for Renesas, Amlogic, and TI
respectively. The updates are spread throughout the clk drivers.
Some highlights are fixing kunit tests for different configurations
like lockdep and big-endian, avoiding integer overflow in rate
settable clks, moving clk_hw_onecell_data to the end of allocations so
that drivers don't corrupt their private data, and migrating clk
drivers to the regmap maple tree. Otherwise it's the usual fixes to
clk drivers that only come along with testing the drivers on real
hardware.
New Drivers:
- Add clock driver for TWL6032
- Initial support for the Qualcomm SM4450 Global Clock Controller and
SM4450 RPMh clock controllers
- Add Camera Clock Controller on Qualcomm SM8550
- Add support for the Renesas RZ/G3S (R9A08G045) SoC
- Add Amlogic s4 main clock controller support
Updates:
- Make clk kunit tests work with lockdep
- Fix clk gate kunit test for big-endian
- Convert more than a handful of clk drivers to use regmap maple tree
- Consider the CLK_FRAC_DIVIDER_ZERO_BASED in fractional divider clk
implementation
- Add consumer info to clk debugfs
- Fix various clk drivers that have clk_hw_onecell_data not at the
end of an allocation
- Drop CLK_SET_RATE_PARENT for clocks with fixed-rate GPLLs across a
variety of Qualcomm IPQ platforms
- Add missing parent of APCS PLL on Qualcomm IPQ6018
- Add I2C QUP6 clk on Qualcomm IPQ6018 but mark it critical to avoid
problems with RPM
- Implement safe source switching for a53pll and use on Qualcomm
IPQ5332
- Add support for Stromer Plus PLLs to Qualcomm clk driver
- Switch Qualcomm SM8550 Video and GPU clock controllers to use OLE
PLL configure method
- Non critical fixes to halt bit checks in Qualcomm clk drivers
- Add SMMU GDSC for Qualcomm MSM8998
- Fix possible integer overflow in Qualcomm RCG frequency calculation
code
- Remove RPM managed clks from Qualcomm MSM8996 GCC driver
- Add HFPLL configuration for the three HFPLLs in Qualcomm MSM8976
- Switch Qualcomm MSM8996 CBF clock driver's remove function to
return void
- Fix missing dependency for s4 clock controllers
- Select MXC_CLK when building in the CLK_IMX8QXP
- Fixes for error handling paths in i.MX8 ACM driver
- Move the clocks check in i.MX8 ACM driver in order to log any error
- Drop the unused return value of clk_imx_acm_detach_pm_domains
- Drop non-existant IMX8MP_CLK_AUDIOMIX_PDM_ROOT clock
- Fix error handling in i.MX8MQ clock driver
- Allow a different LCDIF1 clock parent if DT describes it for
i.MX6SX
- Keep the SCU resource table sorted in the i.MX8DXL rsrc driver
- Move the elcdif PLL clock registration above lcd_clk, as it is its
parent
- Correct some ENET specific clocks for i.MX8DXL platform
- Drop the VPU_UART and VPUCORE from i.MX8QM as latest HW revision
doesn't have them
- Remove "de-featured" MLB support from i.MX8QM/QXP/DXL platforms
- Skip registering clocks owned by Cortex-A partition SCU-based
platforms
- Add CAN_1/2 to i.MX8QM and M4_0, PI_0_PWM_0 and PI_0_I2C_0 to
i.MX8QXP resources"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits)
clk: Fix clk gate kunit test on big-endian CPUs
clk: si521xx: Increase stack based print buffer size in probe
clk: mediatek: fix double free in mtk_clk_register_pllfh()
clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data
clk: socfpga: Fix undefined behavior bug in struct stratix10_clock_data
clk: sifive: Allow building the driver as a module
clk: analogbits: Allow building the library as a module
clk: sprd: Composite driver support offset config
clk: Allow phase adjustment from debugfs
clk: Show active consumers of clocks in debugfs
clk: Use device_get_match_data()
clk: visconti: Add bounds-checking coverage for struct visconti_pll_provider
clk: visconti: Fix undefined behavior bug in struct visconti_pll_provider
clk: cdce925: Extend match support for OF tables
clk: si570: Simplify probe
clk: si5351: Simplify probe
clk: rs9: Use i2c_get_match_data() instead of device_get_match_data()
clk: clk-si544: Simplify probe() and is_valid_frequency()
clk: si521xx: Use i2c_get_match_data() instead of device_get_match_data()
clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS
...
|
||
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Stephen Boyd
|
720e4a4a68 |
Merge branches 'clk-renesas', 'clk-kunit', 'clk-regmap' and 'clk-frac-divider' into clk-next
- Make clk kunit tests work with lockdep - Fix clk gate kunit test for big-endian - Convert more than a handful of clk drivers to use regmap maple tree - Consider the CLK_FRAC_DIVIDER_ZERO_BASED in fractional divider clk implementation * clk-renesas: (23 commits) clk: renesas: r9a08g045: Add clock and reset support for SDHI1 and SDHI2 clk: renesas: rzg2l: Use %x format specifier to print CLK_ON_R() clk: renesas: Add minimal boot support for RZ/G3S SoC clk: renesas: rzg2l: Add divider clock for RZ/G3S clk: renesas: rzg2l: Refactor SD mux driver clk: renesas: rzg2l: Remove CPG_SDHI_DSEL from generic header clk: renesas: rzg2l: Add struct clk_hw_data clk: renesas: rzg2l: Add support for RZ/G3S PLL clk: renesas: rzg2l: Remove critical area clk: renesas: rzg2l: Fix computation formula clk: renesas: rzg2l: Trust value returned by hardware clk: renesas: rzg2l: Lock around writes to mux register clk: renesas: rzg2l: Wait for status bit of SD mux before continuing clk: renesas: rcar-gen3: Extend SDnH divider table dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3S SoC clk: renesas: r8a7795: Constify r8a7795_*_clks clk: renesas: r9a06g032: Name anonymous structs clk: renesas: r9a06g032: Fix kerneldoc warning clk: renesas: rzg2l: Use u32 for flag and mux_flags clk: renesas: rzg2l: Use FIELD_GET() for PLL register fields ... * clk-kunit: clk: Fix clk gate kunit test on big-endian CPUs clk: Parameterize clk_leaf_mux_set_rate_parent clk: Drive clk_leaf_mux_set_rate_parent test from clk_ops * clk-regmap: clk: versaclock7: Convert to use maple tree register cache clk: versaclock5: Convert to use maple tree register cache clk: versaclock3: Convert to use maple tree register cache clk: versaclock3: Remove redundant _is_writeable() clk: si570: Convert to use maple tree register cache clk: si544: Convert to use maple tree register cache clk: si5351: Convert to use maple tree register cache clk: si5341: Convert to use maple tree register cache clk: si514: Convert to use maple tree register cache clk: cdce925: Convert to use maple tree register cache * clk-frac-divider: clk: fractional-divider: tests: Add test suite for edge cases clk: fractional-divider: Improve approximation when zero based and export |
||
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Stephen Boyd
|
d33050aec3 |
Merge branches 'clk-debugfs', 'clk-spreadtrum', 'clk-sifive', 'clk-counted' and 'clk-qcom' into clk-next
- Add consumer info to clk debugfs - Fix various clk drivers that have clk_hw_onecell_data not at the end of an allocation * clk-debugfs: clk: Allow phase adjustment from debugfs clk: Show active consumers of clocks in debugfs * clk-spreadtrum: clk: sprd: Composite driver support offset config * clk-sifive: clk: sifive: Allow building the driver as a module clk: analogbits: Allow building the library as a module * clk-counted: clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data clk: socfpga: Fix undefined behavior bug in struct stratix10_clock_data clk: visconti: Add bounds-checking coverage for struct visconti_pll_provider clk: visconti: Fix undefined behavior bug in struct visconti_pll_provider * clk-qcom: (36 commits) clk: qcom: apss-ipq6018: add the GPLL0 clock also as clock provider clk: qcom: ipq5332: drop the CLK_SET_RATE_PARENT flag from GPLL clocks clk: qcom: ipq9574: drop the CLK_SET_RATE_PARENT flag from GPLL clocks clk: qcom: ipq5018: drop the CLK_SET_RATE_PARENT flag from GPLL clocks clk: qcom: ipq6018: drop the CLK_SET_RATE_PARENT flag from PLL clocks clk: qcom: ipq8074: drop the CLK_SET_RATE_PARENT flag from PLL clocks clk: qcom: gcc-ipq6018: add QUP6 I2C clock clk: qcom: apss-ipq6018: ipq5332: add safe source switch for a53pll clk: qcom: apss-ipq-pll: Fix 'l' value for ipq5332_pll_config clk: qcom: apss-ipq-pll: Use stromer plus ops for stromer plus pll clk: qcom: clk-alpha-pll: introduce stromer plus ops clk: qcom: config IPQ_APSS_6018 should depend on QCOM_SMEM clk: qcom: videocc-sm8550: switch to clk_lucid_ole_pll_configure clk: qcom: gpucc-sm8550: switch to clk_lucid_ole_pll_configure clk: qcom: Replace of_device.h with explicit includes clk: qcom: smd-rpm: Move CPUSS_GNoC clock to interconnect clk: qcom: cbf-msm8996: Convert to platform remove callback returning void clk: qcom: gcc-sm8150: Fix gcc_sdcc2_apps_clk_src clk: qcom: Add GCC driver support for SM4450 dt-bindings: clock: qcom: Add GCC clocks for SM4450 ... |
||
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Stephen Boyd
|
702a582b5c |
Merge branches 'clk-doc', 'clk-amlogic', 'clk-mediatek', 'clk-twl' and 'clk-imx' into clk-next
- Add clock driver for TWL6032 * clk-doc: clk: linux/clk-provider.h: fix kernel-doc warnings and typos * clk-amlogic: clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver dt-bindings: clock: document Amlogic S4 SoC peripherals clock controller dt-bindings: clock: document Amlogic S4 SoC PLL clock controller * clk-mediatek: clk: mediatek: fix double free in mtk_clk_register_pllfh() clk: mediatek: clk-mt2701: Add check for mtk_alloc_clk_data clk: mediatek: clk-mt7629: Add check for mtk_alloc_clk_data clk: mediatek: clk-mt7629-eth: Add check for mtk_alloc_clk_data clk: mediatek: clk-mt6797: Add check for mtk_alloc_clk_data clk: mediatek: clk-mt6779: Add check for mtk_alloc_clk_data clk: mediatek: clk-mt6765: Add check for mtk_alloc_clk_data * clk-twl: clk: twl: add clock driver for TWL6032 * clk-imx: clk: imx: imx8qm/qxp: add more resources to whitelist clk: imx: scu: ignore clks not owned by Cortex-A partition clk: imx8: remove MLB support clk: imx: imx8qm-rsrc: drop VPU_UART/VPUCORE clk: imx: imx8qxp: correct the enet clocks for i.MX8DXL clk: imx: imx8qxp: Fix elcdif_pll clock clk: imx: imx8dxl-rsrc: keep sorted in the ascending order clk: imx: imx6sx: Allow a different LCDIF1 clock parent clk: imx: imx8mq: correct error handling path clk: imx8mp: Remove non-existent IMX8MP_CLK_AUDIOMIX_PDM_ROOT clk: imx: imx8: Simplify clk_imx_acm_detach_pm_domains() clk: imx: imx8: Add a message in case of devm_clk_hw_register_mux_parent_data_table() error clk: imx: imx8: Fix an error handling path in imx8_acm_clk_probe() clk: imx: imx8: Fix an error handling path if devm_clk_hw_register_mux_parent_data_table() fails clk: imx: imx8: Fix an error handling path in clk_imx_acm_attach_pm_domains() clk: imx: Select MXC_CLK for CLK_IMX8QXP |
||
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Zev Weiss
|
9931be2cfc |
dt-bindings: watchdog: aspeed-wdt: Add aspeed,reset-mask property
This property configures the Aspeed watchdog timer's reset mask, which controls which peripherals are reset when the watchdog timer expires. Some platforms require that certain devices be left untouched across a reboot; aspeed,reset-mask can now be used to express such constraints. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20230922104231.1434-5-zev@bewilderbeest.net Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> |
||
|
Ulf Hansson
|
11cc498cf8 |
pmdomain: Merge branch genpd_dt into next
Merge the immutable branch genpd_dt into next, to allow the DT bindings to be tested together with new pmdomain changes that are targeted for v6.7. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
||
|
Sibi Sankar
|
7eb31ec5e1 |
dt-bindings: power: qcom,rpmhpd: Add GMXC PD index
Document GMXC (Graphics MXC) power domain index which will be used on SC8380XP SoCs. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Link: https://lore.kernel.org/r/20231025135943.13854-2-quic_sibis@quicinc.com [Ulf: Re-based to step up the index number] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
||
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Neil Armstrong
|
d4d56c079d |
dt-bindings: power: qcom,rpmpd: document the SM8650 RPMh Power Domains
Document the RPMh Power Domains on the SM8650 Platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-rpmpd-v1-1-f25d313104c6@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
||
|
Ulf Hansson
|
1817d56ec8 |
pmdomain: Merge branch genpd_dt into next
Merge the immutable branch genpd_dt into next, to allow the DT bindings to be tested together with new pmdomain changes that are targeted for v6.7. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
||
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Otto Pflüger
|
6184869828 |
dt-bindings: power: rpmpd: Add MSM8917, MSM8937 and QM215
The MSM8917, MSM8937 and QM215 SoCs have VDDCX and VDDMX power domains controlled in voltage level mode. Define the MSM8937 and QM215 power domains as aliases because these SoCs are similar to MSM8917 and may share some parts of the device tree. Also add the compatibles for these SoCs to the documentation, with qcom,msm8937-rpmpd using qcom,msm8917-rpmpd as a fallback compatible because there are no known differences. QM215 is not compatible with these because it uses different regulators. Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231014133823.14088-2-otto.pflueger@abscue.de Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
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Balsam CHIHI
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0bb4937b58 |
dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for mt8192
Add LVTS thermal controller definition for MT8192. Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20231017190545.157282-2-bero@baylibre.com |
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Ulf Hansson
|
f4e769243d |
pmdomain: Merge branch genpd_dt into next
Merge the immutable branch genpd_dt into next, to allow the DT bindings to be tested together with new pmdomain changes that are targeted for v6.7. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
||
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Fabien Parent
|
a1571f1f33 |
dt-bindings: power: Add MT8365 power domains
Add power domains dt-bindings for MT8365. Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Tested-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230918093751.1188668-2-msp@baylibre.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
||
|
Frank Wunderlich
|
be2cc09bd5 |
dt-bindings: thermal: mediatek: Add LVTS thermal sensors for mt7988
Add sensor constants for MT7988. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230922055020.6436-3-linux@fw-web.de |
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Rohit Agarwal
|
956329ec7c |
dt-bindings: interconnect: Add compatibles for SDX75
Add dt-bindings compatibles and interconnect IDs for Qualcomm SDX75 platform. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/1694614256-24109-2-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Claudiu Beznea
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e372aee8c2 |
dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3S SoC
Add documentation for the RZ/G3S CPG. The RZ/G3S CPG module is almost
identical to the one available in RZ/G2{L,UL}, the exception being some
core clocks as follows:
- The SD clock is composed of a mux and a divider, and the divider
has some limitations (div = 1 cannot be set if mux rate is 800MHz),
- There are 3 SD clocks,
- The OCTA and TSU clocks are specific to RZ/G3S,
- PLL1/4/6 are specific to RZ/G3S with its own computation formula.
Even with this RZ/G3S could use the same bindings as RZ/G2L.
Along with documentation bindings for the RZ/G3S (R9A08G045) Clock Pulse
Generator (CPG) core clocks, module clocks and resets were added.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-13-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Changhuang Liang
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793f4def8c |
dt-bindings: power: Update prefixes for AON power domain
Use "JH7110_AON_PD_" prefix for AON power domain for JH7110 SoC. Reviewed-by: Walker Chen <walker.chen@starfivetech.com> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230927130734.9921-2-changhuang.liang@starfivetech.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
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Adam Ford
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05eeeff22b |
clk: imx8mp: Remove non-existent IMX8MP_CLK_AUDIOMIX_PDM_ROOT
The TRM shows there is only one AUDIOMIX PDM Root Clock Select register, and it's called IMX8MP_CLK_AUDIOMIX_PDM_SEL. That selector doesn't appear to have any more children and the MICFIL driver can reference IMX8MP_CLK_AUDIOMIX_PDM_SEL directly without the need for any other. Remove this errant clock, since it doesn't really exist. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230831044431.250338-3-aford173@gmail.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org> |
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Yu Tu
|
9894949916 |
dt-bindings: clock: document Amlogic S4 SoC peripherals clock controller
Add the S4 peripherals clock controller dt-bindings in the S4 SoC family. Signed-off-by: Yu Tu <yu.tu@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230904075504.23263-3-yu.tu@amlogic.com Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Yu Tu
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923a77a2e1 |
dt-bindings: clock: document Amlogic S4 SoC PLL clock controller
Add the S4 PLL clock controller dt-bindings in the S4 SoC family. Signed-off-by: Yu Tu <yu.tu@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230904075504.23263-2-yu.tu@amlogic.com Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Huqiang Qin
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2b7eb110d3 |
dt-bindings: pinctrl: Add support for Amlogic T7 SoCs
Add a new compatible name for Amlogic T7 pin controller, and add a new dt-binding header file which document the detail pin names. Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230922094342.637251-2-huqiang.qin@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Bjorn Andersson
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2643f0b069 |
Merge branch '20230909123431.1725728-1-quic_ajipan@quicinc.com' into clk-for-6.7
Merge the SM4450 RPMHCC and GCC through a topic branch, to allow reuse of the defines from the DeviceTree binding in the DeviceTree source. |
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Ajit Pandey
|
d2d04deb55 |
dt-bindings: clock: qcom: Add GCC clocks for SM4450
Add support for qcom global clock controller bindings for SM4450 platform. Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230909123431.1725728-4-quic_ajipan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
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Luca Weiss
|
471e2875f8 |
clk: qcom: mmcc-msm8974: remove ocmemcx_ahb_clk
According to a commit in the 3.4 vendor kernel sources[0] the ocmemcx_ahb_clk clock "is controlled by RPM and should not be touched by APPS.". [0] |
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Jagadeesh Kona
|
9cbc64745f |
dt-bindings: clock: qcom: Add SM8550 camera clock controller
Add device tree bindings for the camera clock controller on Qualcomm SM8550 platform. Co-developed-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230707035744.22245-2-quic_jkona@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Changhuang Liang
|
41b66b54a7 |
dt-bindings: power: Add power-domain header for JH7110
Add power-domain header for JH7110 SoC, it can use to operate dphy power. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230913-grumbly-rewrite-34c85539f2ed@spud Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
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Robert Marko
|
b8c889bef9 |
dt-bindings: arm: qcom,ids: Add IDs for IPQ8174 family
IPQ8174 (Oak) family is part of the IPQ8074 family, but the ID-s for it are missing so lets add them. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Kathiravan T <quic_kathirav@quicinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230901181041.1538999-1-robimarko@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Luca Weiss
|
ccfb4d8b60 |
dt-bindings: arm: qcom,ids: Add SoC ID for QCM6490
Add the ID for the Qualcomm QCM6490 SoC. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230830-fp5-initial-v1-7-5a954519bbad@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Danila Tikhonov
|
edc3a1fb62 |
dt-bindings: arm: qcom,ids: Add Soc ID for SM7150P
Add the ID for the Qualcomm SM7150P SoC. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230913181722.13917-2-danila@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
xianwei.zhao
|
54f1618b95 |
dt-bindings: power: add Amlogic T7 power domains
Add devicetree binding document and related header file for Amlogic T7 secure power domains. Signed-off-by: xianwei.zhao <xianwei.zhao@amlogic.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Lucas Tanure <tanure@linux.com> Link: https://lore.kernel.org/r/20230911025223.3433776-5-xianwei.zhao@amlogic.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
||
|
Linus Torvalds
|
0468be89b3 |
IOMMU Updates for Linux v6.6
Including:
- Core changes:
- Consolidate probe_device path
- Make the PCI-SAC IOVA allocation trick PCI-only
- AMD IOMMU:
- Consolidate PPR log handling
- Interrupt handling improvements
- Refcount fixes for amd_iommu_v2 driver
- Intel VT-d driver:
- Enable idxd device DMA with pasid through iommu dma ops.
- Lift RESV_DIRECT check from VT-d driver to core.
- Miscellaneous cleanups and fixes.
- ARM-SMMU drivers:
- Device-tree binding updates:
- Add additional compatible strings for Qualcomm SoCs
- Allow ASIDs to be configured in the DT to work around Qualcomm's
broken hypervisor
- Fix clocks for Qualcomm's MSM8998 SoC
- SMMUv2:
- Support for Qualcomm's legacy firmware implementation featured on
at least MSM8956 and MSM8976.
- Match compatible strings for Qualcomm SM6350 and SM6375 SoC variants
- SMMUv3:
- Use 'ida' instead of a bitmap for VMID allocation
- Rockchip IOMMU:
- Lift page-table allocation restrictions on newer hardware
- Mediatek IOMMU:
- Add MT8188 IOMMU Support
- Renesas IOMMU:
- Allow PCIe devices
- Usual set of cleanups an smaller fixes
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Merge tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu updates from Joerg Roedel:
"Core changes:
- Consolidate probe_device path
- Make the PCI-SAC IOVA allocation trick PCI-only
AMD IOMMU:
- Consolidate PPR log handling
- Interrupt handling improvements
- Refcount fixes for amd_iommu_v2 driver
Intel VT-d driver:
- Enable idxd device DMA with pasid through iommu dma ops
- Lift RESV_DIRECT check from VT-d driver to core
- Miscellaneous cleanups and fixes
ARM-SMMU drivers:
- Device-tree binding updates:
- Add additional compatible strings for Qualcomm SoCs
- Allow ASIDs to be configured in the DT to work around Qualcomm's
broken hypervisor
- Fix clocks for Qualcomm's MSM8998 SoC
- SMMUv2:
- Support for Qualcomm's legacy firmware implementation featured
on at least MSM8956 and MSM8976
- Match compatible strings for Qualcomm SM6350 and SM6375 SoC
variants
- SMMUv3:
- Use 'ida' instead of a bitmap for VMID allocation
- Rockchip IOMMU:
- Lift page-table allocation restrictions on newer hardware
- Mediatek IOMMU:
- Add MT8188 IOMMU Support
- Renesas IOMMU:
- Allow PCIe devices
.. and the usual set of cleanups an smaller fixes"
* tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (64 commits)
iommu: Explicitly include correct DT includes
iommu/amd: Remove unused declarations
iommu/arm-smmu-qcom: Add SM6375 SMMUv2
iommu/arm-smmu-qcom: Add SM6350 DPU compatible
iommu/arm-smmu-qcom: Add SM6375 DPU compatible
iommu/arm-smmu-qcom: Sort the compatible list alphabetically
dt-bindings: arm-smmu: Fix MSM8998 clocks description
iommu/vt-d: Remove unused extern declaration dmar_parse_dev_scope()
iommu/vt-d: Fix to convert mm pfn to dma pfn
iommu/vt-d: Fix to flush cache of PASID directory table
iommu/vt-d: Remove rmrr check in domain attaching device path
iommu: Prevent RESV_DIRECT devices from blocking domains
dmaengine/idxd: Re-enable kernel workqueue under DMA API
iommu/vt-d: Add set_dev_pasid callback for dma domain
iommu/vt-d: Prepare for set_dev_pasid callback
iommu/vt-d: Make prq draining code generic
iommu/vt-d: Remove pasid_mutex
iommu/vt-d: Add domain_flush_pasid_iotlb()
iommu: Move global PASID allocation from SVA to core
iommu: Generalize PASID 0 for normal DMA w/o PASID
...
|
||
|
Linus Torvalds
|
1c9f8dff62 |
Char/Misc driver changes for 6.6-rc1
Here is the big set of char/misc and other small driver subsystem changes for 6.6-rc1. Stuff all over the place here, lots of driver updates and changes and new additions. Short summary is: - new IIO drivers and updates - Interconnect driver updates - fpga driver updates and additions - fsi driver updates - mei driver updates - coresight driver updates - nvmem driver updates - counter driver updates - lots of smaller misc and char driver updates and additions All of these have been in linux-next for a long time with no reported problems. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCZPH64g8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ynr2QCfd3RKeR+WnGzyEOFhksl30UJJhiIAoNZtYT5+ t9KG0iMDXRuTsOqeEQbd =tVnk -----END PGP SIGNATURE----- Merge tag 'char-misc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the big set of char/misc and other small driver subsystem changes for 6.6-rc1. Stuff all over the place here, lots of driver updates and changes and new additions. Short summary is: - new IIO drivers and updates - Interconnect driver updates - fpga driver updates and additions - fsi driver updates - mei driver updates - coresight driver updates - nvmem driver updates - counter driver updates - lots of smaller misc and char driver updates and additions All of these have been in linux-next for a long time with no reported problems" * tag 'char-misc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (267 commits) nvmem: core: Notify when a new layout is registered nvmem: core: Do not open-code existing functions nvmem: core: Return NULL when no nvmem layout is found nvmem: core: Create all cells before adding the nvmem device nvmem: u-boot-env:: Replace zero-length array with DECLARE_FLEX_ARRAY() helper nvmem: sec-qfprom: Add Qualcomm secure QFPROM support dt-bindings: nvmem: sec-qfprom: Add bindings for secure qfprom dt-bindings: nvmem: Add compatible for QCM2290 nvmem: Kconfig: Fix typo "drive" -> "driver" nvmem: Explicitly include correct DT includes nvmem: add new NXP QorIQ eFuse driver dt-bindings: nvmem: Add t1023-sfp efuse support dt-bindings: nvmem: qfprom: Add compatible for MSM8226 nvmem: uniphier: Use devm_platform_get_and_ioremap_resource() nvmem: qfprom: do some cleanup nvmem: stm32-romem: Use devm_platform_get_and_ioremap_resource() nvmem: rockchip-efuse: Use devm_platform_get_and_ioremap_resource() nvmem: meson-mx-efuse: Convert to devm_platform_ioremap_resource() nvmem: lpc18xx_otp: Convert to devm_platform_ioremap_resource() nvmem: brcm_nvram: Use devm_platform_get_and_ioremap_resource() ... |
||
|
Linus Torvalds
|
f8fd5c2483 |
This pull request is full of clk driver changes. In fact, there aren't any
changes to the clk framework this time around. That's probably because everyone
was on vacation (yours truly included). We did lose a couple clk drivers this
time around because nobody was using those devices. That skews the diffstat a
bit, but either way, nothing looks out of the ordinary here. The usual suspects
are chugging along adding support for more SoCs and fixing bugs.
If I had to choose, I'd say the theme for the past few months has been
"polish". There's quite a few patches that migrate to
devm_platform_ioremap_resource() in here. And there's more than a handful of
patches that move the NR_CLKS define from the DT binding header to the driver.
There's even patches that migrate drivers to use clk_parent_data and clk_hw to
describe clk tree topology. It seems that the spring (summer?) cleaning bug got
some folks, or the semiconductor shortage finally hit the software side.
New Drivers:
- StarFive JH7110 SoC clock drivers
- Qualcomm IPQ5018 Global Clock Controller driver
- Versa3 clk generator to support 48KHz playback/record with audio codec on
RZ/G2L SMARC EVK
Removed Drivers:
- Remove non-OF mmp clk drivers
- Remove OXNAS clk driver
Updates:
- Add __counted_by to struct clk_hw_onecell_data and struct spmi_pmic_div_clk_cc
- Move defines for numbers of clks (NR_CLKS) from DT headers to drivers
- Introduce kstrdup_and_replace() and use it
- Add PLL rates for Rockchip rk3568
- Add the display clock tree for Rockchip rv1126
- Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and RZ/G2 SoCs
- Convert sun9i-mmc clock to use devm_platform_get_and_ioremap_resource()
- Fix function name in a comment in ccu_mmc_timing.c
- Parameter name correction for ccu_nkm_round_rate()
- Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e. consider alternative
parent rates when determining clock rates
- Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi
- Support finding closest (as opposed to closest but not higher) clock rate
for NM, NKM, mux and div type clocks, as use it for Allwinner A64 pll-video0
- Prefer current parent rate if able to generate ideal clock rate for Allwinner NKM clocks
- Clean up Qualcomm SMD RPM driver, with interconnect bus clocks moved out to
the interconnect drivers
- Fix various PM runtime bugs across many Qualcomm clk drivers
- Migrate Qualcomm MDM9615 is to parent_hw and parent_data
- Add network related resets on Qualcomm IPQ4019
- Add a couple missing USB related clocks to Qualcomm IPQ9574
- Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock controller
- In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs, and GPLL1 are
added, while PCIe pipe clock, SDCC rcg ops are corrected
- Add missing GDSCs to and correct GDSCs for the SC8280XP global clock controller driver
- Support retention for the Qualcomm SC8280XP display clock controller GDSCs.
- Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE to fix
issues with missing parent clocks across sc7180, sm7150, sm6350 and sm8250,
while sm8450 is corrected to use floor ops
- Correct Qualcomm SM6350 GPU clock controller's clock supplies
- Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver
- Add missing OXILICX GDSC to Qualcomm MSM8226 GCC
- Change the delay in the Qualcomm reset controller to fsleep() for correctness
- Extend the Qualcomm SM83550 Video clock controller to support SC8280XP
- Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and R-Car H3,
M3-W, and M3-N SoCs
- Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M
- Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five
- Add the PDM IPC clock for i.MX93
- Add 519.75MHz frequency support for i.MX9 PLL
- Simplify the .determine_rate() implementation for i.MX GPR mux
- Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource()
- Add the audio mux clock to i.MX8
- Fix the SPLL2 MULT range for PLLv4
- Update the SPLL2 type in i.MX8ULP
- Fix the SAI4 clock on i.MX8MP
- Add silicon revision print for i.MX25 on clocks init
- Drop the return value from __mx25_clocks_init()
- Fix the clock pauses on no-op set_rate for i.MX8M composite clock
- Drop restrictions for i.MX PLL14xx and fix its max prediv value
- Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to allow
glitch free switching
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk subsystem updates from Stephen Boyd:
"This pull request is full of clk driver changes. In fact, there aren't
any changes to the clk framework this time around. That's probably
because everyone was on vacation (yours truly included). We did lose a
couple clk drivers this time around because nobody was using those
devices. That skews the diffstat a bit, but either way, nothing looks
out of the ordinary here. The usual suspects are chugging along adding
support for more SoCs and fixing bugs.
If I had to choose, I'd say the theme for the past few months has been
"polish". There's quite a few patches that migrate to
devm_platform_ioremap_resource() in here. And there's more than a
handful of patches that move the NR_CLKS define from the DT binding
header to the driver. There's even patches that migrate drivers to use
clk_parent_data and clk_hw to describe clk tree topology. It seems
that the spring (summer?) cleaning bug got some folks, or the
semiconductor shortage finally hit the software side.
New Drivers:
- StarFive JH7110 SoC clock drivers
- Qualcomm IPQ5018 Global Clock Controller driver
- Versa3 clk generator to support 48KHz playback/record with audio
codec on RZ/G2L SMARC EVK
Removed Drivers:
- Remove non-OF mmp clk drivers
- Remove OXNAS clk driver
Updates:
- Add __counted_by to struct clk_hw_onecell_data and struct
spmi_pmic_div_clk_cc
- Move defines for numbers of clks (NR_CLKS) from DT headers to
drivers
- Introduce kstrdup_and_replace() and use it
- Add PLL rates for Rockchip rk3568
- Add the display clock tree for Rockchip rv1126
- Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and
RZ/G2 SoCs
- Convert sun9i-mmc clock to use
devm_platform_get_and_ioremap_resource()
- Fix function name in a comment in ccu_mmc_timing.c
- Parameter name correction for ccu_nkm_round_rate()
- Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e.
consider alternative parent rates when determining clock rates
- Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi
- Support finding closest (as opposed to closest but not higher)
clock rate for NM, NKM, mux and div type clocks, as use it for
Allwinner A64 pll-video0
- Prefer current parent rate if able to generate ideal clock rate for
Allwinner NKM clocks
- Clean up Qualcomm SMD RPM driver, with interconnect bus clocks
moved out to the interconnect drivers
- Fix various PM runtime bugs across many Qualcomm clk drivers
- Migrate Qualcomm MDM9615 is to parent_hw and parent_data
- Add network related resets on Qualcomm IPQ4019
- Add a couple missing USB related clocks to Qualcomm IPQ9574
- Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock
controller
- In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs,
and GPLL1 are added, while PCIe pipe clock, SDCC rcg ops are
corrected
- Add missing GDSCs to and correct GDSCs for the SC8280XP global
clock controller driver
- Support retention for the Qualcomm SC8280XP display clock
controller GDSCs.
- Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE
to fix issues with missing parent clocks across sc7180, sm7150,
sm6350 and sm8250, while sm8450 is corrected to use floor ops
- Correct Qualcomm SM6350 GPU clock controller's clock supplies
- Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver
- Add missing OXILICX GDSC to Qualcomm MSM8226 GCC
- Change the delay in the Qualcomm reset controller to fsleep() for
correctness
- Extend the Qualcomm SM83550 Video clock controller to support
SC8280XP
- Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and
R-Car H3, M3-W, and M3-N SoCs
- Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M
- Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five
- Add the PDM IPC clock for i.MX93
- Add 519.75MHz frequency support for i.MX9 PLL
- Simplify the .determine_rate() implementation for i.MX GPR mux
- Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource()
- Add the audio mux clock to i.MX8
- Fix the SPLL2 MULT range for PLLv4
- Update the SPLL2 type in i.MX8ULP
- Fix the SAI4 clock on i.MX8MP
- Add silicon revision print for i.MX25 on clocks init
- Drop the return value from __mx25_clocks_init()
- Fix the clock pauses on no-op set_rate for i.MX8M composite clock
- Drop restrictions for i.MX PLL14xx and fix its max prediv value
- Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to
allow glitch free switching"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (207 commits)
clk: qcom: Fix SM_GPUCC_8450 dependencies
clk: lmk04832: Support using PLL1_LD as SPI readback pin
clk: lmk04832: Don't disable vco clock on probe fail
clk: lmk04832: Set missing parent_names for output clocks
clk: mvebu: Convert to devm_platform_ioremap_resource()
clk: nuvoton: Convert to devm_platform_ioremap_resource()
clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()
clk: ti: Use devm_platform_get_and_ioremap_resource()
clk: mediatek: Convert to devm_platform_ioremap_resource()
clk: hsdk-pll: Convert to devm_platform_ioremap_resource()
clk: gemini: Convert to devm_platform_ioremap_resource()
clk: fsl-sai: Convert to devm_platform_ioremap_resource()
clk: bm1880: Convert to devm_platform_ioremap_resource()
clk: axm5516: Convert to devm_platform_ioremap_resource()
clk: actions: Convert to devm_platform_ioremap_resource()
clk: cdce925: Remove redundant of_match_ptr()
clk: pxa910: Move number of clocks to driver source
clk: pxa1928: Move number of clocks to driver source
clk: pxa168: Move number of clocks to driver source
clk: mmp2: Move number of clocks to driver source
...
|
||
|
Linus Torvalds
|
4a3b1007ee |
Pin control bulk changes for the v6.6 kernel cycle:
No core changes this time.
Drivers:
- Intel Tangier SoC pin control support.
- AMLogic C3 SoC pin control support.
- Texas Instruments AM654 SoC pin control support.
- Qualcomm SM8350 and SM6115 LPASS (Low Power Audio Sub-System)
pin control support.
- Qualcomm PMX75 and PM7550BA (Power Management) pin control
support.
- Qualcomm PMC8180 and PMC8180C (Power Management) pin control
support.
- DROP the Oxnas driver as there is not enough of community
interest to keep carrying this ARM(11) port.
Enhancements:
- Bias control in the MT7986 pin control driver.
- Misc device tree binding enhancements such as the Broadcom
11351 being converted to YAML.
- New macro: DEFINE_NOIRQ_DEV_PM_OPS() put to use.
- Clean up some SPDX headers.
- Handle non-unique devicetree subnode names in two Renesas
drivers.
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Merge tag 'pinctrl-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"We have some patches to DTS[I] files in arm and arm64 as well, that
were merged here as DT headers were being changed.
The most interesting stuff is the Intel Tangier chip support and
AMLogic C3 in my opinion.
No core changes this time.
Drivers:
- Intel Tangier SoC pin control support
- AMLogic C3 SoC pin control support
- Texas Instruments AM654 SoC pin control support
- Qualcomm SM8350 and SM6115 LPASS (Low Power Audio Sub-System) pin
control support
- Qualcomm PMX75 and PM7550BA (Power Management) pin control support
- Qualcomm PMC8180 and PMC8180C (Power Management) pin control
support
- DROP the Oxnas driver as there is not enough of community interest
to keep carrying this ARM(11) port
Enhancements:
- Bias control in the MT7986 pin control driver
- Misc device tree binding enhancements such as the Broadcom 11351
being converted to YAML
- New macro: DEFINE_NOIRQ_DEV_PM_OPS() put to use
- Clean up some SPDX headers
- Handle non-unique devicetree subnode names in two Renesas drivers"
* tag 'pinctrl-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (80 commits)
pinctrl: mlxbf3: Remove gpio_disable_free()
pinctrl: use capital "OR" for multiple licenses in SPDX
dt-bindings: pinctrl: renesas,rza2: Use 'additionalProperties' for child nodes
pinctrl: cherryview: fix address_space_handler() argument
pinctrl: intel: consolidate ACPI dependency
pinctrl: tegra: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
pinctrl: renesas: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
pinctrl: mvebu: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
pinctrl: at91: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
pinctrl: cherryview: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
pm: Introduce DEFINE_NOIRQ_DEV_PM_OPS() helper
pinctrl: mediatek: assign functions to configure pin bias on MT7986
pinctrl: mediatek: fix pull_type data for MT7981
dt-bindings: pinctrl: aspeed: Allow only defined pin mux node properties
dt-bindings: pinctrl: Drop 'phandle' properties
pinctrl: lynxpoint: Make use of pm_ptr()
pinctrl: baytrail: Make use of pm_ptr()
pinctrl: intel: Switch to use exported namespace
pinctrl: lynxpoint: reuse common functions from pinctrl-intel
pinctrl: cherryview: reuse common functions from pinctrl-intel
...
|
||
|
Linus Torvalds
|
8f447694c2 |
Devicetree updates for v6.6:
DT core:
- Add support for generating DT nodes for PCI devices. This is the
groundwork for applying overlays to PCI devices containing
non-discoverable downstream devices.
- DT unittest additions to check reverted changesets, to test for
refcount issues, and to test unresolved symbols. Also, various
clean-ups of the unittest along the way.
- Refactor node and property manipulation functions to better share code
with old API and changeset API
- Refactor changeset print functions to a common implementation
- Move some platform_device specific functions into of_platform.c
Bindings:
- Treewide fixing of typos
- Treewide clean-up of SPDX tags to use 'OR' consistently
- Last chunk of dropping unnecessary quotes. With that, the check
for unnecessary quotes is enabled in yamllint.
- Convert ftgmac100, zynqmp-genpd, pps-gpio, syna,rmi4, and qcom,ssbi
bindings to DT schema format
- Add Allwinner V3s xHCI USB, Saef SF-TC154B display, QCom SM8450 Inline
Crypto Engine, QCom SM6115 UFS, QCom SDM670 PDC interrupt controller,
Arm 2022 Cortex cores, and QCom IPQ9574 Crypto bindings
- Fixes for Rockchip DWC PCI binding
- Ensure all properties are evaluated on USB connector schema
- Fix dt-check-compatible script to find of_device_id instances with
compiler annotations
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Merge tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT core:
- Add support for generating DT nodes for PCI devices. This is the
groundwork for applying overlays to PCI devices containing
non-discoverable downstream devices.
- DT unittest additions to check reverted changesets, to test for
refcount issues, and to test unresolved symbols. Also, various
clean-ups of the unittest along the way.
- Refactor node and property manipulation functions to better share
code with old API and changeset API
- Refactor changeset print functions to a common implementation
- Move some platform_device specific functions into of_platform.c
Bindings:
- Treewide fixing of typos
- Treewide clean-up of SPDX tags to use 'OR' consistently
- Last chunk of dropping unnecessary quotes. With that, the check for
unnecessary quotes is enabled in yamllint.
- Convert ftgmac100, zynqmp-genpd, pps-gpio, syna,rmi4, and qcom,ssbi
bindings to DT schema format
- Add Allwinner V3s xHCI USB, Saef SF-TC154B display, QCom SM8450
Inline Crypto Engine, QCom SM6115 UFS, QCom SDM670 PDC interrupt
controller, Arm 2022 Cortex cores, and QCom IPQ9574 Crypto bindings
- Fixes for Rockchip DWC PCI binding
- Ensure all properties are evaluated on USB connector schema
- Fix dt-check-compatible script to find of_device_id instances with
compiler annotations"
* tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (64 commits)
dt-bindings: usb: Add V3s compatible string for OHCI
dt-bindings: usb: Add V3s compatible string for EHCI
dt-bindings: display: panel: mipi-dbi-spi: add Saef SF-TC154B
dt-bindings: vendor-prefixes: document Saef Technology
dt-bindings: thermal: lmh: update maintainer address
of: unittest: Fix of_unittest_pci_node() kconfig dependencies
dt-bindings: crypto: ice: Document sm8450 inline crypto engine
dt-bindings: ufs: qcom: Add ICE to sm8450 example
dt-bindings: ufs: qcom: Add sm6115 binding
dt-bindings: ufs: qcom: Add reg-names property for ICE
dt-bindings: yamllint: Enable quoted string check
dt-bindings: Drop remaining unneeded quotes
of: unittest-data: Fix whitespace - angular brackets
of: unittest-data: Fix whitespace - indentation
of: unittest-data: Fix whitespace - blank lines
of: unittest-data: Convert remaining overlay DTS files to sugar syntax
of: overlay: unittest: Add test for unresolved symbol
of: unittest: Add separators to of_unittest_overlay_high_level()
of: unittest: Cleanup partially-applied overlays
of: unittest: Merge of_unittest_apply{,_revert}_overlay_check()
...
|
||
|
Linus Torvalds
|
0e72db7767 |
ARM: devicetree updates for 6.6
These are the devicetree updates for Arm and RISC-V based SoCs,
mainly from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips,
Samsung, ST and Starfive.
Only a few new SoC got added:
- TI AM62P5, a variant of the existing Sitara AM62x family
- Intel Agilex5, an FPGFA platform that includes an
Cortex-A76/A55 SoC.
- Qualcomm ipq5018 is used in wireless access points
- Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile
phone platform.
In total, 29 machines get added, which is low because of the summer
break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST,
Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head. Most of
these are development and reference boards.
Despite not adding a lot of new machines, there are over 700 patches in
total, most of which are cleanups and minor fixes.
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Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann:
"These are the devicetree updates for Arm and RISC-V based SoCs, mainly
from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips, Samsung, ST and
Starfive.
Only a few new SoC got added:
- TI AM62P5, a variant of the existing Sitara AM62x family
- Intel Agilex5, an FPGFA platform that includes an Cortex-A76/A55
SoC.
- Qualcomm ipq5018 is used in wireless access points
- Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile phone
platform.
In total, 29 machines get added, which is low because of the summer
break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST,
Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head. Most of
these are development and reference boards.
Despite not adding a lot of new machines, there are over 700 patches
in total, most of which are cleanups and minor fixes"
* tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (735 commits)
arm64: dts: use capital "OR" for multiple licenses in SPDX
ARM: dts: use capital "OR" for multiple licenses in SPDX
arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved
ARM: dts: qcom: apq8064: add support to gsbi4 uart
riscv: dts: change TH1520 files to dual license
riscv: dts: thead: add BeagleV Ahead board device tree
dt-bindings: riscv: Add BeagleV Ahead board compatibles
ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board
ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators
dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
ARM: dts: stm32: support display on stm32f746-disco board
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
ARM: dts: stm32: add pin map for LTDC on stm32f7
ARM: dts: stm32: add ltdc support on stm32f746 MCU
arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sdm670: Add PDC
riscv: dts: starfive: fix jh7110 qspi sort order
...
|
||
|
Stephen Boyd
|
41680df097 |
Merge branch 'clk-qcom' into clk-next
* clk-qcom: (87 commits) clk: qcom: Fix SM_GPUCC_8450 dependencies clk: qcom: smd-rpm: Set XO rate and CLK_IS_CRITICAL on PCNoC clk: qcom: smd-rpm: Add a way to define bus clocks with rate and flags clk: qcom: gcc-ipq5018: change some variable static clk: qcom: gcc-ipq4019: add missing networking resets dt-bindings: clock: qcom: ipq4019: add missing networking resets clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC clk: qcom: gcc-qdu1000: Update the RCGs ops clk: qcom: gcc-qdu1000: Update the SDCC clock RCG ops clk: qcom: gcc-qdu1000: Add support for GDSCs clk: qcom: gcc-qdu1000: Add gcc_ddrss_ecpri_gsi_clk support clk: qcom: gcc-qdu1000: Register gcc_gpll1_out_even clock clk: qcom: gcc-qdu1000: Fix clkref clocks handling clk: qcom: gcc-qdu1000: Fix gcc_pcie_0_pipe_clk_src clock handling dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs clk: qcom: ipq5332: drop the gcc_apss_axi_clk_src clock clk: qcom: ipq5332: drop the mem noc clocks clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks ... |
||
|
Stephen Boyd
|
3462100cf3 |
Merge branches 'clk-imx', 'clk-samsung', 'clk-annotate', 'clk-marvell' and 'clk-lmk' into clk-next
- Add __counted_by to struct clk_hw_onecell_data and struct spmi_pmic_div_clk_cc - Remove non-OF mmp clk drivers - Move number of clks from DT headers to drivers * clk-imx: clk: imx: pll14xx: dynamically configure PLL for 393216000/361267200Hz clk: imx: pll14xx: align pdiv with reference manual clk: imx: composite-8m: fix clock pauses when set_rate would be a no-op clk: imx25: make __mx25_clocks_init return void clk: imx25: print silicon revision during init dt-bindings: clocks: imx8mp: make sai4 a dummy clock clk: imx8mp: fix sai4 clock clk: imx: imx8ulp: update SPLL2 type clk: imx: pllv4: Fix SPLL2 MULT range clk: imx: imx8: add audio clock mux driver dt-bindings: clock: fsl,imx8-acm: Add audio clock mux support clk: imx: clk-imx8qxp-lpcg: Convert to devm_platform_ioremap_resource() clk: imx: clk-gpr-mux: Simplify .determine_rate() clk: imx: Add 519.75MHz frequency support for imx9 pll clk: imx93: Add PDM IPG clk dt-bindings: clock: imx93: Add PDM IPG clk * clk-samsung: dt-bindings: clock: samsung: remove define with number of clocks clk: samsung: exynoautov9: do not define number of clocks in bindings clk: samsung: exynos850: do not define number of clocks in bindings clk: samsung: exynos7885: do not define number of clocks in bindings clk: samsung: exynos5433: do not define number of clocks in bindings clk: samsung: exynos5420: do not define number of clocks in bindings clk: samsung: exynos5410: do not define number of clocks in bindings clk: samsung: exynos5260: do not define number of clocks in bindings clk: samsung: exynos5250: do not define number of clocks in bindings clk: samsung: exynos4: do not define number of clocks in bindings clk: samsung: exynos3250: do not define number of clocks in bindings * clk-annotate: clk: qcom: clk-spmi-pmic-div: Annotate struct spmi_pmic_div_clk_cc with __counted_by clk: Annotate struct clk_hw_onecell_data with __counted_by * clk-marvell: clk: pxa910: Move number of clocks to driver source clk: pxa1928: Move number of clocks to driver source clk: pxa168: Move number of clocks to driver source clk: mmp2: Move number of clocks to driver source clk: mmp: Remove old non-OF clock drivers * clk-lmk: clk: lmk04832: Support using PLL1_LD as SPI readback pin clk: lmk04832: Don't disable vco clock on probe fail clk: lmk04832: Set missing parent_names for output clocks |
||
|
Stephen Boyd
|
032bcf783e |
Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and 'clk-rockchip' into clk-next
- Add Versa3 clk generator to support 48KHz playback/record with audio codec on RZ/G2L SMARC EVK - Introduce kstrdup_and_replace() and use it * clk-versa: clk: vc7: Use i2c_get_match_data() instead of device_get_match_data() clk: vc5: Use i2c_get_match_data() instead of device_get_match_data() clk: versaclock3: Switch to use i2c_driver's probe callback clk: Add support for versa3 clock driver dt-bindings: clock: Add Renesas versa3 clock generator bindings * clk-strdup: clk: ti: Replace kstrdup() + strreplace() with kstrdup_and_replace() clk: tegra: Replace kstrdup() + strreplace() with kstrdup_and_replace() driver core: Replace kstrdup() + strreplace() with kstrdup_and_replace() lib/string_helpers: Add kstrdup_and_replace() helper * clk-amlogic: (22 commits) dt-bindings: soc: amlogic: document System Control registers dt-bindings: clock: amlogic: convert amlogic,gxbb-aoclkc.txt to dt-schema dt-bindings: clock: amlogic: convert amlogic,gxbb-clkc.txt to dt-schema clk: meson: axg-audio: move bindings include to main driver clk: meson: meson8b: move bindings include to main driver clk: meson: a1: move bindings include to main driver clk: meson: eeclk: move bindings include to main driver clk: meson: aoclk: move bindings include to main driver dt-bindings: clk: axg-audio-clkc: expose all clock ids dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids dt-bindings: clk: meson8b-clkc: expose all clock ids dt-bindings: clk: g12a-aoclkc: expose all clock ids dt-bindings: clk: g12a-clks: expose all clock ids dt-bindings: clk: axg-clkc: expose all clock ids dt-bindings: clk: gxbb-clkc: expose all clock ids clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS ... * clk-allwinner: clk: sunxi-ng: nkm: Prefer current parent rate clk: sunxi-ng: a64: select closest rate for pll-video0 clk: sunxi-ng: div: Support finding closest rate clk: sunxi-ng: mux: Support finding closest rate clk: sunxi-ng: nkm: Support finding closest rate clk: sunxi-ng: nm: Support finding closest rate clk: sunxi-ng: Add helper function to find closest rate clk: sunxi-ng: Add feature to find closest rate clk: sunxi-ng: a64: allow pll-mipi to set parent's rate clk: sunxi-ng: nkm: consider alternative parent rates when determining rate clk: sunxi-ng: nkm: Use correct parameter name for parent HW clk: sunxi-ng: Modify mismatched function name clk: sunxi: sun9i-mmc: Use devm_platform_get_and_ioremap_resource() * clk-rockchip: clk: rockchip: rv1126: Add PD_VO clock tree clk: rockchip: rk3568: Fix PLL rate setting for 78.75MHz clk: rockchip: rk3568: Add PLL rate for 101MHz |
||
|
Stephen Boyd
|
d10ebc7c64 |
Merge branches 'clk-bindings', 'clk-starfive', 'clk-rm', 'clk-renesas' and 'clk-cleanup' into clk-next
- Remove OXNAS clk driver * clk-bindings: dt-bindings: clock: versal: Convert the xlnx,zynqmp-clk.txt to yaml dt-bindings: clock: xlnx,versal-clk: drop select:false dt-bindings: clock: versal: Add versal-net compatible string dt-bindings: clock: ast2600: Add I3C and MAC reset definitions dt-bindings: arm: hisilicon,cpuctrl: Merge "hisilicon,hix5hd2-clock" into parent binding * clk-starfive: reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support clk: starfive: Simplify .determine_rate() clk: starfive: Add StarFive JH7110 Video-Output clock driver clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver clk: starfive: Add StarFive JH7110 System-Top-Group clock driver clk: starfive: jh7110-sys: Add PLL clocks source from DTS clk: starfive: Add StarFive JH7110 PLL clock driver dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs dt-bindings: soc: starfive: Add StarFive syscon module dt-bindings: clock: Add StarFive JH7110 PLL clock generator * clk-rm: dt-bindings: clk: oxnas: remove obsolete bindings clk: oxnas: remove obsolete clock driver * clk-renesas: clk: renesas: rcar-gen3: Add ADG clocks clk: renesas: r8a77965: Add 3DGE and ZG support clk: renesas: r8a7796: Add 3DGE and ZG support clk: renesas: r8a7795: Add 3DGE and ZG support clk: renesas: emev2: Remove obsolete clkdev registration clk: renesas: r9a07g043: Add MTU3a clock and reset entry clk: renesas: rzg2l: Simplify .determine_rate() clk: renesas: r9a09g011: Add CSI related clocks clk: renesas: r8a774b1: Add 3DGE and ZG support clk: renesas: r8a774e1: Add 3DGE and ZG support clk: renesas: r8a774a1: Add 3DGE and ZG support clk: renesas: rcar-gen3: Add support for ZG clock * clk-cleanup: clk: mvebu: Convert to devm_platform_ioremap_resource() clk: nuvoton: Convert to devm_platform_ioremap_resource() clk: socfpga: agilex: Convert to devm_platform_ioremap_resource() clk: ti: Use devm_platform_get_and_ioremap_resource() clk: mediatek: Convert to devm_platform_ioremap_resource() clk: hsdk-pll: Convert to devm_platform_ioremap_resource() clk: gemini: Convert to devm_platform_ioremap_resource() clk: fsl-sai: Convert to devm_platform_ioremap_resource() clk: bm1880: Convert to devm_platform_ioremap_resource() clk: axm5516: Convert to devm_platform_ioremap_resource() clk: actions: Convert to devm_platform_ioremap_resource() clk: cdce925: Remove redundant of_match_ptr() drivers: clk: keystone: Fix parameter judgment in _of_pll_clk_init() clk: Explicitly include correct DT includes |
||
|
Greg Kroah-Hartman
|
704e2c6107 |
interconnect changes for 6.6
This pull request contains the interconnect changes for the 6.6-rc1 merge window which is a mix of core and driver changes with the following highlights: Core changes: - New generic test client driver that allows issuing bandwidth requests between endpoints via debugfs. - Annotate all structs with flexible array members with the __counted_by attribute. - Introduce new icc_bw_lock for cases where we need to serialize bandwidth aggregation and update to decouple that from paths that require memory allocation. Driver changes: - Move the Qualcomm SMD RPM bus-clocks from CCF to interconnect framework where they actually belong. This brings power management improvements and reduces the overhead and layering. These changes are in immutable branch that is being pulled also into the qcom tree. - Fixes for QUP nodes on SM8250. - Enable sync_state and keepalive for QCM2290. - Enable sync_state for SM8450. - Improve enable_mask-based BCMs handling and fix some bugs. - Add compatible string for the OSM-L3 on SDM670. - Add compatible strings for SC7180, SM8250 and SM6350 bandwidth monitors. - Expand and retire the DEFINE_QNODE and DEFINE_QBCM macros, which have become ugly beasts with many different arguments. Signed-off-by: Georgi Djakov <djakov@kernel.org> -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJk5xuLAAoJEIDQzArG2BZjnN4QALIjeLAhT+sonUbdwoSRmE4M fsE99iZnNXq4+CYOR38NOcpa/ZKA+a6as4a8pqfYw7+8yaV/BqaDJTt1lOPTeGwz 38wdvy9R9H/KoJxad7SDFYDSkMpvMmcTQ33a4fyyyHdnNpgaEYqauncctnywD69U UywOR7YsA+T/0sugCqq1r1CgWK2S+JbUjxEgahnY840lCPMNRHrU+aJ9Uvw8fLcB iqNzEld/HB5lneqNDVWZWugxzX4bpsm2Ib0M1VZtNfh8bjZNaeIsMjAdDnmIKQQo qkRz3kHCrEzSKHsfX1X0umT4EpJ+UiltBGVWDTxodh9Pmw47D0UZGOipj6pwwulO /Jso/T0tJMSy4c05DMOegyothv6vpsillG5ZmzVpun8uiduBxp6KWkfEii+O6AXY EOaWQK/GYKJ9aKyGeOdZPq8aTxfmIOM85Bt/5LwZruUL1d5D4DTXvs5yJFBERDif sS2yK4GGtHLqllRttPC7pjYu6CWrCO5v3yvsezDdZfK/hd0QZMTr7DB4NcDi6ohl Au4HL84wa69MBh1sXm/hxbz3eGIh/XD8eRBheil+eAdkbx7+IoIHg1il49oPCmXH UKFBE2Gki1zFZ+0yGjJC031idaHDeNvGmoXd9+RkjHtCqMmkaofIOD3Pe3zIGrX4 mj6QCcrZe5flt4eqKyTG =MeG9 -----END PGP SIGNATURE----- Merge tag 'icc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: interconnect changes for 6.6 This pull request contains the interconnect changes for the 6.6-rc1 merge window which is a mix of core and driver changes with the following highlights: Core changes: - New generic test client driver that allows issuing bandwidth requests between endpoints via debugfs. - Annotate all structs with flexible array members with the __counted_by attribute. - Introduce new icc_bw_lock for cases where we need to serialize bandwidth aggregation and update to decouple that from paths that require memory allocation. Driver changes: - Move the Qualcomm SMD RPM bus-clocks from CCF to interconnect framework where they actually belong. This brings power management improvements and reduces the overhead and layering. These changes are in immutable branch that is being pulled also into the qcom tree. - Fixes for QUP nodes on SM8250. - Enable sync_state and keepalive for QCM2290. - Enable sync_state for SM8450. - Improve enable_mask-based BCMs handling and fix some bugs. - Add compatible string for the OSM-L3 on SDM670. - Add compatible strings for SC7180, SM8250 and SM6350 bandwidth monitors. - Expand and retire the DEFINE_QNODE and DEFINE_QBCM macros, which have become ugly beasts with many different arguments. Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: (64 commits) interconnect: Add debugfs test client interconnect: Reintroduce icc_get() debugfs: Add write support to debugfs_create_str() interconnect: qcom: icc-rpmh: Retire DEFINE_QBCM interconnect: qcom: sm8350: Retire DEFINE_QBCM interconnect: qcom: sm8250: Retire DEFINE_QBCM interconnect: qcom: sm8150: Retire DEFINE_QBCM interconnect: qcom: sm6350: Retire DEFINE_QBCM interconnect: qcom: sdx65: Retire DEFINE_QBCM interconnect: qcom: sdx55: Retire DEFINE_QBCM interconnect: qcom: sdm845: Retire DEFINE_QBCM interconnect: qcom: sdm670: Retire DEFINE_QBCM interconnect: qcom: sc7180: Retire DEFINE_QBCM interconnect: qcom: icc-rpmh: Retire DEFINE_QNODE interconnect: qcom: sm8350: Retire DEFINE_QNODE interconnect: qcom: sm8250: Retire DEFINE_QNODE interconnect: qcom: sm8150: Retire DEFINE_QNODE interconnect: qcom: sm6350: Retire DEFINE_QNODE interconnect: qcom: sdx65: Retire DEFINE_QNODE interconnect: qcom: sdx55: Retire DEFINE_QNODE ... |
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Krzysztof Kozlowski
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440b075bd2 |
dt-bindings: use capital "OR" for multiple licenses in SPDX
Documentation/process/license-rules.rst and checkpatch expect the SPDX identifier syntax for multiple licenses to use capital "OR". Correct it to keep consistent format and avoid copy-paste issues. Correct also the format // -> .* in few Allwinner binding headers as pointed out by checkpatch: WARNING: Improper SPDX comment style for 'include/dt-bindings/reset/sun50i-h6-ccu.h', please use '/*' instead Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20230823084540.112602-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org> |
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Duje Mihanović
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3b99cd274e |
clk: pxa910: Move number of clocks to driver source
The number of clocks should not be in the dt binding as it is not used by the respective device tree and thus needlessly bloats the ABI. Move this number of clocks into the driver source. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Link: https://lore.kernel.org/r/20230812-mmp-nr-clks-v2-4-f9271bd7eaa5@skole.hr Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Duje Mihanović
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87f06247e0 |
clk: pxa1928: Move number of clocks to driver source
The number of clocks should not be in the dt binding as it is not used by the respective device tree and thus needlessly bloats the ABI. Move this number of clocks into the driver source. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Link: https://lore.kernel.org/r/20230812-mmp-nr-clks-v2-3-f9271bd7eaa5@skole.hr Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Duje Mihanović
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51fa6aa5c2 |
clk: pxa168: Move number of clocks to driver source
The number of clocks should not be in the dt binding as it is not used by the respective device tree and thus needlessly bloats the ABI. Move this number of clocks into the driver source. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Link: https://lore.kernel.org/r/20230812-mmp-nr-clks-v2-2-f9271bd7eaa5@skole.hr Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Duje Mihanović
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46c13513a4 |
clk: mmp2: Move number of clocks to driver source
The number of clocks should not be in the dt binding as it is not used by the respective device tree and thus needlessly bloats the ABI. Move this number of clocks into the driver source. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Link: https://lore.kernel.org/r/20230812-mmp-nr-clks-v2-1-f9271bd7eaa5@skole.hr Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Arnd Bergmann
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c708140e96 |
SoCFPGA DTS updates for v6.6
- Fix dtbs_check warnings for usbphy, sram, rstmgr, memory, partitions - Updated "stmmaceth-ocp" reset-names to "ahb" for stmmac ethernet - Add initial support for Agilex5 -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAmTg5+8ACgkQGZQEC4Gj KPRA7Q/8C6ugL9LlR5JEUruaAugaRnYL2BgotdwhMuCbU7d3oj+pFBzHR8PR/MCI CZXnLehpmwOkGz0K0QLey6nQuGZS18DK19DxJkL46hr69Rqpu8XHb2yPjiBtbh/o 0ZwpxuRTKz1QbP9hprw/RIHSbZ/AWaI2O/90xicC0p1qWXmxSz0Kv6YOoQ61o/yO On91yS3R+75o1NoHD+FoKiPuwwTfaHc7TrS/UIshPKAuk6yo/Cd3Is5EdYL+5xEz kXDRkt2X3g7il/Jm9AOFJvA4Q1VLD9Ke4C9o9ePvj167GklaLnJ9JT8Qw7PGXaoE wolse2+bJA4a9acPbkYmYSSyyKtZnIgV5oTXFgeWQ0eo0qmoTNqgx6eMIOyRltxs 3OTTvNyw9+ZOhW4YRv/lJWwDL3uMlKsMV/2JOSPua5V4kXrPi/A+HhIZGDll1Naf y+HYNoJiSrDAiNYwWglz4f4LR+xU3wc3cS4uLrAU+aCE+NHYAj/Jqn8/EC26NDbQ wVsPfQMQN9j0wCrMzZZf4LUEYM6C90ZeqUFqwB6mqctfAbT/fQyLdyKL8Gu/QrG0 lhp2J4vb2UJ9eQ1zBoBtb6flcQegHP/ybmRM4Q5ep3LvVOHhilZT5mO8mj36q84g 3Co2RqQ8oknTgmxTF93jguAW+JPtmfvwA66x+CetC0fSmSWN2HI= =OfJk -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkFA0ACgkQYKtH/8kJ UiejLBAAnafzyrMqZnO6nc6hvK/7ONSN2QZqaYoZ0Ho6fSvz5KxqVqPjUq4EshEZ HB9kZ42YvJQZYyi8Pvd/7BIQe3WvwLZ6tW4NALoiMsfpL127wzfwJlDj5yOiltLu aZtwhRvRV7jHKlh06wh8eax3vd4P3ozR5DUufcCJp59xI8MTS2UYI6enrIoA2h06 uC0xWhuEvseHdzYQbC2hAZlZA1Z/7BBYCJO5iKq5cdW0zHpy0h7h2k3ba2M2BsZM JtaIIyrjjF70nmydNY9UfHt0iU3u5InbZ7GdJEc9kkGsbB4fLiSUdn8ScPXShXaY W4qhsLQ9DhyDlkb+xmzkt2FRH9gh98xe2Ej4CmZM/4X3Xc/g+kquGZ4kHllNHJK5 AWodtDcrio3V7eCmiGerSBdvChr6pB31qVpuaCaiuCr+OpPZGdj/Z2c0qjCDo9h6 Pn8sH8jVgye3AQ30NmSrpJz12tN/H86BeiW59eFeJ3jRXi8qx7oMyyuLVNDzo+sF 6EkydHcSNrl0HF2gKQRSFMLvYfaYUZFBA/iSycrn24UjKc86DWd3aGbcofQSbJOV WeZAODlghXX9/R6yVKf4Vt/O6m3Lb2xreCilkIKJD5wpdQAu8hz7NXJAMtNJY1ed MKASPnHm1jP6Is/6acr5pDYFpbG3HOsyOxpzNQYRVHEFElMxQSk= =mFST -----END PGP SIGNATURE----- Merge tag 'socfpga_dts_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt SoCFPGA DTS updates for v6.6 - Fix dtbs_check warnings for usbphy, sram, rstmgr, memory, partitions - Updated "stmmaceth-ocp" reset-names to "ahb" for stmmac ethernet - Add initial support for Agilex5 * tag 'socfpga_dts_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA dt-bindings: clock: add Intel Agilex5 clock manager dt-bindings: reset: add reset IDs for Agilex5 dt-bindings: intel: Add Intel Agilex5 compatible arm64: dts: socfpga: change the reset-name of "stmmaceth-ocp" to "ahb" arm64: dts: socfpga: n5x/stratix10: fix dtbs_check warning for partitions arm64: dts: agilex/stratix10: Updated QSPI Flash layout for UBIFS arm64: dts: agilex/stratix10/n5x: fix dtbs_check for rstmgr arm64: dts: stratix10/agilex/n5x: fix dtbs_check warning for memory node arm64: dts: socfpga: stratix10: fix dtbs_check warning for usbphy arm64: dts: socfpga: agilex/stratix10: fix dtbs_check warnings for sram Link: https://lore.kernel.org/r/20230819161418.931258-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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6522fbd48a |
Qualcomm ARM64 DeviceTree updates for v6.6
Initial support for the SM4450 platform and the QRD device thereon is added. The IPQ5018 platform is introduced, and the RDP432-C2 board thereon. A shared definition of the IPQ5332 RDP is introduced, as is GPIO-based LEDs and buttons. On the IPQ9574 RDP433 USB, CPU cooling maps and regulators are added. On MSM8916, the D3 camera mezzanine is improved and refactored out to its own dts. The Samsung Galaxy S4 Mini gains support for its PMIC with charger, while Samsung Galaxy J5 and E5 gains touchscreen support. A few fixes for MSM8939 are introduced, and initial support for Samsung Galaxy A7 is add. Support for scaling the cache bus fabric is introduced on MSM8996. A missing interrupt for the USB2 controller is added. The touchscreen vio supply on Xiaomi Mi 5 is corrected, and a few other cleanups are introduces across other devices. The display controller is introduced for MSM8998, a few clock fixes are introduced and missing power domains are added for the multimedia subsystem iommu. Reserved memory-regions and reserved GPIO lists are updated for the QDU/QRU1000 IDPs. USB3 PHY is added to the QCM2290, the RB1 gains regulators and GPU is enabled for the RB2. PCIe and Ethernet support is introduced on SA8775P, and enabled for the Ride board. On SC7180 the PSCI integration is refactored, to allow supporting devices with the Qualcomm firmware. BWMON is introduced, alongside the CPUfreq-based bus voting. A number of fixes are added for SC8180X, on the Primus and Lenovo Flex 5G devices pmic_glink is introduced and wired up, to provide support for external display. Missing SCM interconnect is added to SC8280XP, and the PDC is marked as wakeup-parent of TLMM. On the CRD the gpio for vreg_misc_3p3 is corrected and a few regulators are renamed to align with schematics. The Lenovo Thinkpad X13s gains camera activity LED and a set of previously reserved GPIOs are released. The SA8540P Ride platform gains RTC support. For SDM670 CPU and L3 frequency scaling is added, the PDC is introduced and wired up as wakeup-parent of the TLMM. On SDM845 the UFS controller gains interconnect path description, power-domain information is added to GCC and minimum frequency of the UFS ICE is corrected. On RB3 continuous splash memory region is described, and the camera subsystem is enabled. On the Lenovo Yoga C630 a missing power supply for the display panel is added, and the debug UART is introduced. SDX75 RPMh power-domains and SPMI controller are introduces, the PMX75 PMIC is described and added to the IDP. GPU description is added to SM6115, and together with display enabled on the Lenovo Tab P11. On SM635 BWMON is introduced for LLCC and DDR scaling. Display and GPU is added, and the PDC is registered as wakeup-parent of TLMM. L3 cache scaling is introduced on SM6375. The DSI PHY compatible and an interrupt for I2C7 are corrected for SM8150, on the Sony Xperia 1 and 5 the ramoops pmsg size is corrected. On SM8250 BWMONs are introduced for DDR and LLCC scaling, the UFS node gains interconnect paths, SMMU is marked as DMA coherent and dynamic power coefficients are updated. On Sony Xperia 1 II and 5 II GPIO line names are updated. On SM8350 missing cluster sleep states and LMH interrupts are added, the CPU compatibles are corrected and APR and LPASS pinctrl support is introduced. The HDK gains uSD card support and PMK8350 is added. For SM8450 support for RNG and RPMh stats are added, the ICE handling is extracted from the UFS node and the display subsystem gains a missing interconnect path. Thermal description is improved for the HDK. On SM8550 MTP and QRD the pmic_glink is introduced, to provide DisplayPort output. A missing regulator supply is also added. A few platforms that happens to share the RPMH power-domain resource identifier constants are migrated to new generic defines. ADC channel names are generalized on various PMICs. A variety of devices gain chassis-type, and the GIC_SPI constant is replacing the 0 across a few different platforms. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmTgOtYVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fr20P/jDKWelSMYqeVFfa49XGXyvRwWmf TaSb8IlD9cqQ3ScFYwmJGf2gVqt7zBfGU2EoxkMbpFeGjyZZYpw86Y3fvU1A5oxy TQ++kBQAvuSGEUqdGE7Xv6lIUmKPyVmcayRpI6IgGI5iaU1y5bI6xmh3bjhL//NQ mcsH11SLPPvDyZ608Etvw1rNtPImSI8nOucaBSlmnkxT1NuzIjPhNG+rNwgBSBHU O8sKi80hYrVw78sR3sXH+cBCCMhkFg377maCo9ZE14TFdAT3Ggn2uXX01PXCvn1z cO/wFAZ5vOe4KU1+maWkvOsEOCqjghdFUoVK7e9xtMpeuhoXjAuFf1L26d02mOK3 I48/apsj8ak/kmC89eo1RrOWniytI+YGPZwd5wYIOh0Q2oS8+IpC0nZhm9V86IIU DoWxbdf0TZ++e3D232AftFqKutbL9utJanq9l34zmI50F7QK4BSbBRKT81pRTrml y4tR7bukrGYKVRq3Kpf5vyWwPEpYIfZ7o9k6J56IcaLoaMvctW/vcnf8R0Qr5gJb 3vHUEBsozERKd2NcFw9g1Ay86DbAxC+3wyfHHMWgolA7fYCNVSXN6R6hKXb6d503 6ORnP4U6NjxpibIXC3jj+zmvbUM/GhSgrw3yErPb83n9P9pJ5Aw2+6J+Xmt75U5z 9hyHUWkbhyNQqBVA =uK0C -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkEYEACgkQYKtH/8kJ Uie31xAAvhedx3cixHT570K/qxw8tTM06btXNhEek+/oMiW5eCcGKCRW5ixcpPog 9sLGI4xt5aMVdJshIYWovCDpCQWCoSYiqFx9N2/2zF+DrXYjeKNCpU6oVcPh1MG7 Xm5Fy2s99BipT6z6ha5kqeirdgjH+po8Jtkw54AfROzJa2oTD6GBvsPtxxW3CYgJ lDoHTvU59gwl1Dk60FIkc2slyA57VqqRuVLAmurgO2nGOFU9FODb/lNuMIh8AeKt +scXrEVozQPDeefSCbKTqROBvIuYyMbXmFHLW+VmM9EgXnOcV2IEVOSZCiMYi9Ic RWpfOHVAn9xM/zFhHh23onJPUrISwcJv05A1PU92WFNWh7uoly67KD712gPStwmd /rKI25DPk3Z7nc7LwzO5VqovOpU9Q0t+/NDOLiRn1A8/hljqVMhq8eTo9AY9sBJN EW5AZw1KUzrXH+9RQsNKDAJckpfgDaI8sB+ueXOZMHHhhKaugMILp/PgpN6isQZu G7ZkJadpQBliJ3pvsHpK6JlXcJoB4TafIx7pJPDCHbAFOnMhCmEUPW7TX36n0uQ3 4d/ghMENBmDWkmZGlFLtl7SfKNmuT/HQhcG75QZxqPiw/uhRGepNaswqtkpMMeFD Vl+spE5wosXSG8Ra2W/UJfNfEKYL1TKevPwJXZWmT9WUehMSG+U= =zUL1 -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 DeviceTree updates for v6.6 Initial support for the SM4450 platform and the QRD device thereon is added. The IPQ5018 platform is introduced, and the RDP432-C2 board thereon. A shared definition of the IPQ5332 RDP is introduced, as is GPIO-based LEDs and buttons. On the IPQ9574 RDP433 USB, CPU cooling maps and regulators are added. On MSM8916, the D3 camera mezzanine is improved and refactored out to its own dts. The Samsung Galaxy S4 Mini gains support for its PMIC with charger, while Samsung Galaxy J5 and E5 gains touchscreen support. A few fixes for MSM8939 are introduced, and initial support for Samsung Galaxy A7 is add. Support for scaling the cache bus fabric is introduced on MSM8996. A missing interrupt for the USB2 controller is added. The touchscreen vio supply on Xiaomi Mi 5 is corrected, and a few other cleanups are introduces across other devices. The display controller is introduced for MSM8998, a few clock fixes are introduced and missing power domains are added for the multimedia subsystem iommu. Reserved memory-regions and reserved GPIO lists are updated for the QDU/QRU1000 IDPs. USB3 PHY is added to the QCM2290, the RB1 gains regulators and GPU is enabled for the RB2. PCIe and Ethernet support is introduced on SA8775P, and enabled for the Ride board. On SC7180 the PSCI integration is refactored, to allow supporting devices with the Qualcomm firmware. BWMON is introduced, alongside the CPUfreq-based bus voting. A number of fixes are added for SC8180X, on the Primus and Lenovo Flex 5G devices pmic_glink is introduced and wired up, to provide support for external display. Missing SCM interconnect is added to SC8280XP, and the PDC is marked as wakeup-parent of TLMM. On the CRD the gpio for vreg_misc_3p3 is corrected and a few regulators are renamed to align with schematics. The Lenovo Thinkpad X13s gains camera activity LED and a set of previously reserved GPIOs are released. The SA8540P Ride platform gains RTC support. For SDM670 CPU and L3 frequency scaling is added, the PDC is introduced and wired up as wakeup-parent of the TLMM. On SDM845 the UFS controller gains interconnect path description, power-domain information is added to GCC and minimum frequency of the UFS ICE is corrected. On RB3 continuous splash memory region is described, and the camera subsystem is enabled. On the Lenovo Yoga C630 a missing power supply for the display panel is added, and the debug UART is introduced. SDX75 RPMh power-domains and SPMI controller are introduces, the PMX75 PMIC is described and added to the IDP. GPU description is added to SM6115, and together with display enabled on the Lenovo Tab P11. On SM635 BWMON is introduced for LLCC and DDR scaling. Display and GPU is added, and the PDC is registered as wakeup-parent of TLMM. L3 cache scaling is introduced on SM6375. The DSI PHY compatible and an interrupt for I2C7 are corrected for SM8150, on the Sony Xperia 1 and 5 the ramoops pmsg size is corrected. On SM8250 BWMONs are introduced for DDR and LLCC scaling, the UFS node gains interconnect paths, SMMU is marked as DMA coherent and dynamic power coefficients are updated. On Sony Xperia 1 II and 5 II GPIO line names are updated. On SM8350 missing cluster sleep states and LMH interrupts are added, the CPU compatibles are corrected and APR and LPASS pinctrl support is introduced. The HDK gains uSD card support and PMK8350 is added. For SM8450 support for RNG and RPMh stats are added, the ICE handling is extracted from the UFS node and the display subsystem gains a missing interconnect path. Thermal description is improved for the HDK. On SM8550 MTP and QRD the pmic_glink is introduced, to provide DisplayPort output. A missing regulator supply is also added. A few platforms that happens to share the RPMH power-domain resource identifier constants are migrated to new generic defines. ADC channel names are generalized on various PMICs. A variety of devices gain chassis-type, and the GIC_SPI constant is replacing the 0 across a few different platforms. * tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (215 commits) arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Add PDC arm64: dts: qcom: msm8916-samsung-e5: Add touchscreen arm64: dts: qcom: sc7180: Split up TF-A related PSCI configuration arm64: dts: qcom: sc8280xp-x13s: Add camera activity LED arm64: dts: qcom: sc8280xp-x13s: Unreserve NC pins arm64: dts: qcom: msm8998: Add DPU1 nodes arm64: dts: qcom: msm8996: Fix dsi1 interrupts arm64: dts: qcom: sdx75-idp: Add regulator nodes arm64: dts: qcom: sdx75: Add rpmhpd node arm64: dts: qcom: sdx75-idp: Add pmics supported in SDX75 arm64: dts: qcom: Add pmx75 PMIC dtsi arm64: dts: qcom: Add pm7550ba PMIC dtsi arm64: dts: qcom: Add pinctrl gpio support for pm7250b arm64: dts: qcom: sdx75: Add spmi node arm64: dts: qcom: msm8998: Add missing power domain to MMSS SMMU ... Link: https://lore.kernel.org/r/20230819034551.2537866-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
aa2951a8fa |
STM32 DT for v6.6, round 1
Highlights:
----------
- MCU:
- Add CAN support on stm32f746.
- Add touchscreen support (edt-ft5306) on stm32f746-disco.
- Add support to Rocktech RK043FN48H display on stm32f746-disco
board.
- Add gpio-ranges for stm32f7 to fix boot issue.
- MPU:
- STM32MP13:
- Remove shmem for scmi-optee to match with OP-TEE configuration.
- Enable OP-TEE asynchronous notification by using PPI#15.
- Expose and use SCMI regulators on stm32mp135f-dk.
- STMP32MP15:
- Remove shmem for scmi-optee to match with OPTEE configuration
- Deduplicate DSI node to fix #address-cells/#size-cells issue on
boards using it.
- ST:
- Fix dts check warnings on stm32mp15-scmi boards.
- DH:
- Add missing detach mailbox for DHCOM and DHCOR SoM.
- Odyssey:
- Add missing detach mailbox for Odyssey SoM.
- OCTAVO:
- Add Linux Automation Test Automation Controller (LXA TAC) based
on Octavo Systems OSD32MP15x SiP. It contains: eMMC,
DSA-capable ETH switch (2 ports), dual CAN...
It adds two boards support: lxa-tac-gen1 and lxa-tac-gen2 based
on STM32MP157.
- PROTONIC:
- Add Power over Data Line (PoDL) Power Source Equipment (PSE)
regulator nodes on PRTT1C board. It allows power delivery and
data transmission over a single twisted pair.
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Merge tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.6, round 1
Highlights:
----------
- MCU:
- Add CAN support on stm32f746.
- Add touchscreen support (edt-ft5306) on stm32f746-disco.
- Add support to Rocktech RK043FN48H display on stm32f746-disco
board.
- Add gpio-ranges for stm32f7 to fix boot issue.
- MPU:
- STM32MP13:
- Remove shmem for scmi-optee to match with OP-TEE configuration.
- Enable OP-TEE asynchronous notification by using PPI#15.
- Expose and use SCMI regulators on stm32mp135f-dk.
- STMP32MP15:
- Remove shmem for scmi-optee to match with OPTEE configuration
- Deduplicate DSI node to fix #address-cells/#size-cells issue on
boards using it.
- ST:
- Fix dts check warnings on stm32mp15-scmi boards.
- DH:
- Add missing detach mailbox for DHCOM and DHCOR SoM.
- Odyssey:
- Add missing detach mailbox for Odyssey SoM.
- OCTAVO:
- Add Linux Automation Test Automation Controller (LXA TAC) based
on Octavo Systems OSD32MP15x SiP. It contains: eMMC,
DSA-capable ETH switch (2 ports), dual CAN...
It adds two boards support: lxa-tac-gen1 and lxa-tac-gen2 based
on STM32MP157.
- PROTONIC:
- Add Power over Data Line (PoDL) Power Source Equipment (PSE)
regulator nodes on PRTT1C board. It allows power delivery and
data transmission over a single twisted pair.
* tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (29 commits)
ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board
ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators
dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
ARM: dts: stm32: support display on stm32f746-disco board
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
ARM: dts: stm32: add pin map for LTDC on stm32f7
ARM: dts: stm32: add ltdc support on stm32f746 MCU
ARM: dts: st: Add gpio-ranges for stm32f769-pinctrl
ARM: dts: st: Add gpio-ranges for stm32f746-pinctrl
ARM: dts: st: stm32mp157c-emstamp: correct regulator-active-discharge
ARM: dts: st: stm32mp157c-emstamp: drop incorrect vref_ddr property
ARM: dts: stm32: fix dts check warnings on stm32mp15-scmi
ARM: dts: stm32: Add missing detach mailbox for DHCOR SoM
ARM: dts: stm32: Add missing detach mailbox for DHCOM SoM
ARM: dts: stm32: Add missing detach mailbox for Odyssey SoM
ARM: dts: stm32: Add missing detach mailbox for emtrion emSBC-Argon
ARM: dts: stm32: prtt1c: Add PoDL PSE regulator nodes
ARM: dts: stm32: add touchscreen on stm32f746-disco board
ARM: dts: stm32: add pin map for i2c3 controller on stm32f7
ARM: dts: stm32: re-add CAN support on stm32f746
...
Link: https://lore.kernel.org/r/c0524a16-ab27-0cb5-8e7b-c12f7bde7e0d@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Arnd Bergmann
|
9eb33ddedd |
Qualcomm driver updates for v6.6
Compatible and clock handling in the Qualcomm SCM driver is cleaned up, together with a couple stylistic cleanups and transition to mark exported symbols GPL only. An abstraction for the RPM subsystem is introduced, to make align the structure of the SMD and GLINK nodes thereof with the structure when a remoteproc is involved. This is done to facilitate associating additional entities with the RPM subsystem. The qmp_send() API is modified to not expose hardware requirements onto the client drivers, and then further extended to allow command formatting directly in the API, to facilitate this typical use case. In the Qualcomm Command DB driver, NUL characters previously included in identifiers are dropped from the debugfs, to facilitate scripting. The thresholds of the BWMON driver are simplified to avoid hard coded starting values. The OCMEM driver is updated with some cleanups and fixes, and addition of MSM8226 support. PMIC_GLINK gains support for retimer switches, safe mode is selected when the cable is disconnected from altmode and the same is enabled for SM8550. An off-by-one string length check is corrected in the QMI encoder decoder library. The RPMh tracepoints are extended to include the state of the request, to provide needed context in the traced events. The series from Ulf creating a genpd framework is integrated, to facilitate the other changes to the cpr, rpmpd and rpmhpd driver. SDX75 support is added to the rpmhpd driver, and the rpmpd driver is extended with the same sync_state logic found in the rpmhpd driver. The socinfo driver gains knowledge about SM4450 and SM7125, the IPQ5019 platform is dropped. Clock handling in the GSBI driver is cleaned up with the use of devm_clk_get_enabled(). The list of VMIDs defined for the SCM assign memory interface is extended. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmTe2FIVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FPaYP/0j7dGziE/KQaTccT/arpgiU6wH/ fzu7j76r/JY90Jw61vxWsTfuR94Irr8/NzzvLXMO1cKfzJXxsPKqYuuWBe/hFu3u Bva/4XtHspitKQCvBYOhX2dxj3BtYzsrVNmh3sOeEKhXcUaVuCQXkpeE3fqNBwYB li70t/dHVPPr2mDY30QhD9nn8XgWG8DlSzyuvIp+zI8kpNX04Cdqg2BEidB8GO4f ZgcAtnCIssIojBhRwVO7ei8RnGu6i2+69Vwtrx8nNT85Wcyx7NLxjZfp7+5PrZnv Xyu/JO4yYZooEVMAOtXJcxbZRs3FmGovg5RnR5w1CIz87Kmw5Wq0g9wZHMuLxC/G u4SzwjCqwEhAVWSzsVmicLOs4y2Ndwju3ojX3kLPh02yw5xo6BpxXdZIptTvVIQn DicTCaHU3QxxqkH7elLxNxyRYvmJbDbwKJ/hZjSRWSsJUhI4fvWoyrL6wNZ9+rTW 1zCkfEH3XikjMGHweeZc+VYu03XyohIYYn+jxpdwOjajF+3BsQSiqN1tKwj71ci/ Nk6sn+TRsq/jY6x33ULfbQCjeQ3BOGEngHTQ8N1i5D1vM2BUY/jrH6Dt1tIUdRjh avR2KvZzzPs7Cp/094aQDX42GcQKeVOit6pF+NhE0c2uVqQCB5c6ynZwcvt0YNS9 Ty0mqIn99wgbHxVw =SEyF -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkC1sACgkQYKtH/8kJ UifjiBAAnIlToZQERPaKlX1zQTYVfrMiyNQ8fyUGLnAj0bNFWFzYgS6p5NXerxdT /sk2tipNqJyym3h797r2aAjAXpyTnKYIwZqGjvWGBbhaViv6ovuDYkJUBk0ffybB a0Ve4M1JnVZATiwqeoZwi6/1/M2JC3+20O+LRL4lWzZAm61NsU4ULAcX4sHeUYYA 02wMfzkME0Ye7sthv9GBtbm8Szr+GEuDvUTXx0DI74QrZuj6+wl3rjZ2uRrT97ZX DuPtmhl2ZVjCigCsfxdj2J8eq8dpkROAzAeGa9d/NctkCV+dHhSEWZ0LraauLCJk iXA2ZXOACHWF4tn8TC/eDx0Pv6CS+gRVjyYYLNkWreDSPfk7Vqaua3iNc7AfhIJV hfJV1QhDmRt+pXi8pJQSSbTtjfzaURzD78N7JLMRZdZPozRwD/kl1+m/r5OMT4C+ NI4cLB544Zb34WEUgjZYNUjk18vkZmEQnvWwAGIzOQgHq5m/m6o2QQOnTgiTwaXh Neh8k+KKt85IwkjFarwmKsLhajHezHIEqgHrGdfiIFr9+hAMPBIgUP3/eo6PFDNk XP+IVMeucEtn7Og6d6rQmJ0kPvL32ucdXWdqOwLijoDablFwX1Giif77LjN5LRYj IxReK7C8CwZKqLf2k0pv8dLE4g8On6OThveedXbLNuMx+EgcB2w= =RpyB -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.6 Compatible and clock handling in the Qualcomm SCM driver is cleaned up, together with a couple stylistic cleanups and transition to mark exported symbols GPL only. An abstraction for the RPM subsystem is introduced, to make align the structure of the SMD and GLINK nodes thereof with the structure when a remoteproc is involved. This is done to facilitate associating additional entities with the RPM subsystem. The qmp_send() API is modified to not expose hardware requirements onto the client drivers, and then further extended to allow command formatting directly in the API, to facilitate this typical use case. In the Qualcomm Command DB driver, NUL characters previously included in identifiers are dropped from the debugfs, to facilitate scripting. The thresholds of the BWMON driver are simplified to avoid hard coded starting values. The OCMEM driver is updated with some cleanups and fixes, and addition of MSM8226 support. PMIC_GLINK gains support for retimer switches, safe mode is selected when the cable is disconnected from altmode and the same is enabled for SM8550. An off-by-one string length check is corrected in the QMI encoder decoder library. The RPMh tracepoints are extended to include the state of the request, to provide needed context in the traced events. The series from Ulf creating a genpd framework is integrated, to facilitate the other changes to the cpr, rpmpd and rpmhpd driver. SDX75 support is added to the rpmhpd driver, and the rpmpd driver is extended with the same sync_state logic found in the rpmhpd driver. The socinfo driver gains knowledge about SM4450 and SM7125, the IPQ5019 platform is dropped. Clock handling in the GSBI driver is cleaned up with the use of devm_clk_get_enabled(). The list of VMIDs defined for the SCM assign memory interface is extended. * tag 'qcom-drivers-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (52 commits) soc: qcom: aoss: Tidy up qmp_send() callers soc: qcom: aoss: Format string in qmp_send() soc: qcom: aoss: Move length requirements from caller dt-bindings: firmware: qcom: scm: Updating VMID list dt-bindings: qcom: Update RPMHPD entries for some SoCs soc: qcom: qmi_encdec: Restrict string length in decode soc: qcom: smem: Fix incompatible types in comparison soc: qcom: ocmem: add missing clk_disable_unprepare() in ocmem_dev_probe() soc: qcom: socinfo: Add SoC ID for SM7125 dt-bindings: arm: qcom,ids: Add SoC ID for SM7125 dt-bindings: arm: qcom,ids: drop the IPQ5019 SoC ID soc: qcom: socinfo: drop the IPQ5019 SoC ID soc: qcom: socinfo: add SM4450 ID dt-bindings: arm: qcom,ids: add SoC ID for SM4450 soc: qcom: pmic_glink: enable altmode for SM8550 soc: qcom: pmic_glink_altmode: add retimer-switch support soc: qcom: pmic_glink_altmode: handle safe mode when disconnect soc: qcom: rpmhpd: Add SDX75 power domains dt-bindings: power: qcom,rpmpd: Add compatible for sdx75 genpd: Makefile: build imx ... Link: https://lore.kernel.org/r/20230818023338.2484467-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Etienne Carriere
|
fe95052fc7 |
dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
Adds SCMI regulator identifiers for STM32MP13x family. Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
||
|
Robert Marko
|
268edfe96a |
dt-bindings: clock: qcom: ipq4019: add missing networking resets
Add bindings for the missing networking resets found in IPQ4019 GCC. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230814104119.96858-1-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Krzysztof Kozlowski
|
b3f9581aff |
dt-bindings: clock: samsung: remove define with number of clocks
Number of clocks supported by Linux drivers might vary - sometimes we add new clocks, not exposed previously. Therefore these numbers of clocks should not be in the bindings, as that prevents changing them. Remove it entirely from the bindings, once Linux drivers stopped using them. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20230808082738.122804-12-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
||
|
Arnd Bergmann
|
99355a235a |
TI K3 device tree updates for v6.6
New Boards:
- TQ group's TQMaX4XxL AM64 SOM and MBaX4XxL carrier board
- TI's AM62P5 Starter Kit (SK)
New features:
AM625:
- Support for Display (parallel only) - hdmi+audio support for
AM625-SK/BeaglePlay, TC358778 DPI to MIPI-DSI bridge support
for verdin.
- MCU MCAN support and enable of Toradex Verdin
- Toradex Verdin Dahlia audio support
AM62A7:
- MCU MCAN support
- Enable USB Dual Role Device(DRD) support for AM62A7
Starter Kit(SK).
AM64:
- TQ group's tqma64xxl: Overlays for SD-card and wlan.
J721E:
- Main domain CPSW9G and correponding gateway/ethernet
switch expansion - GESI board.
J721S2/AM68:
- New CAN instances, ehrpwm, Display (DSS) and am68-sk HDMI support
- Main domain CPSW2G and correponding gateway/ethernet
switch expansion - GESI board.
J784S4/AM69:
- Boot phase tag marking in device tree
- UFS support
Cleanups and non-urgent fixes:
- Cosmetic style fixups around "=" and "{" whitespace usage.
- Fixups across multiple SoCs/boards for pwm-tbclk to matchup with
bindings
- Serdes header file include/dt-bindings/mux/ti-serdes.h is now
deprecated, use k3-serdes.h in soc dtsi folder.
- All SoCs: Enable GPIO/SDHCI/OSPI/TSADC/C6/C7 DSP nodes at the
board level.
- Fixups for AM62: Crypto powerdomains are conditional to better
represent control of the crypto engines by security controller.
- Fixups for j721e: Duplicate wakeup_i2c node dropped for SoM board.
- Fixups for j721s2/am68: pimux offsets for OSPI.
- Fixups for j784s4/am69: Fixups for pinmux for ospi/adc interrupt
ranges for wkup/main gpios
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Merge tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.6
New Boards:
- TQ group's TQMaX4XxL AM64 SOM and MBaX4XxL carrier board
- TI's AM62P5 Starter Kit (SK)
New features:
AM625:
- Support for Display (parallel only) - hdmi+audio support for
AM625-SK/BeaglePlay, TC358778 DPI to MIPI-DSI bridge support
for verdin.
- MCU MCAN support and enable of Toradex Verdin
- Toradex Verdin Dahlia audio support
AM62A7:
- MCU MCAN support
- Enable USB Dual Role Device(DRD) support for AM62A7
Starter Kit(SK).
AM64:
- TQ group's tqma64xxl: Overlays for SD-card and wlan.
J721E:
- Main domain CPSW9G and correponding gateway/ethernet
switch expansion - GESI board.
J721S2/AM68:
- New CAN instances, ehrpwm, Display (DSS) and am68-sk HDMI support
- Main domain CPSW2G and correponding gateway/ethernet
switch expansion - GESI board.
J784S4/AM69:
- Boot phase tag marking in device tree
- UFS support
Cleanups and non-urgent fixes:
- Cosmetic style fixups around "=" and "{" whitespace usage.
- Fixups across multiple SoCs/boards for pwm-tbclk to matchup with
bindings
- Serdes header file include/dt-bindings/mux/ti-serdes.h is now
deprecated, use k3-serdes.h in soc dtsi folder.
- All SoCs: Enable GPIO/SDHCI/OSPI/TSADC/C6/C7 DSP nodes at the
board level.
- Fixups for AM62: Crypto powerdomains are conditional to better
represent control of the crypto engines by security controller.
- Fixups for j721e: Duplicate wakeup_i2c node dropped for SoM board.
- Fixups for j721s2/am68: pimux offsets for OSPI.
- Fixups for j784s4/am69: Fixups for pinmux for ospi/adc interrupt
ranges for wkup/main gpios
* tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (68 commits)
arm64: dts: ti: verdin-am62: Add DSI display support
arm64: dts: ti: Add support for the AM62P5 Starter Kit
arm64: dts: ti: Introduce AM62P5 family of SoCs
dt-bindings: arm: ti: Add bindings for AM62P5 SoCs
arm64: dts: ti: k3-am69-sk: Add phase tags marking
arm64: dts: ti: k3-j784s4-evm: Add phase tags marking
arm64: dts: ti: k3-j784s4: Add phase tags marking
arm64: dts: ti: k3-am625-beagleplay: Add HDMI support
arm64: dts: ti: am62x-sk: Add overlay for HDMI audio
arm64: dts: ti: k3-am62x-sk-common: Add HDMI support
arm64: dts: ti: k3-am62-main: Add node for DSS
arm64: dts: ti: k3-am62x-sk-common: Update main-i2c1 frequency
arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level
arm64: dts: ti: k3-j784s4: Enable C7x DSP nodes at the board level
arm64: dts: ti: k3-j721e: Enable C7x DSP nodes at the board level
arm64: dts: ti: k3-*: fix fss node dtbs check warnings
arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level
arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level
arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level
arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level
...
Link: https://lore.kernel.org/r/20230814160651.frxohyshd2evp2k4@expenses
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
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Marco Felsch
|
35ec2abb54 |
dt-bindings: clocks: imx8mp: make sai4 a dummy clock
The hardware don't have a SAI4 instance so remove the define. Use a
comment to keep it as reference and to avoid confusion.
Fixes:
|
||
|
Shengjiu Wang
|
a70cd8cdf7 |
dt-bindings: clock: fsl,imx8-acm: Add audio clock mux support
Add the clock dt-binding file for Audio Clock Mux. which is the IP for i.MX8QM, i.MX8QXP, i.MX8DXL. Add the clockid for clocks in header file. The Audio Clock Mux is binded with all the audio IP and audio clocks in the subsystem, so need to list the power domain of related clocks and IPs. Each clock and IP has a power domain, so there are so many power domains. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/1690260984-25744-2-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org> |
||
|
Otto Pflüger
|
593576a369 |
dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
Add the missing #define for GPLL0_SLEEP_CLK_SRC, the parent clock of GPLL0_EARLY. Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230802170317.205112-2-otto.pflueger@abscue.de Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Imran Shaik
|
df873243b2 |
dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
Add support for GCC_GPLL1_OUT_EVEN and GCC_DDRSS_ECPRI_GSI_CLK clock bindings for QDU1000 and QRU1000 SoCs. While at it, update the maintainers list. Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230803105741.2292309-2-quic_imrashai@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Bjorn Andersson
|
9328ecb29d |
Merge branch '20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org' into arm64-for-6.6
Merge additional MSM8998 GCC DeviceTree binding constants for use in the MSM8998 DeviceTree source. |
||
|
Bjorn Andersson
|
9d1f3f343b |
Merge branch '20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org' into clk-for-6.6
Merge additional MSM8998 GCC DeviceTree binding constants through a topic branch to make them available to the DeviceTree source tree as well. |
||
|
Konrad Dybcio
|
238e192bed |
dt-bindings: clk: qcom,gcc-msm8998: Add missing GPU/MMSS GPLL0 legs
GPLL0 has two separate outputs to both GPUSS and MMSS: one that's 2-divided and one that runs at the same rate as the GPLL0 itself. Add the missing ones to the binding. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Gokul krishna Krishnakumar
|
f9eac7e029 |
dt-bindings: firmware: qcom: scm: Updating VMID list
Adding the full list of VMID's, which are used by different clients to pass to the secure world. Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230403204455.6758-1-quic_gokukris@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Bjorn Andersson
|
c02a547da3 |
Merge branch '1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' into arm64-for-6.6
Merge the IPQ5018 GCC Devicetree binding through a topic branch, in order to the the clock defines. |
||
|
Bjorn Andersson
|
2f6be35d7c |
Merge branch '1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' into clk-for-6.6
Merge the IPQ5018 GCC Devicetree binding through a topic branch, in order to the the clock defines. |
||
|
Sricharan Ramabadhran
|
f62d184ef7 |
dt-bindings: clock: Add IPQ5018 clock and reset
This patch adds support for the global clock controller found on the IPQ5018 based devices. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Link: https://lore.kernel.org/r/1690533192-22220-2-git-send-email-quic_srichara@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Neil Armstrong
|
40fb677285 |
dt-bindings: clk: axg-audio-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every axg-audio-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-14-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
||
|
Neil Armstrong
|
09d65c0267 |
dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every A1 pll ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-13-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
||
|
Neil Armstrong
|
57049a1cfc |
dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every A1 peripherals ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-12-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
||
|
Neil Armstrong
|
165a194195 |
dt-bindings: clk: meson8b-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every meson8b-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-11-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
||
|
Neil Armstrong
|
6655744d9a |
dt-bindings: clk: g12a-aoclkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every g12a-aoclkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-10-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
||
|
Neil Armstrong
|
b1262497a2 |
dt-bindings: clk: g12a-clks: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every g12a-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-9-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
||
|
Neil Armstrong
|
8fdbdc7918 |
dt-bindings: clk: axg-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every axg-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-8-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
||
|
Neil Armstrong
|
9ce8555278 |
dt-bindings: clk: gxbb-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every gxbb-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-7-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Niravkumar L Rabara
|
d5f0942b50 |
dt-bindings: clock: add Intel Agilex5 clock manager
Add clock ID definitions for Intel Agilex5 SoCFPGA. The registers in Agilex5 handling the clock is named as clock manager. Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
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|
Niravkumar L Rabara
|
2a29fe831f |
dt-bindings: reset: add reset IDs for Agilex5
Add reset ID definitions required for Intel Agilex5 SoCFPGA, re-use altr,rst-mgr-s10.h as common header file similar S10 & Agilex. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
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|
Huqiang Qin
|
0e8ec0226e |
dt-bindings: interrupt-controller: Add header file for Amlogic Meson-G12A SoCs
Add a new dt-binding header that details the interrupt number of the GPIO. Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230724060108.1403662-2-huqiang.qin@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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|
Chengci.Xu
|
d5cda142d6 |
dt-bindings: mediatek: mt8188: Add binding for MM & INFRA IOMMU
Add descriptions for mt8188 IOMMU which also use ARM Short-Descriptor
translation table format.
In mt8188, there are two smi-common HW and IOMMU, one is for vdo(video
output), the other is for vpp(video processing pipe). They connects
with different smi-larbs, then some setting(larbid_remap) is different.
Differentiate them with the compatible string.
Something like this:
IOMMU(VDO) IOMMU(VPP)
| |
SMI_COMMON_VDO SMI_COMMON_VPP
--------------- ----------------
| | ... | | ...
larb0 larb2 ... larb1 larb3 ...
We also have an IOMMU that is for infra master like PCIe.
And infra master don't have the larb and ports.
Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230602090227.7264-2-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
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||
|
David Wronek
|
b1b52717be |
dt-bindings: arm: qcom,ids: Add SoC ID for SM7125
Add the SoC ID for Qualcomm SM7125. Signed-off-by: David Wronek <davidwronek@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230723190725.1619193-3-davidwronek@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Kathiravan T
|
cb160cd7b1 |
dt-bindings: arm: qcom,ids: drop the IPQ5019 SoC ID
IPQ5019 SoC is never productized. So lets drop it. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230724083745.1015321-3-quic_kathirav@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Tengfei Fan
|
4d641d2faf |
dt-bindings: arm: qcom,ids: add SoC ID for SM4450
Add the ID for the Qualcomm SM4450 SoC. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230731080043.38552-6-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Dmitry Baryshkov
|
9f08d33496 |
dt-bindings: clock: drop qcom,lcc-mdm9615 header file
The header file for qcom,lcc-mdm9615 and qcom,lcc-msm8960 is the same (as well as the drivers). Drop the qcom,lcc-mdm9615.h in favour of qcom,lcc-msm8960.h Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230512211727.3445575-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Xianwei Zhao
|
83b03d6293 |
dt-bindings: power: add Amlogic C3 power domains
Add devicetree binding document and related header file for Amlogic C3 secure power domains. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230707003710.2667989-3-xianwei.zhao@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> |
||
|
Jayesh Choudhary
|
5438d75fb9 |
dt-bindings: ti-serdes-mux: Deprecate header with constants
The constants to define the idle state of SERDES MUX were defined in
bindings header. They are used only in DTS and driver uses the dt property
to set the idle state making it unsuitable for bindings.
The constants are moved to header next to DTS ("arch/arm64/boot/dts/ti/")
and all the references to bindings header are removed.
So add a warning to mark this bindings header as deprecated.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/20230721125732.122421-3-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
|
||
|
Chancel Liu
|
2fe182dd27 |
dt-bindings: clock: imx93: Add PDM IPG clk
Add PDM IPG clk. Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Chancel Liu <chancel.liu@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230628061724.2056520-1-ping.bai@nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org> |
||
|
Huqiang Qin
|
e55ef16b84 |
dt-bindings: pinctrl: Add compatibles for Amlogic C3 SoCs
Add a new compatible name for Amlogic C3 pin controller, and add a new dt-binding header file which document the detail pin names. Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230714122441.3098337-2-huqiang.qin@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
||
|
Bjorn Andersson
|
ca32bd384e |
Merge branch '1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com' into arm64-for-6.6
Merge the new generic RPMHPD defines from a topic branch, to alow them being used in DeviceTree source, and the driver. |
||
|
Rohit Agarwal
|
7f31667d29 |
dt-bindings: power: qcom,rpmhpd: Add Generic RPMh PD indexes
Add Generic RPMh Power Domain indexes that can be used for all the Qualcomm SoC henceforth. The power domain indexes of these bindings are based on compatibility with current targets like SM8[2345]50 targets. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Dmitry Baryshkov
|
b7297d4566 |
dt-bindings: iio: adc: qcom,spmi-adc7: use predefined channel ids
Each of qcom,spmi-adc7-pm*.h headers define a set of ADC channels that can be used for monitoring on thie particular chip. Switch them to use channel IDs defined in the dt-bindings/iio/qcom,spmi-vadc.h header instead of specifying the numeric IDs. Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230707123027.1510723-2-dmitry.baryshkov@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> |
||
|
Dylan Hung
|
bbb8eb3cb0 |
dt-bindings: clock: ast2600: Add I3C and MAC reset definitions
Add reset definitions of AST2600 I3C and MAC controllers. In the case of the I3C reset, since there is no reset-line hardware available for `ASPEED_RESET_I3C_DMA`, a new macro `ASPEED_RESET_I3C` with the same ID is introduced to provide a more accurate representation of the hardware. The old macro `ASPEED_RESET_I3C_DMA` is kept to provide backward compatibility. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Link: https://lore.kernel.org/r/20230718062616.2822339-1-dylan_hung@aspeedtech.com Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Xingyu Wu
|
a097a5ec14 |
dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator
Add bindings for the Video-Output clock and reset generator (VOUTCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
||
|
Xingyu Wu
|
9b3938c0b8 |
dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator
Add bindings for the Image-Signal-Process clock and reset generator (ISPCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
||
|
Xingyu Wu
|
14b14a57e6 |
dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator
Add bindings for the System-Top-Group clock and reset generator (STGCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
||
|
Xingyu Wu
|
bd348ca24d |
dt-bindings: clock: Add StarFive JH7110 PLL clock generator
Add bindings for the PLL clock generator on the JH7110 RISC-V SoC. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
||
|
Georgi Djakov
|
10cb3abb99 |
Merge branch 'icc-sm8250-qup' into icc-next
SM8250 (like SM8150 but unlike all other QUP-equipped SoCs) doesn't provide a qup-core path. Adjust the bindings and drivers as necessary, and then describe the icc paths in the device tree. This makes it possible for interconnect sync_state succeed so long as you don't use UFS. * icc-sm8250-qup dt-bindings: interconnect: qcom,rpmh: Add SM8250 QUP virt dt-bindings: interconnect: qcom,sm8250: Add QUP virt interconnect: qcom: sm8250: Fix QUP0 nodes Link: https://lore.kernel.org/r/20230703-topic-8250_qup_icc-v2-0-9ba0a9460be2@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
||
|
Konrad Dybcio
|
ddd6c5b9ee |
dt-bindings: interconnect: qcom,sm8250: Add QUP virt
Add the required defines for QUP_virt nodes. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230703-topic-8250_qup_icc-v2-2-9ba0a9460be2@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
||
|
Bjorn Andersson
|
ad4e807f5f |
Merge branch '20230526-topic-smd_icc-v7-0-09c78c175546@linaro.org' into clk-for-6.6
This series reshuffles things around, moving the management of SMD RPM bus clocks to the interconnect framework where they belong. This helps us solve a couple of issues: 1. We can work towards unused clk cleanup of RPMCC without worrying about it killing some NoC bus, resulting in the SoC dying. Deasserting actually unused RPM clocks (among other things) will let us achieve "true SoC-wide power collapse states", also known as VDD_LOW and VDD_MIN. 2. We no longer have to keep tons of quirky bus clock ifs in the icc driver. You either have a RPM clock and call "rpm set rate" or you have a single non-RPM clock (like AHB_CLK_SRC) or you don't have any. 3. There's less overhead - instead of going through layers and layers of the CCF, ratesetting comes down to calling max() and sending a single RPM message. ICC is very very dynamic so that's a big plus. The clocks still need to be vaguely described in the clk-smd-rpm driver, as it gives them an initial kickoff, before actually telling RPM to enable DVFS scaling. After RPM receives that command, all clocks that have not been assigned a rate are considered unused and are shut down in hardware, leading to the same issue as described in point 1. We can consider marking them __initconst in the future, but this series is very fat even without that.. Apart from that, it squashes a couple of bugs that really need fixing.. The series is merged through a topic branch to manage the dependencies between interconnect, Qualcomm clocks and Qualcomm SoC. |
||
|
Konrad Dybcio
|
7296bd3f00 |
dt-bindings: interconnect: Add Qcom RPM ICC bindings
The SMD RPM interconnect driver requires different icc tags to the RPMh driver. Add bindings to reflect that. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> Link: https://lore.kernel.org/r/20230526-topic-smd_icc-v7-1-09c78c175546@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Bjorn Andersson
|
b1260cee1c |
Merge branch '20230620-topic-sc8280_gccgdsc-v2-2-562c1428c10d@linaro.org' into arm64-for-6.6
Merge a set of new SC8280XP GCC GDSC constants from a topic branch, in order to allow them being used in DeviceTree source. |
||
|
Bjorn Andersson
|
5605164aa8 |
Merge branch '20230620-topic-sc8280_gccgdsc-v2-2-562c1428c10d@linaro.org' into clk-for-6.6
Merge a set of new SC8280XP GCC GDSC constants through a topic branch, to allow them being introduce into the DeviceTree source as well. |
||
|
Konrad Dybcio
|
9eba4db02a |
dt-bindings: clock: qcom,gcc-sc8280xp: Add missing GDSCs
There are 10 more GDSCs that we've not been caring about, and by extension
(and perhaps even more importantly), not putting to sleep. Add them.
Fixes:
|
||
|
Varadarajan Narayanan
|
85c0d23009 |
dt-bindings: clock: Add USB related clocks for IPQ9574
Add the clocks needed for enabling USB in IPQ9574 Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/d1c5aa4a8535c645fdb06df62a562918516ba0c6.1686289721.git.quic_varada@quicinc.com [bjorn: Split from driver patch, to allow merging into dts tree] Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Linus Torvalds
|
b869e9f499 |
Another set of clk driver updates and fixes for the merge window. The
driver updates needed more time to bake in linux-next.
Updates:
- Support for more clk controllers in Qualcomm SoCs such as SM8350,
SM8450, SDX75, SC8280XP, and IPQ9574
- Runtime PM enablement of some more Qualcomm clk controllers
- Various fixes to Qualcomm clk driver data to use correct clk_ops
and to check halt bits properly
- AT91 updates to modernize with clk_parent_data structures
Fixes:
- Remove "syscon" from dt binding fix for ti,j721e-system-controller
- Fix determine rate in the Tegra driver that got wrecked by the
refactorting of muxes this merge window
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull more clk updates from Stephen Boyd:
"Another set of clk driver updates and fixes for the merge window. The
driver updates needed more time to bake in linux-next.
Updates:
- Support for more clk controllers in Qualcomm SoCs such as SM8350,
SM8450, SDX75, SC8280XP, and IPQ9574
- Runtime PM enablement of some more Qualcomm clk controllers
- Various fixes to Qualcomm clk driver data to use correct clk_ops
and to check halt bits properly
- AT91 updates to modernize with clk_parent_data structures
Fixes:
- Remove 'syscon' from dt binding fix for ti,j721e-system-controller
- Fix determine rate in the Tegra driver that got wrecked by the
refactorting of muxes this merge window"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (69 commits)
clk: tegra: Avoid calling an uninitialized function
dt-bindings: mfd: ti,j721e-system-controller: Remove syscon from example
clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id
clk: at91: sama7g5: switch to parent_hw and parent_data
clk: at91: sckc: switch to parent_data/parent_hw
clk: at91: clk-sam9x60-pll: add support for parent_hw
clk: at91: clk-utmi: add support for parent_hw
clk: at91: clk-system: add support for parent_hw
clk: at91: clk-programmable: add support for parent_hw
clk: at91: clk-peripheral: add support for parent_hw
clk: at91: clk-master: add support for parent_hw
clk: at91: clk-generated: add support for parent_hw
clk: at91: clk-main: add support for parent_data/parent_hw
clk: qcom: gcc-sc8280xp: Add runtime PM
clk: qcom: gpucc-sc8280xp: Add runtime PM
clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags
clk: qcom: gpucc-sm6375: Enable runtime pm
dt-bindings: clock: sm6375-gpucc: Add VDD_GX
clk: qcom: gcc-sm6115: Add missing PLL config properties
clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
...
|
||
|
Linus Torvalds
|
44aeec836d |
Char/Misc and other driver subsystem updates for 6.5-rc1
Here is the big set of char/misc and other driver subsystem updates for
6.5-rc1.
Lots of different, tiny, stuff in here, from a range of smaller driver
subsystems, including pulls from some substems directly:
- IIO driver updates and additions
- W1 driver updates and fixes (and a new maintainer!)
- FPGA driver updates and fixes
- Counter driver updates
- Extcon driver updates
- Interconnect driver updates
- Coresight driver updates
- mfd tree tag merge needed for other updates
on top of that, lots of small driver updates as patches, including:
- static const updates for class structures
- nvmem driver updates
- pcmcia driver fix
- lots of other small driver updates and fixes
All of these have been in linux-next for a while with no reported
problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull Char/Misc updates from Greg KH:
"Here is the big set of char/misc and other driver subsystem updates
for 6.5-rc1.
Lots of different, tiny, stuff in here, from a range of smaller driver
subsystems, including pulls from some substems directly:
- IIO driver updates and additions
- W1 driver updates and fixes (and a new maintainer!)
- FPGA driver updates and fixes
- Counter driver updates
- Extcon driver updates
- Interconnect driver updates
- Coresight driver updates
- mfd tree tag merge needed for other updates on top of that, lots of
small driver updates as patches, including:
- static const updates for class structures
- nvmem driver updates
- pcmcia driver fix
- lots of other small driver updates and fixes
All of these have been in linux-next for a while with no reported
problems"
* tag 'char-misc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (243 commits)
bsr: fix build problem with bsr_class static cleanup
comedi: make all 'class' structures const
char: xillybus: make xillybus_class a static const structure
xilinx_hwicap: make icap_class a static const structure
virtio_console: make port class a static const structure
ppdev: make ppdev_class a static const structure
char: misc: make misc_class a static const structure
/dev/mem: make mem_class a static const structure
char: lp: make lp_class a static const structure
dsp56k: make dsp56k_class a static const structure
bsr: make bsr_class a static const structure
oradax: make 'cl' a static const structure
hwtracing: hisi_ptt: Fix potential sleep in atomic context
hwtracing: hisi_ptt: Advertise PERF_PMU_CAP_NO_EXCLUDE for PTT PMU
hwtracing: hisi_ptt: Export available filters through sysfs
hwtracing: hisi_ptt: Add support for dynamically updating the filter list
hwtracing: hisi_ptt: Factor out filter allocation and release operation
samples: pfsm: add CC_CAN_LINK dependency
misc: fastrpc: check return value of devm_kasprintf()
coresight: dummy: Update type of mode parameter in dummy_{sink,source}_enable()
...
|
||
|
Linus Torvalds
|
c156d4af43 |
- New Drivers
- Add support for Intel Cherry Trail Whiskey Cove PMIC LEDs
- Add support for Awinic AW20036/AW20054/AW20072 LEDs
- New Device Support
- Add support for PMI632 LPG to QCom LPG
- Add support for PMI8998 to QCom Flash
- Add support for MT6331, WLEDs and MT6332 to Mediatek MT6323 PMIC
- New Functionality
- Implement the LP55xx Charge Pump
- Add support for suspend / resume to Intel Cherry Trail Whiskey Cove PMIC
- Add support for breathing mode to Intel Cherry Trail Whiskey Cove PMIC
- Enable per-pin resolution Pinctrl in LEDs GPIO
- Fix-ups
- Allow thread to sleep by switching from spinlock to mutex
- Add lots of Device Tree bindings / support
- Adapt relationships / dependencies driven by Kconfig
- Switch I2C drivers from .probe_new() to .probe()
- Remove superfluous / duplicate code
- Replace strlcpy() with strscpy() for efficiency and overflow prevention
- Staticify various functions
- Trivial: Fixing coding style
- Simplify / reduce code
- Bug Fixes
- Prevent NETDEV_LED_MODE_LINKUP from being cleared on rename
- Repair race between led_set_brightness(LED_{OFF,FULL})
- Fix Oops relating to sleeping in critical sections
- Clear LED_INIT_DEFAULT_TRIGGER flag when clearing the current trigger
- Do not leak resources in error handling paths
- Fix unsigned comparison which can never be negative
- Provide missing NULL terminating entries in tables
- Fix misnaming issues
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Merge tag 'leds-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds
Pull LED updates from Lee Jones:
"New Drivers:
- Add support for Intel Cherry Trail Whiskey Cove PMIC LEDs
- Add support for Awinic AW20036/AW20054/AW20072 LEDs
New Device Support:
- Add support for PMI632 LPG to QCom LPG
- Add support for PMI8998 to QCom Flash
- Add support for MT6331, WLEDs and MT6332 to Mediatek MT6323 PMIC
New Functionality:
- Implement the LP55xx Charge Pump
- Add support for suspend / resume to Intel Cherry Trail Whiskey Cove PMIC
- Add support for breathing mode to Intel Cherry Trail Whiskey Cove PMIC
- Enable per-pin resolution Pinctrl in LEDs GPIO
Fix-ups:
- Allow thread to sleep by switching from spinlock to mutex
- Add lots of Device Tree bindings / support
- Adapt relationships / dependencies driven by Kconfig
- Switch I2C drivers from .probe_new() to .probe()
- Remove superfluous / duplicate code
- Replace strlcpy() with strscpy() for efficiency and overflow prevention
- Staticify various functions
- Trivial: Fixing coding style
- Simplify / reduce code
Bug Fixes:
- Prevent NETDEV_LED_MODE_LINKUP from being cleared on rename
- Repair race between led_set_brightness(LED_{OFF,FULL})
- Fix Oops relating to sleeping in critical sections
- Clear LED_INIT_DEFAULT_TRIGGER flag when clearing the current trigger
- Do not leak resources in error handling paths
- Fix unsigned comparison which can never be negative
- Provide missing NULL terminating entries in tables
- Fix misnaming issues"
* tag 'leds-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds: (53 commits)
leds: leds-mt6323: Adjust return/parameter types in wled get/set callbacks
leds: sgm3140: Add richtek,rt5033-led compatible
dt-bindings: leds: sgm3140: Document richtek,rt5033 compatible
dt-bindings: backlight: kinetic,ktz8866: Add missing type for "current-num-sinks"
dt-bindings: leds: Drop unneeded quotes
leds: Fix config reference for AW200xx driver
leds: leds-mt6323: Add support for WLEDs and MT6332
leds: leds-mt6323: Add support for MT6331 leds
leds: leds-mt6323: Open code and drop MT6323_CAL_HW_DUTY macro
leds: leds-mt6323: Drop MT6323_ prefix from macros and defines
leds: leds-mt6323: Specify registers and specs in platform data
dt-bindings: leds: leds-mt6323: Document mt6332 compatible
dt-bindings: leds: leds-mt6323: Document mt6331 compatible
leds: simatic-ipc-leds-gpio: Introduce more Kconfig switches
leds: simatic-ipc-leds-gpio: Split up into multiple drivers
leds: simatic-ipc-leds-gpio: Move two extra gpio pins into another table
leds: simatic-ipc-leds-gpio: Add terminating entries to gpio tables
leds: flash: leds-qcom-flash: Fix an unsigned comparison which can never be negative
leds: cht-wcove: Remove unneeded semicolon
leds: cht-wcove: Fix an unsigned comparison which can never be negative
...
|
||
|
Linus Torvalds
|
b8ec70ab66 |
- New Drivers
- Add support for TI TPS6594/TPS6593/LP8764 PMICs
- Add support for Samsung RT5033 Battery Charger
- Add support for Analog Devices MAX77540 and MAX77541 PMICs
- New Device Support
- Add support for SPI to Rockchip RK808 (and friends)
- Add support for AXP192 PMIC to X-Powers AXP20X
- Add support for AXP313a PMIC to X-Powers AXP20X
- Add support for RK806 to Rockchip RK8XX
- Removed Device Support
- Removed MFD support for Richtek RT5033 Battery
- Fix-ups
- Remove superfluous code
- Switch I2C drivers from .probe_new() to .probe()
- Convert over to managed resources (devm_*(), etc)
- Use dev_err_probe() for returning errors from .probe()
- Add lots of Device Tree bindings / support
- Improve cache efficiency by switching to Maple
- Use own exported namespaces (NS)
- Include missing and remove superfluous headers
- Start using / convert to the new shutdown sys-off API
- Trivial: variable / define renaming
- Make use of of_property_read_reg() when requesting DT 'reg's
- Bug Fixes
- Fix chip revision readout due to incorrect data masking
- Amend incorrect register and mask values used for charger state
- Hide unused functionality at compile time
- Fix resource leaks following error handling routines
- Return correct error values and fix error handling in general
- Repair incorrect device names - used for device matching
- Remedy broken module auto-loading
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Merge tag 'mfd-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"New Drivers:
- Add support for TI TPS6594/TPS6593/LP8764 PMICs
- Add support for Samsung RT5033 Battery Charger
- Add support for Analog Devices MAX77540 and MAX77541 PMICs
New Device Support:
- Add support for SPI to Rockchip RK808 (and friends)
- Add support for AXP192 PMIC to X-Powers AXP20X
- Add support for AXP313a PMIC to X-Powers AXP20X
- Add support for RK806 to Rockchip RK8XX
Removed Device Support:
- Removed MFD support for Richtek RT5033 Battery
Fix-ups:
- Remove superfluous code
- Switch I2C drivers from .probe_new() to .probe()
- Convert over to managed resources (devm_*(), etc)
- Use dev_err_probe() for returning errors from .probe()
- Add lots of Device Tree bindings / support
- Improve cache efficiency by switching to Maple
- Use own exported namespaces (NS)
- Include missing and remove superfluous headers
- Start using / convert to the new shutdown sys-off API
- Trivial: variable / define renaming
- Make use of of_property_read_reg() when requesting DT 'reg's
Bug Fixes:
- Fix chip revision readout due to incorrect data masking
- Amend incorrect register and mask values used for charger state
- Hide unused functionality at compile time
- Fix resource leaks following error handling routines
- Return correct error values and fix error handling in general
- Repair incorrect device names - used for device matching
- Remedy broken module auto-loading"
* tag 'mfd-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (51 commits)
dt-bindings: mfd: max77541: Add ADI MAX77541/MAX77540
iio: adc: max77541: Add ADI MAX77541 ADC Support
regulator: max77541: Add ADI MAX77541/MAX77540 Regulator Support
dt-bindings: regulator: max77541: Add ADI MAX77541/MAX77540 Regulator
mfd: Switch two more drivers back to use struct i2c_driver::probe
dt-bindings: mfd: samsung,s5m8767: Simplify excluding properties
mfd: stmpe: Only disable the regulators if they are enabled
mfd: max77541: Add ADI MAX77541/MAX77540 PMIC Support
dt-bindings: mfd: gateworks-gsc: Remove unnecessary fan-controller nodes
mfd: core: Use of_property_read_reg() to parse "reg"
mfd: stmfx: Nullify stmfx->vdd in case of error
mfd: stmfx: Fix error path in stmfx_chip_init
mfd: intel-lpss: Add missing check for platform_get_resource
mfd: stpmic1: Add PMIC poweroff via sys-off handler
mfd: stpmic1: Fixup main control register and bits naming
dt-bindings: mfd: qcom,tcsr: Add the compatible for IPQ8074
mfd: tps65219: Add support for soft shutdown via sys-off API
mfd: pm8008: Drop bogus i2c module alias
mfd: pm8008: Fix module autoloading
mfd: tps65219: Add GPIO cell instance
...
|
||
|
Linus Torvalds
|
28968f384b |
Pin control changes for the v6.5 kernel cycle:
No core changes this time. New drivers: - Tegra234 support. - Qualcomm IPQ5018 support. - Intel Meteor Lake-S support. - Qualcomm SDX75 subdriver. - Qualcomm SPMI-based PM8953 support. Improvements: - Fix up support for GPIO3 on the AXP209. - Push-pull drive configuration support for the AT91 PIO4. - Fix misc non-urgent bugs in the AMD driver. - Misc non-urgent improved error handling. - Misc janitorial and minor improvements. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmSdNYkACgkQQRCzN7AZ XXN/Cw/+KLRYq3iBC4u8OkII9aDdCxyR+0QV/zz/ZeiEN54tICrymSSE3SG3jw13 MMxAlZ3Yi/H1VelCrq+/2wLB8ydL+QnrQbs47JaIftdqfybgyyvHd354jtRktqQ2 NS1Nxbog1uljwjj835XXx5CV0JSTXhFQXAGc3a06ZV/JdoixazsHWrlRn9vGY3VX umb/cIaNBeQ4p9QBusV7hiz/KFfC90YyJvEfNlmXxahcd25011Hq+dLFj4jsWbud 4eEMag+zoxdSdORBU789Kjxejx1maGTyuGzWuQ/rkDgcG00pZf454ShLlbUsPdui TaU6gKC8/EBAp5rgtf1tGXF42sJEKpKsDmzzdYojLq3PH/H03r3qqB7VLqmXlehn mq5eP0DXgcdcsp/dkVa3jrWTvGPRcGfF996L3X2odl8YhoHrd6qbhYLjknZW8Eph QOcyHdtJfjZjJQnM9FfljAD5GSKfyIAhc5PX9yAkkN8mQlw8px4Z9Cqn/F0B57o7 K8FWSkgeM5chZ5Xy+C7TYw6yLsG2WuYahKd+mmUMVrEfAJg+ZUQRpXdoPDLNBkYQ PkL/MoNUpwsaFMu8ATgpIcUAQsfF57Yv8t1OOLg/GLupGqOtCgHb5dvbWstiFcN4 r4Wew7i2cadXJnL8WBpqdpbye1rsVh0I/ANoN6o2AbEz1yfe7Eo= =MMUo -----END PGP SIGNATURE----- Merge tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "No core changes this time New drivers: - Tegra234 support - Qualcomm IPQ5018 support - Intel Meteor Lake-S support - Qualcomm SDX75 subdriver - Qualcomm SPMI-based PM8953 support Improvements: - Fix up support for GPIO3 on the AXP209 - Push-pull drive configuration support for the AT91 PIO4 - Fix misc non-urgent bugs in the AMD driver - Misc non-urgent improved error handling - Misc janitorial and minor improvements" * tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits) pinctrl: cherryview: Drop goto label pinctrl: baytrail: invert if condition pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failure pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hook pinctrl: tegra: avoid duplicate field initializers dt-bindings: pinctrl: qcom,sdx65-tlmm: add pcie_clkreq function pinctrl: mlxbf3: remove broken Kconfig 'select' pinctrl: spear: Remove unused of_gpio.h inclusion pinctrl: lantiq: Remove unused of_gpio.h inclusion pinctrl: at91-pio4: check return value of devm_kasprintf() pinctrl: microchip-sgpio: check return value of devm_kasprintf() pinctrl: freescale: Fix a memory out of bounds when num_configs is 1 pinctrl: intel: refine ->irq_set_type() hook pinctrl: intel: refine ->set_mux() hook pinctrl: baytrail: Use str_hi_lo() helper lib/string_choices: Add str_high_low() helper lib/string_helpers: Split out string_choices.h lib/string_helpers: Add missing header files to MAINTAINERS database pinctrl: npcm7xx: Add missing check for ioremap pinctrl:sunplus: Add check for kmalloc ... |
||
|
Linus Torvalds
|
e4c8d01865 |
ARM: SoC drivers for 6.5
Nothing surprising in the SoC specific drivers, with the usual updates:
* Added or improved SoC driver support for Tegra234, Exynos4121, RK3588,
as well as multiple Mediatek and Qualcomm chips
* SCMI firmware gains support for multiple SMC/HVC transport and version
3.2 of the protocol
* Cleanups amd minor changes for the reset controller, memory controller,
firmware and sram drivers
* Minor changes to amd/xilinx, samsung, tegra, nxp, ti, qualcomm,
amlogic and renesas SoC specific drivers
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Merge tag 'soc-drivers-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Nothing surprising in the SoC specific drivers, with the usual
updates:
- Added or improved SoC driver support for Tegra234, Exynos4121,
RK3588, as well as multiple Mediatek and Qualcomm chips
- SCMI firmware gains support for multiple SMC/HVC transport and
version 3.2 of the protocol
- Cleanups amd minor changes for the reset controller, memory
controller, firmware and sram drivers
- Minor changes to amd/xilinx, samsung, tegra, nxp, ti, qualcomm,
amlogic and renesas SoC specific drivers"
* tag 'soc-drivers-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (118 commits)
dt-bindings: interrupt-controller: Convert Amlogic Meson GPIO interrupt controller binding
MAINTAINERS: add PHY-related files to Amlogic SoC file list
drivers: meson: secure-pwrc: always enable DMA domain
tee: optee: Use kmemdup() to replace kmalloc + memcpy
soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencer
dt-bindings: sram: qcom,imem: document qdu1000
soc: qcom: icc-bwmon: Fix MSM8998 count unit
dt-bindings: soc: qcom,rpmh-rsc: Require power-domains
soc: qcom: socinfo: Add Soc ID for IPQ5300
dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300
soc: qcom: Fix a IS_ERR() vs NULL bug in probe
soc: qcom: socinfo: Add support for new fields in revision 19
soc: qcom: socinfo: Add support for new fields in revision 18
dt-bindings: firmware: scm: Add compatible for SDX75
soc: qcom: mdt_loader: Fix split image detection
dt-bindings: memory-controllers: drop unneeded quotes
soc: rockchip: dtpm: use C99 array init syntax
firmware: tegra: bpmp: Add support for DRAM MRQ GSCs
soc/tegra: pmc: Use devm_clk_notifier_register()
soc/tegra: pmc: Simplify debugfs initialization
...
|
||
|
Linus Torvalds
|
a9025a5f16 |
ARM: New SoC support for 6.5
There are two new SoC families this time, and both appear fairly similar: The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are both dual-core Cortex-A35 based chips for the low-power industrial embedded market, and they mark the first 64-bit product in a widely used family of 32-bit Arm MCUs and SoCs. The way into the kernel is completely different here: The team at ST has a long history of working upstream with their STM32MP1 and other SoCs, and they produced a complete port to arm64 together with the initial announcement. Nuvoton also has multiple SoC product lines with current or previous upstream support, but those are maintained by third parties and are unrelated. The patch series from Nuvoton's Jacky Huang had to go through many revisisions to get to this point and is still missing a few drivers including the serial port for the moment. The branch contains the devicetree files as well as all the code changes, in order to have something that can be tested standalone. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmScqtkACgkQYKtH/8kJ Uifqyg//XgvZBxb/2GILYcThVgLoo1fYA9tG5M0LERY/aPiUwrCwIl5swGQXK4vK E3UBLsQURer4yEBRq7iB6RGbwa4Opjdy3yTkj6WSgEMPh6e6jGvmm+dJ7HuWeviS 8oeyo3Xar6tIF+A8xlBloHA4J6690FYB40McQzh8sWG5SE+id56S71NGnNW0kQTn wsul9BZcGVoyMYNBi/uXtOVUPy7jF3UBC3HJF9UOT7q77bCLjVc/aHmmnZ3zmbYA 2oX3X5hVJakFba6vnz+rjNlzuAoGXJPDdsKFxBysdsksac/TxqRIQGNe75DZZVgz ESTpt1QqjmCFw32HEzi8Ne22FOpzlBqUxBMznHPenpz1/om2ezs3q7ffuPqKvMaq PANuK++JKJaBChVMzJbn84Sr1fvO4ecGJpKZTFC6t6SqHQNQFJT6rfMHx01Xw2wW LjKfEBCR6zEXN0+FaaujgJ4y/9pH1VHPynrZJG9WEwPUEZb2kJ/2RMXjNpzOWKiB pWYV1oW2TqFKYKhFm/pjkbi6Rq76UwEi8fWWoGMkmeV3KZ/0GFauQhItu6mX3s7W uGnUQyrBzWzUoashYFuNtXKHYdwuWgOmG660BXHkyxwvqV96ICGEJ+97zGIBDj81 F8zLxEjPbsEZqGGSosAyk9oYC6eh7eK2V7xx+CUYLTuKZw13zNo= =zaVi -----END PGP SIGNATURE----- Merge tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull new ARM SoC support from Arnd Bergmann: "There are two new SoC families this time, and both appear fairly similar: The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are both dual-core Cortex-A35 based chips for the low-power industrial embedded market, and they mark the first 64-bit product in a widely used family of 32-bit Arm MCUs and SoCs. The way into the kernel is completely different here: The team at ST has a long history of working upstream with their STM32MP1 and other SoCs, and they produced a complete port to arm64 together with the initial announcement. Nuvoton also has multiple SoC product lines with current or previous upstream support, but those are maintained by third parties and are unrelated. The patch series from Nuvoton's Jacky Huang had to go through many revisisions to get to this point and is still missing a few drivers including the serial port for the moment. The branch contains the devicetree files as well as all the code changes, in order to have something that can be tested standalone" * tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) clk: nuvoton: Use clk_parent_data instead of string for parent clock clk: nuvoton: Update all constant hex values to lowercase clk: nuvoton: Add clk-ma35d1.h for driver extern functions remoteproc: stm32: use correct format strings on 64-bit MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE arm64: defconfig: enable ARCH_STM32 and STM32 serial driver arm64: dts: st: add stm32mp257f-ev1 board support dt-bindings: stm32: document stm32mp257f-ev1 board arm64: dts: st: introduce stm32mp25 pinctrl files arm64: dts: st: introduce stm32mp25 SoCs family arm64: introduce STM32 family on Armv8 architecture dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon pinctrl: stm32: add stm32mp257 pinctrl support dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages Documentation/process: add soc maintainer handbook reset: RESET_NUVOTON_MA35D1 should depend on ARCH_MA35 reset: Add Nuvoton ma35d1 reset driver support clk: nuvoton: Add clock driver for ma35d1 clock controller arm64: dts: nuvoton: Add initial ma35d1 device tree dt-bindings: serial: Document ma35d1 uart controller ... |
||
|
Linus Torvalds
|
6c1561fb90 |
ARM: SoC devicetree updates for 6.5
The biggest change this time is for the 32-bit devicetree files, which
are all moved to a new location, using separate subdirectories for each
SoC vendor, following the same scheme that is used on arm64, mips and
riscv. This has been discussed for many years, but so far we never did
this as there was a plan to move the files out of the kernel entirely,
which has never happened.
The impact of this will be that all external patches no longer apply,
and anything depending on the location of the dtb files in the build
directory will have to change. The installed files after 'make
dtbs_install' keep the current location.
There are six added SoCs here that are largely variants of previously
added chips. Two other chips are added in a separate branch along
with their device drivers.
* The Samsung Exynos 4212 makes its return after the Samsung Galaxy
Express phone is addded at last. The SoC support was originally
added in 2012 but removed again in 2017 as it was unused at the time.
* Amlogic C3 is a Cortex-A35 based smart IP camera chip
* Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
the still common MSM8916 (Snapdragon 410) phone chip that has been
supported for a long time.
* Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
laptop chips, used in the Lenovo Flex 5G, which is added along with
the reference board.
* Qualcomm SDX75 is the latest generation modem chip that is used
as a peripherial in phones but can also run a standalone Linux. Unlike
the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.
* Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the Xuantie
C910 core, a step up from all previously added rv64 chips.
All of the above come with reference board implementations, those included
there are 39 new board files, but only five more 32-bit this time, probably
a new low:
* Marantec Maveo board based on dhcor imx6ull module
* Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip
* Epson Moverio BT-200 AR glasses based on TI OMAP4
* PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM
* ICnova ADB4006 board based on Allwinner A20
On the 64-bit side, there are also fewer addded machines than
we had in the recent releases:
* Three boards based on NXP i.MX8: Emtop SoM & Baseboard,
NXP i.MX8MM EVKB board and i.MX8MP based Gateworks Venice
gw7905-2x device.
* NVIDIA IGX Orin and Jetson Orin Nano boards, both based on
tegra234
* Qualcomm gains support for 6 reference boards on various members
of their IPQ networking SoC series, as well as the Sony Xperia M4
Aqua phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board
on top of the various reference platforms for their new chips.
* Rockchips support for several newer boards: Indiedroid Nova (rk3588),
Edgeble Neural Compute Module 6B (rk3588), FriendlyARM NanoPi R2C
Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn Fastrhino R66S/R68S
(rk3568)
* TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex Verdin
family with AM62 COM, carrier and dev boards
Other changes to existing boards contain the usual minor improvements
along with
* continued updates to clean up dts files based on dtc warnings and
binding checks, in particular cache properties and node names
* support for devicetree overlays on at91, bcm283x
* significant additions to existing SoC support on mediatek, qualcomm,
ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST STM32MP1
As usual, a lot more detail is available in the individual merge
commits.
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Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC devicetree updates from Arnd Bergmann:
"The biggest change this time is for the 32-bit devicetree files, which
are all moved to a new location, using separate subdirectories for
each SoC vendor, following the same scheme that is used on arm64, mips
and riscv. This has been discussed for many years, but so far we never
did this as there was a plan to move the files out of the kernel
entirely, which has never happened.
The impact of this will be that all external patches no longer apply,
and anything depending on the location of the dtb files in the build
directory will have to change. The installed files after 'make
dtbs_install' keep the current location.
There are six added SoCs here that are largely variants of previously
added chips. Two other chips are added in a separate branch along with
their device drivers.
- The Samsung Exynos 4212 makes its return after the Samsung Galaxy
Express phone is addded at last. The SoC support was originally
added in 2012 but removed again in 2017 as it was unused at the
time.
- Amlogic C3 is a Cortex-A35 based smart IP camera chip
- Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
the still common MSM8916 (Snapdragon 410) phone chip that has been
supported for a long time.
- Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
laptop chips, used in the Lenovo Flex 5G, which is added along with
the reference board.
- Qualcomm SDX75 is the latest generation modem chip that is used as
a peripherial in phones but can also run a standalone Linux. Unlike
the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.
- Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the
Xuantie C910 core, a step up from all previously added rv64 chips.
All of the above come with reference board implementations, those
included there are 39 new board files, but only five more 32-bit this
time, probably a new low:
- Marantec Maveo board based on dhcor imx6ull module
- Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip
- Epson Moverio BT-200 AR glasses based on TI OMAP4
- PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM
- ICnova ADB4006 board based on Allwinner A20
On the 64-bit side, there are also fewer addded machines than we had
in the recent releases:
- Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM
EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device.
- NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234
- Qualcomm gains support for 6 reference boards on various members of
their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua
phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top
of the various reference platforms for their new chips.
- Rockchips support for several newer boards: Indiedroid Nova
(rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM
NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn
Fastrhino R66S/R68S (rk3568)
- TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex
Verdin family with AM62 COM, carrier and dev boards
Other changes to existing boards contain the usual minor improvements
along with
- continued updates to clean up dts files based on dtc warnings and
binding checks, in particular cache properties and node names
- support for devicetree overlays on at91, bcm283x
- significant additions to existing SoC support on mediatek,
qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST
STM32MP1
As usual, a lot more detail is available in the individual merge
commits"
* tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits)
ARM: mvebu: fix unit address on armada-390-db flash
ARM: dts: Move .dts files to vendor sub-directories
kbuild: Support flat DTBs install
ARM: dts: Add .dts files missing from the build
ARM: dts: allwinner: Use quoted #include
ARM: dts: lan966x: kontron-d10: add PHY interrupts
ARM: dts: lan966x: kontron-d10: fix SPI CS
ARM: dts: lan966x: kontron-d10: fix board reset
ARM: dts: at91: Enable device-tree overlay support for AT91 boards
arm: dts: Enable device-tree overlay support for AT91 boards
arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller
ARM: dts: at91: use generic name for shutdown controller
ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
dt-bindings: firmware: brcm,kona-smc: convert to YAML
riscv: dts: sort makefile entries by directory
riscv: defconfig: enable T-HEAD SoC
MAINTAINERS: add entry for T-HEAD RISC-V SoC
riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
riscv: dts: add initial T-HEAD TH1520 SoC device tree
riscv: Add the T-HEAD SoC family Kconfig option
...
|
||
|
Linus Torvalds
|
f8824e151f |
sound updates for 6.5-rc1
Lots of changes as usual, but the only significant stuff in ALSA core
part is the MIDI 2.0 support, while ASoC core kept receiving the code
refactoring. The majority of changes are seen rather in device
drivers, and quite a few new drivers can be found there.
Here we go, some highlights:
ALSA and ASoC Core:
- Support of MIDI 2.0 devices: rawmidi and sequencer API have been
extended for the support of the new UMP (Universal MIDI Packet)
protocol, USB audio driver got the USB MIDI 2.0 interface support
- Continued refactoring around ASoC DAI links and the ordering of
trigger callbacks
- PCM ABI extension for better drain support
ASoC Drivers:
- Conversions of many drivers to use maple tree based caches
- Everlasting improvement works on ASoC Intel drivers
- Compressed audio support for Qualcomm
- Support for AMD SoundWire, Analog Devices SSM3515, Google Chameleon,
Ingenic X1000, Intel systems with various CODECs, Loongson
platforms, Maxim MAX98388, Mediatek MT8188, Nuvoton NAU8825C, NXP
platforms with NAU8822, Qualcomm WSA884x, StarFive JH7110, Texas
Instruments TAS2781
HD-audio:
- Quirks for HP and ASUS machines
- CS35L41 HD-audio codec fixes
- Loongson HD-audio support
Misc:
- A new virtual PCM test driver for kselftests
- Continued refactoring and improvements on the legacy emu10k1 driver
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Merge tag 'sound-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"Lots of changes as usual, but the only significant stuff in ALSA core
part is the MIDI 2.0 support, while ASoC core kept receiving the code
refactoring. The majority of changes are seen rather in device
drivers, and quite a few new drivers can be found there.
Here we go, some highlights:
ALSA and ASoC Core:
- Support of MIDI 2.0 devices: rawmidi and sequencer API have been
extended for the support of the new UMP (Universal MIDI Packet)
protocol, USB audio driver got the USB MIDI 2.0 interface support
- Continued refactoring around ASoC DAI links and the ordering of
trigger callbacks
- PCM ABI extension for better drain support
ASoC Drivers:
- Conversions of many drivers to use maple tree based caches
- Everlasting improvement works on ASoC Intel drivers
- Compressed audio support for Qualcomm
- Support for AMD SoundWire, Analog Devices SSM3515, Google
Chameleon, Ingenic X1000, Intel systems with various CODECs,
Loongson platforms, Maxim MAX98388, Mediatek MT8188, Nuvoton
NAU8825C, NXP platforms with NAU8822, Qualcomm WSA884x, StarFive
JH7110, Texas Instruments TAS2781
HD-audio:
- Quirks for HP and ASUS machines
- CS35L41 HD-audio codec fixes
- Loongson HD-audio support
Misc:
- A new virtual PCM test driver for kselftests
- Continued refactoring and improvements on the legacy emu10k1
driver"
* tag 'sound-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (556 commits)
ALSA: hda/realtek: Enable mute/micmute LEDs and limit mic boost on EliteBook
ASoC: hdmi-codec: fix channel info for compressed formats
ALSA: pcm: fix ELD constraints for (E)AC3, DTS(-HD) and MLP formats
ASoC: core: Always store of_node when getting DAI link component
ASoC: tas2781: Fix error code in tas2781_load_calibration()
ASoC: amd: update pm_runtime enable sequence
ALSA: ump: Export MIDI1 / UMP conversion helpers
ASoC: tas2781: fix Kconfig dependencies
ASoC: amd: acp: remove acp poweroff function
ASoC: amd: acp: clear pdm dma interrupt mask
ASoC: codecs: max98090: Allow dsp_a mode
ASoC: qcom: common: add default jack dapm pins
ASoC: loongson: fix address space confusion
ASoC: dt-bindings: microchip,sama7g5-pdmc: Simplify "microchip,mic-pos" constraints
ASoC: tegra: Remove stale comments in AHUB
ASoC: tegra: Use normal system sleep for ASRC
ALSA: hda/realtek: Add quirks for ROG ALLY CS35l41 audio
ASoC: fsl-asoc-card: Allow passing the number of slots in use
ASoC: codecs: wsa884x: Add WSA884x family of speakers
ASoC: dt-bindings: qcom,wsa8840: Add WSA884x family of speakers
...
|
||
|
Linus Torvalds
|
ff7ddcf0db |
This batch of clk driver updates for the merge window contains almost no new
SoC support. Instead there's a treewide patch series from Maxime that makes
clk_ops::determine_rate mandatory for muxes. Beyond that core framework change
we have the usual pile of clk driver updates such as migrating i2c drivers to
use .probe() again or YAMLfication of clk DT bindings so we can validate DTBs.
Overall the SoCs that got the most updates this time around in terms of
diffstat are the Amlogic and Mediatek drivers because they added new SoC
support or fixed up various drivers to have proper data.
In general things look kinda quiet. I suspect the core framework change may
still shake out some problems after the merge window, mostly because not
everyone tests linux-next where that series has been for some number of weeks.
I saw that there's at least one pending fix for Tegra that needs to be wrapped
up into a proper patch. I'll try to catch those bits before the window closes
so that -rc1 is bootable. More details below.
Core:
- Make clk_ops::determine_rate mandatory for muxes
New Drivers:
- Add amlogic a1 SoC family PLL and peripheral clock controller support
Updates:
- Handle allocation failures from kasprintf() and friends
- Migrate platform clk drivers to .remove_new()
- Migrate i2c clk drivers to .probe() instead of .probe_new()
- Remove CLK_SET_PARENT from all Mediatek MSDC core clocks
- Add infra_ao reset support for Mediatek MT8188 SoCs
- Align driver_data to i2c_device_id tables in some i2c clk drivers
- Use device_get_match_data() in vc5 clk driver
- New Kconfig symbol name (SOC_MICROCHIP_POLARFIRE) for Microchip FPGA clock
drivers
- Use of_property_read_bool() to read "microchip,pic32mzda-sosc" boolean DT
property in clk-pic32mzda
- Convert AT91 clock dt-bindings to YAML
- Remove CLK_SET_RATE_PARENT flag from LDB clocks on i.MX6SX
- Keep i.MX UART clocks enabled during kernel boot if earlycon is set
- Drop imx_unregister_clocks() as there are no users anymore
- Switch to _safe iterator on imx_clk_scu_unregister() to avoid use after free
- Add determine_rate op to the imx8m composite clock
- Use device managed API for iomap and kzalloc for i.MXRT1050, i.MX8MN,
i.MX8MP and i.MX93 clock controller drivers
- Add missing interrupt DT property for the i.MX8M clock controller
- Re-add support for Exynos4212 clock controller because we are
re-introducing the SoC in the mainline
- Add CONFIG_OF dependency to Samsung clk Kconfig symbols to solve some
objtool warnings
- Preselect PLL MIPI as TCON0 parent for Allwinner A64 SoC
- Convert the Renesas clock drivers to readl_poll_timeout_atomic()
- Add PWM clock on Renesas R-Car V3U
- Fix PLL5 on Renesas RZ/G2L and RZ/V2L
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This batch of clk driver updates contains almost no new SoC support.
Instead there's a treewide patch series from Maxime that makes
clk_ops::determine_rate mandatory for muxes.
Beyond that core framework change we have the usual pile of clk driver
updates such as migrating i2c drivers to use .probe() again or
YAMLfication of clk DT bindings so we can validate DTBs.
Overall the SoCs that got the most updates this time around in terms
of diffstat are the Amlogic and Mediatek drivers because they added
new SoC support or fixed up various drivers to have proper data.
In general things look kinda quiet. I suspect the core framework
change may still shake out some problems after the merge window,
mostly because not everyone tests linux-next where that series has
been for some number of weeks. I saw that there's at least one pending
fix for Tegra that needs to be wrapped up into a proper patch. I'll
try to catch those bits before the window closes so that -rc1 is
bootable. More details below.
Core:
- Make clk_ops::determine_rate mandatory for muxes
New Drivers:
- Add amlogic a1 SoC family PLL and peripheral clock controller support
Updates:
- Handle allocation failures from kasprintf() and friends
- Migrate platform clk drivers to .remove_new()
- Migrate i2c clk drivers to .probe() instead of .probe_new()
- Remove CLK_SET_PARENT from all Mediatek MSDC core clocks
- Add infra_ao reset support for Mediatek MT8188 SoCs
- Align driver_data to i2c_device_id tables in some i2c clk drivers
- Use device_get_match_data() in vc5 clk driver
- New Kconfig symbol name (SOC_MICROCHIP_POLARFIRE) for Microchip
FPGA clock drivers
- Use of_property_read_bool() to read "microchip,pic32mzda-sosc"
boolean DT property in clk-pic32mzda
- Convert AT91 clock dt-bindings to YAML
- Remove CLK_SET_RATE_PARENT flag from LDB clocks on i.MX6SX
- Keep i.MX UART clocks enabled during kernel boot if earlycon is set
- Drop imx_unregister_clocks() as there are no users anymore
- Switch to _safe iterator on imx_clk_scu_unregister() to avoid use
after free
- Add determine_rate op to the imx8m composite clock
- Use device managed API for iomap and kzalloc for i.MXRT1050,
i.MX8MN, i.MX8MP and i.MX93 clock controller drivers
- Add missing interrupt DT property for the i.MX8M clock controller
- Re-add support for Exynos4212 clock controller because we are
re-introducing the SoC in the mainline
- Add CONFIG_OF dependency to Samsung clk Kconfig symbols to solve
some objtool warnings
- Preselect PLL MIPI as TCON0 parent for Allwinner A64 SoC
- Convert the Renesas clock drivers to readl_poll_timeout_atomic()
- Add PWM clock on Renesas R-Car V3U
- Fix PLL5 on Renesas RZ/G2L and RZ/V2L"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (149 commits)
clk: fix typo in clk_hw_register_fixed_rate_parent_data() macro
clk: Fix memory leak in devm_clk_notifier_register()
clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes
clk: mvebu: Use of_get_cpu_hwid() to read CPU ID
MAINTAINERS: Add Marvell mvebu clock drivers
clk: clocking-wizard: check return value of devm_kasprintf()
clk: ti: clkctrl: check return value of kasprintf()
clk: keystone: sci-clk: check return value of kasprintf()
clk: si5341: free unused memory on probe failure
clk: si5341: check return value of {devm_}kasprintf()
clk: si5341: return error if one synth clock registration fails
clk: cdce925: check return value of kasprintf()
clk: vc5: check memory returned by kasprintf()
clk: mediatek: clk-mt8173-apmixedsys: Fix iomap not released issue
clk: mediatek: clk-mt8173-apmixedsys: Fix return value for of_iomap() error
clk: mediatek: clk-mtk: Grab iomem pointer for divider clocks
clk: keystone: syscon-clk: Add support for audio refclk
dt-bindings: clock: Add binding documentation for TI Audio REFCLK
dt-bindings: clock: ehrpwm: Remove unneeded syscon compatible
clk: keystone: syscon-clk: Allow the clock node to not be of type syscon
...
|
||
|
Stephen Boyd
|
82e58e69d7 |
Merge branches 'clk-qcom' and 'clk-microchip' into clk-next
* clk-qcom: (63 commits) clk: qcom: gcc-sc8280xp: Add runtime PM clk: qcom: gpucc-sc8280xp: Add runtime PM clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags clk: qcom: gpucc-sm6375: Enable runtime pm dt-bindings: clock: sm6375-gpucc: Add VDD_GX clk: qcom: gcc-sm6115: Add missing PLL config properties clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi) clk: qcom: gcc-ipq6018: remove duplicate initializers clk: qcom: gcc-ipq9574: Enable crypto clocks dt-bindings: clock: Add crypto clock and reset definitions clk: qcom: Add lpass audio clock controller driver for SC8280XP clk: qcom: Add lpass clock controller driver for SC8280XP dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP dt-bindings: clock: qcom,mmcc: define clocks/clock-names for MSM8226 clk: qcom: gpucc-sm8550: Add support for graphics clock controller clk: qcom: Add support for SM8450 GPUCC clk: qcom: gcc-sm8450: Enable hw_clk_ctrl clk: qcom: rcg2: Make hw_clk_ctrl toggleable dt-bindings: clock: qcom: Add SM8550 graphics clock controller ... * clk-microchip: clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id clk: at91: sama7g5: switch to parent_hw and parent_data clk: at91: sckc: switch to parent_data/parent_hw clk: at91: clk-sam9x60-pll: add support for parent_hw clk: at91: clk-utmi: add support for parent_hw clk: at91: clk-system: add support for parent_hw clk: at91: clk-programmable: add support for parent_hw clk: at91: clk-peripheral: add support for parent_hw clk: at91: clk-master: add support for parent_hw clk: at91: clk-generated: add support for parent_hw clk: at91: clk-main: add support for parent_data/parent_hw |
||
|
Bjorn Andersson
|
e5d10d1d1a |
Merge branch '20230608125315.11454-2-srinivas.kandagatla@linaro.org' into clk-for-6.5
Merge the missing SC8280XP LPASS DeviceTree changes, which where brought in through a topic branch in order to be shared with the DeviceTree source files, but not merged into the clock tree until now. |
||
|
Stephen Boyd
|
b9a40506a2 |
Merge branches 'clk-imx', 'clk-microchip', 'clk-cleanup', 'clk-bindings', 'clk-ti' and 'clk-kasprintf' into clk-next
- Handle allocation failures from kasprintf() and friends
* clk-imx:
clk: imx: clk-imx8mp: improve error handling in imx8mp_clocks_probe()
clk: imx93: fix memory leak and missing unwind goto in imx93_clocks_probe
clk: imx: clk-imx8mn: fix memory leak in imx8mn_clocks_probe
dt-bindings: clock: imx8m: Add missing interrupt property
clk: imx: clk-imxrt1050: fix memory leak in imxrt1050_clocks_probe
clk: imx: composite-8m: Add imx8m_divider_determine_rate
clk: imx: scu: use _safe list iterator to avoid a use after free
clk: imx: drop imx_unregister_clocks
clk: imx6ul: retain early UART clocks during kernel init
clk: imx: imx6sx: Remove CLK_SET_RATE_PARENT from the LDB clocks
* clk-microchip:
dt-bindings: clocks: at91sam9x5-sckc: convert to yaml
dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml
clk: microchip: Use of_property_read_bool() for boolean properties
clk: microchip: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE
* clk-cleanup:
clk: fix typo in clk_hw_register_fixed_rate_parent_data() macro
clk: Fix memory leak in devm_clk_notifier_register()
clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes
clk: mvebu: Use of_get_cpu_hwid() to read CPU ID
MAINTAINERS: Add Marvell mvebu clock drivers
clk: mvebu: Use of_address_to_resource()
clk: tegra: tegra124-emc: Fix potential memory leak
clk: clocking-wizard: Fix Oops in clk_wzrd_register_divider()
clk: bcm: rpi: Fix off by one in raspberrypi_discover_clocks()
clk: sifive: Use devm_platform_ioremap_resource()
* clk-bindings:
dt-bindings: clock: drop unneeded quotes and use absolute /schemas path
dt-bindings: rcc: stm32: Sync with u-boot copy for STM32MP13 SoC
* clk-ti:
clk: keystone: syscon-clk: Add support for audio refclk
dt-bindings: clock: Add binding documentation for TI Audio REFCLK
dt-bindings: clock: ehrpwm: Remove unneeded syscon compatible
clk: keystone: syscon-clk: Allow the clock node to not be of type syscon
* clk-kasprintf:
clk: clocking-wizard: check return value of devm_kasprintf()
clk: ti: clkctrl: check return value of kasprintf()
clk: keystone: sci-clk: check return value of kasprintf()
clk: si5341: free unused memory on probe failure
clk: si5341: check return value of {devm_}kasprintf()
clk: si5341: return error if one synth clock registration fails
clk: cdce925: check return value of kasprintf()
clk: vc5: check memory returned by kasprintf()
|
||
|
Stephen Boyd
|
6e11940ab3 |
Merge branches 'clk-renesas', 'clk-determine-rate', 'clk-allwinner', 'clk-samsung' and 'clk-amlogic' into clk-next
- Make clk_ops::determine_rate mandatory for muxes * clk-renesas: clk: renesas: rzg2l: Convert to readl_poll_timeout_atomic() clk: renesas: mstp: Convert to readl_poll_timeout_atomic() clk: renesas: cpg-mssr: Convert to readl_poll_timeout_atomic() iopoll: Do not use timekeeping in read_poll_timeout_atomic() iopoll: Call cpu_relax() in busy loops clk: renesas: rzg2l: Fix CPG_SIPLL5_CLK1 register write clk: renesas: r8a779a0: Add PWM clock * clk-determine-rate: (71 commits) clk: sprd: composite: Simplify determine_rate implementation ASoC: tlv320aic32x4: pll: Remove impossible condition in clk_aic32x4_pll_determine_rate() clk: Fix best_parent_rate after moving code into a separate function clk: Forbid to register a mux without determine_rate ASoC: tlv320aic32x4: div: Switch to determine_rate ASoC: tlv320aic32x4: pll: Switch to determine_rate clk: tegra: super: Switch to determine_rate clk: tegra: periph: Switch to determine_rate clk: stm32: composite: Switch to determine_rate clk: st: flexgen: Switch to determine_rate clk: sprd: composite: Switch to determine_rate clk: ingenic: tcu: Switch to determine_rate clk: ingenic: cgu: Switch to determine_rate clk: imx: scu: Switch to determine_rate clk: da8xx: clk48: Switch to determine_rate clk: si5351: clkout: Switch to determine_rate clk: si5351: msynth: Switch to determine_rate clk: si5351: pll: Switch to determine_rate clk: si5341: Switch to determine_rate clk: cdce706: clkout: Switch to determine_rate ... * clk-allwinner: clk: sunxi-ng: a64: force select PLL_MIPI in TCON0 mux * clk-samsung: clk: samsung: add CONFIG_OF dependency clk: samsung: Re-add support for Exynos4212 CPU clock clk: samsung: Add Exynos4212 compatible to CLKOUT driver dt-bindings: clock: samsung,exynos: add Exynos4212 clock compatible * clk-amlogic: MAINTAINERS: repair pattern in ARM/Amlogic Meson SoC CLOCK FRAMEWORK clk: meson: pll: remove unneeded semicolon clk: meson: a1: Staticize rtc clk clk: meson: a1: add Amlogic A1 Peripherals clock controller driver clk: meson: a1: add Amlogic A1 PLL clock controller driver clk: meson: introduce new pll power-on sequence for A1 SoC family clk: meson: make pll rst bit as optional dt-bindings: clock: meson: add A1 Peripherals clock controller bindings dt-bindings: clock: meson: add A1 PLL clock controller bindings |
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Arnd Bergmann
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37d1fc51dd |
More Qualcomm driver updates for v6.5
The detection of split/non-split firmware files in the MDT loader is corrected. The Geni driver is updated to not enable unused interrupts, in some configurations. The count unit for MSM8998 in BWMON is corrected. RPM master stats driver is corrected to check for the right return value of devm_ioremap(). Support for socinfo version 18 and 19 are aded, and IPQ5300 is added to the list of platforms. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSLPJsVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fc9AQAMvf/8aE2FyhH3LE9n1otbRa82Lv 5MjvAM9N6PUJgMSuA71lZm6Bh3h/3SpbGjuRGkfGi4ZpkjZiI37ButZQq8YKVcOi hDPjGiF8oiO1wk+JEwrC29jgpL+37T7/7jSynO2cYfu+uKXt3MhF9kmDeIiydjyf hpN6IhGuyLm+dx38x9Vzsq4ew4uFNos+zP0ZInScSJV8UQ5sJjUCjQ4FDu1bHoFn wQXa0Bd5ObYJilh71on9eJO7dQYLapv5omHI0lM04cYpYGfPpSTmXQwnbpmL7xqF dyLiE+eq6jpi5yWIVpEFFwonty7Ixuq4yuMwMafYVGIriQ8a8J56HvfvZQ2FSb7D 1F/Rx74qkx1LEenNOBM5rUFyIGc93Up19DzFPNBX/WjJW0+7yBlXNUsg/bI2a/xV Z+jURxcUWKa/ugiqjMZRXQ7VXC2uhrjD8xn22+w8eyziRoPPecq5KITizHv3CkOT G7AhI69nFn8zhXHJ3cp4ci4AWzOCW4HXnTE9H8XMDFcu6hxylJDovrqCtt0nWqg+ QPKSqVtUF7BX/UMhhE5XdxqkxG//MyMN2W4dowxv+u35+6DCydyEm3XFuD85ETnt YJx4iC5n8IGfb5jfOIyLK0JHQNU9ijPSd9rssLRebh96m4H0Op9gHlxDHyXghaRS umZA+uKoxQQZhEXn =KYPl -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTWk8ACgkQYKtH/8kJ Uicu3hAAgerZS9Wdt+w+2cUhnkWWayByRwUmTvowFUR8vsbWLJVf1UwYQFiHVXhn BsPSSGWSRm3vyUZjZyv3GegoWLsxH3LD8s7QngjPpF75HI+2ekD8J+tLNRiNqPll /cZ1iQFVoTtfYUzAFpgBrYlFYV9P7B/6ghjEhuMc0HWLN4xFJ+13HL5NdCtvbDyn zTrBSDlz3j94+PoS6n/y+9r8nLNZyp5Li5FUEoXf7uABI9dUqWokoSDV1hRA7zeF MewEEcH7p5AZiL54L7cfLAlKwPQrUNYjerNxeljrwcp621wECniB030JmYKslSzS ccfracaf7EBqRuu4SYH47VeLadikpBxrjP39CJFAlKQhB2X3uUNrSYjLyTLDkRRA X/SN4sbm0ipToa6FlGJ68D3Ca+MHs541U6fhMgQuJ+S4D0pBjbmKUmQfs76L2Eu4 0ZDyYCQuJFmvd/P6ZKjX6hmkxDJ4OItop+K6doedAFf0/tAp6APry05aF56mbhDW tsBJ0ABlFNY73wMhSu7HMm2rB7mDl3LnVfv67HrWAzaB+c23rkUDki67a1Gtr3lV mG05JMSG2nETBRPv+II3pG/q7GzJwlqzHNxy3mwtBRILlzLjEl5fK+HgZRtGN8zr 7620aNOKR3lA7XGih1/ztlbpVqgH0c6Ahnm3pCHoQJJjMrK8oWI= =YKVY -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers More Qualcomm driver updates for v6.5 The detection of split/non-split firmware files in the MDT loader is corrected. The Geni driver is updated to not enable unused interrupts, in some configurations. The count unit for MSM8998 in BWMON is corrected. RPM master stats driver is corrected to check for the right return value of devm_ioremap(). Support for socinfo version 18 and 19 are aded, and IPQ5300 is added to the list of platforms. * tag 'qcom-drivers-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencer dt-bindings: sram: qcom,imem: document qdu1000 soc: qcom: icc-bwmon: Fix MSM8998 count unit dt-bindings: soc: qcom,rpmh-rsc: Require power-domains soc: qcom: socinfo: Add Soc ID for IPQ5300 dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300 soc: qcom: Fix a IS_ERR() vs NULL bug in probe soc: qcom: socinfo: Add support for new fields in revision 19 soc: qcom: socinfo: Add support for new fields in revision 18 dt-bindings: firmware: scm: Add compatible for SDX75 soc: qcom: mdt_loader: Fix split image detection Link: https://lore.kernel.org/r/20230615163104.1461905-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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a08000d5e0 |
Qualcomm driver updates for v6.5
Konrad Dybcio is promoted, from reviewer, to co-maintainer. The mdt_loader gets a fix to the detection of split binaries, where the previous logic sometimes concluded that the first segments was not split, in a split image. The unconditional calling of scm_pas_mem_setup() turns out to cause a regression and is reverted. The altmode subfunction of pmic_glink is enabled for SM8450. A new driver for exposing power statistics from the RPM, for debugging purposes, is introduced. OCMEM gets a debug prints of the hardware version, QMI helpers are transitioned to alloc_ordered_workqueue() and an error message in ramp_controller is improved. An API is introduced to the SMEM driver to allow other drivers to query the SoC id, rather than open-coding the parsing of the relevant SMEM item. This is then used to clean up the Qualcomm NVMEM-based cpufreq driver. Socinfo is extended with knowledge about IPQ5018, IPQ5312 and IPQ5302. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSFHJsVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FrtoQAMUN2gF5ZP3rlSEkQbKNMDhNHXVw S8AexPk6Qw8BcEBOD4YPqrmfrMvNP7Bqh3QkfS/7m5vx0o8bUOw+Xz+C4+9LSUD7 /qW29GlQllwMuRNOdH3J/nYXwpV5WJyiSF/jXy0/GRbz+D/XYSNDC57z/lXTcKKq dYJrKxms6EF4AgHe88V0bmk6/V4xfa5p6xW3pCG7GLqNHOvhZ16oUmoPiZGVpQMk go/HsoIB00HktKflTLOUXJWD6qVOVNCaQQEarx+zY1txfmvpVGL+PO6Eaxt00Sa4 pHRvB0CIZPNvdDWELfsfRx6DbPBJRGBlneag04BI918fx4X+jn4uP+1jzw9am03U M78k0LGBY23Psy6KhoMu5MM4Cntt3kTQ0SwHl/xayzTrAhK2xdmd1bo67ArRl+HX OZrZ7Se3Cm16CAWqsW42so6MJeDllc8d/ahN/e2NwsNy1lhosK06jRJEdh3N238D ouL56HoxrweYB0kbK4TkPLewrLZC7DYnr0KMVsPhsSraeJBaBPOVZDhuNSUXXMtf WdyCRMMxKU3OweLcJiKuGFzNqr2963341Y6NlD+tf1Uy5IEnbIp4jFi9BsJBNVZt NucOXJYm5OJeAHp8BcMFbnL8uA1NqEYQXwezodPSIGqHzxBtGf6f0hALsIpiUQnA GLDp99yVujEN2dsE =9Fv4 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTVmkACgkQYKtH/8kJ Uid08g//b5kJZnsiWA43LrkblMSEdZoeijrn+x2NU95YQ4s/oz2RnUtgNCGDhM84 Fi60PzU5L1JVj6GVeL51J5jlBGKzGqe4FfPTN4aPlSV4Z0B3cuevgWmHnw4Mh/zj t/1b5QVVZxbKKxb8MP+U2iAvyxVwIhIA4zehh0+XGagV3qquURO7QLtLUg42Yx51 HFLADq2JI8trm+CjjCNBv9mq7EipC/g0nbsCs98nxl/sPC7PqtNxL6BXCuz3a8BX JvA1LVRP2JYkQfb6SMnTFiqkT6LdB7bt6oXZdnwnsNTI1nhFqbMJRMsToWb3HEvv 9lprraDpaufbzvB1b+x8Aar4OmbbWaY2ZpNJqqzCM5eVW2Zs/p5J+ZfOYVigtQYO qIQvENv+eKETu4nVvdlf72FPAVe+GXnVAcl3LEwhMUxYcRMha4JT0i8mndnCzpT+ tZLdkBMp/t7rZPIa7D+07Xmorefw9e9rwynQg2C2yw3AV5v7j09dPJDFITFcF6Yl 7ADtoy7zHTTv6/0n04RfPC9jPMoi8RbPoVNMVAWW7t7S0984o3gqWXJPLWJdTzA/ ODOupqmvSpZld1rUklKKH/dY/Ha7iUTSci7rZrXSafXR8LBEn2FO6ehZqUvk7T/u qM3rs5wacHP2OcNDtwHHJoyfHXpxaQ2JqVOcUNkcdcwhN9dbdxA= =4/0b -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.5 Konrad Dybcio is promoted, from reviewer, to co-maintainer. The mdt_loader gets a fix to the detection of split binaries, where the previous logic sometimes concluded that the first segments was not split, in a split image. The unconditional calling of scm_pas_mem_setup() turns out to cause a regression and is reverted. The altmode subfunction of pmic_glink is enabled for SM8450. A new driver for exposing power statistics from the RPM, for debugging purposes, is introduced. OCMEM gets a debug prints of the hardware version, QMI helpers are transitioned to alloc_ordered_workqueue() and an error message in ramp_controller is improved. An API is introduced to the SMEM driver to allow other drivers to query the SoC id, rather than open-coding the parsing of the relevant SMEM item. This is then used to clean up the Qualcomm NVMEM-based cpufreq driver. Socinfo is extended with knowledge about IPQ5018, IPQ5312 and IPQ5302. * tag 'qcom-drivers-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (23 commits) soc: qcom: ocmem: Add OCMEM hardware version print cpufreq: qcom-nvmem: use helper to get SMEM SoC ID cpufreq: qcom-nvmem: use SoC ID-s from bindings soc: qcom: smem: introduce qcom_smem_get_soc_id() soc: qcom: smem: Switch to EXPORT_SYMBOL_GPL() soc: qcom: socinfo: move SMEM item struct and defines to a header soc: qcom: mdt_loader: Fix unconditional call to scm_pas_mem_setup MAINTAINERS: Add Konrad Dybcio as linux-arm-msm co-maintainer dt-bindings: sram: qcom,imem: Document MSM8226 soc: qcom: socinfo: Add Soc ID for IPQ5312 and IPQ5302 dt-bindings: arm: qcom,ids: add SoC ID for IPQ5312 and IPQ5302 soc: qcom: socinfo: Add IDs for IPQ5018 family dt-bindings: arm: qcom,ids: Add IDs for IPQ5018 family soc: qcom: Introduce RPM master stats driver dt-bindings: soc: qcom: Add RPM Master stats soc: qcom: qmi: Use alloc_ordered_workqueue() to create ordered workqueues soc: qcom: ramp_controller: Improve error message for failure in .remove() dt-bindings: soc: qcom: smd-rpm: allow MSM8226 over SMD soc: qcom: rpmpd: use correct __le32 type dt-bindings: soc: qcom: eud: Fix compatible string in the example ... Link: https://lore.kernel.org/r/20230611010044.2481875-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Greg Kroah-Hartman
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92852219a3 |
interconnect changes for 6.5
This pull request contains the interconnect changes for the 6.5-rc1 merge window which is a mix of core and driver changes with the following highlights: - Support for configuring QoS on the Qualcomm's RPM-based platforms, that required special handling of some interface (non-scaling) clocks. - Support for clock-based interconnect providers for cases when clock corresponds to bus bandwidth. This is used to enable CPU cluster bandwidth scaling on MSM8996 platforms. One patch is touching a file in the clock subsystem that has been acked by the maintainer. Core changes: interconnect: add clk-based icc provider support interconnect: icc-clk: fix modular build interconnect: drop unused icc_get() interface Driver changes: interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks interconnect: qcom: rpm: Drop unused parameters interconnect: qcom: rpm: Set QoS registers only once interconnect: qcom: rpm: Handle interface clocks interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore interconnect: qcom: msm8996: Promote to core_initcall interconnect: qcom: rpm: allocate enough data in probe() dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes Signed-off-by: Georgi Djakov <djakov@kernel.org> -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJkkyQsAAoJEIDQzArG2BZj7GQQAMLrW2sZcxJhq5Fe2wKV4W5M ItIE7xME1Vk9PvuulZIJ57tZIKfOTJpXwwbh6qWJOejYGePrmgtT89iS0fadO81f yCKv2O2hD+Xukv+gFzyuX3AYEfur7myaCTfmRx93xVDYUz0d95Kj4BlYA84xkjXU i+wte+nX/nw9W78s+Y9BHcs389a3HTre0WR1c0eOboPmt8D0U9cBOdiZMHkSUc+4 /8RDUYRdsTBR0AblpPExm2JjoSRKUGEw7N8ZFZhOXaejCjmGoeVXeTdnHO+tjXaq HQ9290C9Pz0BZWdKXaFFfjc4Wqu3RYjdXJmHNo74a4sFHE+H/j33eRSgC24qMWg5 5hRsH8+gv0ZhoyLv6Ucd2MRQQvvUYCLNNeTlQ2/RkOFuqewLKqpXCiihbuKUpOi0 CLeWKTDjNlIM5murJURXX88+xjZ1UvpuBXe/U+i9jrhjSQ6IjnAppoDw7anrrxTE ldLGFPzJoWL8VO1H0povS08/kd25+fgkjL/3pZHagSMLjDWNOXA+xDLkRYGBCNi7 rZpLT/4nBFTcrcYEsJ2EPAqHYK19kD76NVrz+Fj2gzF9Ych3q+2MSkLb132Qkyzf qLn3SqWJQoPAhy0kQbOt3XBnYon8QjVEpcZIWf9J3Qr2au4SdHi7hr3ki86a5Pfz ne03bJDC237hO6q4jY0b =Smk9 -----END PGP SIGNATURE----- Merge tag 'icc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: interconnect changes for 6.5 This pull request contains the interconnect changes for the 6.5-rc1 merge window which is a mix of core and driver changes with the following highlights: - Support for configuring QoS on the Qualcomm's RPM-based platforms, that required special handling of some interface (non-scaling) clocks. - Support for clock-based interconnect providers for cases when clock corresponds to bus bandwidth. This is used to enable CPU cluster bandwidth scaling on MSM8996 platforms. One patch is touching a file in the clock subsystem that has been acked by the maintainer. Core changes: interconnect: add clk-based icc provider support interconnect: icc-clk: fix modular build interconnect: drop unused icc_get() interface Driver changes: interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks interconnect: qcom: rpm: Drop unused parameters interconnect: qcom: rpm: Set QoS registers only once interconnect: qcom: rpm: Handle interface clocks interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore interconnect: qcom: msm8996: Promote to core_initcall interconnect: qcom: rpm: allocate enough data in probe() dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes interconnect: icc-clk: fix modular build clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq interconnect: drop unused icc_get() interface interconnect: qcom: rpm: allocate enough data in probe() interconnect: qcom: msm8996: Promote to core_initcall interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks interconnect: qcom: rpm: Handle interface clocks interconnect: add clk-based icc provider support dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF interconnect: qcom: rpm: Set QoS registers only once interconnect: qcom: rpm: Drop unused parameters interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks |
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Arnd Bergmann
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055fdcac93 |
More Qualcomm ARM64 DTS changes for v6.5
This introduces support for the Qualcomm SDX75 platform, with the IDP reference board. On IPQ5332 the RDP474 board is added and on IPQ9574 the RDP454 is introduced. On SC8280XP, and hence Lenovo ThinkPad X13s, GPU support is added. For QDU1000, SDM845, SM670, SC8180X, SM6350 and SM8550 the RSC is added to the CPU cluster power-domain to flush sleep & wake votes as the cluster goes down. On IPQ5332 additional reserved-memory regions to improve post mortem debugging. UART1 is added. The MI01.2 board is renamed RDP441 and the RDP474 is added. On IPQ8074 critical thermal trip points are defined. As with IPQ5332 additional reserved-memory regions are used to improve post mortem debugging. Thermal sensors (tsens) are added and zones defined. The crypto engine is added, and support for the RDP454 board is added. Across MSM8916 and MSM8939 pinctrl state definitions are cleaned up and the purpose of msm8939-pm8916 is documented. MSM8939 has regulator definitions cleaned up, following to the previous effort on MSM8916. CPU Bus Fabric scaling support is added to MSM8996 Pro. On QCM2290 CPU idle states are added. For QDU1000 SDHCI is introduced and enabled on the IDP to gain eMMC support. IMEM and PIL information regions are defined for improved post mortem debugging. The Qualcomm Robotics RB2 kit gets its on-board buttons described. A few fixes are introduced for the newly merged SC8180X, in particluar the DisplayPort blocks are moved to the MMCX power domain to avoid power being reduced prematurely during boot. The SC8280XP GPU is added and enabled for the Lenovo Thinkpad X13s, and resets for the soundwire controllers are added. The OUI is specified for ethernet phys on SA8540P Ride platform, to avoid reset issues. Charger description is added to the PMI8998 PMIC and enabled across OnePlus 6/6T, SHIFT SHIFT6mq and Xiaomi Pocophone F1. On SM6350 CPU idle states and UART1 are added. And SM6375 gains GPU clock controller and IOMMU definitions. The Fairphone FP4 gains Bluetooth support. SM8150 is transitioned to use 2 interconnect-cells, and the USB interconnect path is described to ensure buses are adequately voted for. The same changes are done for SM8250, and the resolution of the static framebuffer on Sony Xperia 1 II and 5 II are corrected. The USB bus paths are also added to SM8350, SM8450 and SM8550. On SM8550 DisplayPort nodes are added, as is the PWM controller for driving the notification LED and the RTC is enabled. For the MTP and QRD boards, the soundcard and audio codecs are defined. A Tegra change, related to LP855X binding changes, was accidentally picked up and dropped again later. A number of DeviceTree fixes identified through validation was introduced as well. Additionally a few nodes got their default status changed to avoid unnecessarily having to enable them (e.g. the mdp/dpu node). -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSLOjsVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FlyUP/0PZFIRutqnwwr/daOZAhDgw6pQW jseUFIUb9yKan8KJZcHOf38xxqfj/bllQQNIQeM8qw03e7LJf/Mcteg3FYNgxD9m vAWdQby2ZBcAYy3Qxjc3H+cb2fPV8yEJZ4JX/yOuLPfx9zE8HMoT8M9JBHZlZc8T 0fzgVxqRz1wt5Qjzv+BsWg4GUiTARtRbYxDVzdFZFDF6f7Xcpdsq+HaImJdYisXh m/2lQ34rDBTVOMN6Og5U7lGjfCyk6hn3k0OoSpObLRBNV34JH6ViDVhmNbFWKNNS QGFDAEa+jjQDrEo2cUHiHfnlKzcQpheLoco7MNkzDwy/8Rd3/k3ndj/+oCpgGea5 VFTb0LygJPQnHfggzpxc+v2pBfoocEUvKrI+sluXeNnLua+jvlLz6Z8Wm6mVaBZv hzw4NqaXHRtzqgjo/37t7Hwns+uyd+rg/gjh8xfdu65/kVZiTstK1BGVCoKMs1LD J0UcQGaevfBH9+EYNcKly5qjEMhsUxwn4i7oyjerdQ7Wt4nwzPqfs7zv513Ns5bO eLG49FsCZjzvAn4AC3R1POPVrP2RBg/zeBzL/34gkgBLr/TR1k1zyPWxovb6Tuq9 8R3T4XBA1kwh1c7R5av1033dyvW4N8y6vp9z+kExuPz4qQ+SsWKoXAeM2budkTQ/ c3oBU6U+BH9oCvSV =Fga/ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEgoACgkQYKtH/8kJ UifYRg//Uu6CMkGFJCfMVNS8Z0lykAW3FtEupzi+lWVP+2i+QsR8FXTZ3EumyBA6 QoRX1FtEKtRdJatMUgWlCbv8newKiII9fwKrV/EK7u/CTC79zX9ak3DonxXu7Z2i a6dzH5GVnHfVe7BTQdJuOylxKneMNNECmnkYYUWry1LES1zLhUZy67GsdbDSCxpF evzT8ly6NLSSJOJKXlcmwzcGMXhi7HrCdvsZhPdJZ1cN8c/tfrj+S8kmHxs5Qw3B TOjFi14w2CA/duvwQLV+0KIuHc/Vn8oYI0NnD96aahlZA+QFMk1hsdeETtXL6guf S4FKB+PNVtFnMCMq25xsTOaqEKjse8+xBgTN9TAvB67TJUQ3J2zibn1jjaGjtej7 w2ry8FC/pgSFbs9KftAL7mDFCICo7qyOhpfuuG+s+ti1m7h5Fon2a+UKc0T0m80w qR1YXohi6rzXTlcV92m2CRZIvSBPf1UQAnFqyjZBIvePpD8/TqYs2M+IIM0dmaBC Xs+n+3ORIte7hws5BodXaWwsi0NTFm8rQaeK94Cj100kWMxrKZS5JIIdZ/Dy0rRk LXWKj1W4h6rrwM34r5oeyc0k9pYoc7coDItEqu8VyKz7pj9rjcG8B+lqdp6QjNK+ +gNnVF4UmEbRpG6EZm9uC9IshiIQp/8DhO/lRZMb37v1YEB6/mg= =ThxV -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt More Qualcomm ARM64 DTS changes for v6.5 This introduces support for the Qualcomm SDX75 platform, with the IDP reference board. On IPQ5332 the RDP474 board is added and on IPQ9574 the RDP454 is introduced. On SC8280XP, and hence Lenovo ThinkPad X13s, GPU support is added. For QDU1000, SDM845, SM670, SC8180X, SM6350 and SM8550 the RSC is added to the CPU cluster power-domain to flush sleep & wake votes as the cluster goes down. On IPQ5332 additional reserved-memory regions to improve post mortem debugging. UART1 is added. The MI01.2 board is renamed RDP441 and the RDP474 is added. On IPQ8074 critical thermal trip points are defined. As with IPQ5332 additional reserved-memory regions are used to improve post mortem debugging. Thermal sensors (tsens) are added and zones defined. The crypto engine is added, and support for the RDP454 board is added. Across MSM8916 and MSM8939 pinctrl state definitions are cleaned up and the purpose of msm8939-pm8916 is documented. MSM8939 has regulator definitions cleaned up, following to the previous effort on MSM8916. CPU Bus Fabric scaling support is added to MSM8996 Pro. On QCM2290 CPU idle states are added. For QDU1000 SDHCI is introduced and enabled on the IDP to gain eMMC support. IMEM and PIL information regions are defined for improved post mortem debugging. The Qualcomm Robotics RB2 kit gets its on-board buttons described. A few fixes are introduced for the newly merged SC8180X, in particluar the DisplayPort blocks are moved to the MMCX power domain to avoid power being reduced prematurely during boot. The SC8280XP GPU is added and enabled for the Lenovo Thinkpad X13s, and resets for the soundwire controllers are added. The OUI is specified for ethernet phys on SA8540P Ride platform, to avoid reset issues. Charger description is added to the PMI8998 PMIC and enabled across OnePlus 6/6T, SHIFT SHIFT6mq and Xiaomi Pocophone F1. On SM6350 CPU idle states and UART1 are added. And SM6375 gains GPU clock controller and IOMMU definitions. The Fairphone FP4 gains Bluetooth support. SM8150 is transitioned to use 2 interconnect-cells, and the USB interconnect path is described to ensure buses are adequately voted for. The same changes are done for SM8250, and the resolution of the static framebuffer on Sony Xperia 1 II and 5 II are corrected. The USB bus paths are also added to SM8350, SM8450 and SM8550. On SM8550 DisplayPort nodes are added, as is the PWM controller for driving the notification LED and the RTC is enabled. For the MTP and QRD boards, the soundcard and audio codecs are defined. A Tegra change, related to LP855X binding changes, was accidentally picked up and dropped again later. A number of DeviceTree fixes identified through validation was introduced as well. Additionally a few nodes got their default status changed to avoid unnecessarily having to enable them (e.g. the mdp/dpu node). * tag 'qcom-arm64-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (94 commits) Revert "arm64: dts: adapt to LP855X bindings changes" arm64: dts: qcom: sc8280xp: Enable GPU related nodes arm64: dts: qcom: sc8280xp: Add GPU related nodes arm64: dts: qcom: msm8939-pm8916: Mark always-on regulators arm64: dts: qcom: msm8939: Define regulator constraints next to usage arm64: dts: qcom: msm8939-pm8916: Clarify purpose arm64: dts: qcom: msm8939: Fix regulator constraints arm64: dts: qcom: msm8939-sony-tulip: Allow disabling pm8916_l6 arm64: dts: qcom: msm8939-sony-tulip: Fix l10-l12 regulator voltages arm64: dts: qcom: msm8939: Disable lpass_codec by default arm64: dts: qcom: msm8939-pm8916: Add missing pm8916_codec supplies arm64: dts: qcom: qrb4210-rb2: Enable on-board buttons arm64: dts: qcom: msm8916: Drop msm8916-pins.dtsi arm64: dts: qcom: msm8916/39: Rename wcnss pinctrl arm64: dts: qcom: msm8916/39: Cleanup audio pinctrl arm64: dts: qcom: apq8016-sbc: Drop unneeded MCLK pinctrl arm64: dts: qcom: msm8916/39: Consolidate SDC pinctrl arm64: dts: qcom: msm8916/39: Fix SD card detect pinctrl arm64: dts: qcom: msm8996: rename labels for HDMI nodes arm64: dts: qcom: sm8250: rename labels for DSI nodes ... Link: https://lore.kernel.org/r/20230615162043.1461624-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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60c2f542a7 |
Qualcomm ARM64 DeviceTree updates for v6.5
This introduces the RDP442 and RDP433 reference devices on IPQ5332 and IPQ9574, respectively. RDP418, RDP433, RDP449 and RDP453 on the IPQ9574 are added. On MSM8939 the Square T2 board and the Sony Xperia M4 Aqua is added. Support for Acer Apire 1, built on the Snapdragon 7c platform is introduced. Fxtec Pro1X on SM6115 is added. Lastly long floating support for SC8180X and the Lenovo Flex 5G, and the Primus reference device, has been added. On IPQ5332 and IPQ6018 QFPROM support is introduced, and as described above the RDP442 board on the prior. Download mode support and various reserved-memory regions are also introduced on IPQ6018. IPQ8074 gains another SPI controller. On IPQ9574 CPU frequency scaling, low speed busses, RNG, Watchdog, qfprom, SMEM and RPM are introduced. As are support for four new board, mentioned above. MSM8916 gains a range of structural improvements, to better suite the various boards supported. Regulator constraints are corrected and their states are adjusted to match reality (e.g. always-on regulators marked as always-on). BQ Aquaris X5 gains support for front flash LED. As mentioned above, MSM8939 support is introduced with support for boards from Sony and Square. MSM8953 gains DMA support in I2C masters. MSM8996-based Sony Xperia boards gains description of their RGB notification LED. On SA8775P support for UFS, USB, GPU clock and iommu controllers, PMU, AOSS, watchdog and missing low-speed controllers are added. On the Ride platform UFS, USB and an i2c bus are enabled. iommu properties are added to QSPI on both SC7180 and SC7280. LPASS clocks are adjusted and MDP node cleaned up slightly, on SC7180. As mentioned above, support for Acer Aspire 1 is introduced. Long lingering patches introducing SC8180X, the Lenovo Flex 5G and the Primus reference device has been merged. On SC8280XP ethernet is added and enabled on the automotive ride platform. An SDC controller is introduced and enabled on the SC8280XP CRD. On the Lenovo Thinkpad X13s and the CRD reference device the USB SuperSpeed phy is added to the Type-C graph, to enable support for orientation switching. Fairphone 3 gains support for its notification LED. On SDM845 the iommu stream for QSPI is defined, SHIFT SHIFT6mq gains support for flash LED and the RB3 (DB845c) board gains support for bonded/dual DSI-mode, to allow 4k output. On SM6115 CPU idle-states, crypto engine support and SuperSpeed USB PHY are introduced. As mentioned above Fxtec Pro1X is introduced. On the QRB4210 Robotics Platform RB2 USB, Audio and Compute DSPs, display, CAN-bus and GPIO LEDs are introduced, fixed regulators are described and the SD-card description is corrected. Support for crypto engine is added to SM8150, while Sony Xperia 1 and 5 gains SD-card support, camera regulators and GPIO line names sorted out. SM8250 also gets support for crypto engine, and Sony Xperia 1 II and 5 II gains support for hardware video accelerator. Crypto engine is introduced for SM8350 as well. The HDK gets the USB Type-C graph described for Superspeed orientation switching and DisplayPort output. On SM8450 video clock controller and crypto engine are added, missing opp levels are introduced and the USB Type-C graph is defined for orientation switching and altmode. SM8550 gains GPU and video clock controllers and missing opp levels are added. The WCD9385 audio codec is added for the SM8550 MTP and on the QRD PCIe, USB, audio display and flash LED are added. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSFGfkVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FeKoP/RFCA0hnqP0TGgzQq7TV1//WbVuZ 5fxpWhSKYeb6e+oOJZdu/Xi7VwSWesZwQQkMRaEOXUpMGhtWBfLQEHc6FQiAzGkv h3GrOLQ1qqmfYEqDxYv4CgKjpO+w5Zx2uNOZkbRDRumT0EQ45T0hypYmRefBPq8s bOxNmRgY6goNZalZBb0HWvdZtfYB1tlrjVn5+rpEZb031KGhCSOH8SWx8wUdUHrj 7EYR4EeQQsJZETiinU3F8l69eNUBwAi8TAW350A3nJj+FPZqwVhIhQKCR/bCZqXC U9vwcaqgYKi8rY5FR+bwJsiX4hY8W9bjq7pzrJyNvXsLtIeJ3jRnbF8z4SvNitOF UMOkQ9f6WrToRNSrwFhLB/ipV/TbnnE/MNzIxCwQ5W1BRYn7Tri1Ws61I/Kl1/ML eOWl6CSWzNW5lfkHumdOzydd4T43ECqqgNLEBTCpNRo7d/4XN/TCUK4tWJqb+4ou 1aOG6/ujy6uhlocd0mZ1xPMDBrFNCrC4/BRj2hCmbuBE3Qs/AHHrF5LLMTkZBKHd Mip2gUKwqi2p4l0/KJxSSj0snrifUqU5V1QCchwcMFmt62mrfRU2u7Xoy9s7vlyP pbQEF/Pu91Yr5nUiBQEU77L5a9tTm0eI1iFl8GwBzZP7R46ahnAu3BQc/MXaPax/ Z9hrTrB9y610Iuzy =OvdD -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSD3wACgkQYKtH/8kJ UidMjQ//YH19+b3UZ3O4r3sIoGTNB1rajNHCX72wwzQAdaHSMOTOUdkXradtstyp EPNyChMERvBGq2i16B0mEk9IiQ4y4CVwR9l3FZcaasV25RhfcGX3K1Wqxuepc1Hu OELo8W9Ih7rSg7paNj6YfJq1ka+AldZWPvtQG000czq59ZnUn7JvEeW7hd5BOdCJ O5RloIxHhLIOSyyc+sK0d3hXLjcZ8Od0Pnu/QYMzslmtc7YLaRgs0F5pxwz51k/P Uc+eOscCGcSHilmW7IE/IlevElg0GssyRn/BZ5121tMMKEYjEeR0EUy7I8zPaG45 osKJQ5R7NBd2h185ZXprskd9drvQ8uwv8kxRs5GFF+cK+3PE3TtoipmBycEQROcH 7WkQg7ffiPXT7Na+yTWqUXwnwzr/nhir7HTVx7VgBqmdUIzJKdqAbVLw/PTm0B6M QXUZfIS8gZFLePYwzkYqhYcTgtT6ZfEY5aN2/vpI0xyZsU0Z6nbFzPxlI+4rlDXm eZ7nD42RzifEqJUm7yKwGPkyY1U8rbwh4kNdaxZPk4ouB1puEYbF+Neo95MKlpRY ODEz0u6oVvJ2Ddg/RxFDtwB3hUXupc2qZcE92Smq4Two9wjgTkuSb3A3+8CEjXqH VFhBY65NxnwVEaabxE4wK9+wnLUnswza988BkkY7YrI+G8EZJL4= =jxMR -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 DeviceTree updates for v6.5 This introduces the RDP442 and RDP433 reference devices on IPQ5332 and IPQ9574, respectively. RDP418, RDP433, RDP449 and RDP453 on the IPQ9574 are added. On MSM8939 the Square T2 board and the Sony Xperia M4 Aqua is added. Support for Acer Apire 1, built on the Snapdragon 7c platform is introduced. Fxtec Pro1X on SM6115 is added. Lastly long floating support for SC8180X and the Lenovo Flex 5G, and the Primus reference device, has been added. On IPQ5332 and IPQ6018 QFPROM support is introduced, and as described above the RDP442 board on the prior. Download mode support and various reserved-memory regions are also introduced on IPQ6018. IPQ8074 gains another SPI controller. On IPQ9574 CPU frequency scaling, low speed busses, RNG, Watchdog, qfprom, SMEM and RPM are introduced. As are support for four new board, mentioned above. MSM8916 gains a range of structural improvements, to better suite the various boards supported. Regulator constraints are corrected and their states are adjusted to match reality (e.g. always-on regulators marked as always-on). BQ Aquaris X5 gains support for front flash LED. As mentioned above, MSM8939 support is introduced with support for boards from Sony and Square. MSM8953 gains DMA support in I2C masters. MSM8996-based Sony Xperia boards gains description of their RGB notification LED. On SA8775P support for UFS, USB, GPU clock and iommu controllers, PMU, AOSS, watchdog and missing low-speed controllers are added. On the Ride platform UFS, USB and an i2c bus are enabled. iommu properties are added to QSPI on both SC7180 and SC7280. LPASS clocks are adjusted and MDP node cleaned up slightly, on SC7180. As mentioned above, support for Acer Aspire 1 is introduced. Long lingering patches introducing SC8180X, the Lenovo Flex 5G and the Primus reference device has been merged. On SC8280XP ethernet is added and enabled on the automotive ride platform. An SDC controller is introduced and enabled on the SC8280XP CRD. On the Lenovo Thinkpad X13s and the CRD reference device the USB SuperSpeed phy is added to the Type-C graph, to enable support for orientation switching. Fairphone 3 gains support for its notification LED. On SDM845 the iommu stream for QSPI is defined, SHIFT SHIFT6mq gains support for flash LED and the RB3 (DB845c) board gains support for bonded/dual DSI-mode, to allow 4k output. On SM6115 CPU idle-states, crypto engine support and SuperSpeed USB PHY are introduced. As mentioned above Fxtec Pro1X is introduced. On the QRB4210 Robotics Platform RB2 USB, Audio and Compute DSPs, display, CAN-bus and GPIO LEDs are introduced, fixed regulators are described and the SD-card description is corrected. Support for crypto engine is added to SM8150, while Sony Xperia 1 and 5 gains SD-card support, camera regulators and GPIO line names sorted out. SM8250 also gets support for crypto engine, and Sony Xperia 1 II and 5 II gains support for hardware video accelerator. Crypto engine is introduced for SM8350 as well. The HDK gets the USB Type-C graph described for Superspeed orientation switching and DisplayPort output. On SM8450 video clock controller and crypto engine are added, missing opp levels are introduced and the USB Type-C graph is defined for orientation switching and altmode. SM8550 gains GPU and video clock controllers and missing opp levels are added. The WCD9385 audio codec is added for the SM8550 MTP and on the QRD PCIe, USB, audio display and flash LED are added. * tag 'qcom-arm64-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (195 commits) arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G arm64: dts: qcom: sc8180x: Introduce Primus arm64: dts: qcom: sc8180x: Add pmics arm64: dts: qcom: sc8180x: Add display and gpu nodes arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes arm64: dts: qcom: sc8180x: Add PCIe instances arm64: dts: qcom: sc8180x: Add QUPs arm64: dts: qcom: sc8180x: Add thermal zones arm64: dts: qcom: sc8180x: Add interconnects and lmh arm64: dts: qcom: Introduce the SC8180x platform arm64: dts: qcom: msm8916: Move aliases to boards arm64: dts: qcom: pm8916: Rename &wcd_codec -> &pm8916_codec arm64: dts: qcom: msm8916/39: Clean up MDSS labels arm64: dts: qcom: msm8916/39: Use consistent name for I2C/SPI pinctrl arm64: dts: qcom: msm8916/39: Rename &blsp1_uartN -> &blsp_uartN arm64: dts: qcom: msm8916: Rename &msmgpio -> &tlmm arm64: dts: qcom: qrb4210-rb2: Enable USB node arm64: dts: qcom: sm6115: Add USB SS qmp phy node arm64: dts: qcom: ipq5332: add support for the RDP442 variant dt-bindings: arm: qcom: document MI01.3 board based on IPQ5332 family ... Link: https://lore.kernel.org/r/20230611004944.2481596-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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a9c7f8d0cf |
arm64: tegra: Device tree changes for v6.5-rc1
This introduces support for the IGX Orin and Jetson Orin Nano devices and enables various additional features on the Jetson AGX Orin and Jetson Orin NX. This also enables some basic thermal support to prevent the devices from overheating. Support for the GPU on the Google Pixel C is enabled and various minor issues are fixed and cleaned up. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmSDSOsTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zobIYEACmgNyMW0vHcRRQcLo9RTqfOB0Pncy3 BmZBU4MeebkxFsVFDMfWUyHrkptBporGkUyAWJw2RBORvrCbLj1OhW1y8V0GRl4s SIke/oC1834PKk5a6jmaauOYfFiHCyXzrwGnWFIYzIX+7Xn9tDsXjcJQWn1ngmJr xrKxp/Mp/3dsgZDaJEPhHAn9rWuGDrBMLhVK0uTAjh9Rx7cy7KE3qMVzBzp2R3Mg VK8vay6F2pJ3LkdozNX/Q56j77mfX7GFRPITulWblRLVRstW7g0qwrZd/jcQS74h 2wpbJ5FdS/0pX9LBN2tgUuDtGxwXHvUl0/D4P7QyuOLpmK9CMt+mM8N7JwjErJn1 A7A6BF6F18r+pQaqzfUaZcayrVqfwgDrFgIOOBNpvcvsCc1W6vnf0LSQOkCORY+K YNnCZvA81R4j0MuC8Q4j9hsdp2K0Ykdk32usAnSAM4E/pZhlwPcAFJm+EZ6Swd2Z eshCHVPXbIr3GJsUGhzm3bscjpD5sad500eWQrBGWRSioBEwCF+I+IXd5+v/7Xc+ vp3NUyj4bJCCmV5OmnuaAZQMVpC3x7pXaQHCakZ9gLbGoUhf9qcS+lFWPM82tYXA kLn42PS9YjLCyigKdGYBiwXv3t2qQ7pm3U5WnMUY9vx6snPCa7MKIiTBQ3H9b0z3 9tYmXmZBus1+Gg== =HPjl -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSDWcACgkQYKtH/8kJ UicmYg//bu3NoTNoQrez14Q0giWmFwRAT4YOXGUVGDY8Uac+lcc077x5Z/y3b6Ho vmczi94COl6c14WA0wSHbl+lINAV8LkQimJPMm7kpsYObGCHfwEM3k33fz5aJW8Q 0e1MI0r5e/9pcFpuw58sqNjNnRN1aJLgVfJshSUUtA1QrcOlT1E1dm7kzpi66Rvz A61l8YLWMdwvfDxLz/jWi8r9LxcPtWchLPTiNw11CwLUvWspRQXTfERwpkFbLiu1 tBFAg6vfMWTqt08e3VhW+SeVwUq0eVuOUvS0oUI+rvIfDL1c9xUAVN+PstC8XlbB 3kv6RoB/e3OqeRKsxEzozgz/biV201wbGmkqLo2WtUN1a8PdqKbeMSRv3yvDhU5e dxeCFsMk9lPw2R0QjDPYIB6P9EEWHKwhj7n+NIKtNTd+aE91eD1QlrHsC8ZLUIuA 6cJxAhwwdjXHGt6o7eT6nHMrJw1uBVqXc9zgAdDHCWtTc3kAUmD10dhrxV8EK6Ia f7UVonOQh6Y1OXeEN5iRXPOCaCF6XdNU/B/VB3FhE+tiWy6lm04seTz1s19vnNtk DIIE4oOfl5jef+pZM97ARCRZzmqG3Tu7W7GHalQFfj0oaQ5MVusmYVuoIznydbe9 ul+W8LyRXRWa0isZDaSQCAp1pPHMSnhDaa6HfK1Tnsx2G9XCDOo= =jIxj -----END PGP SIGNATURE----- Merge tag 'tegra-for-6.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt arm64: tegra: Device tree changes for v6.5-rc1 This introduces support for the IGX Orin and Jetson Orin Nano devices and enables various additional features on the Jetson AGX Orin and Jetson Orin NX. This also enables some basic thermal support to prevent the devices from overheating. Support for the GPU on the Google Pixel C is enabled and various minor issues are fixed and cleaned up. * tag 'tegra-for-6.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Enable thermal support on Jetson Orin Nano arm64: tegra: Enable thermal support on Jetson Orin NX arm64: tegra: Enable thermal support on Jetson AGX Orin arm64: tegra: Add Tegra234 thermal support arm64: tegra: Add a few blank lines for better readability arm64: tegra: Sort properties more logically arm64: tegra: Enable GPU on Smaug arm64: tegra: Add GPU power rail regulator on Smaug arm64: tegra: Update USB phy-name for Jetson Orin NX arm64: tegra: Enable USB device for Jetson AGX Orin arm64: tegra: Add Tegra234 pin controllers arm64: tegra: Support Jetson Orin Nano Developer Kit arm64: tegra: Add missing cache properties on Tegra210 arm64: tegra: Fix PCIe regulator for Orin Jetson AGX arm64: tegra: Add CPU OPP tables and interconnects property arm64: tegra: Add support for IGX Orin Link: https://lore.kernel.org/r/20230609193620.2275240-6-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
868a11b602 |
STM32 STM32MP25 for v6.5, round 1
Highlights:
----------
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35,
common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
This PR adds the STM32MP257F EV1 board support. This board embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
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Merge tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/newsoc
STM32 STM32MP25 for v6.5, round 1
Highlights:
----------
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35,
common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
This PR adds the STM32MP257F EV1 board support. This board embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
* tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (44 commits)
MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE
arm64: defconfig: enable ARCH_STM32 and STM32 serial driver
arm64: dts: st: add stm32mp257f-ev1 board support
dt-bindings: stm32: document stm32mp257f-ev1 board
arm64: dts: st: introduce stm32mp25 pinctrl files
arm64: dts: st: introduce stm32mp25 SoCs family
arm64: introduce STM32 family on Armv8 architecture
dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon
pinctrl: stm32: add stm32mp257 pinctrl support
dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
...
Link: https://lore.kernel.org/r/080fc303-45c1-6cc0-4c5e-694e730896a6@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
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Dario Binacchi
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8f3ef556f8 |
dt-bindings: mfd: stm32f7: Add binding definition for CAN3
Add binding definition for CAN3 peripheral. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20230423172528.1398158-2-dario.binacchi@amarulasolutions.com Signed-off-by: Lee Jones <lee@kernel.org> |
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Patrick Delaunay
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94ec3d8b20 |
dt-bindings: rcc: stm32: Sync with u-boot copy for STM32MP13 SoC
Minor cosmetic change, aligned with files in U-Boot: - change obsolete SPDX id : GPL-2.0+ and use the same license GPL-2.0-only for the 2 files - use correct mail address gabriel.fernandez@foss.st.com - remove extra space Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20230510184305.v2.1.I417093ddcea282be479f10a37147d1935a9050b7@changeid Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Bjorn Andersson
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004823da9b |
Merge branch '20230526161129.1454-2-quic_anusha@quicinc.com' into clk-for-6.5
Merge the DeviceTree binding updates for IPQ9574 GCC adding clocks and resets related to Crypto Engine, through a topic branch in order to make them available in the DeviceTree source tree as well. |
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Bjorn Andersson
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e5d57e7c94 |
Merge branch '20230526161129.1454-2-quic_anusha@quicinc.com' into arm64-for-6.5
Merge IPQ9574 Crypto Engine-related DeviceTree bindings, to gain the additional clock defines needed to add the related nodes. |
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Anusha Rao
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35e237b3d5 |
dt-bindings: clock: Add crypto clock and reset definitions
Add crypto clock and reset ID definitions for ipq9574. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526161129.1454-2-quic_anusha@quicinc.com |
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Kathiravan T
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b56715957b |
dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300
Add the SoC ID for IPQ5300, which belong to the family of IPQ5332 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230605080531.3879-2-quic_kathirav@quicinc.com |
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Bjorn Andersson
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0832b1c9d0 |
Merge branch '20230608125315.11454-2-srinivas.kandagatla@linaro.org' into arm64-for-6.5
Merge the SC8280XP LPASSCC DeviceTree bindings in order to get access to the newly added reset defines. |
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Srinivas Kandagatla
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83da70da40 |
dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP
The LPASS (Low Power Audio Subsystem) Audio clock controller provides reset support when it is under the control of Q6DSP. Add support for those resets and adds IDs for clients to request the reset. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230608125315.11454-3-srinivas.kandagatla@linaro.org |
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Srinivas Kandagatla
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bfc43a9c0c |
dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP
The LPASS (Low Power Audio Subsystem) clock controller provides reset support when it is under the control of Q6DSP. Add support for those resets and adds IDs for clients to request the reset. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230608125315.11454-2-srinivas.kandagatla@linaro.org |
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Bjorn Andersson
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68017e6b1b |
Merge branch '20230512122347.1219-3-quic_tdas@quicinc.com' into arm64-for-6.5
Merge the SDX75 GCC DeviceTree binding, in order to get access to the clock defines in the DeviceTree source. |
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Runyang Chen
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2cf4ec5344 |
dt-bindings: reset: mt8188: add thermal reset control bit
To support reset of infra_ao, add the index of infra_ao reset of thermal for MT8188. Signed-off-by: Runyang Chen <runyang.chen@mediatek.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230525075011.7032-2-runyang.chen@mediatek.com Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Thierry Reding
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09d990782a |
arm64: tegra: Add Tegra234 thermal support
Add device tree node for the BPMP thermal node on Tegra234 and add thermal zone definitions. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Nishanth Menon
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32a2e6ab2c |
dt-bindings: pinctrl: Drop k3
For convenience (less code duplication), the pin controller pin
configuration register values were defined in the bindings header.
These are not some IDs or other abstraction layer but raw numbers used
in the registers.
These constants do not fit the purpose of bindings. They do not
provide any abstraction, any hardware and driver independent ID. In
fact, the Linux pinctrl-single driver actually do not use the bindings
header at all.
Commit
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Alexandre Torgue
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a45645472f |
dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
Add support for st,stm32mp257-pinctrl and st,stm32mp257-z-pinctrl. Add packages AI, AK and AL (values : 0x100, 0x400 and 0x800) Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> |
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Prathamesh Shete
|
12382ad051 |
dt-bindings: gpio: Remove FSI domain ports on Tegra234
Ports S, T, U and V are in a separate controller that is part of the FSI
domain. Remove their definitions from the MAIN controller definitions to
get rid of the confusion.
This technically breaks ABI compatibility with old device trees. However
it doesn't cause issues in practice. The GPIO pins impacted by this are
used for non-critical functionality.
Fixes:
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Jacky Huang
|
476650a64b |
dt-bindings: reset: nuvoton: Document ma35d1 reset control
Add the dt-bindings header for Nuvoton ma35d1, that gets shared between the reset controller and reset references in the dts. Add documentation to describe nuvoton ma35d1 reset driver. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Jacky Huang
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2f8b5eb589 |
dt-bindings: clock: nuvoton: add binding for ma35d1 clock controller
Add the dt-bindings header for Nuvoton ma35d1, that gets shared between the clock controller and clock references in the dts. Add documentation to describe nuvoton ma35d1 clock driver. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Matt Ranostay
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8258d997b8 |
dt-bindings: ti-serdes-mux: Add defines for J784S4 SoC
There are 4 lanes in the single instance of J784S4 SERDES. Each SERDES lane mux can select up to 4 different IPs. Define all the possible functions. Signed-off-by: Matt Ranostay <mranostay@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/755a14f1-92ad-ce4b-3fde-2a4b0650475c@axentia.se Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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Dmitry Rokosov
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98872da6c6 |
dt-bindings: clock: meson: add A1 Peripherals clock controller bindings
Add documentation and dt bindings for the Amlogic A1 Peripherals clock controller. A1 PLL clock controller has references to A1 Peripherals clock controller objects, so reflect them in the schema. Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230523135351.19133-6-ddrokosov@sberdevices.ru Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Dmitry Rokosov
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e6c6ddb397 |
dt-bindings: clock: meson: add A1 PLL clock controller bindings
Add the documentation and dt bindings for Amlogic A1 PLL clock controller. Also include new A1 clock controller dt bindings to MAINTAINERS. Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20230523135351.19133-4-ddrokosov@sberdevices.ru Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Bjorn Andersson
|
8368050625 |
Merge branch 'sm8450-sm8550-gpucc-binding' into arm64-for-6.5
Introduce DeviceTree bindings for SM8450 and SM8550 GPU clock controller, to introduce the constants necessary to referr to these clocks. |
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Bjorn Andersson
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6de1bd7405 |
Merge branch 'sm8450-sm8550-gpucc-binding' into clk-for-6.5
Bring GPUCC DeviceTree bindings for SM8450 and SM8550 in through a topic branch to allow sharing it with the DeviceTree source tree as well. |
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Jagadeesh Kona
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778af143ad |
dt-bindings: clock: qcom: Add SM8550 graphics clock controller
Add device tree bindings for the graphics clock controller on Qualcomm SM8550 platform. Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230524181800.28717-2-quic_jkona@quicinc.com |
||
|
Konrad Dybcio
|
63f4e4b6f5 |
dt-bindings: clock: Add Qcom SM8450 GPUCC
Add device tree bindings for the graphics clock controller on Qualcomm Technology Inc's SM8450 SoCs. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-1-4f40e282af1d@linaro.org |
||
|
Maarten Zanders
|
91e47d4083 |
dt-bindings: leds-lp55xx: Add ti,charge-pump-mode
Add a binding to configure the internal charge pump for lp55xx. Signed-off-by: Maarten Zanders <maarten.zanders@mind.be> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20230421075305.37597-2-maarten.zanders@mind.be |
||
|
Bjorn Andersson
|
e23893dbc3 |
Merge branch '20230524140656.7076-2-quic_tdas@quicinc.com' into HEAD
Merge the SM8450 Video Clock Controller DeviceTree binding topic branch in order to get access to the clock constants defined by the binding. |
||
|
Bjorn Andersson
|
521302ca64 |
Merge branch '20230512122347.1219-3-quic_tdas@quicinc.com' into clk-for-6.5
Merge SDX75 Global Clock Controller DeviceTree binding through a topic branch, to allow inclusion in DeviceTree source as well. |
||
|
Bjorn Andersson
|
cc8d2cf5cd |
Merge branch '20230524140656.7076-2-quic_tdas@quicinc.com' into HEAD
Merge the SM8450 Video Clock Controller DeviceTree binding through a topic branch, in order to be able to use the introduced constants in changes on DeviceTree source branch as well. |
||
|
Konrad Dybcio
|
2aae5eaa94 |
dt-bindings: clock: Add SM8350 VIDEOCC
SM8350, like most recent higher-end chips has a separate clock controller block just for the Venus IP. Document it. The binding was separated as the driver, unlike the earlier ones, doesn't expect clock-names to keep it easier to maintain. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-1-86c714a66a81@linaro.org |
||
|
Taniya Das
|
1e910b2ba0 |
dt-bindings: clock: qcom: Add SM8450 video clock controller
Add device tree bindings for the video clock controller on Qualcomm SM8450 platform. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230524140656.7076-2-quic_tdas@quicinc.com |
||
|
Imran Shaik
|
1c305ea86b |
dt-bindings: clock: qcom: Add GCC clocks for SDX75
Add support for qcom global clock controller bindings for SDX75 platform. Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230512122347.1219-3-quic_tdas@quicinc.com |
||
|
Konrad Dybcio
|
672b584c68 |
dt-bindings: power: qcom,rpmpd: Add SA8155P
Add a compatible for SA8155P platforms and relevant defines to the include file. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230411-topic-hanaau-v2-1-fd3d70844b31@linaro.org |
||
|
Kathiravan T
|
fe78d73a91 |
dt-bindings: arm: qcom,ids: add SoC ID for IPQ5312 and IPQ5302
Add the SoC ID for IPQ5312 and IPQ5302, which belong to the family of IPQ5332 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230509033531.21468-2-quic_kathirav@quicinc.com |
||
|
Robert Marko
|
e5b03cd101 |
dt-bindings: arm: qcom,ids: Add IDs for IPQ5018 family
Add SOC IDs for the IPQ5018 family. Signed-off-by: Robert Marko <robimarko@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230429193336.600629-1-robimarko@gmail.com |
||
|
Dmitry Baryshkov
|
375cccc659 |
dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF
On msm8996 CBF interconnects power and performance CPU clusters. Add corresponding interconnect defines to be used in device trees. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230512001334.2983048-2-dmitry.baryshkov@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
||
|
Konrad Dybcio
|
1738600082 |
dt-bindings: power: qcom,rpmpd: Format RPMh levels better
After adding the missing levels with a nice, easy-to-read diff, reformat the defines to make them nice to look at.. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517-topic-kailua-rpmhpd-v2-2-3063ce19c491@linaro.org |
||
|
Konrad Dybcio
|
4755e880b0 |
dt-bindings: power: qcom,rpmpd: add missing RPMH levels
There are a lot of RPMh levels that we haven't included yet.. some sadly turned out to be necessary, add them! Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517-topic-kailua-rpmhpd-v2-1-3063ce19c491@linaro.org |
||
|
Sumit Gupta
|
b0dae3df05 |
dt-bindings: tegra: Add ICC IDs for dummy memory clients
Add ICC IDs for dummy software clients representing CCPLEX clusters. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
||
|
Srinivas Kandagatla
|
90848a2557
|
ASoC: qcom: q6dsp: add support to more display ports
Existing code base only supports one display port, this patch adds support upto 8 display ports. This support is required to allow platforms like X13s which have 3 display ports, and some of the Qualcomm SoCs there are upto 7 Display ports. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org Link: https://lore.kernel.org/r/20230509112202.21471-4-srinivas.kandagatla@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org |
||
|
Linus Torvalds
|
1c1094e47e |
- mailbox api: allow direct registration to a channel
Convert omap and pcc to use mbox_bind_client - omap and hi6220 : use of_property_read_bool - test: fix double-free and use spinlock header - rockchip and bcm-pdc: drop of_match_ptr - mpfs: change config symbol - mediatek gce: support MT6795 - qcom apcs: consolidate of_device_id support IPQ9574 -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmRWXwYACgkQf9lkf8eY P5V11Q/9G2V2V/QO6EJm8JQ6ElkO+cLeZezmyAhlt3l7n2B5WjEdnKX2nxOYmgZl qb+tYFJO7cd+lpMMTWz4PfOZbedkhrGXwzV8OMzXHJHfOdy3oojw8NYXY7IXdwsy jhik8jYSUx2vHYCTCbAT0SgNLWJHE+RMzFjg01Wb49zIqJf9kbw8RfmWItKGLBJt 0ePSYW2o7LckMf3KSVV3YxfTlvX6Wb0rE0HXv/YI17XtDWT/RlpHb9rVvPWcpKfI wZjQ49wxjtpsilxAQijcT+gE2wmvx62S1HeSSwE7JZ/7k4Ihg269rUa3p0Dp3dcA RLyEhrLt3KWAWYWDXvsGVhaJvrtHI0BMA1Pb3C+qnjdcySs8AZgQbGTtI3RPOiuq 3VCshYVZMEbVoXZOHFbov0e6pyBX5dLqU8W3FhfAVunovj/d7/+74h1uP6ecJjhP +DazIWSc20ATWUaD+UrjPhaGsNwEGceiJiY6nHhnzWZlu2K+2UXRlSrL/iAydvaj SRJeqHiY12fGPGVOScpCMylAGsa+VI+oA61JlMfjLvuyL4qSwNwZGpmCUlIod2AJ 8vUGw254XMr5CiZ4u/D/cyi+7gJ4la53xNkNZIfFs7cP+gbCygaCHDy11bzQa+i1 /sLR9voYIp0Woljds5a6L+o2bP5hkf/Uf+6WKEU8uaW98f5tA14= =NHj4 -----END PGP SIGNATURE----- Merge tag 'mailbox-v6.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration Pull mailbox updates from Jassi Brar: - mailbox api: allow direct registration to a channel and convert omap and pcc to use mbox_bind_client - omap and hi6220 : use of_property_read_bool - test: fix double-free and use spinlock header - rockchip and bcm-pdc: drop of_match_ptr - mpfs: change config symbol - mediatek gce: support MT6795 - qcom apcs: consolidate of_device_id and support IPQ9574 * tag 'mailbox-v6.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration: dt-bindings: mailbox: qcom: add compatible for IPQ9574 SoC mailbox: qcom-apcs-ipc: do not grow the of_device_id dt-bindings: mailbox: qcom,apcs-kpss-global: use fallbacks for few variants dt-bindings: mailbox: mediatek,gce-mailbox: Add support for MT6795 mailbox: mpfs: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE mailbox: bcm-pdc: drop of_match_ptr for ID table mailbox: rockchip: drop of_match_ptr for ID table mailbox: mailbox-test: Fix potential double-free in mbox_test_message_write() mailbox: mailbox-test: Explicitly include header for spinlock support mailbox: Use of_property_read_bool() for boolean properties mailbox: pcc: Use mbox_bind_client mailbox: omap: Use mbox_bind_client mailbox: Allow direct registration to a channel |
||
|
Linus Torvalds
|
78b421b6a7 |
linux-watchdog 6.4-rc1 tag
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.14 (GNU/Linux) iEYEABECAAYFAmRTZSoACgkQ+iyteGJfRspyfACgojeDzj400vg0/ZfMrqvwGWiW rroAn13l3UIJI6dI8J89jjp2q5Xo0RSq =ECpF -----END PGP SIGNATURE----- Merge tag 'linux-watchdog-6.4-rc1' of git://www.linux-watchdog.org/linux-watchdog Pull watchdog updates from Wim Van Sebroeck: - Add watchdog driver for StarFive JH7100 and JH7110 Soc - Add Rockchip RK3588 devices - Add Qualcom IPQ5332 APSS, QCM2290 KPSS and SM6115 SoC devices - Add Mediatke MT8365 and MT6735 devices - Watchdog-core: Always set WDOG_HW_RUNNING when starting watchdog - Convert watchdog platform drivers to return void on the remove callback - Convert to devm_clk_get_enabled() helpers - ... and other small fixes and improvements * tag 'linux-watchdog-6.4-rc1' of git://www.linux-watchdog.org/linux-watchdog: (72 commits) watchdog: dw_wdt: Simplify clk management watchdog: dw_wdt: Fix the error handling path of dw_wdt_drv_probe() watchdog: starfive: Fix the warning of starfive_wdt_match watchdog: starfive: Fix the probe return error if PM and early_enable are both disabled MAINTAINERS: Add fragment for Xilinx watchdog driver watchdog: menz069_wdt: fix timeout setting watchdog: menz069_wdt: fix watchdog initialisation dt-bindings: watchdog: alphascale-asm9260: convert to DT schema watchdog: loongson1_wdt: Implement restart handler dt-bindings: watchdog: Document Qualcomm SM6115 watchdog dt-bindings: watchdog: realtek,otto-wdt: simplify requiring interrupt-names dt-bindings: watchdog: toshiba,visconti-wdt: simplify with unevaluatedProperties dt-bindings: watchdog: fsl-imx7ulp-wdt: simplify with unevaluatedProperties dt-bindings: watchdog: arm,sp805: drop unneeded minItems dt-bindings: watchdog: drop duplicated GPIO watchdog bindings dt-bindings: reset: Add binding for MediaTek MT6735 TOPRGU/WDT drivers: watchdog: Add StarFive Watchdog driver dt-bindings: watchdog: Add watchdog for StarFive JH7100 and JH7110 dt-bindings: watchdog: indentation, quotes and white-space cleanup watchdog: ebc-c384_wdt: Mark status as orphaned ... |
||
|
AngeloGioacchino Del Regno
|
26e02e6c10 |
dt-bindings: mailbox: mediatek,gce-mailbox: Add support for MT6795
Add a compatible string for the MT6795 Helio X10 SoC using MT8173 binding and add a header for the MT6795's GCE mailbox. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> |
||
|
Linus Torvalds
|
3af49062b0 |
- New Drivers
- Add support for Renesas RZ/G2L MTU3
- New Device Support
- Add support for Lenovo Yoga Book X90F to Intel CHT WC
- Add support for MAX5970 and MAX5978 to Simple MFD (I2C)
- Add support for Meteor Lake PCH-S LPSS PCI to Intel LPSS PCI
- Add support for AXP15060 PMIC to X-Powers PMIC collection
- Remove Device Support
- Remove support for Samsung 5M8751 and S5M8763 PMIC devices
- New Functionality
- Convert deprecated QCOM IRQ Chip to config registers
- Add support for 32-bit address spaces to Renesas SMUs
- Fix-ups
- Make use of APIs / MACROs designed to simplify and demystify
- Add / improve Device Tree bindings
- Memory saving struct layout optimisations
- Remove old / deprecated functionality
- Factor out unassigned register addresses from ranges
- Trivial: Spelling fixes, renames and coding style fixes
- Rid 'defined but not used' warnings
- Remove ineffective casts and pointer stubs
- Bug Fixes
- Fix incorrectly non-inverted mask/unmask IRQs on QCOM platforms
- Remove MODULE_*() helpers from non-tristate drivers
- Do not attempt to use out-of-range memory addresses associated with io_base
- Provide missing export helpers
- Fix remap bulk read optimisation fallout
- Fix memory leak issues in error paths
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Merge tag 'mfd-next-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"New Drivers:
- Add support for Renesas RZ/G2L MTU3
New Device Support:
- Add support for Lenovo Yoga Book X90F to Intel CHT WC
- Add support for MAX5970 and MAX5978 to Simple MFD (I2C)
- Add support for Meteor Lake PCH-S LPSS PCI to Intel LPSS PCI
- Add support for AXP15060 PMIC to X-Powers PMIC collection
Remove Device Support:
- Remove support for Samsung 5M8751 and S5M8763 PMIC devices
New Functionality:
- Convert deprecated QCOM IRQ Chip to config registers
- Add support for 32-bit address spaces to Renesas SMUs
Fix-ups:
- Make use of APIs / MACROs designed to simplify and demystify
- Add / improve Device Tree bindings
- Memory saving struct layout optimisations
- Remove old / deprecated functionality
- Factor out unassigned register addresses from ranges
- Trivial: Spelling fixes, renames and coding style fixes
- Rid 'defined but not used' warnings
- Remove ineffective casts and pointer stubs
Bug Fixes:
- Fix incorrectly non-inverted mask/unmask IRQs on QCOM platforms
- Remove MODULE_*() helpers from non-tristate drivers
- Do not attempt to use out-of-range memory addresses associated with io_base
- Provide missing export helpers
- Fix remap bulk read optimisation fallout
- Fix memory leak issues in error paths"
* tag 'mfd-next-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (88 commits)
dt-bindings: mfd: ti,j721e-system-controller: Add SoC chip ID
leds: bd2606mvv: Driver for the Rohm 6 Channel i2c LED driver
dt-bindings: mfd: qcom,spmi-pmic: Document flash LED controller
dt-bindings: mfd: x-powers,axp152: Document the AXP15060 variant
mfd: axp20x: Add support for AXP15060 PMIC
dt-bindings: mfd: x-powers,axp152: Document the AXP313a variant
counter: rz-mtu3-cnt: Unlock on error in rz_mtu3_count_ceiling_write()
dt-bindings: mfd: dlg,da9063: Document voltage monitoring
dt-bindings: mfd: stm32: Remove unnecessary blank lines
dt-bindings: mfd: qcom,spmi-pmic: Use generic ADC node name in examples
dt-bindings: mfd: syscon: Add nuvoton,ma35d1-sys compatible
MAINTAINERS: Add entries for Renesas RZ/G2L MTU3a counter driver
counter: Add Renesas RZ/G2L MTU3a counter driver
Documentation: ABI: sysfs-bus-counter: add cascade_counts_enable and external_input_phase_clock_select
mfd: Add Renesas RZ/G2L MTU3a core driver
dt-bindings: timer: Document RZ/G2L MTU3a bindings
mfd: rsmu_i2c: Convert to i2c's .probe_new() again
mfd: intel-lpss: Add Intel Meteor Lake PCH-S LPSS PCI IDs
mfd: dln2: Fix memory leak in dln2_probe()
mfd: axp20x: Fix axp288 writable-ranges
...
|
||
|
Linus Torvalds
|
e81507acdc |
Nothing looks out of the ordinary in this batch of clk driver updates. There
are a couple patches to the core clk framework, but they're all basically
cleanups or debugging aids. The driver updates and new additions are dominated
in the diffstat by Qualcomm and MediaTek drivers. Qualcomm gained a handful of
new drivers for various SoCs, and MediaTek gained a bunch of drivers for
MT8188. The MediaTek drivers are being modernized as well, so there are
updates all over that vendor's clk drivers. There's also a couple other new clk
drivers in here, for example the Starfive JH7110 SoC support is added.
Outside of the two major SoC vendors though, we have the usual collection of
non-critical fixes and cleanups to various clk drivers. It's good to see that
we're getting more cleanups and modernization patches. Maybe one day we'll be
able to properly split clk providers from clk consumers.
Core:
- Print an informational message before disabling unused clks
New Drivers:
- BCM63268 timer clock and reset controller
- Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and
MT8195 SoCs
- Mediatek MT8188 SoC clk drivers
- Clock driver for Sunplus SP7021 SoC
- Clk driver support for Loongson-2 SoCs
- Clock driver for Skyworks Si521xx I2C PCIe clock generators
- Initial Starfive JH7110 clk/reset support
- Global clock controller drivers for Qualcomm SM7150, IPQ9574, MSM8917 and IPQ5332 SoCs
- GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P SoCs
Updates:
- Shrink size of clk_fractional_divider a little
- Convert various clk drivers to devm_of_clk_add_hw_provider()
- Convert platform clk drivers to remove_new()
- Converted most Mediatek clock drivers to struct platform_driver
- MediaTek clock drivers can be built as modules
- Reimplement Loongson-1 clk driver with DT support
- Migrate socfpga clk driver to of_clk_add_hw_provider()
- Support for i3c clks on Aspeed ast2600 SoCs
- Add clock generic devm_clk_hw_register_gate_parent_data
- Add audiomix block control for i.MX8MP
- Add support for determine_rate to i.MX composite-8m
- Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate
- Provide clock name in error message for clk-gpr-mux on get parent failure
- Drop duplicate imx_clk_mux_flags macro
- Register the i.MX8MP Media Disp2 Pix clock as bus clock
- Add Media LDB root clock to i.MX8MP
- Make i.MX8MP nand_usdhc_bus clock as non-critical
- Fix the rate table for i.MX fracn-gppll
- Disable HW control for the fracn-gppll in order to be controlled by
register write
- Add support for interger PLL in fracn-gppll
- Add mcore_booted module parameter to i.MX93 provider
- Add NIC, A55 and ARM PLL clocks to i.MX93
- Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents
- Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP to
get more accurate clock rates
- Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical
- Update some of the i.MX critical clocks flags to allow glitchless
on-the-fly rate change.
- Add I2C5 clock on Renesas R-Car V3H
- Exynos850: Add CMU_G3D clock controller for the Mali GPU
- Extract Exynos5433 (ARM64) clock controller power management code to
common driver parts
- Exynos850: make PMU_ALIVE_PCLK clock critical
- Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel
Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car V4H
- Add video capture (VIN) clocks on Renesas R-Car V3H
- Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H
- Support for Stromer Plus PLL on Qualcomm IPQ5332
- Add a missing reset to Qualcomm QCM2290
- Migrate Qualcomm IPQ4019 to clk_parent_data
- Make USB GDSCs enter retention state when disabled on Qualcomm SM6375,
MSM8996 and MSM8998 SoCs
- Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk
- Add two EMAC GDSCs on Qualcomm SC8280XP
- Use shared rcg clk ops in Qualcomm SM6115 GCC
- Park Qualcomm SM8350 PCIe PIPE clks when disabled
- Add GDSCs to Qualcomm SC7280 LPASS audio clock controller
- Add missing XO clocks to Qualcomm MSM8226 and MSM8974
- Convert some Qualcomm clk DT bindings to YAML
- Reparenting fix for the clock supplying camera modules on Rockchip rk3399
- Mark more critical (bus-)clocks on Rockchip rk3588
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"Nothing looks out of the ordinary in this batch of clk driver updates.
There are a couple patches to the core clk framework, but they're all
basically cleanups or debugging aids. The driver updates and new
additions are dominated in the diffstat by Qualcomm and MediaTek
drivers. Qualcomm gained a handful of new drivers for various SoCs,
and MediaTek gained a bunch of drivers for MT8188. The MediaTek
drivers are being modernized as well, so there are updates all over
that vendor's clk drivers. There's also a couple other new clk drivers
in here, for example the Starfive JH7110 SoC support is added.
Outside of the two major SoC vendors though, we have the usual
collection of non-critical fixes and cleanups to various clk drivers.
It's good to see that we're getting more cleanups and modernization
patches. Maybe one day we'll be able to properly split clk providers
from clk consumers.
Core:
- Print an informational message before disabling unused clks
New Drivers:
- BCM63268 timer clock and reset controller
- Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and
MT8195 SoCs
- Mediatek MT8188 SoC clk drivers
- Clock driver for Sunplus SP7021 SoC
- Clk driver support for Loongson-2 SoCs
- Clock driver for Skyworks Si521xx I2C PCIe clock generators
- Initial Starfive JH7110 clk/reset support
- Global clock controller drivers for Qualcomm SM7150, IPQ9574,
MSM8917 and IPQ5332 SoCs
- GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P
SoCs
Updates:
- Shrink size of clk_fractional_divider a little
- Convert various clk drivers to devm_of_clk_add_hw_provider()
- Convert platform clk drivers to remove_new()
- Converted most Mediatek clock drivers to struct platform_driver
- MediaTek clock drivers can be built as modules
- Reimplement Loongson-1 clk driver with DT support
- Migrate socfpga clk driver to of_clk_add_hw_provider()
- Support for i3c clks on Aspeed ast2600 SoCs
- Add clock generic devm_clk_hw_register_gate_parent_data
- Add audiomix block control for i.MX8MP
- Add support for determine_rate to i.MX composite-8m
- Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate
- Provide clock name in error message for clk-gpr-mux on get parent
failure
- Drop duplicate imx_clk_mux_flags macro
- Register the i.MX8MP Media Disp2 Pix clock as bus clock
- Add Media LDB root clock to i.MX8MP
- Make i.MX8MP nand_usdhc_bus clock as non-critical
- Fix the rate table for i.MX fracn-gppll
- Disable HW control for the fracn-gppll in order to be controlled by
register write
- Add support for interger PLL in fracn-gppll
- Add mcore_booted module parameter to i.MX93 provider
- Add NIC, A55 and ARM PLL clocks to i.MX93
- Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents
- Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP
to get more accurate clock rates
- Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical
- Update some of the i.MX critical clocks flags to allow glitchless
on-the-fly rate change.
- Add I2C5 clock on Renesas R-Car V3H
- Exynos850: Add CMU_G3D clock controller for the Mali GPU
- Extract Exynos5433 (ARM64) clock controller power management code
to common driver parts
- Exynos850: make PMU_ALIVE_PCLK clock critical
- Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel
Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car
V4H
- Add video capture (VIN) clocks on Renesas R-Car V3H
- Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H
- Support for Stromer Plus PLL on Qualcomm IPQ5332
- Add a missing reset to Qualcomm QCM2290
- Migrate Qualcomm IPQ4019 to clk_parent_data
- Make USB GDSCs enter retention state when disabled on Qualcomm
SM6375, MSM8996 and MSM8998 SoCs
- Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk
- Add two EMAC GDSCs on Qualcomm SC8280XP
- Use shared rcg clk ops in Qualcomm SM6115 GCC
- Park Qualcomm SM8350 PCIe PIPE clks when disabled
- Add GDSCs to Qualcomm SC7280 LPASS audio clock controller
- Add missing XO clocks to Qualcomm MSM8226 and MSM8974
- Convert some Qualcomm clk DT bindings to YAML
- Reparenting fix for the clock supplying camera modules on Rockchip
rk3399
- Mark more critical (bus-)clocks on Rockchip rk3588"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (290 commits)
clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers
clk: rockchip: rk3588: make gate linked clocks critical
clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk
clk: qcom: add the GPUCC driver for sa8775p
dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling
clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc
clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration
dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property
clk: starfive: Avoid casting iomem pointers
clk: microchip: fix potential UAF in auxdev release callback
clk: qcom: rpm: Use managed `of_clk_add_hw_provider()`
clk: mediatek: fhctl: Mark local variables static
clk: sifive: make SiFive clk drivers depend on ARCH_ symbols
clk: uniphier: Use managed `of_clk_add_hw_provider()`
clk: si5351: Use managed `of_clk_add_hw_provider()`
clk: si570: Use managed `of_clk_add_hw_provider()`
clk: si514: Use managed `of_clk_add_hw_provider()`
clk: lmk04832: Use managed `of_clk_add_hw_provider()`
...
|
||
|
Linus Torvalds
|
1c15ca4e4e |
sound updates for 6.4-rc1
At this time, it's an interesting mixture of changes for both old and
new stuff. Majority of changes are about ASoC (lots of systematic
changes for converting remove callbacks to void, and cleanups), while
we got the fixes and the enhancements of very old PCI cards, too.
Here are some highlights:
ALSA/ASoC Core:
- Continued effort of more ASoC core cleanups
- Minor improvements for XRUN handling in indirect PCM helpers
- Code refactoring of PCM core code
ASoC:
- Continued feature and simplification work on SOF, including addition
of a no-DSP mode for bringup, HDA MLink and extensions to the IPC4
protocol
- Hibernation support for CS35L45
- More DT binding conversions
- Support for Cirrus Logic CS35L56, Freescale QMC, Maxim MAX98363,
nVidia systems with MAX9809x and RT5631, Realtek RT712, Renesas R-Car
Gen4, Rockchip RK3588 and TI TAS5733
ALSA:
- Lots of works for legacy emu10k1 and ymfpci PCI drivers
- PCM kselftest fixes and enhancements
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Merge tag 'sound-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"At this time, it's an interesting mixture of changes for both old and
new stuff. Majority of changes are about ASoC (lots of systematic
changes for converting remove callbacks to void, and cleanups), while
we got the fixes and the enhancements of very old PCI cards, too.
Here are some highlights:
ALSA/ASoC Core:
- Continued effort of more ASoC core cleanups
- Minor improvements for XRUN handling in indirect PCM helpers
- Code refactoring of PCM core code
ASoC:
- Continued feature and simplification work on SOF, including
addition of a no-DSP mode for bringup, HDA MLink and extensions to
the IPC4 protocol
- Hibernation support for CS35L45
- More DT binding conversions
- Support for Cirrus Logic CS35L56, Freescale QMC, Maxim MAX98363,
nVidia systems with MAX9809x and RT5631, Realtek RT712, Renesas
R-Car Gen4, Rockchip RK3588 and TI TAS5733
ALSA:
- Lots of works for legacy emu10k1 and ymfpci PCI drivers
- PCM kselftest fixes and enhancements"
* tag 'sound-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (586 commits)
ALSA: emu10k1: use high-level I/O in set_filterQ()
ALSA: emu10k1: use high-level I/O functions also during init
ALSA: emu10k1: fix error handling in snd_audigy_i2c_volume_put()
ALSA: emu10k1: don't stop DSP in _snd_emu10k1_{,audigy_}init_efx()
ALSA: emu10k1: fix SNDRV_EMU10K1_IOCTL_SINGLE_STEP
ALSA: emu10k1: skip Sound Blaster-specific hacks for E-MU cards
ALSA: emu10k1: fixup DSP defines
ALSA: emu10k1: pull in some register definitions from kX-project
ALSA: emu10k1: remove some bogus defines
ALSA: emu10k1: eliminate some unused defines
ALSA: emu10k1: fix lineup of EMU_HANA_* defines
ALSA: emu10k1: comment updates
ALSA: emu10k1: fix snd_emu1010_fpga_read() input masking for rev2 cards
ALSA: emu10k1: remove unused emu->pcm_playback_efx_substream field
ALSA: emu10k1: remove unused `resume` parameter from snd_emu10k1_init()
ALSA: emu10k1: minor optimizations
ALSA: emu10k1: remove remaining cruft from snd_emu10k1_emu1010_init()
ALSA: emu10k1: remove apparently pointless EMU_HANA_OPTION_CARDS reads
ALSA: emu10k1: remove apparently pointless FPGA reads
ALSA: emu10k1: stop doing weird things with HCFG in snd_emu10k1_emu1010_init()
...
|
||
|
Linus Torvalds
|
d42b1c4757 |
Devicetree updates for v6.4, part 1:
Bindings:
- Convert Qcom IOMMU, Amlogic timer, Freescale sec-v4.0, Toshiba
TC358764 display bridge, Parade PS8622 display bridge, and Xilinx
FPGA bindings to DT schema format
- Add qdu1000 and sa8775p SoC support to Qcom PDC interrupt controller
- Add MediaTek MT8365 UART and SYSIRQ bindings
- Add Arm Cortex-A78C and X1C core compatibles
- Add vendor prefix for Novatek
- Remove bindings for stih415, sti416, stid127 platforms
- Drop uneeded quotes in schema files. This is preparation for yamllint
checking quoting for us.
- Add missing (unevaluated|additional)Properties constraints on child
node schemas
- Clean-up schema comments formatting
- Fix I2C and SPI node bus names in schema examples
- Clean-up some display compatibles schema syntax
- Fix incorrect references to lvds.yaml
- Gather all cache controller bindings in a common directory
DT core:
- Convert unittest to new void .remove platform device hook
- kerneldoc fixes for DT address of_pci_range_to_resource/
of_address_to_resource functions
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Merge tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"Bindings:
- Convert Qcom IOMMU, Amlogic timer, Freescale sec-v4.0, Toshiba
TC358764 display bridge, Parade PS8622 display bridge, and Xilinx
FPGA bindings to DT schema format
- Add qdu1000 and sa8775p SoC support to Qcom PDC interrupt
controller
- Add MediaTek MT8365 UART and SYSIRQ bindings
- Add Arm Cortex-A78C and X1C core compatibles
- Add vendor prefix for Novatek
- Remove bindings for stih415, sti416, stid127 platforms
- Drop uneeded quotes in schema files. This is preparation for
yamllint checking quoting for us.
- Add missing (unevaluated|additional)Properties constraints on child
node schemas
- Clean-up schema comments formatting
- Fix I2C and SPI node bus names in schema examples
- Clean-up some display compatibles schema syntax
- Fix incorrect references to lvds.yaml
- Gather all cache controller bindings in a common directory
DT core:
- Convert unittest to new void .remove platform device hook
- kerneldoc fixes for DT address of_pci_range_to_resource/
of_address_to_resource functions"
* tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits)
dt-bindings: rng: Drop unneeded quotes
dt-bindings: arm/soc: mediatek: Drop unneeded quotes
dt-bindings: soc: qcom: Drop unneeded quotes
dt-bindings: i2c: samsung: Fix 'deprecated' value
dt-bindings: display: Fix lvds.yaml references
dt-bindings: display: simplify compatibles syntax
dt-bindings: display: mediatek: simplify compatibles syntax
dt-bindings: drm/bridge: ti-sn65dsi86: Fix the video-interfaces.yaml references
dt-bindings: timer: Drop unneeded quotes
dt-bindings: interrupt-controller: qcom,pdc: document qcom,qdu1000-pdc
dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p
dt-bindings: reset: remove stih415/stih416 reset
dt-bindings: net: dwmac: sti: remove stih415/sti416/stid127
dt-bindings: irqchip: sti: remove stih415/stih416 and stid127
dt-bindings: iommu: Convert QCOM IOMMU to YAML
dt-bindings: irqchip: ti,sci-inta: Add optional power-domains property
dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas
of: address: Reshuffle to remove forward declarations
of: address: Fix documented return value of of_pci_range_to_resource()
of: address: Document return value of of_address_to_resource()
...
|
||
|
Patrick Delaunay
|
378b0e9f24 |
dt-bindings: mfd: stm32: Remove unnecessary blank lines
Remove double blank line. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20230417181342.v2.1.I483a676579cc7e3ac07e1db649091553743fecc8@changeid |
||
|
Linus Torvalds
|
5e0ca0bfc3 |
Thermal control updates for 6.4-rc1
- Add a thermal zone 'devdata' accessor and modify several drivers to
use it (Daniel Lezcano).
- Prevent drivers from using the 'device' internal thermal zone
structure field directly (Daniel Lezcano).
- Clean up the hwmon thermal driver (Daniel Lezcano).
- Add thermal zone id accessor and thermal zone type accessor
and prevent drivers from using thermal zone fields directly (Daniel
Lezcano).
- Clean up the acerhdf and tegra thermal drivers (Daniel Lezcano).
- Add lower bound check for sysfs input to the x86_pkg_temp_thermal
Intel thermal driver (Zhang Rui).
- Add more thermal zone device encapsulation: prevent setting structure
field directly, access the sensor device instead the thermal zone's
device for trace, relocate the traces in drivers/thermal (Daniel
Lezcano).
- Use the generic trip point for the i.MX and remove the get_trip_temp
ops (Daniel Lezcano).
- Use the devm_platform_ioremap_resource() in the Hisilicon driver
(Yang Li).
- Remove R-Car H3 ES1.* handling as public has only access to the ES2
version and the upstream support for the ES1 has been shutdown (Wolfram
Sang).
- Add a delay after initializing the bank in order to let the time to
the hardware to initialze itself before reading the temperature
(Amjad Ouled-Ameur).
- Add MT8365 support (Amjad Ouled-Ameur).
- Preparational cleanup and DT bindings for RK3588 support (Sebastian
Reichel).
- Add driver support for RK3588 (Finley Xiao).
- Use devm_reset_control_array_get_exclusive() for the Rockchip driver
(Ye Xingchen).
- Detect power gated thermal zones and return -EAGAIN when reading the
temperature (Mikko Perttunen).
- Remove thermal_bind_params structure as it is unused (Zhang Rui)
- Drop unneeded quotes in DT bindings allowing to run yamllint (Rob
Herring).
- Update the power allocator documentation according to the thermal
trace relocation (Lukas Bulwahn).
- Fix sensor 1 interrupt status bitmask for the Mediatek LVTS sensor
(Chen-Yu Tsai).
- Use the dev_err_probe() helper in the Amlogic driver (Ye Xingchen).
- Add AP domain support to LVTS thermal controllers for mt8195
(Balsam CHIHI).
- Remove buggy call to thermal_of_zone_unregister() (Daniel Lezcano).
- Make thermal_of_zone_[un]register() private to the thermal OF code
(Daniel Lezcano).
- Create a private copy of the thermal zone device parameters
structure when registering a thermal zone (Daniel Lezcano).
- Fix a kernel NULL pointer dereference in thermal_hwmon (Zhang Rui).
- Revert recent message adjustment in thermal_hwmon (Rafael Wysocki).
- Use of_property_present() for testing DT property presence in
thermal control code (Rob Herring).
- Clean up thermal_list_lock locking in the thermal core (Rafael
Wysocki).
- Add DLVR support for RFIM control in the int340x Intel thermal
driver (Srinivas Pandruvada).
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Merge tag 'thermal-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull thermal control updates from Rafael Wysocki:
"These mostly continue to prepare the thermal control subsystem for
using unified representation of trip points, which includes cleanups,
code refactoring and similar and update several drivers (for other
reasons), which includes new hardware support.
Specifics:
- Add a thermal zone 'devdata' accessor and modify several drivers to
use it (Daniel Lezcano)
- Prevent drivers from using the 'device' internal thermal zone
structure field directly (Daniel Lezcano)
- Clean up the hwmon thermal driver (Daniel Lezcano)
- Add thermal zone id accessor and thermal zone type accessor and
prevent drivers from using thermal zone fields directly (Daniel
Lezcano)
- Clean up the acerhdf and tegra thermal drivers (Daniel Lezcano)
- Add lower bound check for sysfs input to the x86_pkg_temp_thermal
Intel thermal driver (Zhang Rui)
- Add more thermal zone device encapsulation: prevent setting
structure field directly, access the sensor device instead the
thermal zone's device for trace, relocate the traces in
drivers/thermal (Daniel Lezcano)
- Use the generic trip point for the i.MX and remove the
get_trip_temp ops (Daniel Lezcano)
- Use the devm_platform_ioremap_resource() in the Hisilicon driver
(Yang Li)
- Remove R-Car H3 ES1.* handling as public has only access to the ES2
version and the upstream support for the ES1 has been shutdown
(Wolfram Sang)
- Add a delay after initializing the bank in order to let the time to
the hardware to initialze itself before reading the temperature
(Amjad Ouled-Ameur)
- Add MT8365 support (Amjad Ouled-Ameur)
- Preparational cleanup and DT bindings for RK3588 support (Sebastian
Reichel)
- Add driver support for RK3588 (Finley Xiao)
- Use devm_reset_control_array_get_exclusive() for the Rockchip
driver (Ye Xingchen)
- Detect power gated thermal zones and return -EAGAIN when reading
the temperature (Mikko Perttunen)
- Remove thermal_bind_params structure as it is unused (Zhang Rui)
- Drop unneeded quotes in DT bindings allowing to run yamllint (Rob
Herring)
- Update the power allocator documentation according to the thermal
trace relocation (Lukas Bulwahn)
- Fix sensor 1 interrupt status bitmask for the Mediatek LVTS sensor
(Chen-Yu Tsai)
- Use the dev_err_probe() helper in the Amlogic driver (Ye Xingchen)
- Add AP domain support to LVTS thermal controllers for mt8195
(Balsam CHIHI)
- Remove buggy call to thermal_of_zone_unregister() (Daniel Lezcano)
- Make thermal_of_zone_[un]register() private to the thermal OF code
(Daniel Lezcano)
- Create a private copy of the thermal zone device parameters
structure when registering a thermal zone (Daniel Lezcano)
- Fix a kernel NULL pointer dereference in thermal_hwmon (Zhang Rui)
- Revert recent message adjustment in thermal_hwmon (Rafael Wysocki)
- Use of_property_present() for testing DT property presence in
thermal control code (Rob Herring)
- Clean up thermal_list_lock locking in the thermal core (Rafael
Wysocki)
- Add DLVR support for RFIM control in the int340x Intel thermal
driver (Srinivas Pandruvada)"
* tag 'thermal-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (55 commits)
thermal: intel: int340x: Add DLVR support for RFIM control
thermal/core: Alloc-copy-free the thermal zone parameters structure
thermal/of: Unexport unused OF functions
thermal/drivers/bcm2835: Remove buggy call to thermal_of_zone_unregister
thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195
dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
thermal: amlogic: Use dev_err_probe()
thermal/drivers/mediatek/lvts_thermal: Fix sensor 1 interrupt status bitmask
MAINTAINERS: adjust entry in THERMAL/POWER_ALLOCATOR after header movement
dt-bindings: thermal: Drop unneeded quotes
thermal/core: Remove thermal_bind_params structure
thermal/drivers/tegra-bpmp: Handle offline zones
thermal/drivers/rockchip: use devm_reset_control_array_get_exclusive()
dt-bindings: rockchip-thermal: Support the RK3588 SoC compatible
thermal/drivers/rockchip: Support RK3588 SoC in the thermal driver
thermal/drivers/rockchip: Support dynamic sized sensor array
thermal/drivers/rockchip: Simplify channel id logic
thermal/drivers/rockchip: Use dev_err_probe
thermal/drivers/rockchip: Simplify clock logic
thermal/drivers/rockchip: Simplify getting match data
...
|
||
|
Linus Torvalds
|
d53c3eaaef |
ARM: SoC devicetree changes for 6.4
The devicetree changes overall are again dominated by the Qualcomm
Snapdragon platform that weighs in at over 300 changesets, but there
are many updates across other platforms as well, notably Mediatek, NXP,
Rockchips, Renesas, TI, Samsung and ST Microelectronics. These all
add new features for existing machines, as well as new machines and
SoCs.
The newly added SoCs are:
- Allwinner T113-s, an Cortex-A7 based variant of the RISC-V
based D1 chip.
- StarFive JH7110, a RISC-V SoC based on the Sifive U74 core
like its JH7100 predecessor, but with additional CPU cores
and a GPU.
- Apple M2 as used in current Macbook Air/Pro and Mac Mini
gets added, with comparable support as its M1 predecessor.
- Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC
- Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs,
based on the Cortex-A53 and Cortex-A73 cores, respectively.
- Qualcomm sa8775p is an automotive SoC derived from the
Snapdragon family.
Including the initial board support for the added SoC platforms,
there are 52 new machines. The largest group are 19 boards
industrial embedded boards based on the NXP i.MX6 (32-bit)
and i.MX8 (64-bit) families.
Others include:
- Two boards based on the Allwinner f1c200s ultra-low-cost chip
- Three "Banana Pi" variants based on the Amlogic g12b
(A311D, S922X) SoC.
- The Gl.Inet mv1000 router based on Marvell Armada 3720
- A Wifi/LTE Dongle based on Qualcomm msm8916
- Two robotics boards based on Qualcomm QRB chips
- Three Snapdragon based phones made by Xiaomi
- Five developments boards based on various Rockchip SoCs,
including the rk3588s-khadas-edge2 and a few NanoPi
models
- The AM625 Beagleplay industrial SBC
Another 14 machines get removed: both boards for the obsolete "oxnas"
platform, three boards for the Renesas r8a77950 SoC that were only for
pre-production chips, and various chromebook models based on the Qualcomm
Sc7180 "trogdor" design that were never part of products.
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Merge tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC devicetree updates from Arnd Bergmann:
"The devicetree changes overall are again dominated by the Qualcomm
Snapdragon platform that weighs in at over 300 changesets, but there
are many updates across other platforms as well, notably Mediatek,
NXP, Rockchips, Renesas, TI, Samsung and ST Microelectronics. These
all add new features for existing machines, as well as new machines
and SoCs.
The newly added SoCs are:
- Allwinner T113-s, an Cortex-A7 based variant of the RISC-V based D1
chip.
- StarFive JH7110, a RISC-V SoC based on the Sifive U74 core like its
JH7100 predecessor, but with additional CPU cores and a GPU.
- Apple M2 as used in current Macbook Air/Pro and Mac Mini gets
added, with comparable support as its M1 predecessor.
- Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC
- Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs, based on
the Cortex-A53 and Cortex-A73 cores, respectively.
- Qualcomm sa8775p is an automotive SoC derived from the Snapdragon
family.
Including the initial board support for the added SoC platforms, there
are 52 new machines. The largest group are 19 boards industrial
embedded boards based on the NXP i.MX6 (32-bit) and i.MX8 (64-bit)
families.
Others include:
- Two boards based on the Allwinner f1c200s ultra-low-cost chip
- Three 'Banana Pi' variants based on the Amlogic g12b (A311D, S922X)
SoC.
- The Gl.Inet mv1000 router based on Marvell Armada 3720
- A Wifi/LTE Dongle based on Qualcomm msm8916
- Two robotics boards based on Qualcomm QRB chips
- Three Snapdragon based phones made by Xiaomi
- Five developments boards based on various Rockchip SoCs, including
the rk3588s-khadas-edge2 and a few NanoPi models
- The AM625 Beagleplay industrial SBC
Another 14 machines get removed: both boards for the obsolete 'oxnas'
platform, three boards for the Renesas r8a77950 SoC that were only for
pre-production chips, and various chromebook models based on the
Qualcomm Sc7180 'trogdor' design that were never part of products"
* tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (836 commits)
arm64: dts: rockchip: Add support for volume keys to rk3399-pinephone-pro
arm64: dts: rockchip: Add vdd_cpu_big regulators to rk3588-rock-5b
arm64: dts: rockchip: Use generic name for es8316 on Pinebook Pro and Rock 5B
arm64: dts: rockchip: Drop RTC clock-frequency on rk3588-rock-5b
arm64: dts: apple: t8112: Add PWM controller
arm64: dts: apple: t600x: Add PWM controller
arm64: dts: apple: t8103: Add PWM controller
arm64: dts: rockchip: Add pinctrl gpio-ranges for rk356x
ARM: dts: nomadik: Replace deprecated spi-gpio properties
ARM: dts: aspeed-g6: Add UDMA node
ARM: dts: aspeed: greatlakes: add mctp device
ARM: dts: aspeed: greatlakes: Add gpio names
ARM: dts: aspeed: p10bmc: Change power supply info
arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMM050 Magnetometer
arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMA255 Accelerometer
arm64: dts: mediatek: mt6795: Add tertiary PWM node
arm64: dts: rockchip: add panel to Anbernic RG353 series
dt-bindings: arm: Add Data Modul i.MX8M Plus eDM SBC
dt-bindings: arm: fsl: Add chargebyte Tarragon
dt-bindings: vendor-prefixes: add chargebyte
...
|
||
|
Stephen Boyd
|
a9863979fb |
Merge branch 'clk-imx' into clk-next
* clk-imx: (25 commits) clk: imx: imx8ulp: update clk flag for system critical clock clk: imx: imx8ulp: Add tpm5 clock as critical gate clock clk: imx: imx8ulp: keep MU0_B clock enabled always clk: imx: imx8ulp: Add divider closest support to get more accurate clock rate clk: imx: imx8ulp: Fix XBAR_DIVBUS and AD_SLOW clock parents clk: imx: imx93: Add nic and A55 clk dt-bindings: clock: imx93: add NIC, A55 and ARM PLL CLK clk: imx: imx93: add mcore_booted module paratemter clk: imx: fracn-gppll: Add 300MHz freq support for imx9 clk: imx: fracn-gppll: support integer pll clk: imx: fracn-gppll: disable hardware select control clk: imx: fracn-gppll: fix the rate table clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical clk: imx: imx8mp: Add LDB root clock dt-bindings: clock: imx8mp: Add LDB clock entry clk: imx: imx8mp: correct DISP2 pixel clock type clk: imx: drop duplicated macro clk: imx: clk-gpr-mux: Provide clock name in error message clk: imx: Let IMX8MN_CLK_DISP_PIXEL set parent rate clk: imx8mm: Let IMX8MM_CLK_LCDIF_PIXEL set parent rate ... |
||
|
Stephen Boyd
|
c19c6c7b44 |
Merge branches 'clk-of', 'clk-samsung', 'clk-rockchip' and 'clk-qcom' into clk-next
* clk-of: clk: add missing of_node_put() in "assigned-clocks" property parsing * clk-samsung: clk: samsung: exynos850: Make PMU_ALIVE_PCLK critical clk: samsung: Convert to platform remove callback returning void clk: samsung: exynos5433: Extract PM support to common ARM64 layer clk: samsung: Extract parent clock enabling to common function clk: samsung: Extract clocks registration to common function clk: samsung: exynos850: Add AUD and HSI main gate clocks clk: samsung: exynos850: Implement CMU_G3D domain clk: samsung: clk-pll: Implement pll0818x PLL type clk: samsung: Set dev in samsung_clk_init() clk: samsung: Don't pass reg_base to samsung_clk_register_pll() clk: samsung: Remove np argument from samsung_clk_init() dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D * clk-rockchip: clk: rockchip: rk3588: make gate linked clocks critical clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent * clk-qcom: (57 commits) clk: qcom: gcc-sc8280xp: Add EMAC GDSCs clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk clk: qcom: add the GPUCC driver for sa8775p dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property clk: qcom: rpm: Use managed `of_clk_add_hw_provider()` clk: qcom: Add Global Clock Controller driver for IPQ9574 dt-bindings: clock: Add ipq9574 clock and reset definitions clk: qcom: gpucc-sm6375: Configure CX_GDSC disable wait value clk: qcom: gcc-sm6115: Mark RCGs shared where applicable clk: qcom: dispcc-qcm2290: Add MDSS_CORE reset dt-bindings: clock: dispcc-qcm2290: Add MDSS_CORE reset clk: qcom: apss-ipq-pll: add support for IPQ5332 dt-bindings: clock: qcom,a53pll: add IPQ5332 compatible clk: qcom: apss-ipq-pll: refactor the driver to accommodate different PLL types dt-bindings: mailbox: qcom,apcs-kpss-global: fix SDX55 'if' match dt-bindings: mailbox: qcom,apcs-kpss-global: correct SDX55 clocks ... |
||
|
Stephen Boyd
|
1a86e99fa0 |
Merge branches 'clk-starfive', 'clk-fractional' and 'clk-devmof' into clk-next
- Shrink size of clk_fractional_divider a little - Convert various clk drivers to devm_of_clk_add_hw_provider() * clk-starfive: clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers clk: starfive: Avoid casting iomem pointers MAINTAINERS: generalise StarFive clk/reset entries reset: starfive: Add StarFive JH7110 reset driver clk: starfive: Add StarFive JH7110 always-on clock driver clk: starfive: Add StarFive JH7110 system clock driver reset: starfive: jh71x0: Use 32bit I/O on 32bit registers reset: starfive: Rename "jh7100" to "jh71x0" for the common code reset: starfive: Extract the common JH71X0 reset code reset: starfive: Factor out common JH71X0 reset code reset: Create subdirectory for StarFive drivers reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE clk: starfive: Rename "jh7100" to "jh71x0" for the common code clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h clk: starfive: Factor out common JH7100 and JH7110 code clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator dt-bindings: clock: Add StarFive JH7110 system clock and reset generator * clk-fractional: clk: Remove mmask and nmask fields in struct clk_fractional_divider clk: rockchip: Remove values for mmask and nmask in struct clk_fractional_divider clk: imx: Remove values for mmask and nmask in struct clk_fractional_divider clk: Compute masks for fractional_divider clk when needed. * clk-devmof: clk: uniphier: Use managed `of_clk_add_hw_provider()` clk: si5351: Use managed `of_clk_add_hw_provider()` clk: si570: Use managed `of_clk_add_hw_provider()` clk: si514: Use managed `of_clk_add_hw_provider()` clk: lmk04832: Use managed `of_clk_add_hw_provider()` clk: hsdk-pll: Use managed `of_clk_add_hw_provider()` clk: cdce706: Use managed `of_clk_add_hw_provider()` clk: axs10x: Use managed `of_clk_add_hw_provider()` clk: axm5516: Use managed `of_clk_add_hw_provider()` clk: axi-clkgen: Use managed `of_clk_add_hw_provider()` |
||
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Stephen Boyd
|
caca6ad367 |
Merge branches 'clk-xilinx', 'clk-broadcom' and 'clk-platform' into clk-next
- BCM63268 timer clock and reset controller - Convert platform clk drivers to remove_new * clk-xilinx: clocking-wizard: Support higher frequency accuracy clk: zynqmp: pll: Remove the limit * clk-broadcom: clk: bcm: Add BCM63268 timer clock and reset driver dt-bindings: clock: Add BCM63268 timer binding dt-bindings: reset: add BCM63268 timer reset definitions dt-bindings: clk: add BCM63268 timer clock definitions * clk-platform: (25 commits) clk: xilinx: Convert to platform remove callback returning void clk: x86: Convert to platform remove callback returning void clk: uniphier: Convert to platform remove callback returning void clk: ti: Convert to platform remove callback returning void clk: tegra: Convert to platform remove callback returning void clk: stm32: Convert to platform remove callback returning void clk: mvebu: Convert to platform remove callback returning void clk: mmp: Convert to platform remove callback returning void clk: keystone: Convert to platform remove callback returning void clk: hisilicon: Convert to platform remove callback returning void clk: stm32mp1: Convert to platform remove callback returning void clk: scpi: Convert to platform remove callback returning void clk: s2mps11: Convert to platform remove callback returning void clk: pwm: Convert to platform remove callback returning void clk: palmas: Convert to platform remove callback returning void clk: hsdk-pll: Convert to platform remove callback returning void clk: fixed-rate: Convert to platform remove callback returning void clk: fixed-mmio: Convert to platform remove callback returning void clk: fixed-factor: Convert to platform remove callback returning void clk: axm5516: Convert to platform remove callback returning void ... |
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Stephen Boyd
|
6f7478e3bb |
Merge branches 'clk-mediatek', 'clk-sunplus', 'clk-loongson' and 'clk-socfpga' into clk-next
- Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and MT8195 SoCs - Converted most Mediatek clock drivers to struct platform_driver - MediaTek clock drivers can be built as modules - Mediatek MT8188 SoC clk drivers - Clock driver for Sunplus SP7021 SoC - Reimplement Loongson-1 clk driver with DT support - Clk driver support for Loongson-2 SoCs - Migrate socfpga clk driver to of_clk_add_hw_provider() * clk-mediatek: (84 commits) clk: mediatek: fhctl: Mark local variables static clk: mediatek: Use right match table, include mod_devicetable clk: mediatek: Add MT8188 adsp clock support clk: mediatek: Add MT8188 imp i2c wrapper clock support clk: mediatek: Add MT8188 wpesys clock support clk: mediatek: Add MT8188 vppsys1 clock support clk: mediatek: Add MT8188 vppsys0 clock support clk: mediatek: Add MT8188 vencsys clock support clk: mediatek: Add MT8188 vdosys1 clock support clk: mediatek: Add MT8188 vdosys0 clock support clk: mediatek: Add MT8188 vdecsys clock support clk: mediatek: Add MT8188 mfgcfg clock support clk: mediatek: Add MT8188 ipesys clock support clk: mediatek: Add MT8188 imgsys clock support clk: mediatek: Add MT8188 ccusys clock support clk: mediatek: Add MT8188 camsys clock support clk: mediatek: Add MT8188 infrastructure clock support clk: mediatek: Add MT8188 peripheral clock support clk: mediatek: Add MT8188 topckgen clock support clk: mediatek: Add MT8188 apmixedsys clock support ... * clk-sunplus: clk: Add Sunplus SP7021 clock driver * clk-loongson: clk: clk-loongson2: add clock controller driver support dt-bindings: clock: add loongson-2 boot clock index MAINTAINERS: remove obsolete file entry in MIPS/LOONGSON1 ARCHITECTURE MIPS: loongson32: Update the clock initialization clk: loongson1: Re-implement the clock driver clk: loongson1: Remove the outdated driver dt-bindings: clock: Add Loongson-1 clock * clk-socfpga: clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling |
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Andrew Halaney
|
32c2f2a46d |
clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
Add the EMAC GDSCs to allow the EMAC hardware to be enabled. Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413191541.1073027-2-ahalaney@redhat.com |
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Yassine Oudjana
|
edb10ace4d |
dt-bindings: reset: Add binding for MediaTek MT6735 TOPRGU/WDT
Add a DT binding for the MT6735 top reset generation unit/watchdog timer. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20230302124015.75546-2-y.oudjana@protonmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> |
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Alain Volmat
|
5c899820ba |
dt-bindings: reset: remove stih415/stih416 reset
Remove the stih415 and stih416 reset dt-bindings since those two platforms are no more supported. Signed-off-by: Alain Volmat <avolmat@me.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230416200442.61554-1-avolmat@me.com Signed-off-by: Rob Herring <robh@kernel.org> |
||
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Arnd Bergmann
|
718acce6f0 |
More Qualcomm ARM64 Devicetree updated for v6.4
Devicetree for the QCM2210/QCM2290 is introduced. Support for the RB1 board is introduced on QRB2210, RB2 on QRB4210, the AL02 board on IPQ9574, the MI01.6 board is introduced on IPQ5332 and initial support for Xiaomi Mi A3 is introduced on SM6125. Support for the output-enable/disable flag is introduced in the pinctrl-msm driver, and the non-standard "input-enable" is dropped from a range of platforms. A wide range of smaller fixes are introduced, based on Devicetree validation. MSM8953 gains LPASS, MPSS and Wireless subsystem support. The iommus property is removed from PCIe nodes in all platforms, as the only the child devices should be associated with iommu groups, through the existing iommu-map property. A few QUP instances are introduced on the IPQ5332 platform, and support for the MI01.6 board is introduced. The reserved-memory map on Huawei Nexus 6P is updated with the addition of splash screen framebuffer memory and adjustment to the reserved memory region overlapping the smem region. Regulators are introduces for the SA8775P Ride platform. A regulator is marked always-on, for correctness, on Trogdor. Pinconf fixes are introduced to both sc7180 and sc7280 devices. A dedicated reviewers list is added for boards relevant to the Chromebook engineers. A set of pinconf fixes are introduced for sc8280xp, labels are introduced for Soundwire nodes. The sensor core remoteproc and FastRPC thereon, is introduce in SDM845 and enabled for OnePlus 6/6T and Shift Shift6mq. RMTFS, remoteprocs, ath10k and ramoops is introduced for the Lenovo Tab P11. UFS support is introduced on SM6125. SM8150 no longer defines the GPU to be in headless mode by default, GPU speedbins are introduced. GPU speedbins are introduced for SM8250 as well, as is support for display on Xiaomi Mi Pad 5 Pro, with two different panels supported. Soundwire controllers, ADSP audio codec macros and the Inline Crypto Engine support is added to the SM8550 platform. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ4xScVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FyAEQANkYPPmcATVeCMu8ABqOGr2YpN2v d1e8/Kdtrg0qWtqnXgkcec/+HvOqxTYlqW/iYLGf2fkgheQhbY8YOv3AU7FEG9Jr RNsPiyZ/2o2VPcskS6jQSsbAGKaWbhSh7Ao2lSUNSsPuhHOYw/Nu3iRxKCE1FdHn yqF2b+cipMwogKgx4LFCLwRTAG6f9HumDb3dwLeiUFPZH321MeJu8FzHnLt/wU5Z 64EzST7W2J5PlWdFEoJOXGDmxnM35hKJrzliRf5oqTHhUMUlyxQI6W61vSfsz5PP 7AE8DEMHD9b5fbRUf2mcMffPmhdvL194dSx10eTFMEuyoe+19CaMiZV86Cf8HeZ7 8K6ZZJ/tF/UrOBc7zMDtCUTm5f9MYyfiKqQNJekcpYWugQSsKw8TQZ58q4jM352R vvq2ywMDk2olt4Jn0on7L6M8x+uOGIMQG3B32jJijE0fRFdMcHJMwfxEBsrGmsUW vZvDdhQtIQSy6aLHFqwzFbGePq1GeYLjEh+PbT8EHkaCHFx0dA+EobLnwcyqJYky AmWA2wjbIYU96KahSZ4Sz3MWTy9MrhHa10bwWoBvOsp1AAM/gpx5nIgoHXmzp2pg cXgCqzUBgdMrWfjEFgtLY1HyRMGbQ7T+fQhaS5xn9TnHNqnvqLAW/APhyhrAWWXx 475V7NXAQMDd5FQX =vVPv -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5eO4ACgkQYKtH/8kJ UifICRAAz4I3XrqaTmlk8HtHwCSxhQfpF/6B+HmFbRG/tNFzWu4rbCyju2Gja6bi lQDxP42uuH78m35rXtAA848bZ8BpUQesJcGuwQoPYRwCPTLZH493QryEZ2DM4rp1 IjKe1FmuHlToBiPxBgk+3EqaulXM9wSvV6lb7HlsEx6vt8TC9i0IhnfD6jHJ7ESs Pln0nmTREAyNpdcGOfmCZ3m4Rc6rvz8WHu+pX/nYZIdF44txYJaVh4mU7T0DuxUo KF2rfpPko4FXxqN6V3fYBRuRihu9lAqPwg86imQruqHnc0Lrfw2IMAdnUtXcmJOo qrYvQgifJKd5TZ1aYrkiQk5jSA9Wy5Wt66rzu7XGC8XhEftYcs3D/gYkqfRifI+a d+dqYLYXOLTopdDRfGgnCa74cNs7A+Y/mUC+WZQmWFI4q7I9SUnipRfzZt44Vbmp mn1C6XIoeseO8HOHDx0dNUsgiDH/JDLZv1/RTT6fWj3+9R2fQKmtdq8i9ZBdKL7r M/bAsS8PENmV6Dv3bHWxIa4xC380bDgCrjsLdHh5Oqfvbv2NHpftHkOaCK8BgE/t 8YubTKxaxw0YQ0NtI+ku6Km9VJCG1zDEiQPMYEcklEzUj09CfkfCqBg4EkI92u2i P215llOlgIUzAgad/S0H2YhIIdnhsacU4adPEDD3devtKWdH+PE= =HFrk -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt More Qualcomm ARM64 Devicetree updated for v6.4 Devicetree for the QCM2210/QCM2290 is introduced. Support for the RB1 board is introduced on QRB2210, RB2 on QRB4210, the AL02 board on IPQ9574, the MI01.6 board is introduced on IPQ5332 and initial support for Xiaomi Mi A3 is introduced on SM6125. Support for the output-enable/disable flag is introduced in the pinctrl-msm driver, and the non-standard "input-enable" is dropped from a range of platforms. A wide range of smaller fixes are introduced, based on Devicetree validation. MSM8953 gains LPASS, MPSS and Wireless subsystem support. The iommus property is removed from PCIe nodes in all platforms, as the only the child devices should be associated with iommu groups, through the existing iommu-map property. A few QUP instances are introduced on the IPQ5332 platform, and support for the MI01.6 board is introduced. The reserved-memory map on Huawei Nexus 6P is updated with the addition of splash screen framebuffer memory and adjustment to the reserved memory region overlapping the smem region. Regulators are introduces for the SA8775P Ride platform. A regulator is marked always-on, for correctness, on Trogdor. Pinconf fixes are introduced to both sc7180 and sc7280 devices. A dedicated reviewers list is added for boards relevant to the Chromebook engineers. A set of pinconf fixes are introduced for sc8280xp, labels are introduced for Soundwire nodes. The sensor core remoteproc and FastRPC thereon, is introduce in SDM845 and enabled for OnePlus 6/6T and Shift Shift6mq. RMTFS, remoteprocs, ath10k and ramoops is introduced for the Lenovo Tab P11. UFS support is introduced on SM6125. SM8150 no longer defines the GPU to be in headless mode by default, GPU speedbins are introduced. GPU speedbins are introduced for SM8250 as well, as is support for display on Xiaomi Mi Pad 5 Pro, with two different panels supported. Soundwire controllers, ADSP audio codec macros and the Inline Crypto Engine support is added to the SM8550 platform. * tag 'qcom-arm64-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (85 commits) arm64: dts: qcom: Add base qrb4210-rb2 board dts arm64: dts: qcom: sm8550: add Soundwire controllers arm64: dts: qcom: sm8250: Add GPU speedbin support arm64: dts: qcom: sm8150: Add GPU speedbin support arm64: dts: qcom: sm8150: Don't start Adreno in headless mode arm64: dts: qcom: ipq5332: add support for the RDP468 variant arm64: dts: qcom: sdm630: move DSI opp-table out of DSI node arm64: dts: qcom: sm6115p-j606f: Enable ATH10K WiFi arm64: dts: qcom: sm6115p-j606f: Enable remoteprocs arm64: dts: qcom: sm6115: Add RMTFS arm64: dts: qcom: sm6115-j606f: Add ramoops node arm64: dts: qcom: msm8916-thwc-ufi001c: add function to pin config arm64: dts: qcom: sm8550: Add the Inline Crypto Engine node arm64: dts: MSM8953: Add lpass nodes arm64: dts: MSM8953: Add mpss nodes arm64: dts: MSM8953: Add wcnss nodes arm64: dts: qcom: sm8350: remove superfluous "input-enable" arm64: dts: qcom: sm8150: remove superfluous "input-enable" arm64: dts: qcom: apq8016: remove superfluous "input-enable" arm64: dts: qcom: sc8280xp-lenovo-thinkpad: correct pin drive-strength ... Link: https://lore.kernel.org/r/20230414031550.2412379-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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10678a0751 |
Qualcomm ARM64 updates for v6.4
PCI I/O and MEM ranges are corrected across all targets with PCIe enabled. Likewise is CPU clocks defined to be provided from CPUfreq for a wide range of platforms, to satisfy the OPP definitions, and LLCC bank information is corrected for all relevant platforms. IPQ5332 gains SMEM, CPUfreq and support for triggering download mode. The MI01.2 board is introduced. On MSM8916 WCN compatibles are moved to be defined per board, to avoid issues when boards rely on the incorrect defaults. Support for Yiming UZ801 4G modem stick is introduced. XO clock is defined and fed to RPMCC on MSM8953 and MSM8976, to ensure clock trees are properly rooted. DSI clocks feeding into gcc are described on MSM8953. On MSM8996 the external audio components are moved from the SoC dtsi. A few DWC3 quirks are added. On MSM8998 GPIO names are introduced for Sony Xperia XZ Premium, XZ1 and XZ1 Compact. A numbe of boards have GPIO keys properly marked as wakeup-source. The SA8775P platform is extended with CPUfreq, UARTs, I2C controllers, SPI controllers, SPMI and PMICs, PDC support. The associated PMICs gains reset and power key support, as well as thermal zones defined. Nodes are sorted. On top of this the SA8775P Ride board/platform is introduced. On SC7180 and SC7280 a range of fixes coming from DeviceTree validation are introduced, some clearing up unused properties, others correcting errors. A number of Google rev0 boards on SC7180 are dropped, as these are not considered to be in use by anyone anymore. On SC8280XP RTC support is introduced and enabled for the CRD and Lenovo Thinkpad X13s. It gains another UART, upon which Bluetooth is enabled on the Lenovo ThinkPad X13s. The touchpad definition is altered to attempt to probe both devices seen in the wild. A number of bug fixes are also introduced, and the regulator definitions on X13s are corrected. On SDM845 dynamic power coefficients are improved. BWMON compatible is corrected. Xiaomi Pocophone F1 gains notification LED. Sony Xperia XZ2, XZ2 Compact and XZ3 gains display, touchscreen, gpu and remoteproc support. OnePlus 6 and 6T gains hall sensor. GPU clock controller and remoteproc nodes are added for SM6115. CPU clock are defined to come from CPUfreq. Board-specific USB-properties are moved out of the SoC dtsi. On SM6375 L3 scaling, IMEM, RMTFS, RPM sleep stats, Tsens, modem remoteproc and WiFi nodes are added. Tsens thermal zones are defined and additional low power states are defined. Sony Xperia 10 IV gains volume down key support. On SM8150 another UART is introduced, to be used by GNSS on the SA8155 ADP. Support for the Flash LED block in PM8150L is added. On SM8250 TPDM MM and PRNG is defined, MHI region is added to PCIe node. A few bug fixes are introduced after Devicetree validation. The DisplayPort controller on both SM8350 and SM8450 is defined and the related QMP instance is transitioned to the USB3/DP combo variant. IMEM and PIL info is introduced, for post mortem debugging of remoteprocs. On the HDK PMIC GLINK is enabled and role switch is enabled. Some audio resources are corrected. A typo in the USB role property of the Microsoft Surface is corrected, thanks to DeviceTree validation. PCIe controllers and PHYs descriptions are corrected, and pinctrl state definitions are moved from the soc to the board definition. BWMON compatibles are corrected. PM8550B gains the definition of the eUSB2 repeater and this is enabled on the MTP. PMIC GLINK is also defined for the MTP and connected to DWC3, for role switching support. In addition to this, a range of cleanups based on Devicetree validation is introduced. A few clock bindings are introduced, from topic-branches shared with the clock tree, to aid introduction of references to these. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ0QQEVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F3WgQALGaxeK2rYNfVVR8YMrsjDYow2vq Uup1AxG2sAGdLBiegf0btiIlw6y+t7pdUuP+elKx3sLrx/UiJfa7/fqdMhfft3Qo 16xhKIHQwokgGyl6hFJg2WTLrbC/qq60rB2YP/aR3pBCovu1nL/jX/9de28jNXUe FydCDCAfa1Zd3fDdp0uqGWA9mCSDDnlL0UuiP7PIkUFEEkPHdif/a3H1O5y1S+LW Eq38bJeMoQUYOYx4hYTxzmkCjbZVFEhho2lVyfHLy2fIaGuA4Gm4THnXMu5P9vIL Q4dNR6/XnquH2G9LcDLIcPWkWg8KkFDNnRQBkIkNZQAUqqY2klY/8sa0aZZJk53f KD393N/aWUV7tGYynLLc5oluoKLIlFFMdWVdxxR36zP70hu6Q2kGj4NUIB+odMdS QgJIyBBJ2dafvB5llXGaUXMOFYJYolcoss0EWfCU5jCg2XhxC8Q6mvpF1vAuCTTZ aueb0RlXxzdTcCy0jkqCl1GsBOuQONtAOnQ8nRE+8ookzLGJ8RBnoUmWUifzxnqe ueYdGPu2nnmqrbYAJqzr1Y9G7ImsX0V72iwC0wFFL8woZzDPGgEcDIyOaGCI3Hus P3weJ9WScj6ScRvRTI4EdZL03oaPPsF8zMA8xyXoCzeWtp3wsrtFNbVqAZSEvcAq a92owWcK+flh9Ckj =ZyN2 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5d90ACgkQYKtH/8kJ UifbkRAA0tH8h0ehQRsfgaijE+KNM5IOwi7iszD7NObNG+5Nal5QO6H9CvrEEbgv 4c6qwkC7F+ZN+zTVeKTufqZ6/zkylW+AMzL4UuAl5BxhMMrWzsg1NR1+NlbKssEb EBbLll7uxohuK79JNjmor/VV+zJX+hOyAhsf6yo6gpYFiJdgrRGwWVFVflNTNQis mpw5U4SyFNo4lq/HDERuxWbbsTl+VmoCeezCRgolaVkq4RTeMNcIxbm/kJ+t9ela HNm6mpJWqUUGeNpos5VdCqLApxBQgYmwz1mPHTQfC0V9v8YlVnTTKVmw4lHoGnZp ADN7iQSqqpsOLjML3+7HfQ8FWTTpj6FbE+vcSTiLjnstv9oDYd2wf9FPzJqcDVTl MucZVPk75zutakDuHOxizdfSTXPnpyEXnpnEUla6E+BntkB5eCTz45NN9B35gowA fY437FQ95eY2mV2vpya91rH2Rtw5BJbZW6jsw+WxT29A67LBa+sJrTayDNzYLuUz GjSb2vmRr2r3WG1jy8QQxVC3R/t4rlqXBnmJ91nHNIgrGl5ExrIEt+IDRsqHlS7T V1xX4fl9Ge2zfZeoFPFhgIBpPtvEkW5mUKIjRX6EBvRnG9+T8CWuWSnJDuFa6AMZ kxAhqUojmDO8f1E/BPiHHCP31dfUrMOVor0fu9qu7o8/H/WPo04= =OcHF -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 updates for v6.4 PCI I/O and MEM ranges are corrected across all targets with PCIe enabled. Likewise is CPU clocks defined to be provided from CPUfreq for a wide range of platforms, to satisfy the OPP definitions, and LLCC bank information is corrected for all relevant platforms. IPQ5332 gains SMEM, CPUfreq and support for triggering download mode. The MI01.2 board is introduced. On MSM8916 WCN compatibles are moved to be defined per board, to avoid issues when boards rely on the incorrect defaults. Support for Yiming UZ801 4G modem stick is introduced. XO clock is defined and fed to RPMCC on MSM8953 and MSM8976, to ensure clock trees are properly rooted. DSI clocks feeding into gcc are described on MSM8953. On MSM8996 the external audio components are moved from the SoC dtsi. A few DWC3 quirks are added. On MSM8998 GPIO names are introduced for Sony Xperia XZ Premium, XZ1 and XZ1 Compact. A numbe of boards have GPIO keys properly marked as wakeup-source. The SA8775P platform is extended with CPUfreq, UARTs, I2C controllers, SPI controllers, SPMI and PMICs, PDC support. The associated PMICs gains reset and power key support, as well as thermal zones defined. Nodes are sorted. On top of this the SA8775P Ride board/platform is introduced. On SC7180 and SC7280 a range of fixes coming from DeviceTree validation are introduced, some clearing up unused properties, others correcting errors. A number of Google rev0 boards on SC7180 are dropped, as these are not considered to be in use by anyone anymore. On SC8280XP RTC support is introduced and enabled for the CRD and Lenovo Thinkpad X13s. It gains another UART, upon which Bluetooth is enabled on the Lenovo ThinkPad X13s. The touchpad definition is altered to attempt to probe both devices seen in the wild. A number of bug fixes are also introduced, and the regulator definitions on X13s are corrected. On SDM845 dynamic power coefficients are improved. BWMON compatible is corrected. Xiaomi Pocophone F1 gains notification LED. Sony Xperia XZ2, XZ2 Compact and XZ3 gains display, touchscreen, gpu and remoteproc support. OnePlus 6 and 6T gains hall sensor. GPU clock controller and remoteproc nodes are added for SM6115. CPU clock are defined to come from CPUfreq. Board-specific USB-properties are moved out of the SoC dtsi. On SM6375 L3 scaling, IMEM, RMTFS, RPM sleep stats, Tsens, modem remoteproc and WiFi nodes are added. Tsens thermal zones are defined and additional low power states are defined. Sony Xperia 10 IV gains volume down key support. On SM8150 another UART is introduced, to be used by GNSS on the SA8155 ADP. Support for the Flash LED block in PM8150L is added. On SM8250 TPDM MM and PRNG is defined, MHI region is added to PCIe node. A few bug fixes are introduced after Devicetree validation. The DisplayPort controller on both SM8350 and SM8450 is defined and the related QMP instance is transitioned to the USB3/DP combo variant. IMEM and PIL info is introduced, for post mortem debugging of remoteprocs. On the HDK PMIC GLINK is enabled and role switch is enabled. Some audio resources are corrected. A typo in the USB role property of the Microsoft Surface is corrected, thanks to DeviceTree validation. PCIe controllers and PHYs descriptions are corrected, and pinctrl state definitions are moved from the soc to the board definition. BWMON compatibles are corrected. PM8550B gains the definition of the eUSB2 repeater and this is enabled on the MTP. PMIC GLINK is also defined for the MTP and connected to DWC3, for role switching support. In addition to this, a range of cleanups based on Devicetree validation is introduced. A few clock bindings are introduced, from topic-branches shared with the clock tree, to aid introduction of references to these. * tag 'qcom-arm64-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (256 commits) arm64: dts: qcom: sc8280xp-x13s: Add bluetooth arm64: dts: qcom: sc8280xp: Define uart2 arm64: dts: qcom: sc8280xp: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sm8250: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sdm845: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sa8775p-ride: set gpio-line-names for PMIC GPIOs arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes arm64: dts: qcom: sa8775p: pmic: add thermal zones arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input arm64: dts: qcom: sa8775p: pmic: add the power key arm64: dts: qcom: sa8775p: add the Power On device node arm64: dts: qcom: sa8775p: add support for the on-board PMICs arm64: dts: qcom: sa8775p: add the spmi node arm64: dts: qcom: sa8775p: add the pdc node arm64: dts: qcom: sa8775p: sort soc nodes by reg property arm64: dts: qcom: sa8775p: pad reg properties to 8 digits arm64: dts: qcom: sc8280xp: correct Soundwire wakeup interrupt name arm64: dts: qcom: sdm845-tama: Enable GPI_DMA0/1 arm64: dts: qcom: sdm845-tama: Enable GPU arm64: dts: qcom: sdm845-tama: Enable remoteprocs ... Link: https://lore.kernel.org/r/20230410170233.5931-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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c47b89b418 |
TI K3 device tree updates for v6.4
New features: * Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm * Add support for AM625 based BeaglePlay, AM62-LP-SK * Audio, RTC, watchdog support for AM625 * McSPI for J7200,j721e, j721s2, J784s4 * ADC for j721s2 * Crypto acceleration, CPSW2G for J784s4 Non critical fixes: AM62, AM62a: * Fix schematics error to increase DDR to 4GB on AM62a-SK * L2Cache size fix (AM62a/AM625) * ti,vbus-divider property to USB1 on AM625-SK * Gpio count fix for AM625 J7200,j721e, j721s2, J784s4, AM68, AM69: * ti,sci-dev-id for J784s4 NAVSS nodes * j721e-sk: Drop application specific firmware name * am68-sk: Fix the gpio expander lines for production version Cleanups: * Pinmux header move to dt folder (next kernel PR, we will drop the uapi header). * j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmQ0EJgACgkQ3bWEnRc2 JJ0SYRAApVR/RAGWBrYYAQ8oN+kIDaep3mHPtRMPtVwKyK0SU5FQZM7PWok2wdpH h0gw+1S4kZKcZsrz7153TzZHUNHtJ+TEG1g+EIhJh2OSV0SnqUOWucTS9nkt7MPs DvzbrF8RL9xCEi0dUtpBT+YEx0HF5AijkvjHWKBYI/XcbxmqrrQZ34wJxUR7qsFC nO8gADcQZjp14ZwP3b4Ag6jLMez2ERqZ3tM/if9WOlvpkQ3eI9e6Gjq5inMPjzNm gjqvN1gyWDi3pbG7Y+jrs/O26atnOTRAHUKww460x15nNi6a3qU1jN4awlBtANla UTu7CSuG1I6HWQaR2bGlWgkKxNOJAcfqtiCtMHsInYy7yDlwczC1KwWSFWdGxNoF 6yelo+X4oJhiQOqhVQdHpyCiT4HoyEWaS1tsXcke16N8X0fjdTWIq1deqXp5vLdE ne5FYQK1y+HyGJJGeDddbV9zuUQby9KoziB+N/VHWgDjUGWbrdmSEA6C3BNcF5+4 X6wd0NQPMc9sFVR5s3zGXrtozVMlkMuozCYlPVtaHDtNkGftGIq0KrsjQVIKiYwb GinjS8eM63p0PGiZRBf+49EkH/yC82svSM/XepEFUyvUPwYdm43zVUVz6tNqv3RT ms9wnzJpgRd+TcPn1xr5QojFxsnZjGr/Hb6mvbcU5S1OQfgkqZo= =zvF1 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5dgAACgkQYKtH/8kJ UieM1g//bYhlrB3jwoecovyxOocd85EnfP1ykwXvGVjF+UvHujfcH7ExZaCg3Km3 RQbMVLwynhGRBvys1YwPRh09FjOSKoZwpyly0ROFCP9Sc6QJLjtzb7zVAo7U3A5K rVZ/ZeG3/OLqB3l5ZaJS6zVJppnvm3R0CtVlRO9oD/XUdKhRDQPCaXZyD3oaMCjY bXNs1y/giESPCzwnR8qVvVHGQ6JoMtnznff1zgodYvuo9+e3xSIpTZvbRY1Aguc1 QbcaRISNqOpGsZHrUlw+PrPlIYQYb1osOq81R4g6NX3/J+UN9kz+uTb7f1xtrt+W tGbvVRQHNiRXHOC5fUGwxfcV3+M6YUKpCiap/l1brcchfeHb0La1+BN0dRMgybQf EG27jfHbAAEA8L7b1gutAY3yNfhJPvahWT/wQ0L4xhu33KpRSNwHBSkg6qXAFi1u aPWfRwm3bGpVoHltTVKdULqZb+bYKY/w8GfipbvCpI2LvX8MJrsFSxqFcSw1vgB7 iNYebbVUI+e/UUTEeKYE4ct98vezbGNBTxFcsPgVQL5UHAkYrzXHet3WuDP73hEz w+01eIaDA8R1TnpgTX4doqgEj6illiv6WY2EUwoJzBGc76UVOQf2eraimWGp1Vtr mh8tlfjnErTv+iMPcBO8bjvBXDhQcb4iBN+5q8KkVvqtOtcSsjA= =3wzd -----END PGP SIGNATURE----- Merge tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v6.4 New features: * Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm * Add support for AM625 based BeaglePlay, AM62-LP-SK * Audio, RTC, watchdog support for AM625 * McSPI for J7200,j721e, j721s2, J784s4 * ADC for j721s2 * Crypto acceleration, CPSW2G for J784s4 Non critical fixes: AM62, AM62a: * Fix schematics error to increase DDR to 4GB on AM62a-SK * L2Cache size fix (AM62a/AM625) * ti,vbus-divider property to USB1 on AM625-SK * Gpio count fix for AM625 J7200,j721e, j721s2, J784s4, AM68, AM69: * ti,sci-dev-id for J784s4 NAVSS nodes * j721e-sk: Drop application specific firmware name * am68-sk: Fix the gpio expander lines for production version Cleanups: * Pinmux header move to dt folder (next kernel PR, we will drop the uapi header). * j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation * tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (34 commits) arm64: dts: ti: k3-j784s4-evm: Add eMMC mmc0 support arm64: dts: ti: Enable audio on SK-AM62(-LP) arm64: dts: ti: k3-am62-main: Add McASP nodes arm64: dts: ti: k3-j784s4: Add MCSPI nodes arm64: dts: ti: k3-j721s2: Add MCSPI nodes arm64: dts: ti: k3-j7200: Add MCSPI nodes arm64: dts: ti: k3-j721e: Add MCSPI nodes arm64: ti: dts: Add support for AM62x LP SK arm64: dts: ti: Refractor AM625 SK dts dt-bindings: arm: ti: k3: Add compatible for AM62x LP SK arm64: dts: ti: k3-am625-sk: Add ti,vbus-divider property to usbss1 arm64: dts: ti: k3-am68-sk-base-board: Update IO EXP GPIO lines for Rev E2 arm64: dts: ti: Add k3-am625-beagleplay dt-bindings: arm: ti: Add BeaglePlay arm64: dts: ti: k3-j7200: Add overlay to enable CPSW5G ports in QSGMII mode arm64: dts: ti: j7200-main: Add CPSW5G nodes arm64: dts: ti: k3-j721e: Add overlay to enable CPSW9G ports in QSGMII mode arm64: dts: ti: k3-j721e: Add CPSW9G nodes arm64: dts: ti: k3-j784s4-evm: Enable MCU CPSW2G arm64: dts: ti: k3-j721s2-common-proc-board: Add pinmux information for ADC ... Link: https://lore.kernel.org/r/20230410140521.3u3fftgnejakqnzj@shakable Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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17e26de12a |
Renesas DTS updates for v6.4 (take two)
- Add PWM support for the R-Car H1 and H2 SoCs,
- Add slide switch and I2C support for the Marzen development board,
- Add SCI (serial) and Camera support for the RZ/G2L SoC and the
RZ/G2L SMARC EVK development board,
- Add IOMMU support for the R-Car V4H SoC,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.4 (take two)
- Add PWM support for the R-Car H1 and H2 SoCs,
- Add slide switch and I2C support for the Marzen development board,
- Add SCI (serial) and Camera support for the RZ/G2L SoC and the
RZ/G2L SMARC EVK development board,
- Add IOMMU support for the R-Car V4H SoC,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r8a779a0: Revise renesas,ipmmu-main
arm64: dts: renesas: falcon-csi-dsi: Set bus-type for MAX96712
arm64: dts: renesas: r8a779g0: Add iommus to MMC node
arm64: dts: renesas: r8a779g0: Add iommus to DMAC nodes
arm64: dts: renesas: r8a779g0: Add IPMMU nodes
arm64: dts: renesas: r8a779f0: Revise renesas,ipmmu-main
arm64: dts: renesas: rzg2l-smarc: Enable CRU, CSI support
arm64: dts: renesas: r9a07g044: Add CSI and CRU nodes
arm64: dts: renesas: r9a07g044: Enable SCI0 using DT overlay
ARM: dts: r8a7790: Add PWM device nodes
ARM: dts: r8a7790: Add TPU device node
ARM: dts: marzen: Enable I2C support
ARM: dts: marzen: Add slide switches
ARM: dts: r8a7779: Add PWM support
dt-bindings: clock: r8a7779: Add PWM module clock
arm64: dts: renesas: rzg2l: Add clock-names and reset-names to DMAC nodes
Link: https://lore.kernel.org/r/cover.1681113117.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann
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d40a2f5062 |
RISC-V Devicetrees for v6.4
Microchip: A "fix" for the system controller's regs on PolarFire SoC, adding a missing reg property. The patch had been sitting there for months and I only re-found it recently, so you can guess how much of a "fix" it actually is. It'll become needed when the system controller's QSPI gets added in the future, but at present there's no urgency as the driver can handle both the current and "fixed" versions. StarFive: Basic support for the JH7110 & the associated first-party dev board, the VisionFive v2 (in two forms). There's a bunch of dt-bindings required for this too, all of which have had input from the DT folk. There's enough in this tag to boot to a console w/ an initramfs but little more. The SoC supports some of the "new" bit manipulation instructions, which is a good test for the recently added Zbb support in the kernel. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZC8o6wAKCRB4tDGHoIJi 0pdpAP0Y0qkT5tZSV635h2XOrWBpW3D3Vpx6+LGmw2mRjhHVPgD+Mfe0LkP6Dbq3 JS6fMISbgMAG/8dqcys/e0gmHksYJAk= =FsQ1 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5U/EACgkQYKtH/8kJ Uif0hhAAxHk3QfPh5BF/1TzzUdeOgXuCiT9sQWHB9VtX1N03nwRoMETbFPRxjI1v P/KckzA5nxVA8q8Me+hb5nRQFwiDOVsH5cBMMnPQ46NGImEaptZ7Jwf1/RT1yk6n eBg9vRipRhD56CYTE20iasjhwjVohljvce58Rg61oXQ2lK1dKxnIjPeDfypPz9/p 149/wWUy8e6pGIciDw25hKGuxZiXHlO4OwdL0yWggXl/iuBi8l7gAQAcCv7vWNS3 oM8t6n/o1Vr0L+MBJtBBKPmuPKu7u54+RWsaKrO3zyiRRKGjI/VMZOi5ZKcooynL ThAGlqCIrnXu25XJ2V7l95FDTdPeTljhh1FRyOIJjvzlCX9QBdr5suQU3q9zr+Mf ZdE5baezkwsTF+1Hi/Yc65gCAtUfQmGG88/TE1krFw4aaE1xVr7nAfDCpdLcCzDS D/1b9/4h/2B2dJIdBO3VdzKG4bTcaK3Eb6TX6z2zIZ6stNHcoDxr6dcQXdiGAoYu /I8zAX3zTo5Q8E0Y67h7ao4dxDqxVUIop/92OJeD3X3IkcJreXEuxBEEsRvs53P6 /tqAsG5zPpW5GwfeopUHfFUYJRn+sLrqQ9zD+k4InwiCSlR/tJ7tBMXqyRsQUEyR P336MHjq10PRVmgKjsPpTx87K9f39Qgh6doHWAKBfMo/gSQ8z9U= =l6EI -----END PGP SIGNATURE----- Merge tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt RISC-V Devicetrees for v6.4 Microchip: A "fix" for the system controller's regs on PolarFire SoC, adding a missing reg property. The patch had been sitting there for months and I only re-found it recently, so you can guess how much of a "fix" it actually is. It'll become needed when the system controller's QSPI gets added in the future, but at present there's no urgency as the driver can handle both the current and "fixed" versions. StarFive: Basic support for the JH7110 & the associated first-party dev board, the VisionFive v2 (in two forms). There's a bunch of dt-bindings required for this too, all of which have had input from the DT folk. There's enough in this tag to boot to a console w/ an initramfs but little more. The SoC supports some of the "new" bit manipulation instructions, which is a good test for the recently added Zbb support in the kernel. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree riscv: dts: starfive: Add StarFive JH7110 pin function definitions riscv: dts: starfive: Add initial StarFive JH7110 device tree dt-bindings: riscv: Add SiFive S7 compatible dt-bindings: interrupt-controller: Add StarFive JH7110 plic dt-bindings: timer: Add StarFive JH7110 clint dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator dt-bindings: clock: Add StarFive JH7110 system clock and reset generator riscv: dts: microchip: fix the mpfs' mailbox regs riscv: dts: microchip: add mpfs specific macb reset support Link: https://lore.kernel.org/r/20230406-shank-impromptu-3d483bbc249f@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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126c6da71f |
Qualcomm driver updates for v6.4
The Qualcomm SCM driver will now always clear the download bit, avoiding entering download mode on a clean reboot because the bootloader left it set. The vmid bitmap passed to qcom_scm_assign_mem() is transitioned to a well defined size. SM6375 support is added, and SC8180X, QDU1000/QRU1000, IPQ5332 and IPQ9574 compatibles are documented. GENI gains support for newer hardware with deeper FIFOs. The BWMON driver is updated to better handle the two register blocks, which are not consistent between MSM8998 and newer platforms. The LLCC driver no longer assumes a fixes stride across the various banks, and instead acquire the bank placement from DeviceTree. EDAC support for polling is introduced. EDAC support on SDM845 is disabled, as its been observed that accessing relevant registers is not permitted on most devices. PMIC GLINK is reworked to support defining which auxiliary children to spawn per platform, support for spawning a UCSI child is added and SM8450 and SM8550 is introduced. The RPM power-domain driver is cleaned up by moving and generalizing structures that are common between platforms, rather than duplicating everything. Macros are replaced with just direct definition of the relevant structures. Support for defining parent relationships between the power-domains is introduced, like it has been in rpmhpd for a long time. Number of processors has gone up, so max processor count in SMEM is bumped again. Error handling in SMSM is cleaned up using dev_err_probe(). Socinfo is taught about IPQ9574, QCM2290, QRB2210, QRB4210, SM7150, SA8775P and a number of PMICs. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ0Ka0VHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F9MIP/0vjJCDf+EtUJpN1KxwMzmXZRuac wJweQdgfD8m+fB+33Gs9bX8Jw8j4zddZlM45XCHiNsQ72Gs8RqvwCBcjkxtCGrTq Jm33zEWcRjm/7Z1R4bOrGdRM92NAUJK0RePSNSpBoB4s5rdvzYHCYttXGe80A7xI nLLEpxAbUb3y6UtP7adqEpiWtIJ16Nv/Sa1uWGXyhwjwTuBCXFKG2UdsQxJhxLna CkkJ2d4tfVcRcYNh8DEZEX9qs9aikZJvH3QtTe2UpJz8hlNroqmgHZtAWdPbOzAY xAMv/UUeq+kquUJr0cRhcuIRBruUGhnXISqHsc0T6xqyfnq6dR4m/tVfwlQ15BKe zq17mJUiK7fZyWWSkBf8SOPgez8GUaD/2Zqssf4JIKeC/VT3uqW3oejhm6o+sfrG ik0Tph/SVhcVvUQOsVygdf4BQXvOJDnXoZo182XZV4FiESkxnbRlhedzk2+s3agU 0F76hcNgASpskPw37A4uHHC9bwfpWJQWuGVHUVW9Me6CMxxaCcXWIhDc47i6NZeB vrwJGXs8dWCKj9pOdI1Fb9GJ7LvP7kQF9VfdwqA4jstWggooAkNaAfgYnAuprsAC kCCvBOfoB1LjB4fLjf5gJEwr9HOOwS9TPtsfd772IFXdI9zwv9ImDYRMpCX5L3pk aVEW4VjRI6TRTFMB =Bo2w -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5SFYACgkQYKtH/8kJ UieADQ/+JSEbvQapNaxgKpG6HS3uQq+24BUmBvh2MbM5SwPi6D0JqoUx5wtnpg91 uBanGMKqCKkqc64jgNVsRwJW6/d8pdLLx7VCEsJaJPjhvBptD6K2QTFF5Gflbp7a HZmlteqMZG8zdc0KHSCuSXX6RtonAE9xBWBXe5EUhY22eyPB9okhNerRDSHU3add 7fm48p3V5k4/atX4BFYiysiHoAWxnXW+mz1uSfTWuONkW8+vKrAcD5b9ujzXW6ZD TGXmKHY5M08BsqHqDcEBjReuIVcacs63H6rX0JMx0I7uCT1qNvmwEqLeXrXKoo0n hwumr+I2+CEzhhSCkZY8rWH/He7Kd7WxfLAxCMdaDBoZYbxGAAqytZGYBJUx8mY8 RDA8YHfYWt56rhZL8SrwhD0dzLkeDTT5oKXFLtrTTcghOFNJl4uELhUU5wXJGP6q 3GTK0nxIoBKznaCzAhD/9JonS8mO3GbigVhw/yGQeionwZJyl1DXdSeRYGezDeII eKjtKvngoKbt/3Il9yiL+JUaPFIfPwVrIGnMBQjayjyH8m+5TDHD0+f0R5mnW8g8 qLvyga0GndPkFYS0Gpnw8Dqd5NfeRQVGkSJEELyFevnFHldZpVw8kCuejmfjXvGV tsOMjL0iZt4NrIZr5eFBa4b41o47hU8s9WYY/4VEaccuybTCxUc= =wYqZ -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.4 The Qualcomm SCM driver will now always clear the download bit, avoiding entering download mode on a clean reboot because the bootloader left it set. The vmid bitmap passed to qcom_scm_assign_mem() is transitioned to a well defined size. SM6375 support is added, and SC8180X, QDU1000/QRU1000, IPQ5332 and IPQ9574 compatibles are documented. GENI gains support for newer hardware with deeper FIFOs. The BWMON driver is updated to better handle the two register blocks, which are not consistent between MSM8998 and newer platforms. The LLCC driver no longer assumes a fixes stride across the various banks, and instead acquire the bank placement from DeviceTree. EDAC support for polling is introduced. EDAC support on SDM845 is disabled, as its been observed that accessing relevant registers is not permitted on most devices. PMIC GLINK is reworked to support defining which auxiliary children to spawn per platform, support for spawning a UCSI child is added and SM8450 and SM8550 is introduced. The RPM power-domain driver is cleaned up by moving and generalizing structures that are common between platforms, rather than duplicating everything. Macros are replaced with just direct definition of the relevant structures. Support for defining parent relationships between the power-domains is introduced, like it has been in rpmhpd for a long time. Number of processors has gone up, so max processor count in SMEM is bumped again. Error handling in SMSM is cleaned up using dev_err_probe(). Socinfo is taught about IPQ9574, QCM2290, QRB2210, QRB4210, SM7150, SA8775P and a number of PMICs. * tag 'qcom-drivers-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (51 commits) dt-bindings: firmware: document Qualcomm SC8180X SCM dt-bindings: sram: qcom,imem: document SM6375 IMEM soc: qcom: icc-bwmon: Handle global registers correctly soc: qcom: icc-bwmon: Remove unused struct member soc: qcom: smsm: Use dev_err_probe() firmware: qcom_scm: Add SM6375 compatible soc: qcom: llcc: Add configuration data for SM7150 dt-bindings: arm: msm: Add LLCC for SM7150 dt-bindings: soc: qcom: smd-rpm: re-add missing qcom,rpm-msm8994 soc: qcom: pmic_glink: register ucsi aux device dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible firmware: qcom_scm: Clear download bit during reboot dt-bindings: soc: qcom: aoss: Document QDU1000/QRU1000 compatible dt-bindings: firmware: qcom,scm: Update QDU1000/QRU1000 compatible dt-bindings: soc: qcom: smd-rpm: Add IPQ9574 compatible firmware: qcom_scm: Use fixed width src vm bitmap dt-bindings: firmware: qcom,scm: document IPQ5332 SCM dt-bindings: scm: Add compatible for IPQ9574 soc: qcom: rpmpd: Remove useless comments ... Link: https://lore.kernel.org/r/20230410152421.4477-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Bartosz Golaszewski
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daa9e76d17 |
dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
Add the compatible for the Qualcomm Graphics Clock control module present on sa8775p platforms. It matches the generic QCom GPUCC description. Add device-specific DT bindings defines as well. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230411125910.401075-2-brgl@bgdev.pl |
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Peng Fan
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5fd7b00ca2 |
dt-bindings: clock: imx93: add NIC, A55 and ARM PLL CLK
Add i.MX93 NIC, A55 and ARM PLL CLK. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230403095300.3386988-7-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org> |
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Peng Fan
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79643567cc |
dt-bindings: clock: imx8mp: Add LDB clock entry
Add LDB clock entry for i.MX8MP Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230403094633.3366446-2-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org> |
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Dylan Van Assche
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77c7a41e05 |
dt-bindings: firmware: qcom: scm: add SSC_Q6 and ADSP_Q6 VMIDs
SSC_Q6 and ADSP_Q6 are used in the FastRPC driver for accessing the secure world. Signed-off-by: Dylan Van Assche <me@dylanvanassche.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230406173148.28309-3-me@dylanvanassche.be |
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Bjorn Andersson
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5602dfc37a |
Merge branch '20230316072940.29137-2-quic_devipriy@quicinc.com' into HEAD
Merge the IPQ9574 Global Clock Controller Devicetree binding, to make available the clock definitions used in the Devicetree source. |
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Bjorn Andersson
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3a5c7ed3d8 |
Merge branch '20230316072940.29137-2-quic_devipriy@quicinc.com' into clk-for-6.4
Merge IPQ9574 Global Clock Controller binding through a topic branch to allow it also be introduced in the Devicetree source tree. |
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Devi Priya
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b065b23d3c |
dt-bindings: clock: Add ipq9574 clock and reset definitions
Add clock and reset ID definitions for ipq9574 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316072940.29137-2-quic_devipriy@quicinc.com |
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Balsam CHIHI
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05aaa7fdb0 |
dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195. Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230307154524.118541-2-bchihi@baylibre.com |
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Emil Renner Berthing
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3de0c91032 |
dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
Add bindings for the always-on clock and reset generator (AONCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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Emil Renner Berthing
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7fce1e39f0 |
dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
Add bindings for the system clock and reset generator (SYSCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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Bjorn Andersson
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7c3a3554ba |
Merge branch '20230208091340.124641-1-konrad.dybcio@linaro.org' into HEAD
Introduce SM6115 GPUCC devicetree bindings, to make it possible to use clock defines in the devicetree source. |
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Bjorn Andersson
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25dac40a63 |
Merge branch '20230316-topic-qcm_dispcc_reset-v1-1-dd3708853014@linaro.org' into clk-for-6.4
Merge dt-binding include file additions through topic branch, to allow them to be made available in DT source tree as well. |
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Konrad Dybcio
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123ee7550e |
dt-bindings: clock: dispcc-qcm2290: Add MDSS_CORE reset
Add the MDSS_CORE reset which can be asserted to reset the state of the entire MDSS. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316-topic-qcm_dispcc_reset-v1-1-dd3708853014@linaro.org |