Commit Graph

3940 Commits

Author SHA1 Message Date
Arnd Bergmann
aa2951a8fa STM32 DT for v6.6, round 1
Highlights:
 ----------
 
 - MCU:
   - Add CAN support on stm32f746.
   - Add touchscreen support (edt-ft5306) on stm32f746-disco.
   - Add support to Rocktech RK043FN48H display on stm32f746-disco
     board.
   - Add gpio-ranges for stm32f7 to fix boot issue.
 
 - MPU:
   - STM32MP13:
     - Remove shmem for scmi-optee to match with OP-TEE configuration.
     - Enable OP-TEE asynchronous notification by using PPI#15.
     - Expose and use SCMI regulators on stm32mp135f-dk.
 
   - STMP32MP15:
     - Remove shmem for scmi-optee to match with OPTEE configuration
     - Deduplicate DSI node to fix  #address-cells/#size-cells issue on
       boards using it.
 
   - ST:
     - Fix dts check warnings on stm32mp15-scmi boards.
 
   - DH:
     - Add missing detach mailbox for DHCOM and DHCOR SoM.
 
   - Odyssey:
     - Add missing detach mailbox for Odyssey SoM.
 
   - OCTAVO:
     - Add Linux Automation Test Automation Controller (LXA TAC) based
       on Octavo Systems OSD32MP15x SiP. It contains: eMMC,
       DSA-capable ETH switch (2 ports), dual CAN...
       It adds two boards support: lxa-tac-gen1 and lxa-tac-gen2 based
       on STM32MP157.
 
   - PROTONIC:
     - Add Power over Data Line (PoDL) Power Source Equipment (PSE)
       regulator nodes on PRTT1C board. It allows power delivery and
       data transmission over a single twisted pair.
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmTcvuwdHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIX3PBAArwKHu/t6Usb2odz2
 D0oWgN4sxsfBa65L5+VnPg590Abzt0qhzFDwnNo53vyxzl1LRAYDqowrQyaKi38o
 5T8I+AKRtOtRd1tPBNt8/VooVWShLOI9FhtLyACv1YHaqRfhd3EG4rujIEiCfkS+
 K9kBvEJO/WWbQmxU2s4kZxP61itiOyiLmv8wMcUecW6mL3fGwuTh2QND2hdYLHU9
 bjmDBHEovyOLMa5A7Lzuu3ALDX4h1GdMdVEnr7HNM5bunzGV5Ao4e8mVkszFlheB
 8JBCodKXxzBVWkZAF6vPq0ne8rcPpgdjdZgSinWNE8CrTXZDuOXADrvtiCPcavJP
 Mq0NaOyDxglaCQlk4D3yv1iia82KXubMKtZ3QgE8yQzidCAFU1XlNyTywIr+aFBI
 ggIlcXxyRWjsqBwTYo6PRo6fSKin3toUjSdMnTLAp3Eha0JqD/QCKaVXfuzeV2WV
 gbEH5BDAtBnj7EW9zWoTGyqOLwwPBr2kBHca2ZykPK61/Gyn8gi8nW1QsW4ZpUVA
 DMH2ljRIZOvkCdndwCOfkHS07rNDgyDi7e1UhAL17sCVp+kl0hJ+apcDRZp16csc
 8/8Dk+dn8TVmb10e/DTDtUey65yyqJ5/uGyxM3ABJI0ZghKqEifU+oMhTzkMuZJW
 I6tXAwAwgA53t4qdEvOqZ6I6uxE=
 =oGBN
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkDoMACgkQYKtH/8kJ
 UifXZxAAsKv/CVDDEvDvKxdnwRlsf0OzMV2RkgRwo0h0bzyMx5B57UaR7lUg/e/Y
 nDK/rNvTr4L+ABJZh/1DkNE6pI406vK1BUwD2KPbbYAqcSzT3u3EztEsPmG7AvBJ
 T2mkaa8d1SVHcjmRLhPt/wVOf7otpKsrOgYMPvaErAA42yvdcJrAndtUFITwW3QQ
 6X89pudY1kDw56d8yTaP6U3BcDHFYxr8ZA9iy+Ll+qUk9UfNe/5HP3xh/mbC/SA/
 NpEB9Dl14gwDEkhV56Y02nSIQxvf+UqJ6c/HZgb/472SYxKCQsQluDe0UWoPi09L
 9NKTVQEsB76HXgNsYo+PhyT0tfzduClVil6FCzMdr+VyV131mJQ4K82KO3NW7MIh
 bQsywD3VBB96dq+IDBj+xXFzwZS6QcvOICQnCwd+e9NnDmHzfTbU8KdELChbHbbg
 Cpy6NjQPV3YSF1bXlXGo0Pa2dy4XCuPKe7/eOabcVr7te6Qdo5PcAaAtfTaWwz0D
 7sX8WHVNzvqpf4yCkpuwTh875Svsu/5xlxv8yZJ1lIFlA0K5n8UhHjgXS8YnehCt
 7SA6pC2NoE68quNk6WZNh5czsmlG0r0eNSx1jr/Pv4SJB1d3d07tKuGqHIcA80oH
 N81pTRkOK66Afw2EIH1DAMxNs0xbAWRSZ4H1hdxlL5LAnF5gODk=
 =fz66
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v6.6, round 1

Highlights:
----------

- MCU:
  - Add CAN support on stm32f746.
  - Add touchscreen support (edt-ft5306) on stm32f746-disco.
  - Add support to Rocktech RK043FN48H display on stm32f746-disco
    board.
  - Add gpio-ranges for stm32f7 to fix boot issue.

- MPU:
  - STM32MP13:
    - Remove shmem for scmi-optee to match with OP-TEE configuration.
    - Enable OP-TEE asynchronous notification by using PPI#15.
    - Expose and use SCMI regulators on stm32mp135f-dk.

  - STMP32MP15:
    - Remove shmem for scmi-optee to match with OPTEE configuration
    - Deduplicate DSI node to fix  #address-cells/#size-cells issue on
      boards using it.

  - ST:
    - Fix dts check warnings on stm32mp15-scmi boards.

  - DH:
    - Add missing detach mailbox for DHCOM and DHCOR SoM.

  - Odyssey:
    - Add missing detach mailbox for Odyssey SoM.

  - OCTAVO:
    - Add Linux Automation Test Automation Controller (LXA TAC) based
      on Octavo Systems OSD32MP15x SiP. It contains: eMMC,
      DSA-capable ETH switch (2 ports), dual CAN...
      It adds two boards support: lxa-tac-gen1 and lxa-tac-gen2 based
      on STM32MP157.

  - PROTONIC:
    - Add Power over Data Line (PoDL) Power Source Equipment (PSE)
      regulator nodes on PRTT1C board. It allows power delivery and
      data transmission over a single twisted pair.

* tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (29 commits)
  ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board
  ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators
  dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
  ARM: dts: stm32: support display on stm32f746-disco board
  ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
  ARM: dts: stm32: add pin map for LTDC on stm32f7
  ARM: dts: stm32: add ltdc support on stm32f746 MCU
  ARM: dts: st: Add gpio-ranges for stm32f769-pinctrl
  ARM: dts: st: Add gpio-ranges for stm32f746-pinctrl
  ARM: dts: st: stm32mp157c-emstamp: correct regulator-active-discharge
  ARM: dts: st: stm32mp157c-emstamp: drop incorrect vref_ddr property
  ARM: dts: stm32: fix dts check warnings on stm32mp15-scmi
  ARM: dts: stm32: Add missing detach mailbox for DHCOR SoM
  ARM: dts: stm32: Add missing detach mailbox for DHCOM SoM
  ARM: dts: stm32: Add missing detach mailbox for Odyssey SoM
  ARM: dts: stm32: Add missing detach mailbox for emtrion emSBC-Argon
  ARM: dts: stm32: prtt1c: Add PoDL PSE regulator nodes
  ARM: dts: stm32: add touchscreen on stm32f746-disco board
  ARM: dts: stm32: add pin map for i2c3 controller on stm32f7
  ARM: dts: stm32: re-add CAN support on stm32f746
  ...

Link: https://lore.kernel.org/r/c0524a16-ab27-0cb5-8e7b-c12f7bde7e0d@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-21 21:25:23 -04:00
Arnd Bergmann
9eb33ddedd Qualcomm driver updates for v6.6
Compatible and clock handling in the Qualcomm SCM driver is cleaned up,
 together with a couple stylistic cleanups and transition to mark
 exported symbols GPL only.
 
 An abstraction for the RPM subsystem is introduced, to make align the
 structure of the SMD and GLINK nodes thereof with the structure when a
 remoteproc is involved. This is done to facilitate associating
 additional entities with the RPM subsystem.
 
 The qmp_send() API is modified to not expose hardware requirements onto
 the client drivers, and then further extended to allow command
 formatting directly in the API, to facilitate this typical use case.
 
 In the Qualcomm Command DB driver, NUL characters previously included in
 identifiers are dropped from the debugfs, to facilitate scripting.
 
 The thresholds of the BWMON driver are simplified to avoid hard coded
 starting values.
 
 The OCMEM driver is updated with some cleanups and fixes, and addition
 of MSM8226 support.
 
 PMIC_GLINK gains support for retimer switches, safe mode is selected
 when the cable is disconnected from altmode and the same is enabled for
 SM8550.
 
 An off-by-one string length check is corrected in the QMI encoder
 decoder library.
 
 The RPMh tracepoints are extended to include the state of the request,
 to provide needed context in the traced events.
 
 The series from Ulf creating a genpd framework is integrated, to
 facilitate the other changes to the cpr, rpmpd and rpmhpd driver.
 SDX75 support is added to the rpmhpd driver, and the rpmpd driver is
 extended with the same sync_state logic found in the rpmhpd driver.
 
 The socinfo driver gains knowledge about SM4450 and SM7125, the IPQ5019
 platform is dropped.
 
 Clock handling in the GSBI driver is cleaned up with the use of
 devm_clk_get_enabled().
 
 The list of VMIDs defined for the SCM assign memory interface is
 extended.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmTe2FIVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FPaYP/0j7dGziE/KQaTccT/arpgiU6wH/
 fzu7j76r/JY90Jw61vxWsTfuR94Irr8/NzzvLXMO1cKfzJXxsPKqYuuWBe/hFu3u
 Bva/4XtHspitKQCvBYOhX2dxj3BtYzsrVNmh3sOeEKhXcUaVuCQXkpeE3fqNBwYB
 li70t/dHVPPr2mDY30QhD9nn8XgWG8DlSzyuvIp+zI8kpNX04Cdqg2BEidB8GO4f
 ZgcAtnCIssIojBhRwVO7ei8RnGu6i2+69Vwtrx8nNT85Wcyx7NLxjZfp7+5PrZnv
 Xyu/JO4yYZooEVMAOtXJcxbZRs3FmGovg5RnR5w1CIz87Kmw5Wq0g9wZHMuLxC/G
 u4SzwjCqwEhAVWSzsVmicLOs4y2Ndwju3ojX3kLPh02yw5xo6BpxXdZIptTvVIQn
 DicTCaHU3QxxqkH7elLxNxyRYvmJbDbwKJ/hZjSRWSsJUhI4fvWoyrL6wNZ9+rTW
 1zCkfEH3XikjMGHweeZc+VYu03XyohIYYn+jxpdwOjajF+3BsQSiqN1tKwj71ci/
 Nk6sn+TRsq/jY6x33ULfbQCjeQ3BOGEngHTQ8N1i5D1vM2BUY/jrH6Dt1tIUdRjh
 avR2KvZzzPs7Cp/094aQDX42GcQKeVOit6pF+NhE0c2uVqQCB5c6ynZwcvt0YNS9
 Ty0mqIn99wgbHxVw
 =SEyF
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkC1sACgkQYKtH/8kJ
 UifjiBAAnIlToZQERPaKlX1zQTYVfrMiyNQ8fyUGLnAj0bNFWFzYgS6p5NXerxdT
 /sk2tipNqJyym3h797r2aAjAXpyTnKYIwZqGjvWGBbhaViv6ovuDYkJUBk0ffybB
 a0Ve4M1JnVZATiwqeoZwi6/1/M2JC3+20O+LRL4lWzZAm61NsU4ULAcX4sHeUYYA
 02wMfzkME0Ye7sthv9GBtbm8Szr+GEuDvUTXx0DI74QrZuj6+wl3rjZ2uRrT97ZX
 DuPtmhl2ZVjCigCsfxdj2J8eq8dpkROAzAeGa9d/NctkCV+dHhSEWZ0LraauLCJk
 iXA2ZXOACHWF4tn8TC/eDx0Pv6CS+gRVjyYYLNkWreDSPfk7Vqaua3iNc7AfhIJV
 hfJV1QhDmRt+pXi8pJQSSbTtjfzaURzD78N7JLMRZdZPozRwD/kl1+m/r5OMT4C+
 NI4cLB544Zb34WEUgjZYNUjk18vkZmEQnvWwAGIzOQgHq5m/m6o2QQOnTgiTwaXh
 Neh8k+KKt85IwkjFarwmKsLhajHezHIEqgHrGdfiIFr9+hAMPBIgUP3/eo6PFDNk
 XP+IVMeucEtn7Og6d6rQmJ0kPvL32ucdXWdqOwLijoDablFwX1Giif77LjN5LRYj
 IxReK7C8CwZKqLf2k0pv8dLE4g8On6OThveedXbLNuMx+EgcB2w=
 =RpyB
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

Qualcomm driver updates for v6.6

Compatible and clock handling in the Qualcomm SCM driver is cleaned up,
together with a couple stylistic cleanups and transition to mark
exported symbols GPL only.

An abstraction for the RPM subsystem is introduced, to make align the
structure of the SMD and GLINK nodes thereof with the structure when a
remoteproc is involved. This is done to facilitate associating
additional entities with the RPM subsystem.

The qmp_send() API is modified to not expose hardware requirements onto
the client drivers, and then further extended to allow command
formatting directly in the API, to facilitate this typical use case.

In the Qualcomm Command DB driver, NUL characters previously included in
identifiers are dropped from the debugfs, to facilitate scripting.

The thresholds of the BWMON driver are simplified to avoid hard coded
starting values.

The OCMEM driver is updated with some cleanups and fixes, and addition
of MSM8226 support.

PMIC_GLINK gains support for retimer switches, safe mode is selected
when the cable is disconnected from altmode and the same is enabled for
SM8550.

An off-by-one string length check is corrected in the QMI encoder
decoder library.

The RPMh tracepoints are extended to include the state of the request,
to provide needed context in the traced events.

The series from Ulf creating a genpd framework is integrated, to
facilitate the other changes to the cpr, rpmpd and rpmhpd driver.
SDX75 support is added to the rpmhpd driver, and the rpmpd driver is
extended with the same sync_state logic found in the rpmhpd driver.

The socinfo driver gains knowledge about SM4450 and SM7125, the IPQ5019
platform is dropped.

Clock handling in the GSBI driver is cleaned up with the use of
devm_clk_get_enabled().

The list of VMIDs defined for the SCM assign memory interface is
extended.

* tag 'qcom-drivers-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (52 commits)
  soc: qcom: aoss: Tidy up qmp_send() callers
  soc: qcom: aoss: Format string in qmp_send()
  soc: qcom: aoss: Move length requirements from caller
  dt-bindings: firmware: qcom: scm: Updating VMID list
  dt-bindings: qcom: Update RPMHPD entries for some SoCs
  soc: qcom: qmi_encdec: Restrict string length in decode
  soc: qcom: smem: Fix incompatible types in comparison
  soc: qcom: ocmem: add missing clk_disable_unprepare() in ocmem_dev_probe()
  soc: qcom: socinfo: Add SoC ID for SM7125
  dt-bindings: arm: qcom,ids: Add SoC ID for SM7125
  dt-bindings: arm: qcom,ids: drop the IPQ5019 SoC ID
  soc: qcom: socinfo: drop the IPQ5019 SoC ID
  soc: qcom: socinfo: add SM4450 ID
  dt-bindings: arm: qcom,ids: add SoC ID for SM4450
  soc: qcom: pmic_glink: enable altmode for SM8550
  soc: qcom: pmic_glink_altmode: add retimer-switch support
  soc: qcom: pmic_glink_altmode: handle safe mode when disconnect
  soc: qcom: rpmhpd: Add SDX75 power domains
  dt-bindings: power: qcom,rpmpd: Add compatible for sdx75
  genpd: Makefile: build imx
  ...

Link: https://lore.kernel.org/r/20230818023338.2484467-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-21 21:11:55 -04:00
Etienne Carriere
fe95052fc7 dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
Adds SCMI regulator identifiers for STM32MP13x family.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-08-16 10:58:41 +02:00
Robert Marko
268edfe96a dt-bindings: clock: qcom: ipq4019: add missing networking resets
Add bindings for the missing networking resets found in IPQ4019 GCC.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230814104119.96858-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-15 09:31:10 -07:00
Krzysztof Kozlowski
b3f9581aff dt-bindings: clock: samsung: remove define with number of clocks
Number of clocks supported by Linux drivers might vary - sometimes we
add new clocks, not exposed previously.  Therefore these numbers of
clocks should not be in the bindings, as that prevents changing them.
Remove it entirely from the bindings, once Linux drivers stopped using
them.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20230808082738.122804-12-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-08-15 07:50:15 +02:00
Arnd Bergmann
99355a235a TI K3 device tree updates for v6.6
New Boards:
  - TQ group's TQMaX4XxL AM64 SOM and MBaX4XxL carrier board
  - TI's AM62P5 Starter Kit (SK)
 
 New features:
 AM625:
  - Support for Display (parallel only) - hdmi+audio support for
    AM625-SK/BeaglePlay, TC358778 DPI to MIPI-DSI bridge support
    for verdin.
  - MCU MCAN support and enable of Toradex Verdin
  - Toradex Verdin Dahlia audio support
 AM62A7:
  - MCU MCAN support
  - Enable USB Dual Role Device(DRD) support for AM62A7
    Starter Kit(SK).
 AM64:
  - TQ group's tqma64xxl: Overlays for SD-card and wlan.
 J721E:
  - Main domain CPSW9G and correponding gateway/ethernet
    switch expansion - GESI board.
 J721S2/AM68:
  - New CAN instances, ehrpwm, Display (DSS) and am68-sk HDMI support
  - Main domain CPSW2G and correponding gateway/ethernet
    switch expansion - GESI board.
 J784S4/AM69:
  - Boot phase tag marking in device tree
  - UFS support
 
 Cleanups and non-urgent fixes:
  - Cosmetic style fixups around "=" and "{" whitespace usage.
  - Fixups across multiple SoCs/boards for pwm-tbclk to matchup with
    bindings
  - Serdes header file include/dt-bindings/mux/ti-serdes.h is now
    deprecated, use k3-serdes.h in soc dtsi folder.
  - All SoCs: Enable GPIO/SDHCI/OSPI/TSADC/C6/C7 DSP nodes at the
    board level.
  - Fixups for AM62: Crypto powerdomains are conditional to better
    represent control of the crypto engines by security controller.
  - Fixups for j721e: Duplicate wakeup_i2c node dropped for SoM board.
  - Fixups for j721s2/am68: pimux offsets for OSPI.
  - Fixups for j784s4/am69: Fixups for pinmux for ospi/adc interrupt
    ranges for wkup/main gpios
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmTaSUYACgkQ3bWEnRc2
 JJ2ItQ/+KX09s67fsGuQn6G2lqoLujlPSKbQn3ygFJt/Oeo+cchqcpPg7PKsdHDq
 2vpC1crLE3aYfqFqFj0LJvG6KNf1cWmNFLXyE0Ek4h4o73vq0EjXybAUrc/cme8l
 TZ/1o938idoM9HvA1zz71KLA6cI5qbYzHHAjVq4Gp0bLiynsLLLY7mGgo4HC45Ii
 67EEWiNvNNfY9QpMNEJB2VCZ1xto83nwUgimEdJZ7pStfUtjB+r1lDfJgZg0v5Ay
 QOiTQyAtTbpBuYL53jRjiF64VAnDTN//uv1/mdfnJ82ltfdZJ79FI0xGUqVusD9t
 lHPdPicGNgtUyIFJsvNJMRQKtrVpV57C2e5ECHMzWNWyIMOylbz9Zc7eGrgB41fi
 qS8QkkJ2+MUd/I3HSuAWoSFIfjmq7Z0dsHyOFntZrSypEai217S+rJgZ/kmdorz5
 TQzqSacXjmxM4yNjJCamLQEK5KEib6Gtq4gLZMPvoc1kvnSHv6lY34/lm9mJBxZx
 +L1qONX0km5rTjaRm0TvqUR19WoFl5fWIyempidRf2TCVeH98Je5AdQgftM7Pk9M
 1Rwxob76+Tq7oL4H5/eqX+ye+k/k1wqoxEBsOLEju65/aSVxYqEiPb+kr99BaV7n
 pIBtDkiV7KfsrgxwjAlr+JPIY4v6We9+W6dE4HyCF4HOrmk+I+I=
 =Ifxz
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTaoA4ACgkQYKtH/8kJ
 UieETQ//aDZ9Gwo8JqcShhrKLGglRZ2D9me0QjFr/qhk4UQv6ip/DA9usNUKc3DH
 PC/fEfryQt2lmiTouWjfYdO4rhThqtpzk96CYsjvHLpkOoJYut/xVcNTJbIfHn+e
 GK84s9V44ARANwPNse3S0qXM8AFxv55STHu0tOxDNHz2h6lOiYv8OvwMyZyuw8MQ
 IYQ6jRAir/a0zqC/w3NC+famjNdZesvZbQOxD94ieC68RWtIrpnPv6Yc0Fq8xAvf
 0/lS8dtllOpHdjqpJuBSeCD0KrndpT1sP4++URsjujvKa9pQag8r+4CSbr2HVL01
 FCL4aXcKY62yQM7RWWRA1KdGS/yXp/9Yu9CPYuLx7GYVDr4mBEDj78oA+SaGdlFK
 MZ88vd9w1MamJqJWIRavFep29++yE+GhF54f88hZAII5k4MN3+sgj+5v37hoaR8m
 MomtlRKfxKz7UungBZrAQZqbliSbnCFra4h9R7BbwEcOLxkw1xkRE9HbjvVSNcGK
 o3yiM2xCX9ZWcWE7dsURCo6incqFPb5WOQstAzmSm2krAY2BBxn+lBTMH40RxCZ7
 bbDM+OT0SBxL27F9oFPAUMnu3mqXUjEr/jF5ELAYO8S8sOQ1zQxpR0ry4m9EJJI3
 YgLKGcCDWrVCVMV7i1K4k6ah+wfOdd0dPIF4UeC2ztyEriZ0aY8=
 =namZ
 -----END PGP SIGNATURE-----

Merge tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt

TI K3 device tree updates for v6.6

New Boards:
 - TQ group's TQMaX4XxL AM64 SOM and MBaX4XxL carrier board
 - TI's AM62P5 Starter Kit (SK)

New features:
AM625:
 - Support for Display (parallel only) - hdmi+audio support for
   AM625-SK/BeaglePlay, TC358778 DPI to MIPI-DSI bridge support
   for verdin.
 - MCU MCAN support and enable of Toradex Verdin
 - Toradex Verdin Dahlia audio support
AM62A7:
 - MCU MCAN support
 - Enable USB Dual Role Device(DRD) support for AM62A7
   Starter Kit(SK).
AM64:
 - TQ group's tqma64xxl: Overlays for SD-card and wlan.
J721E:
 - Main domain CPSW9G and correponding gateway/ethernet
   switch expansion - GESI board.
J721S2/AM68:
 - New CAN instances, ehrpwm, Display (DSS) and am68-sk HDMI support
 - Main domain CPSW2G and correponding gateway/ethernet
   switch expansion - GESI board.
J784S4/AM69:
 - Boot phase tag marking in device tree
 - UFS support

Cleanups and non-urgent fixes:
 - Cosmetic style fixups around "=" and "{" whitespace usage.
 - Fixups across multiple SoCs/boards for pwm-tbclk to matchup with
   bindings
 - Serdes header file include/dt-bindings/mux/ti-serdes.h is now
   deprecated, use k3-serdes.h in soc dtsi folder.
 - All SoCs: Enable GPIO/SDHCI/OSPI/TSADC/C6/C7 DSP nodes at the
   board level.
 - Fixups for AM62: Crypto powerdomains are conditional to better
   represent control of the crypto engines by security controller.
 - Fixups for j721e: Duplicate wakeup_i2c node dropped for SoM board.
 - Fixups for j721s2/am68: pimux offsets for OSPI.
 - Fixups for j784s4/am69: Fixups for pinmux for ospi/adc interrupt
   ranges for wkup/main gpios

* tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (68 commits)
  arm64: dts: ti: verdin-am62: Add DSI display support
  arm64: dts: ti: Add support for the AM62P5 Starter Kit
  arm64: dts: ti: Introduce AM62P5 family of SoCs
  dt-bindings: arm: ti: Add bindings for AM62P5 SoCs
  arm64: dts: ti: k3-am69-sk: Add phase tags marking
  arm64: dts: ti: k3-j784s4-evm: Add phase tags marking
  arm64: dts: ti: k3-j784s4: Add phase tags marking
  arm64: dts: ti: k3-am625-beagleplay: Add HDMI support
  arm64: dts: ti: am62x-sk: Add overlay for HDMI audio
  arm64: dts: ti: k3-am62x-sk-common: Add HDMI support
  arm64: dts: ti: k3-am62-main: Add node for DSS
  arm64: dts: ti: k3-am62x-sk-common: Update main-i2c1 frequency
  arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level
  arm64: dts: ti: k3-j784s4: Enable C7x DSP nodes at the board level
  arm64: dts: ti: k3-j721e: Enable C7x DSP nodes at the board level
  arm64: dts: ti: k3-*: fix fss node dtbs check warnings
  arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level
  arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level
  arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level
  arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level
  ...

Link: https://lore.kernel.org/r/20230814160651.frxohyshd2evp2k4@expenses
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-14 23:43:42 +02:00
Marco Felsch
35ec2abb54 dt-bindings: clocks: imx8mp: make sai4 a dummy clock
The hardware don't have a SAI4 instance so remove the define. Use a
comment to keep it as reference and to avoid confusion.

Fixes: 1088691447 ("dt-bindings: imx: Add clock binding doc for i.MX8MP")
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Link: https://lore.kernel.org/r/20230731142150.3186650-2-m.felsch@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-08-14 12:31:33 +03:00
Shengjiu Wang
a70cd8cdf7 dt-bindings: clock: fsl,imx8-acm: Add audio clock mux support
Add the clock dt-binding file for Audio Clock Mux. which
is the IP for i.MX8QM, i.MX8QXP, i.MX8DXL.

Add the clockid for clocks in header file.

The Audio Clock Mux is binded with all the audio IP and audio clocks
in the subsystem, so need to list the power domain of related clocks
and IPs. Each clock and IP has a power domain, so there are so many
power domains.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1690260984-25744-2-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-08-14 12:27:52 +03:00
Otto Pflüger
593576a369 dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
Add the missing #define for GPLL0_SLEEP_CLK_SRC, the parent clock of
GPLL0_EARLY.

Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230802170317.205112-2-otto.pflueger@abscue.de
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13 20:20:10 -07:00
Imran Shaik
df873243b2 dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
Add support for GCC_GPLL1_OUT_EVEN and GCC_DDRSS_ECPRI_GSI_CLK clock
bindings for QDU1000 and QRU1000 SoCs. While at it, update the
maintainers list.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230803105741.2292309-2-quic_imrashai@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13 20:13:17 -07:00
Bjorn Andersson
9328ecb29d Merge branch '20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org' into arm64-for-6.6
Merge additional MSM8998 GCC DeviceTree binding constants for use in the
MSM8998 DeviceTree source.
2023-08-13 19:51:26 -07:00
Bjorn Andersson
9d1f3f343b Merge branch '20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org' into clk-for-6.6
Merge additional MSM8998 GCC DeviceTree binding constants through a
topic branch to make them available to the DeviceTree source tree as
well.
2023-08-13 19:49:57 -07:00
Konrad Dybcio
238e192bed dt-bindings: clk: qcom,gcc-msm8998: Add missing GPU/MMSS GPLL0 legs
GPLL0 has two separate outputs to both GPUSS and MMSS: one that's
2-divided and one that runs at the same rate as the GPLL0 itself.

Add the missing ones to the binding.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13 19:49:47 -07:00
Gokul krishna Krishnakumar
f9eac7e029 dt-bindings: firmware: qcom: scm: Updating VMID list
Adding the full list of VMID's, which are used by different clients to
pass to the secure world.

Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230403204455.6758-1-quic_gokukris@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11 13:10:59 -07:00
Bjorn Andersson
c02a547da3 Merge branch '1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' into arm64-for-6.6
Merge the IPQ5018 GCC Devicetree binding through a topic branch, in
order to the the clock defines.
2023-08-11 10:51:15 -07:00
Bjorn Andersson
2f6be35d7c Merge branch '1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' into clk-for-6.6
Merge the IPQ5018 GCC Devicetree binding through a topic branch, in
order to the the clock defines.
2023-08-11 10:50:07 -07:00
Sricharan Ramabadhran
f62d184ef7 dt-bindings: clock: Add IPQ5018 clock and reset
This patch adds support for the global clock controller found on
the IPQ5018 based devices.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/1690533192-22220-2-git-send-email-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11 10:46:59 -07:00
Neil Armstrong
40fb677285 dt-bindings: clk: axg-audio-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every axg-audio-clkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-14-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
09d65c0267 dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every A1 pll ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-13-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
57049a1cfc dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every A1 peripherals ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-12-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
165a194195 dt-bindings: clk: meson8b-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every meson8b-clkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-11-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
6655744d9a dt-bindings: clk: g12a-aoclkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every g12a-aoclkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-10-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
b1262497a2 dt-bindings: clk: g12a-clks: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every g12a-clkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-9-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
8fdbdc7918 dt-bindings: clk: axg-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every axg-clkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-8-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
9ce8555278 dt-bindings: clk: gxbb-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every gxbb-clkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-7-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:16 +02:00
Niravkumar L Rabara
d5f0942b50 dt-bindings: clock: add Intel Agilex5 clock manager
Add clock ID definitions for Intel Agilex5 SoCFPGA.
The registers in Agilex5 handling the clock is named as clock manager.

Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2023-08-08 06:32:34 -05:00
Niravkumar L Rabara
2a29fe831f dt-bindings: reset: add reset IDs for Agilex5
Add reset ID definitions required for Intel Agilex5 SoCFPGA, re-use
altr,rst-mgr-s10.h as common header file similar S10 & Agilex.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2023-08-08 06:32:34 -05:00
Huqiang Qin
0e8ec0226e dt-bindings: interrupt-controller: Add header file for Amlogic Meson-G12A SoCs
Add a new dt-binding header that details the interrupt number of the GPIO.

Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230724060108.1403662-2-huqiang.qin@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-07 15:35:23 +02:00
Chengci.Xu
d5cda142d6 dt-bindings: mediatek: mt8188: Add binding for MM & INFRA IOMMU
Add descriptions for mt8188 IOMMU which also use ARM Short-Descriptor
translation table format.

In mt8188, there are two smi-common HW and IOMMU, one is for vdo(video
output), the other is for vpp(video processing pipe). They connects
with different smi-larbs, then some setting(larbid_remap) is different.
Differentiate them with the compatible string.

Something like this:

   IOMMU(VDO)          IOMMU(VPP)
      |                   |
 SMI_COMMON_VDO      SMI_COMMON_VPP
 ---------------     ----------------
  |     |    ...      |     |    ...
larb0 larb2  ...    larb1 larb3  ...

We also have an IOMMU that is for infra master like PCIe.
And infra master don't have the larb and ports.

Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230602090227.7264-2-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2023-08-07 14:15:45 +02:00
David Wronek
b1b52717be dt-bindings: arm: qcom,ids: Add SoC ID for SM7125
Add the SoC ID for Qualcomm SM7125.

Signed-off-by: David Wronek <davidwronek@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230723190725.1619193-3-davidwronek@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-31 16:28:43 -07:00
Kathiravan T
cb160cd7b1 dt-bindings: arm: qcom,ids: drop the IPQ5019 SoC ID
IPQ5019 SoC is never productized. So lets drop it.

Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230724083745.1015321-3-quic_kathirav@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-31 16:28:20 -07:00
Tengfei Fan
4d641d2faf dt-bindings: arm: qcom,ids: add SoC ID for SM4450
Add the ID for the Qualcomm SM4450 SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230731080043.38552-6-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-31 16:25:22 -07:00
Dmitry Baryshkov
9f08d33496 dt-bindings: clock: drop qcom,lcc-mdm9615 header file
The header file for qcom,lcc-mdm9615 and qcom,lcc-msm8960 is the same
(as well as the drivers). Drop the qcom,lcc-mdm9615.h in favour of
qcom,lcc-msm8960.h

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230512211727.3445575-3-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-31 14:23:19 -07:00
Xianwei Zhao
83b03d6293 dt-bindings: power: add Amlogic C3 power domains
Add devicetree binding document and related header file for Amlogic C3 secure power domains.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230707003710.2667989-3-xianwei.zhao@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31 11:49:50 +02:00
Jayesh Choudhary
5438d75fb9 dt-bindings: ti-serdes-mux: Deprecate header with constants
The constants to define the idle state of SERDES MUX were defined in
bindings header. They are used only in DTS and driver uses the dt property
to set the idle state making it unsuitable for bindings.
The constants are moved to header next to DTS ("arch/arm64/boot/dts/ti/")
and all the references to bindings header are removed.
So add a warning to mark this bindings header as deprecated.

Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/20230721125732.122421-3-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-25 06:30:03 -05:00
Chancel Liu
2fe182dd27 dt-bindings: clock: imx93: Add PDM IPG clk
Add PDM IPG clk.

Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Chancel Liu <chancel.liu@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230628061724.2056520-1-ping.bai@nxp.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-07-25 10:28:42 +03:00
Huqiang Qin
e55ef16b84 dt-bindings: pinctrl: Add compatibles for Amlogic C3 SoCs
Add a new compatible name for Amlogic C3 pin controller, and add
a new dt-binding header file which document the detail pin names.

Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230714122441.3098337-2-huqiang.qin@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-23 21:23:16 +02:00
Bjorn Andersson
ca32bd384e Merge branch '1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com' into arm64-for-6.6
Merge the new generic RPMHPD defines from a topic branch, to alow them
being used in DeviceTree source, and the driver.
2023-07-21 19:54:52 -07:00
Rohit Agarwal
7f31667d29 dt-bindings: power: qcom,rpmhpd: Add Generic RPMh PD indexes
Add Generic RPMh Power Domain indexes that can be used
for all the Qualcomm SoC henceforth.
The power domain indexes of these bindings are based on compatibility
with current targets like SM8[2345]50 targets.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 19:54:36 -07:00
Dmitry Baryshkov
b7297d4566 dt-bindings: iio: adc: qcom,spmi-adc7: use predefined channel ids
Each of qcom,spmi-adc7-pm*.h headers define a set of ADC channels that
can be used for monitoring on thie particular chip. Switch them to use
channel IDs defined in the dt-bindings/iio/qcom,spmi-vadc.h header
instead of specifying the numeric IDs.

Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230707123027.1510723-2-dmitry.baryshkov@linaro.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2023-07-20 19:21:30 +01:00
Dylan Hung
bbb8eb3cb0 dt-bindings: clock: ast2600: Add I3C and MAC reset definitions
Add reset definitions of AST2600 I3C and MAC controllers. In the case of
the I3C reset, since there is no reset-line hardware available for
`ASPEED_RESET_I3C_DMA`, a new macro `ASPEED_RESET_I3C` with the same ID
is introduced to provide a more accurate representation of the hardware.
The old macro `ASPEED_RESET_I3C_DMA` is kept to provide backward
compatibility.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Link: https://lore.kernel.org/r/20230718062616.2822339-1-dylan_hung@aspeedtech.com
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-07-19 12:49:39 -07:00
Xingyu Wu
a097a5ec14 dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator
Add bindings for the Video-Output clock and reset generator (VOUTCRG)
on the JH7110 RISC-V SoC by StarFive Ltd.

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-07-19 18:08:00 +01:00
Xingyu Wu
9b3938c0b8 dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator
Add bindings for the Image-Signal-Process clock and reset
generator (ISPCRG) on the JH7110 RISC-V SoC by StarFive Ltd.

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-07-19 18:08:00 +01:00
Xingyu Wu
14b14a57e6 dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator
Add bindings for the System-Top-Group clock and reset generator (STGCRG)
on the JH7110 RISC-V SoC by StarFive Ltd.

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-07-19 18:08:00 +01:00
Xingyu Wu
bd348ca24d dt-bindings: clock: Add StarFive JH7110 PLL clock generator
Add bindings for the PLL clock generator on the JH7110 RISC-V SoC.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-07-19 18:07:48 +01:00
Georgi Djakov
10cb3abb99 Merge branch 'icc-sm8250-qup' into icc-next
SM8250 (like SM8150 but unlike all other QUP-equipped SoCs) doesn't
provide a qup-core path. Adjust the bindings and drivers as necessary,
and then describe the icc paths in the device tree. This makes it possible
for interconnect sync_state succeed so long as you don't use UFS.

* icc-sm8250-qup
  dt-bindings: interconnect: qcom,rpmh: Add SM8250 QUP virt
  dt-bindings: interconnect: qcom,sm8250: Add QUP virt
  interconnect: qcom: sm8250: Fix QUP0 nodes

Link: https://lore.kernel.org/r/20230703-topic-8250_qup_icc-v2-0-9ba0a9460be2@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-07-18 11:18:53 +03:00
Konrad Dybcio
ddd6c5b9ee dt-bindings: interconnect: qcom,sm8250: Add QUP virt
Add the required defines for QUP_virt nodes.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230703-topic-8250_qup_icc-v2-2-9ba0a9460be2@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-07-16 18:15:08 +03:00
Bjorn Andersson
ad4e807f5f Merge branch '20230526-topic-smd_icc-v7-0-09c78c175546@linaro.org' into clk-for-6.6
This series reshuffles things around, moving the management of SMD RPM
bus clocks to the interconnect framework where they belong. This helps
us solve a couple of issues:

1. We can work towards unused clk cleanup of RPMCC without worrying
   about it killing some NoC bus, resulting in the SoC dying.
   Deasserting actually unused RPM clocks (among other things) will
   let us achieve "true SoC-wide power collapse states", also known as
   VDD_LOW and VDD_MIN.

2. We no longer have to keep tons of quirky bus clock ifs in the icc
   driver. You either have a RPM clock and call "rpm set rate" or you
   have a single non-RPM clock (like AHB_CLK_SRC) or you don't have any.

3. There's less overhead - instead of going through layers and layers of
   the CCF, ratesetting comes down to calling max() and sending a single
   RPM message. ICC is very very dynamic so that's a big plus.

The clocks still need to be vaguely described in the clk-smd-rpm driver,
as it gives them an initial kickoff, before actually telling RPM to
enable DVFS scaling.  After RPM receives that command, all clocks that
have not been assigned a rate are considered unused and are shut down
in hardware, leading to the same issue as described in point 1.

We can consider marking them __initconst in the future, but this series
is very fat even without that..

Apart from that, it squashes a couple of bugs that really need fixing..

The series is merged through a topic branch to manage the dependencies
between interconnect, Qualcomm clocks and Qualcomm SoC.
2023-07-15 10:03:15 -07:00
Konrad Dybcio
7296bd3f00 dt-bindings: interconnect: Add Qcom RPM ICC bindings
The SMD RPM interconnect driver requires different icc tags to the
RPMh driver. Add bindings to reflect that.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Georgi Djakov <djakov@kernel.org>
Link: https://lore.kernel.org/r/20230526-topic-smd_icc-v7-1-09c78c175546@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-15 09:54:44 -07:00
Bjorn Andersson
b1260cee1c Merge branch '20230620-topic-sc8280_gccgdsc-v2-2-562c1428c10d@linaro.org' into arm64-for-6.6
Merge a set of new SC8280XP GCC GDSC constants from a topic branch,
in order to allow them being used in DeviceTree source.
2023-07-09 21:31:42 -07:00
Bjorn Andersson
5605164aa8 Merge branch '20230620-topic-sc8280_gccgdsc-v2-2-562c1428c10d@linaro.org' into clk-for-6.6
Merge a set of new SC8280XP GCC GDSC constants through a topic branch,
to allow them being introduce into the DeviceTree source as well.
2023-07-09 21:30:51 -07:00
Konrad Dybcio
9eba4db02a dt-bindings: clock: qcom,gcc-sc8280xp: Add missing GDSCs
There are 10 more GDSCs that we've not been caring about, and by extension
(and perhaps even more importantly), not putting to sleep. Add them.

Fixes: a66a82f2a5 ("dt-bindings: clock: Add Qualcomm SC8280XP GCC bindings")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230620-topic-sc8280_gccgdsc-v2-2-562c1428c10d@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:30:43 -07:00
Varadarajan Narayanan
85c0d23009 dt-bindings: clock: Add USB related clocks for IPQ9574
Add the clocks needed for enabling USB in IPQ9574

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/d1c5aa4a8535c645fdb06df62a562918516ba0c6.1686289721.git.quic_varada@quicinc.com
[bjorn: Split from driver patch, to allow merging into dts tree]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:40:33 -07:00
Linus Torvalds
b869e9f499 Another set of clk driver updates and fixes for the merge window. The
driver updates needed more time to bake in linux-next.
 
 Updates:
  - Support for more clk controllers in Qualcomm SoCs such as SM8350,
    SM8450, SDX75, SC8280XP, and IPQ9574
  - Runtime PM enablement of some more Qualcomm clk controllers
  - Various fixes to Qualcomm clk driver data to use correct clk_ops
    and to check halt bits properly
  - AT91 updates to modernize with clk_parent_data structures
 
 Fixes:
  - Remove "syscon" from dt binding fix for ti,j721e-system-controller
  - Fix determine rate in the Tegra driver that got wrecked by the
    refactorting of muxes this merge window
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmSkRq8RHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSUgHBAAkXU0agruD22fecxI/RliNIwyRY4F8CNW
 aKuz5XSGLTZAgaBDjFHPb2VSph9NXbFsLxxmxdrf7bDCAw6ww90vK0G9+JS/b/9D
 fGhqvl+d8oFeFAislr7eSDhKCMlKd5I+v6mUUk0WrPqKddHtIvq2Wh8j7+j9OZmh
 2lov68N95xYTKQPs4+mb0geDktCnFKJsIt2z9DnyPi5ixS5d6qJARXmOruJt7mbq
 1bd9iJLmOZPWm703hJcreLgyo9zhTxLY+BUrHM4S8J72BTFHN/OyLyKai25mSXll
 Odw4/G42VuykV03kvyAZNS2ebhw1DJ+px9jrfU5FH6TqIgfZG2tBnP0RkPbamNcA
 Y9ZBNtaJMfIk/Nqg5q8cyO72y2sfc2QUNt2qn0i02BxOSfSLLxQDuKiWPbilC7ju
 9zYDGIZUhZWLpfK3a+QWAU0VNGak+sq/ZbAQijI8q8MriilwhonQsXQerQC0Jzcw
 zKdMoVPCedK411UZh9fMmIBwEsAFEtYo/qDynpv+w0zwkpDY2t5Sh7lGlQFOiynZ
 YVFbUD7EEf3GJmftdEWTHQpEd+GlkWRoGHO3L9hfyxxUANXQGXhpI4YvpfldntmK
 UlGguQwRqqDzdCm+tBiFlt+j4Vh5A8ywTSG8HLzxy7Gsu7BRkqcafRrlxNmMK8Wv
 aCixlFKAkdA=
 =cF5c
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull more clk updates from Stephen Boyd:
 "Another set of clk driver updates and fixes for the merge window. The
  driver updates needed more time to bake in linux-next.

  Updates:
   - Support for more clk controllers in Qualcomm SoCs such as SM8350,
     SM8450, SDX75, SC8280XP, and IPQ9574
   - Runtime PM enablement of some more Qualcomm clk controllers
   - Various fixes to Qualcomm clk driver data to use correct clk_ops
     and to check halt bits properly
   - AT91 updates to modernize with clk_parent_data structures

  Fixes:
   - Remove 'syscon' from dt binding fix for ti,j721e-system-controller
   - Fix determine rate in the Tegra driver that got wrecked by the
     refactorting of muxes this merge window"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (69 commits)
  clk: tegra: Avoid calling an uninitialized function
  dt-bindings: mfd: ti,j721e-system-controller: Remove syscon from example
  clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id
  clk: at91: sama7g5: switch to parent_hw and parent_data
  clk: at91: sckc: switch to parent_data/parent_hw
  clk: at91: clk-sam9x60-pll: add support for parent_hw
  clk: at91: clk-utmi: add support for parent_hw
  clk: at91: clk-system: add support for parent_hw
  clk: at91: clk-programmable: add support for parent_hw
  clk: at91: clk-peripheral: add support for parent_hw
  clk: at91: clk-master: add support for parent_hw
  clk: at91: clk-generated: add support for parent_hw
  clk: at91: clk-main: add support for parent_data/parent_hw
  clk: qcom: gcc-sc8280xp: Add runtime PM
  clk: qcom: gpucc-sc8280xp: Add runtime PM
  clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags
  clk: qcom: gpucc-sm6375: Enable runtime pm
  dt-bindings: clock: sm6375-gpucc: Add VDD_GX
  clk: qcom: gcc-sm6115: Add missing PLL config properties
  clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
  ...
2023-07-04 11:07:45 -07:00
Linus Torvalds
44aeec836d Char/Misc and other driver subsystem updates for 6.5-rc1
Here is the big set of char/misc and other driver subsystem updates for
 6.5-rc1.
 
 Lots of different, tiny, stuff in here, from a range of smaller driver
 subsystems, including pulls from some substems directly:
   - IIO driver updates and additions
   - W1 driver updates and fixes (and a new maintainer!)
   - FPGA driver updates and fixes
   - Counter driver updates
   - Extcon driver updates
   - Interconnect driver updates
   - Coresight driver updates
   - mfd tree tag merge needed for other updates
 on top of that, lots of small driver updates as patches, including:
   - static const updates for class structures
   - nvmem driver updates
   - pcmcia driver fix
   - lots of other small driver updates and fixes
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCZKKNMw8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ylhlQCfZrtz8RIbau8zbzh/CKpKBOmvHp4An3V64hbz
 recBPLH0ZACKl0wPl4iZ
 =A83A
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull Char/Misc updates from Greg KH:
 "Here is the big set of char/misc and other driver subsystem updates
  for 6.5-rc1.

  Lots of different, tiny, stuff in here, from a range of smaller driver
  subsystems, including pulls from some substems directly:

   - IIO driver updates and additions

   - W1 driver updates and fixes (and a new maintainer!)

   - FPGA driver updates and fixes

   - Counter driver updates

   - Extcon driver updates

   - Interconnect driver updates

   - Coresight driver updates

   - mfd tree tag merge needed for other updates on top of that, lots of
     small driver updates as patches, including:

   - static const updates for class structures

   - nvmem driver updates

   - pcmcia driver fix

   - lots of other small driver updates and fixes

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (243 commits)
  bsr: fix build problem with bsr_class static cleanup
  comedi: make all 'class' structures const
  char: xillybus: make xillybus_class a static const structure
  xilinx_hwicap: make icap_class a static const structure
  virtio_console: make port class a static const structure
  ppdev: make ppdev_class a static const structure
  char: misc: make misc_class a static const structure
  /dev/mem: make mem_class a static const structure
  char: lp: make lp_class a static const structure
  dsp56k: make dsp56k_class a static const structure
  bsr: make bsr_class a static const structure
  oradax: make 'cl' a static const structure
  hwtracing: hisi_ptt: Fix potential sleep in atomic context
  hwtracing: hisi_ptt: Advertise PERF_PMU_CAP_NO_EXCLUDE for PTT PMU
  hwtracing: hisi_ptt: Export available filters through sysfs
  hwtracing: hisi_ptt: Add support for dynamically updating the filter list
  hwtracing: hisi_ptt: Factor out filter allocation and release operation
  samples: pfsm: add CC_CAN_LINK dependency
  misc: fastrpc: check return value of devm_kasprintf()
  coresight: dummy: Update type of mode parameter in dummy_{sink,source}_enable()
  ...
2023-07-03 12:46:47 -07:00
Linus Torvalds
c156d4af43 - New Drivers
- Add support for Intel Cherry Trail Whiskey Cove PMIC LEDs
    - Add support for Awinic AW20036/AW20054/AW20072 LEDs
 
  - New Device Support
    - Add support for PMI632 LPG to QCom LPG
    - Add support for PMI8998 to QCom Flash
    - Add support for MT6331, WLEDs and MT6332 to Mediatek MT6323 PMIC
 
  - New Functionality
    - Implement the LP55xx Charge Pump
    - Add support for suspend / resume to Intel Cherry Trail Whiskey Cove PMIC
    - Add support for breathing mode to Intel Cherry Trail Whiskey Cove PMIC
    - Enable per-pin resolution Pinctrl in LEDs GPIO
 
  - Fix-ups
    - Allow thread to sleep by switching from spinlock to mutex
    - Add lots of Device Tree bindings / support
    - Adapt relationships / dependencies driven by Kconfig
    - Switch I2C drivers from .probe_new() to .probe()
    - Remove superfluous / duplicate code
    - Replace strlcpy() with strscpy() for efficiency and overflow prevention
    - Staticify various functions
    - Trivial: Fixing coding style
    - Simplify / reduce code
 
  - Bug Fixes
    - Prevent NETDEV_LED_MODE_LINKUP from being cleared on rename
    - Repair race between led_set_brightness(LED_{OFF,FULL})
    - Fix Oops relating to sleeping in critical sections
    - Clear LED_INIT_DEFAULT_TRIGGER flag when clearing the current trigger
    - Do not leak resources in error handling paths
    - Fix unsigned comparison which can never be negative
    - Provide missing NULL terminating entries in tables
    - Fix misnaming issues
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAmSinb0ACgkQUa+KL4f8
 d2FYfg//WWLVfXRuRpY9ueOxvWj65WVPQSQ+wzF/vRTweogR+lN0qxNPH6yT943z
 ap2EBxpWf84zCifYG4yhTEYDHQT+nH1fIz6xaK29DK8sCQi4WdRpHuE2pE30R/tf
 Q7SyZi9DlWyoqNiqgNNCl7vkTaHpO3trxoxfEfN2YIB0npLf8yyWRz4feVXXsYtg
 41S4Mo7oTxphd7OLvw9PKogdTbT29vBMXen8jzv5g8FObj1Gheg0frq2t2W+bfAl
 27cJJJS7he4/WLCDzXVQfB46Nva5NpqHiANbgOAApDGx3hFCzZFTCg6K7+VucpjY
 bNz3pqmslT5uJxMjqNz8fCSzwWTjyKLHBeGsIT/4HBXD4DnfFbWz9HYkorfNgsu2
 lKEp0SYhSmmuS8IVzJvqDqXg6k21hGpuR9P+dI7teoClh0qLTMCz2L2c9p2zNfth
 0W+WeLYQ67QTRH9EcHo3dlZH/mP/J1jGmUDbF+DFI6bHsg2iahZUA6ixD18E7sWE
 RwtCnb3xyn7eoDe3LwJdKtJMyrX59MbFWqozij2NNhvduXc+m1kH/DX5CSaBUVwf
 RtfDZwWHf4qK4CipuuqOLd5fiUArJ3TSHBxXkoo0Wz7NYXK9k86eIZgWrgdEbvuA
 oHmSousS19Eiscjtzxl7OjvDJMRc0rTJfD7LzYoHQBL4Vpnd8VI=
 =9kd5
 -----END PGP SIGNATURE-----

Merge tag 'leds-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds

Pull LED updates from Lee Jones:
 "New Drivers:
   - Add support for Intel Cherry Trail Whiskey Cove PMIC LEDs
   - Add support for Awinic AW20036/AW20054/AW20072 LEDs

  New Device Support:
   - Add support for PMI632 LPG to QCom LPG
   - Add support for PMI8998 to QCom Flash
   - Add support for MT6331, WLEDs and MT6332 to Mediatek MT6323 PMIC

  New Functionality:
   - Implement the LP55xx Charge Pump
   - Add support for suspend / resume to Intel Cherry Trail Whiskey Cove PMIC
   - Add support for breathing mode to Intel Cherry Trail Whiskey Cove PMIC
   - Enable per-pin resolution Pinctrl in LEDs GPIO

  Fix-ups:
   - Allow thread to sleep by switching from spinlock to mutex
   - Add lots of Device Tree bindings / support
   - Adapt relationships / dependencies driven by Kconfig
   - Switch I2C drivers from .probe_new() to .probe()
   - Remove superfluous / duplicate code
   - Replace strlcpy() with strscpy() for efficiency and overflow prevention
   - Staticify various functions
   - Trivial: Fixing coding style
   - Simplify / reduce code

  Bug Fixes:
   - Prevent NETDEV_LED_MODE_LINKUP from being cleared on rename
   - Repair race between led_set_brightness(LED_{OFF,FULL})
   - Fix Oops relating to sleeping in critical sections
   - Clear LED_INIT_DEFAULT_TRIGGER flag when clearing the current trigger
   - Do not leak resources in error handling paths
   - Fix unsigned comparison which can never be negative
   - Provide missing NULL terminating entries in tables
   - Fix misnaming issues"

* tag 'leds-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds: (53 commits)
  leds: leds-mt6323: Adjust return/parameter types in wled get/set callbacks
  leds: sgm3140: Add richtek,rt5033-led compatible
  dt-bindings: leds: sgm3140: Document richtek,rt5033 compatible
  dt-bindings: backlight: kinetic,ktz8866: Add missing type for "current-num-sinks"
  dt-bindings: leds: Drop unneeded quotes
  leds: Fix config reference for AW200xx driver
  leds: leds-mt6323: Add support for WLEDs and MT6332
  leds: leds-mt6323: Add support for MT6331 leds
  leds: leds-mt6323: Open code and drop MT6323_CAL_HW_DUTY macro
  leds: leds-mt6323: Drop MT6323_ prefix from macros and defines
  leds: leds-mt6323: Specify registers and specs in platform data
  dt-bindings: leds: leds-mt6323: Document mt6332 compatible
  dt-bindings: leds: leds-mt6323: Document mt6331 compatible
  leds: simatic-ipc-leds-gpio: Introduce more Kconfig switches
  leds: simatic-ipc-leds-gpio: Split up into multiple drivers
  leds: simatic-ipc-leds-gpio: Move two extra gpio pins into another table
  leds: simatic-ipc-leds-gpio: Add terminating entries to gpio tables
  leds: flash: leds-qcom-flash: Fix an unsigned comparison which can never be negative
  leds: cht-wcove: Remove unneeded semicolon
  leds: cht-wcove: Fix an unsigned comparison which can never be negative
  ...
2023-07-03 11:26:05 -07:00
Linus Torvalds
b8ec70ab66 - New Drivers
- Add support for TI TPS6594/TPS6593/LP8764 PMICs
    - Add support for Samsung RT5033 Battery Charger
    - Add support for Analog Devices MAX77540 and MAX77541 PMICs
 
  - New Device Support
    - Add support for SPI to Rockchip RK808 (and friends)
    - Add support for AXP192 PMIC to X-Powers AXP20X
    - Add support for AXP313a PMIC to X-Powers AXP20X
    - Add support for RK806 to Rockchip RK8XX
 
  - Removed Device Support
    - Removed MFD support for Richtek RT5033 Battery
 
  - Fix-ups
    - Remove superfluous code
    - Switch I2C drivers from .probe_new() to .probe()
    - Convert over to managed resources (devm_*(), etc)
    - Use dev_err_probe() for returning errors from .probe()
    - Add lots of Device Tree bindings / support
    - Improve cache efficiency by switching to Maple
    - Use own exported namespaces (NS)
    - Include missing and remove superfluous headers
    - Start using / convert to the new shutdown sys-off API
    - Trivial: variable / define renaming
    - Make use of of_property_read_reg() when requesting DT 'reg's
 
  - Bug Fixes
    - Fix chip revision readout due to incorrect data masking
    - Amend incorrect register and mask values used for charger state
    - Hide unused functionality at compile time
    - Fix resource leaks following error handling routines
    - Return correct error values and fix error handling in general
    - Repair incorrect device names - used for device matching
    - Remedy broken module auto-loading
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAmSinHkACgkQUa+KL4f8
 d2Gj3A/9EimIwZKau8OeHCVue1mNrEVkVsCiWIZF1eHliufNbH0g3+9gzTB1yQfL
 PmE2tN+vxdHNPJKzPnrmEEdJpm+rV6RikUD3I1mVN0wPSXDmZPx9kYuJD8SmMtZo
 aDLQIMwqY0ZijGgAoVWmRtYo5praWSFvyutiD1yYEI4yAz/QcLoNvWjt3qb0H+fq
 Un1LYErrLxLar0GllzQa5lzoNEAoSBvO1TmS8z4Cm5uiU6Orahh2DlsE/Do40GSc
 5YYntAEsuJ1Bkg7JB+bxdU4BJnJskqzaasLIe3Fc4rXf6zdh/21EpmhpFGY+BS8s
 51f+NjViMwi+3uiBe5g8f/pIy6dIpkfvdukzbqDhDwqXnexftpy3+i99PJiWludR
 Xpr6s+g6zpxLAoKzHNA1jm5B3I0IPJEBoWe8jAalIcGIQBdjiF9UAkas3z9NTEoa
 8TrjW1Abxow1TB9ouT0kE7hvQk2UpYLEbNdDAByE4mM33d5AF7UpcEBrhmbFDA/E
 12q5EMoV9uXIzf+LS2TdYroo8SVYHufiIoiwU6QPJzWVVFJ3lrU3pA1Oe+aICMNu
 90EVDI1Ve37WTJfN9+FAlncaWF99AEqZwrES25QrKhMQO4w6LS35shlzTzpUcB4k
 q+upr81cWLz0t7fmjgn4yVa1CWzaQ19nylqXF/Nb4RP/6ZiP2Dw=
 =EmOj
 -----END PGP SIGNATURE-----

Merge tag 'mfd-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "New Drivers:
   - Add support for TI TPS6594/TPS6593/LP8764 PMICs
   - Add support for Samsung RT5033 Battery Charger
   - Add support for Analog Devices MAX77540 and MAX77541 PMICs

  New Device Support:
   - Add support for SPI to Rockchip RK808 (and friends)
   - Add support for AXP192 PMIC to X-Powers AXP20X
   - Add support for AXP313a PMIC to X-Powers AXP20X
   - Add support for RK806 to Rockchip RK8XX

  Removed Device Support:
   - Removed MFD support for Richtek RT5033 Battery

  Fix-ups:
   - Remove superfluous code
   - Switch I2C drivers from .probe_new() to .probe()
   - Convert over to managed resources (devm_*(), etc)
   - Use dev_err_probe() for returning errors from .probe()
   - Add lots of Device Tree bindings / support
   - Improve cache efficiency by switching to Maple
   - Use own exported namespaces (NS)
   - Include missing and remove superfluous headers
   - Start using / convert to the new shutdown sys-off API
   - Trivial: variable / define renaming
   - Make use of of_property_read_reg() when requesting DT 'reg's

  Bug Fixes:
   - Fix chip revision readout due to incorrect data masking
   - Amend incorrect register and mask values used for charger state
   - Hide unused functionality at compile time
   - Fix resource leaks following error handling routines
   - Return correct error values and fix error handling in general
   - Repair incorrect device names - used for device matching
   - Remedy broken module auto-loading"

* tag 'mfd-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (51 commits)
  dt-bindings: mfd: max77541: Add ADI MAX77541/MAX77540
  iio: adc: max77541: Add ADI MAX77541 ADC Support
  regulator: max77541: Add ADI MAX77541/MAX77540 Regulator Support
  dt-bindings: regulator: max77541: Add ADI MAX77541/MAX77540 Regulator
  mfd: Switch two more drivers back to use struct i2c_driver::probe
  dt-bindings: mfd: samsung,s5m8767: Simplify excluding properties
  mfd: stmpe: Only disable the regulators if they are enabled
  mfd: max77541: Add ADI MAX77541/MAX77540 PMIC Support
  dt-bindings: mfd: gateworks-gsc: Remove unnecessary fan-controller nodes
  mfd: core: Use of_property_read_reg() to parse "reg"
  mfd: stmfx: Nullify stmfx->vdd in case of error
  mfd: stmfx: Fix error path in stmfx_chip_init
  mfd: intel-lpss: Add missing check for platform_get_resource
  mfd: stpmic1: Add PMIC poweroff via sys-off handler
  mfd: stpmic1: Fixup main control register and bits naming
  dt-bindings: mfd: qcom,tcsr: Add the compatible for IPQ8074
  mfd: tps65219: Add support for soft shutdown via sys-off API
  mfd: pm8008: Drop bogus i2c module alias
  mfd: pm8008: Fix module autoloading
  mfd: tps65219: Add GPIO cell instance
  ...
2023-07-03 10:55:04 -07:00
Linus Torvalds
28968f384b Pin control changes for the v6.5 kernel cycle:
No core changes this time.
 
 New drivers:
 
 - Tegra234 support.
 
 - Qualcomm IPQ5018 support.
 
 - Intel Meteor Lake-S support.
 
 - Qualcomm SDX75 subdriver.
 
 - Qualcomm SPMI-based PM8953 support.
 
 Improvements:
 
 - Fix up support for GPIO3 on the AXP209.
 
 - Push-pull drive configuration support for the AT91 PIO4.
 
 - Fix misc non-urgent bugs in the AMD driver.
 
 - Misc non-urgent improved error handling.
 
 - Misc janitorial and minor improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmSdNYkACgkQQRCzN7AZ
 XXN/Cw/+KLRYq3iBC4u8OkII9aDdCxyR+0QV/zz/ZeiEN54tICrymSSE3SG3jw13
 MMxAlZ3Yi/H1VelCrq+/2wLB8ydL+QnrQbs47JaIftdqfybgyyvHd354jtRktqQ2
 NS1Nxbog1uljwjj835XXx5CV0JSTXhFQXAGc3a06ZV/JdoixazsHWrlRn9vGY3VX
 umb/cIaNBeQ4p9QBusV7hiz/KFfC90YyJvEfNlmXxahcd25011Hq+dLFj4jsWbud
 4eEMag+zoxdSdORBU789Kjxejx1maGTyuGzWuQ/rkDgcG00pZf454ShLlbUsPdui
 TaU6gKC8/EBAp5rgtf1tGXF42sJEKpKsDmzzdYojLq3PH/H03r3qqB7VLqmXlehn
 mq5eP0DXgcdcsp/dkVa3jrWTvGPRcGfF996L3X2odl8YhoHrd6qbhYLjknZW8Eph
 QOcyHdtJfjZjJQnM9FfljAD5GSKfyIAhc5PX9yAkkN8mQlw8px4Z9Cqn/F0B57o7
 K8FWSkgeM5chZ5Xy+C7TYw6yLsG2WuYahKd+mmUMVrEfAJg+ZUQRpXdoPDLNBkYQ
 PkL/MoNUpwsaFMu8ATgpIcUAQsfF57Yv8t1OOLg/GLupGqOtCgHb5dvbWstiFcN4
 r4Wew7i2cadXJnL8WBpqdpbye1rsVh0I/ANoN6o2AbEz1yfe7Eo=
 =MMUo
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "No core changes this time

  New drivers:

   - Tegra234 support

   - Qualcomm IPQ5018 support

   - Intel Meteor Lake-S support

   - Qualcomm SDX75 subdriver

   - Qualcomm SPMI-based PM8953 support

  Improvements:

   - Fix up support for GPIO3 on the AXP209

   - Push-pull drive configuration support for the AT91 PIO4

   - Fix misc non-urgent bugs in the AMD driver

   - Misc non-urgent improved error handling

   - Misc janitorial and minor improvements"

* tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits)
  pinctrl: cherryview: Drop goto label
  pinctrl: baytrail: invert if condition
  pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failure
  pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hook
  pinctrl: tegra: avoid duplicate field initializers
  dt-bindings: pinctrl: qcom,sdx65-tlmm: add pcie_clkreq function
  pinctrl: mlxbf3: remove broken Kconfig 'select'
  pinctrl: spear: Remove unused of_gpio.h inclusion
  pinctrl: lantiq: Remove unused of_gpio.h inclusion
  pinctrl: at91-pio4: check return value of devm_kasprintf()
  pinctrl: microchip-sgpio: check return value of devm_kasprintf()
  pinctrl: freescale: Fix a memory out of bounds when num_configs is 1
  pinctrl: intel: refine ->irq_set_type() hook
  pinctrl: intel: refine ->set_mux() hook
  pinctrl: baytrail: Use str_hi_lo() helper
  lib/string_choices: Add str_high_low() helper
  lib/string_helpers: Split out string_choices.h
  lib/string_helpers: Add missing header files to MAINTAINERS database
  pinctrl: npcm7xx: Add missing check for ioremap
  pinctrl:sunplus: Add check for kmalloc
  ...
2023-06-30 14:57:19 -07:00
Linus Torvalds
e4c8d01865 ARM: SoC drivers for 6.5
Nothing surprising in the SoC specific drivers, with the usual updates:
 
  * Added or improved SoC driver support for Tegra234, Exynos4121, RK3588,
    as well as multiple Mediatek and Qualcomm chips
 
  * SCMI firmware gains support for multiple SMC/HVC transport and version
    3.2 of the protocol
 
  * Cleanups amd minor changes for the reset controller, memory controller,
    firmware and sram drivers
 
  * Minor changes to amd/xilinx, samsung, tegra, nxp, ti, qualcomm,
    amlogic and renesas SoC specific drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSdmbIACgkQYKtH/8kJ
 UicewQ/6Aq8j5pBFYBimZoyQ0bi9z+prGrHoDDYLew2vKjtOXJl5z7ZnM3J1oyPt
 Zvis3IaGkHJCuuqotPdsquZrzHq8slzXzwkHPfHORJBC4gV0V/vMS8w32tO5FfTq
 ULrMyWnbsU7Udeywc2xuEpAoC9+bXX9brnCpa3H41peIGZKM+0g7EE6FASt3YaOk
 O+ZMSGqF8QbCqSQrUH3GudFlFMy/VxIvwuUsbLt8aNkRACunQZXVgUdArvLV49nX
 SElFN7hOVRoVDv0rgYMxlwElymrta/kMyjLba8GU1GIhzyDGozVqIJQAnsQ3f6CC
 yyzaJm27zzJH0mx9jx4W+JLBdjqDL4ctE2WyllRVIpTGYMHiMQtutHNwtNupIuD5
 j9j/fIVQWZqOdWXnA6V/CHYN1MZBRTH3KQcnLlYPC01dWKThPDnrHGfwOkfsrwtN
 zuERJJ+gd5b8KW4dmy1ueDOSB8162LxbS7iHxpOBGySmqVOYj3XUqACZhKRfXfIQ
 BVj9punCE/gO2fMb9IZByjeOzgtV+PBRmPxoglyaGkT4fVfL06kEbpKFYbXXq9b/
 aAS/U84gGr8ebWsOXszwDnBzTZRzjMVv/T9KDTTJuWbBEPNyCR7fUG0cZ50rSKnJ
 2cTPe3a0sS6LaBt71qfExCIfxG+cJ2c3N1U5/jb2C49Aob45obs=
 =zvLr
 -----END PGP SIGNATURE-----

Merge tag 'soc-drivers-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Nothing surprising in the SoC specific drivers, with the usual
  updates:

   - Added or improved SoC driver support for Tegra234, Exynos4121,
     RK3588, as well as multiple Mediatek and Qualcomm chips

   - SCMI firmware gains support for multiple SMC/HVC transport and
     version 3.2 of the protocol

   - Cleanups amd minor changes for the reset controller, memory
     controller, firmware and sram drivers

   - Minor changes to amd/xilinx, samsung, tegra, nxp, ti, qualcomm,
     amlogic and renesas SoC specific drivers"

* tag 'soc-drivers-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (118 commits)
  dt-bindings: interrupt-controller: Convert Amlogic Meson GPIO interrupt controller binding
  MAINTAINERS: add PHY-related files to Amlogic SoC file list
  drivers: meson: secure-pwrc: always enable DMA domain
  tee: optee: Use kmemdup() to replace kmalloc + memcpy
  soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencer
  dt-bindings: sram: qcom,imem: document qdu1000
  soc: qcom: icc-bwmon: Fix MSM8998 count unit
  dt-bindings: soc: qcom,rpmh-rsc: Require power-domains
  soc: qcom: socinfo: Add Soc ID for IPQ5300
  dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300
  soc: qcom: Fix a IS_ERR() vs NULL bug in probe
  soc: qcom: socinfo: Add support for new fields in revision 19
  soc: qcom: socinfo: Add support for new fields in revision 18
  dt-bindings: firmware: scm: Add compatible for SDX75
  soc: qcom: mdt_loader: Fix split image detection
  dt-bindings: memory-controllers: drop unneeded quotes
  soc: rockchip: dtpm: use C99 array init syntax
  firmware: tegra: bpmp: Add support for DRAM MRQ GSCs
  soc/tegra: pmc: Use devm_clk_notifier_register()
  soc/tegra: pmc: Simplify debugfs initialization
  ...
2023-06-29 15:22:19 -07:00
Linus Torvalds
a9025a5f16 ARM: New SoC support for 6.5
There are two new SoC families this time, and both appear fairly similar:
 The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are both dual-core
 Cortex-A35 based chips for the low-power industrial embedded market,
 and they mark the first 64-bit product in a widely used family of 32-bit
 Arm MCUs and SoCs.
 
 The way into the kernel is completely different here: The team at ST has
 a long history of working upstream with their STM32MP1 and other SoCs,
 and they produced a complete port to arm64 together with the initial
 announcement. Nuvoton also has multiple SoC product lines with current
 or previous upstream support, but those are maintained by third parties
 and are unrelated. The patch series from Nuvoton's Jacky Huang had to
 go through many revisisions to get to this point and is still missing
 a few drivers including the serial port for the moment.
 
 The branch contains the devicetree files as well as all the code changes,
 in order to have something that can be tested standalone.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmScqtkACgkQYKtH/8kJ
 Uifqyg//XgvZBxb/2GILYcThVgLoo1fYA9tG5M0LERY/aPiUwrCwIl5swGQXK4vK
 E3UBLsQURer4yEBRq7iB6RGbwa4Opjdy3yTkj6WSgEMPh6e6jGvmm+dJ7HuWeviS
 8oeyo3Xar6tIF+A8xlBloHA4J6690FYB40McQzh8sWG5SE+id56S71NGnNW0kQTn
 wsul9BZcGVoyMYNBi/uXtOVUPy7jF3UBC3HJF9UOT7q77bCLjVc/aHmmnZ3zmbYA
 2oX3X5hVJakFba6vnz+rjNlzuAoGXJPDdsKFxBysdsksac/TxqRIQGNe75DZZVgz
 ESTpt1QqjmCFw32HEzi8Ne22FOpzlBqUxBMznHPenpz1/om2ezs3q7ffuPqKvMaq
 PANuK++JKJaBChVMzJbn84Sr1fvO4ecGJpKZTFC6t6SqHQNQFJT6rfMHx01Xw2wW
 LjKfEBCR6zEXN0+FaaujgJ4y/9pH1VHPynrZJG9WEwPUEZb2kJ/2RMXjNpzOWKiB
 pWYV1oW2TqFKYKhFm/pjkbi6Rq76UwEi8fWWoGMkmeV3KZ/0GFauQhItu6mX3s7W
 uGnUQyrBzWzUoashYFuNtXKHYdwuWgOmG660BXHkyxwvqV96ICGEJ+97zGIBDj81
 F8zLxEjPbsEZqGGSosAyk9oYC6eh7eK2V7xx+CUYLTuKZw13zNo=
 =zaVi
 -----END PGP SIGNATURE-----

Merge tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull new ARM SoC support from Arnd Bergmann:
 "There are two new SoC families this time, and both appear fairly
  similar: The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are
  both dual-core Cortex-A35 based chips for the low-power industrial
  embedded market, and they mark the first 64-bit product in a widely
  used family of 32-bit Arm MCUs and SoCs.

  The way into the kernel is completely different here: The team at ST
  has a long history of working upstream with their STM32MP1 and other
  SoCs, and they produced a complete port to arm64 together with the
  initial announcement. Nuvoton also has multiple SoC product lines with
  current or previous upstream support, but those are maintained by
  third parties and are unrelated. The patch series from Nuvoton's Jacky
  Huang had to go through many revisisions to get to this point and is
  still missing a few drivers including the serial port for the moment.

  The branch contains the devicetree files as well as all the code
  changes, in order to have something that can be tested standalone"

* tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits)
  clk: nuvoton: Use clk_parent_data instead of string for parent clock
  clk: nuvoton: Update all constant hex values to lowercase
  clk: nuvoton: Add clk-ma35d1.h for driver extern functions
  remoteproc: stm32: use correct format strings on 64-bit
  MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE
  arm64: defconfig: enable ARCH_STM32 and STM32 serial driver
  arm64: dts: st: add stm32mp257f-ev1 board support
  dt-bindings: stm32: document stm32mp257f-ev1 board
  arm64: dts: st: introduce stm32mp25 pinctrl files
  arm64: dts: st: introduce stm32mp25 SoCs family
  arm64: introduce STM32 family on Armv8 architecture
  dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon
  pinctrl: stm32: add stm32mp257 pinctrl support
  dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
  Documentation/process: add soc maintainer handbook
  reset: RESET_NUVOTON_MA35D1 should depend on ARCH_MA35
  reset: Add Nuvoton ma35d1 reset driver support
  clk: nuvoton: Add clock driver for ma35d1 clock controller
  arm64: dts: nuvoton: Add initial ma35d1 device tree
  dt-bindings: serial: Document ma35d1 uart controller
  ...
2023-06-29 15:11:17 -07:00
Linus Torvalds
6c1561fb90 ARM: SoC devicetree updates for 6.5
The biggest change this time is for the 32-bit devicetree files, which
 are all moved to a new location, using separate subdirectories for each
 SoC vendor, following the same scheme that is used on arm64, mips and
 riscv. This has been discussed for many years, but so far we never did
 this as there was a plan to move the files out of the kernel entirely,
 which has never happened.
 
 The impact of this will be that all external patches no longer apply,
 and anything depending on the location of the dtb files in the build
 directory will have to change. The installed files after 'make
 dtbs_install' keep the current location.
 
 There are six added SoCs here that are largely variants of previously
 added chips. Two other chips are added in a separate branch along
 with their device drivers.
 
 * The Samsung Exynos 4212 makes its return after the Samsung Galaxy
   Express phone is addded at last. The SoC support was originally
   added in 2012 but removed again in 2017 as it was unused at the time.
 
 * Amlogic C3 is a Cortex-A35 based smart IP camera chip
 
 * Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
   the still common MSM8916 (Snapdragon 410) phone chip that has been
   supported for a long time.
 
 * Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
   laptop chips, used in the Lenovo Flex 5G, which is added along with
   the reference board.
 
 * Qualcomm SDX75 is the latest generation modem chip that is used
   as a peripherial in phones but can also run a standalone Linux.  Unlike
   the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.
 
 * Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the Xuantie
   C910 core, a step up from all previously added rv64 chips.
 
 All of the above come with reference board implementations, those included
 there are 39 new board files, but only five more 32-bit this time, probably
 a new low:
 
 * Marantec Maveo board based on dhcor imx6ull module
 
 * Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip
 
 * Epson Moverio BT-200 AR glasses based on TI OMAP4
 
 * PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM
 
 * ICnova ADB4006 board based on Allwinner A20
 
 On the 64-bit side, there are also fewer addded machines than
 we had in the recent releases:
 
 * Three boards based on NXP i.MX8: Emtop SoM & Baseboard,
   NXP i.MX8MM EVKB board and i.MX8MP based Gateworks Venice
   gw7905-2x device.
 
 * NVIDIA IGX Orin and Jetson Orin Nano boards, both based on
   tegra234
 
 * Qualcomm gains support for 6 reference boards on various members
   of their IPQ networking SoC series, as well as the Sony Xperia M4
   Aqua phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board
   on top of the various reference platforms for their new chips.
 
 * Rockchips support for several newer boards: Indiedroid Nova (rk3588),
   Edgeble Neural Compute Module 6B (rk3588), FriendlyARM NanoPi R2C
   Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn Fastrhino R66S/R68S
   (rk3568)
 
 * TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex Verdin
   family with AM62 COM, carrier and dev boards
 
 Other changes to existing boards contain the usual minor improvements
 along with
 
 * continued updates to clean up dts files based on dtc warnings and
   binding checks, in particular cache properties and node names
 
 * support for devicetree overlays on at91, bcm283x
 
 * significant additions to existing SoC support on mediatek, qualcomm,
   ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST STM32MP1
 
 As usual, a lot more detail is available in the individual merge
 commits.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSdmeUACgkQYKtH/8kJ
 UieI5A//bxZXA54htEPXN5V1oIgC4JB4UYkf8fAvtyK4tdaImMn4OTwLD8/sw18X
 LQHf1VOLGsGJyNCQ+cUoaBnysr2CXqL/9dA/ARTalqnrKMN/OQjt2wg62n1Ss9Pv
 XRlxJABGxAokTO/SuPtOIakSkzwDkuAkIFKfmrNQGcT95XkJXJk3FlMRr84310UG
 sl6jP2XFSiLSYm958MMNt+DMhxRmKuyT9gos24KGsb83lZSm9DC2hYimkjd1KF5P
 CKeShWeoGoJe+YhnJx6dsDSqVgp1DFLZF1G0auSwjs9rCAKnCDMlz+T2bEzviVDh
 XONBNmnOGwPRiBI+1WdzX+pZqMMWINmhIObuODV4ANCSlX3KlSaC2rropEimlW9S
 CefvYJ+i7v/BQgMLhKlft0RHhsPU7Pfhfq4PWxaIMAOWA6ZaVczMCpgeUupHIwIQ
 lWXZZDlqmTL6SCgkOhEtdP2GGec7YSroq7sscinBaQs1f5pfoW83CNn46gZ9Jh8S
 RnXp/+vZ7+RFc15Y0VM82F6a7WN/n0BAqKmqwceDrCpf6ILrBc1lA7NhEvd80wbB
 IMg8QNqIzZ9aTOoZmB/1wAXaLClKCE3poTF+Wkd5szN7qe+hKAe1M4w5XvNUO/i/
 d0/X5KNA2ykuUxRMdd4lG54VsTJdDCVNaNeaEqasv9JCBBfvuwI=
 =X/KE
 -----END PGP SIGNATURE-----

Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "The biggest change this time is for the 32-bit devicetree files, which
  are all moved to a new location, using separate subdirectories for
  each SoC vendor, following the same scheme that is used on arm64, mips
  and riscv. This has been discussed for many years, but so far we never
  did this as there was a plan to move the files out of the kernel
  entirely, which has never happened.

  The impact of this will be that all external patches no longer apply,
  and anything depending on the location of the dtb files in the build
  directory will have to change. The installed files after 'make
  dtbs_install' keep the current location.

  There are six added SoCs here that are largely variants of previously
  added chips. Two other chips are added in a separate branch along with
  their device drivers.

   - The Samsung Exynos 4212 makes its return after the Samsung Galaxy
     Express phone is addded at last. The SoC support was originally
     added in 2012 but removed again in 2017 as it was unused at the
     time.

   - Amlogic C3 is a Cortex-A35 based smart IP camera chip

   - Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
     the still common MSM8916 (Snapdragon 410) phone chip that has been
     supported for a long time.

   - Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
     laptop chips, used in the Lenovo Flex 5G, which is added along with
     the reference board.

   - Qualcomm SDX75 is the latest generation modem chip that is used as
     a peripherial in phones but can also run a standalone Linux. Unlike
     the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.

   - Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the
     Xuantie C910 core, a step up from all previously added rv64 chips.

  All of the above come with reference board implementations, those
  included there are 39 new board files, but only five more 32-bit this
  time, probably a new low:

   - Marantec Maveo board based on dhcor imx6ull module

   - Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip

   - Epson Moverio BT-200 AR glasses based on TI OMAP4

   - PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM

   - ICnova ADB4006 board based on Allwinner A20

  On the 64-bit side, there are also fewer addded machines than we had
  in the recent releases:

   - Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM
     EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device.

   - NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234

   - Qualcomm gains support for 6 reference boards on various members of
     their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua
     phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top
     of the various reference platforms for their new chips.

   - Rockchips support for several newer boards: Indiedroid Nova
     (rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM
     NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn
     Fastrhino R66S/R68S (rk3568)

   - TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex
     Verdin family with AM62 COM, carrier and dev boards

  Other changes to existing boards contain the usual minor improvements
  along with

   - continued updates to clean up dts files based on dtc warnings and
     binding checks, in particular cache properties and node names

   - support for devicetree overlays on at91, bcm283x

   - significant additions to existing SoC support on mediatek,
     qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST
     STM32MP1

  As usual, a lot more detail is available in the individual merge
  commits"

* tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits)
  ARM: mvebu: fix unit address on armada-390-db flash
  ARM: dts: Move .dts files to vendor sub-directories
  kbuild: Support flat DTBs install
  ARM: dts: Add .dts files missing from the build
  ARM: dts: allwinner: Use quoted #include
  ARM: dts: lan966x: kontron-d10: add PHY interrupts
  ARM: dts: lan966x: kontron-d10: fix SPI CS
  ARM: dts: lan966x: kontron-d10: fix board reset
  ARM: dts: at91: Enable device-tree overlay support for AT91 boards
  arm: dts: Enable device-tree overlay support for AT91 boards
  arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller
  ARM: dts: at91: use generic name for shutdown controller
  ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
  dt-bindings: firmware: brcm,kona-smc: convert to YAML
  riscv: dts: sort makefile entries by directory
  riscv: defconfig: enable T-HEAD SoC
  MAINTAINERS: add entry for T-HEAD RISC-V SoC
  riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
  riscv: dts: add initial T-HEAD TH1520 SoC device tree
  riscv: Add the T-HEAD SoC family Kconfig option
  ...
2023-06-29 15:07:06 -07:00
Linus Torvalds
f8824e151f sound updates for 6.5-rc1
Lots of changes as usual, but the only significant stuff in ALSA core
 part is the MIDI 2.0 support, while ASoC core kept receiving the code
 refactoring.  The majority of changes are seen rather in device
 drivers, and quite a few new drivers can be found there.
 
 Here we go, some highlights:
 
 ALSA and ASoC Core:
 - Support of MIDI 2.0 devices: rawmidi and sequencer API have been
   extended for the support of the new UMP (Universal MIDI Packet)
   protocol, USB audio driver got the USB MIDI 2.0 interface support
 - Continued refactoring around ASoC DAI links and the ordering of
   trigger callbacks
 - PCM ABI extension for better drain support
 
 ASoC Drivers:
 - Conversions of many drivers to use maple tree based caches
 - Everlasting improvement works on ASoC Intel drivers
 - Compressed audio support for Qualcomm
 - Support for AMD SoundWire, Analog Devices SSM3515, Google Chameleon,
   Ingenic X1000, Intel systems with various CODECs, Loongson
   platforms, Maxim MAX98388, Mediatek MT8188, Nuvoton NAU8825C, NXP
   platforms with NAU8822, Qualcomm WSA884x, StarFive JH7110, Texas
   Instruments TAS2781
 
 HD-audio:
 - Quirks for HP and ASUS machines
 - CS35L41 HD-audio codec fixes
 - Loongson HD-audio support
 
 Misc:
 - A new virtual PCM test driver for kselftests
 - Continued refactoring and improvements on the legacy emu10k1 driver
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmScAA8OHHRpd2FpQHN1
 c2UuZGUACgkQLtJE4w1nLE8rGg/+MZtQVa/uPAS914pTaBbwr0JTmaZwnroCYAGZ
 VF708hXDoqdJMXkVyBxogpBGdydwCCEIPZ6TKslslIjxz1eojATN1BiAlYDSrTOL
 TYORARXJ+HLHK8/okCucIAl7A1CNxRHBUfSqgN7N6OWfYY/Rd8JL6mIuL8M0rPkT
 dAN219q/+GVMckiUVVSo78SRZL93S6TiQkcomeA3SoB3ycGCkaDD9Leb4vwr6iPa
 Yytcf/DWWD5plEEZFVzuyT1KTyi3HhcVZYF29QaoZaSkNIBwUJV7IObz+zJTs5BC
 /CgudWbQ/uhgiOucKNId+7sG04ehTJgKDRVZ6ArQt2p0aLC8KZKB+ytt9QHdCPlZ
 czQX86PjQ4DeivvTaoFvqjDfDFosSWkHWYxqA0fEEVd7p+6ZrhmZdmtidFxF5/Oq
 Dk0AFRwc71w4/OZU83lYv2BLXaqGVZ8ptmeEILaAJoxkpWwomHYW5nYFZ2Pnb8h3
 Yl9Q0f82uFNqfPcGJLSpqJ/Or9BVI2qQU75gHHXIe1GXUAaHkLLRPfpzQtGjkPap
 KC0+VMGEWy0y0mdytt0ecIkz2Dv/RvlahTr5jHEXSb3r93H6nRTTjxzyLvXHoPy0
 4iVf1g7VPL69V3vZ6AlkPdMo/yV7q/72bP0ZJ6CgVtdOZO4Q1N8ItwFt8FN0nAcu
 FeYq8pg=
 =GuXv
 -----END PGP SIGNATURE-----

Merge tag 'sound-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "Lots of changes as usual, but the only significant stuff in ALSA core
  part is the MIDI 2.0 support, while ASoC core kept receiving the code
  refactoring. The majority of changes are seen rather in device
  drivers, and quite a few new drivers can be found there.

  Here we go, some highlights:

  ALSA and ASoC Core:
   - Support of MIDI 2.0 devices: rawmidi and sequencer API have been
     extended for the support of the new UMP (Universal MIDI Packet)
     protocol, USB audio driver got the USB MIDI 2.0 interface support
   - Continued refactoring around ASoC DAI links and the ordering of
     trigger callbacks
   - PCM ABI extension for better drain support

  ASoC Drivers:
   - Conversions of many drivers to use maple tree based caches
   - Everlasting improvement works on ASoC Intel drivers
   - Compressed audio support for Qualcomm
   - Support for AMD SoundWire, Analog Devices SSM3515, Google
     Chameleon, Ingenic X1000, Intel systems with various CODECs,
     Loongson platforms, Maxim MAX98388, Mediatek MT8188, Nuvoton
     NAU8825C, NXP platforms with NAU8822, Qualcomm WSA884x, StarFive
     JH7110, Texas Instruments TAS2781

  HD-audio:
   - Quirks for HP and ASUS machines
   - CS35L41 HD-audio codec fixes
   - Loongson HD-audio support

  Misc:
   - A new virtual PCM test driver for kselftests
   - Continued refactoring and improvements on the legacy emu10k1
     driver"

* tag 'sound-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (556 commits)
  ALSA: hda/realtek: Enable mute/micmute LEDs and limit mic boost on EliteBook
  ASoC: hdmi-codec: fix channel info for compressed formats
  ALSA: pcm: fix ELD constraints for (E)AC3, DTS(-HD) and MLP formats
  ASoC: core: Always store of_node when getting DAI link component
  ASoC: tas2781: Fix error code in tas2781_load_calibration()
  ASoC: amd: update pm_runtime enable sequence
  ALSA: ump: Export MIDI1 / UMP conversion helpers
  ASoC: tas2781: fix Kconfig dependencies
  ASoC: amd: acp: remove acp poweroff function
  ASoC: amd: acp: clear pdm dma interrupt mask
  ASoC: codecs: max98090: Allow dsp_a mode
  ASoC: qcom: common: add default jack dapm pins
  ASoC: loongson: fix address space confusion
  ASoC: dt-bindings: microchip,sama7g5-pdmc: Simplify "microchip,mic-pos" constraints
  ASoC: tegra: Remove stale comments in AHUB
  ASoC: tegra: Use normal system sleep for ASRC
  ALSA: hda/realtek: Add quirks for ROG ALLY CS35l41 audio
  ASoC: fsl-asoc-card: Allow passing the number of slots in use
  ASoC: codecs: wsa884x: Add WSA884x family of speakers
  ASoC: dt-bindings: qcom,wsa8840: Add WSA884x family of speakers
  ...
2023-06-29 10:46:47 -07:00
Linus Torvalds
ff7ddcf0db This batch of clk driver updates for the merge window contains almost no new
SoC support. Instead there's a treewide patch series from Maxime that makes
 clk_ops::determine_rate mandatory for muxes. Beyond that core framework change
 we have the usual pile of clk driver updates such as migrating i2c drivers to
 use .probe() again or YAMLfication of clk DT bindings so we can validate DTBs.
 Overall the SoCs that got the most updates this time around in terms of
 diffstat are the Amlogic and Mediatek drivers because they added new SoC
 support or fixed up various drivers to have proper data.
 
 In general things look kinda quiet. I suspect the core framework change may
 still shake out some problems after the merge window, mostly because not
 everyone tests linux-next where that series has been for some number of weeks.
 I saw that there's at least one pending fix for Tegra that needs to be wrapped
 up into a proper patch. I'll try to catch those bits before the window closes
 so that -rc1 is bootable. More details below.
 
 Core:
  - Make clk_ops::determine_rate mandatory for muxes
 
 New Drivers:
  - Add amlogic a1 SoC family PLL and peripheral clock controller support
 
 Updates:
  - Handle allocation failures from kasprintf() and friends
  - Migrate platform clk drivers to .remove_new()
  - Migrate i2c clk drivers to .probe() instead of .probe_new()
  - Remove CLK_SET_PARENT from all Mediatek MSDC core clocks
  - Add infra_ao reset support for Mediatek MT8188 SoCs
  - Align driver_data to i2c_device_id tables in some i2c clk drivers
  - Use device_get_match_data() in vc5 clk driver
  - New Kconfig symbol name (SOC_MICROCHIP_POLARFIRE) for Microchip FPGA clock
    drivers
  - Use of_property_read_bool() to read "microchip,pic32mzda-sosc" boolean DT
    property in clk-pic32mzda
  - Convert AT91 clock dt-bindings to YAML
  - Remove CLK_SET_RATE_PARENT flag from LDB clocks on i.MX6SX
  - Keep i.MX UART clocks enabled during kernel boot if earlycon is set
  - Drop imx_unregister_clocks() as there are no users anymore
  - Switch to _safe iterator on imx_clk_scu_unregister() to avoid use after free
  - Add determine_rate op to the imx8m composite clock
  - Use device managed API for iomap and kzalloc for i.MXRT1050, i.MX8MN,
    i.MX8MP and i.MX93 clock controller drivers
  - Add missing interrupt DT property for the i.MX8M clock controller
  - Re-add support for Exynos4212 clock controller because we are
    re-introducing the SoC in the mainline
  - Add CONFIG_OF dependency to Samsung clk Kconfig symbols to solve some
    objtool warnings
  - Preselect PLL MIPI as TCON0 parent for Allwinner A64 SoC
  - Convert the Renesas clock drivers to readl_poll_timeout_atomic()
  - Add PWM clock on Renesas R-Car V3U
  - Fix PLL5 on Renesas RZ/G2L and RZ/V2L
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmSaakgRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSV1ShAAvvDE7CbcWQqIQvweGL/WjFEp+05OBQHs
 eqHVEZshdw2Bk7eVyaU86Yjasq317yd0PUo/Mnme7tr4Od5WauegXhM5mR85crfQ
 qdA3/A/3ZyvlSxWCefsoXEee62D/2fLGro73NFWlYWf3U7j4saAxw/Fto9AAyZQd
 kX0kAmrKzjRJPyh2xTJlz5b5os3D1SOstmPXjUGuv+2gaC5cBt/pEd+vPX+OW5mD
 IFy+N1CVx2UHJrvK5qCzuP8Aun3usFM2fvMEjfThuR0h7gaTU67sdqydl7a30PzU
 fM+vsQVnU8VxCqquZ4lGWa+pvFSID3tuBdy+B7d2EQnID0558Qom8+syKC2nN0/m
 kN/W4fgWCkoMSHj50VYpbRMUHn8N96t/61uoxAF+byGGZ4h8xxgGylSZVip7awbh
 yUJWvPmDq2UKJzjr3jILEjvigUun3PjezT2D9me64z+TUKAFMtomAt75U1pAShtO
 tWsvC2u2GLns9PS3EC3ov9zhiyVN9MjzlqYEjgGbM2C3swJgY8nnnO2izMpuaC9L
 fB8HtzMNwu+Ct6MKISabHex2Oeh3yhEtfZaldx2DdV05ejxndDzNz4sfh7XAkrFr
 G3x+yn94geaYL0/OMhDw/MqdVWIiTf4q8FYK6yv7XicIQGtLs2GHXxHJf1ltCxHb
 nCnNBgJmYXo=
 =6M8D
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This batch of clk driver updates contains almost no new SoC support.
  Instead there's a treewide patch series from Maxime that makes
  clk_ops::determine_rate mandatory for muxes.

  Beyond that core framework change we have the usual pile of clk driver
  updates such as migrating i2c drivers to use .probe() again or
  YAMLfication of clk DT bindings so we can validate DTBs.

  Overall the SoCs that got the most updates this time around in terms
  of diffstat are the Amlogic and Mediatek drivers because they added
  new SoC support or fixed up various drivers to have proper data.

  In general things look kinda quiet. I suspect the core framework
  change may still shake out some problems after the merge window,
  mostly because not everyone tests linux-next where that series has
  been for some number of weeks. I saw that there's at least one pending
  fix for Tegra that needs to be wrapped up into a proper patch. I'll
  try to catch those bits before the window closes so that -rc1 is
  bootable. More details below.

  Core:
   - Make clk_ops::determine_rate mandatory for muxes

  New Drivers:
   - Add amlogic a1 SoC family PLL and peripheral clock controller support

  Updates:
   - Handle allocation failures from kasprintf() and friends
   - Migrate platform clk drivers to .remove_new()
   - Migrate i2c clk drivers to .probe() instead of .probe_new()
   - Remove CLK_SET_PARENT from all Mediatek MSDC core clocks
   - Add infra_ao reset support for Mediatek MT8188 SoCs
   - Align driver_data to i2c_device_id tables in some i2c clk drivers
   - Use device_get_match_data() in vc5 clk driver
   - New Kconfig symbol name (SOC_MICROCHIP_POLARFIRE) for Microchip
     FPGA clock drivers
   - Use of_property_read_bool() to read "microchip,pic32mzda-sosc"
     boolean DT property in clk-pic32mzda
   - Convert AT91 clock dt-bindings to YAML
   - Remove CLK_SET_RATE_PARENT flag from LDB clocks on i.MX6SX
   - Keep i.MX UART clocks enabled during kernel boot if earlycon is set
   - Drop imx_unregister_clocks() as there are no users anymore
   - Switch to _safe iterator on imx_clk_scu_unregister() to avoid use
     after free
   - Add determine_rate op to the imx8m composite clock
   - Use device managed API for iomap and kzalloc for i.MXRT1050,
     i.MX8MN, i.MX8MP and i.MX93 clock controller drivers
   - Add missing interrupt DT property for the i.MX8M clock controller
   - Re-add support for Exynos4212 clock controller because we are
     re-introducing the SoC in the mainline
   - Add CONFIG_OF dependency to Samsung clk Kconfig symbols to solve
     some objtool warnings
   - Preselect PLL MIPI as TCON0 parent for Allwinner A64 SoC
   - Convert the Renesas clock drivers to readl_poll_timeout_atomic()
   - Add PWM clock on Renesas R-Car V3U
   - Fix PLL5 on Renesas RZ/G2L and RZ/V2L"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (149 commits)
  clk: fix typo in clk_hw_register_fixed_rate_parent_data() macro
  clk: Fix memory leak in devm_clk_notifier_register()
  clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes
  clk: mvebu: Use of_get_cpu_hwid() to read CPU ID
  MAINTAINERS: Add Marvell mvebu clock drivers
  clk: clocking-wizard: check return value of devm_kasprintf()
  clk: ti: clkctrl: check return value of kasprintf()
  clk: keystone: sci-clk: check return value of kasprintf()
  clk: si5341: free unused memory on probe failure
  clk: si5341: check return value of {devm_}kasprintf()
  clk: si5341: return error if one synth clock registration fails
  clk: cdce925: check return value of kasprintf()
  clk: vc5: check memory returned by kasprintf()
  clk: mediatek: clk-mt8173-apmixedsys: Fix iomap not released issue
  clk: mediatek: clk-mt8173-apmixedsys: Fix return value for of_iomap() error
  clk: mediatek: clk-mtk: Grab iomem pointer for divider clocks
  clk: keystone: syscon-clk: Add support for audio refclk
  dt-bindings: clock: Add binding documentation for TI Audio REFCLK
  dt-bindings: clock: ehrpwm: Remove unneeded syscon compatible
  clk: keystone: syscon-clk: Allow the clock node to not be of type syscon
  ...
2023-06-29 10:05:47 -07:00
Stephen Boyd
82e58e69d7 Merge branches 'clk-qcom' and 'clk-microchip' into clk-next
* clk-qcom: (63 commits)
  clk: qcom: gcc-sc8280xp: Add runtime PM
  clk: qcom: gpucc-sc8280xp: Add runtime PM
  clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags
  clk: qcom: gpucc-sm6375: Enable runtime pm
  dt-bindings: clock: sm6375-gpucc: Add VDD_GX
  clk: qcom: gcc-sm6115: Add missing PLL config properties
  clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
  clk: qcom: gcc-ipq6018: remove duplicate initializers
  clk: qcom: gcc-ipq9574: Enable crypto clocks
  dt-bindings: clock: Add crypto clock and reset definitions
  clk: qcom: Add lpass audio clock controller driver for SC8280XP
  clk: qcom: Add lpass clock controller driver for SC8280XP
  dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP
  dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP
  dt-bindings: clock: qcom,mmcc: define clocks/clock-names for MSM8226
  clk: qcom: gpucc-sm8550: Add support for graphics clock controller
  clk: qcom: Add support for SM8450 GPUCC
  clk: qcom: gcc-sm8450: Enable hw_clk_ctrl
  clk: qcom: rcg2: Make hw_clk_ctrl toggleable
  dt-bindings: clock: qcom: Add SM8550 graphics clock controller
  ...

* clk-microchip:
  clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id
  clk: at91: sama7g5: switch to parent_hw and parent_data
  clk: at91: sckc: switch to parent_data/parent_hw
  clk: at91: clk-sam9x60-pll: add support for parent_hw
  clk: at91: clk-utmi: add support for parent_hw
  clk: at91: clk-system: add support for parent_hw
  clk: at91: clk-programmable: add support for parent_hw
  clk: at91: clk-peripheral: add support for parent_hw
  clk: at91: clk-master: add support for parent_hw
  clk: at91: clk-generated: add support for parent_hw
  clk: at91: clk-main: add support for parent_data/parent_hw
2023-06-26 16:36:14 -07:00
Bjorn Andersson
e5d10d1d1a Merge branch '20230608125315.11454-2-srinivas.kandagatla@linaro.org' into clk-for-6.5
Merge the missing SC8280XP LPASS DeviceTree changes, which where brought
in through a topic branch in order to be shared with the DeviceTree
source files, but not merged into the clock tree until now.
2023-06-26 09:26:48 -07:00
Stephen Boyd
b9a40506a2 Merge branches 'clk-imx', 'clk-microchip', 'clk-cleanup', 'clk-bindings', 'clk-ti' and 'clk-kasprintf' into clk-next
- Handle allocation failures from kasprintf() and friends

* clk-imx:
  clk: imx: clk-imx8mp: improve error handling in imx8mp_clocks_probe()
  clk: imx93: fix memory leak and missing unwind goto in imx93_clocks_probe
  clk: imx: clk-imx8mn: fix memory leak in imx8mn_clocks_probe
  dt-bindings: clock: imx8m: Add missing interrupt property
  clk: imx: clk-imxrt1050: fix memory leak in imxrt1050_clocks_probe
  clk: imx: composite-8m: Add imx8m_divider_determine_rate
  clk: imx: scu: use _safe list iterator to avoid a use after free
  clk: imx: drop imx_unregister_clocks
  clk: imx6ul: retain early UART clocks during kernel init
  clk: imx: imx6sx: Remove CLK_SET_RATE_PARENT from the LDB clocks

* clk-microchip:
  dt-bindings: clocks: at91sam9x5-sckc: convert to yaml
  dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml
  clk: microchip: Use of_property_read_bool() for boolean properties
  clk: microchip: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE

* clk-cleanup:
  clk: fix typo in clk_hw_register_fixed_rate_parent_data() macro
  clk: Fix memory leak in devm_clk_notifier_register()
  clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes
  clk: mvebu: Use of_get_cpu_hwid() to read CPU ID
  MAINTAINERS: Add Marvell mvebu clock drivers
  clk: mvebu: Use of_address_to_resource()
  clk: tegra: tegra124-emc: Fix potential memory leak
  clk: clocking-wizard: Fix Oops in clk_wzrd_register_divider()
  clk: bcm: rpi: Fix off by one in raspberrypi_discover_clocks()
  clk: sifive: Use devm_platform_ioremap_resource()

* clk-bindings:
  dt-bindings: clock: drop unneeded quotes and use absolute /schemas path
  dt-bindings: rcc: stm32: Sync with u-boot copy for STM32MP13 SoC

* clk-ti:
  clk: keystone: syscon-clk: Add support for audio refclk
  dt-bindings: clock: Add binding documentation for TI Audio REFCLK
  dt-bindings: clock: ehrpwm: Remove unneeded syscon compatible
  clk: keystone: syscon-clk: Allow the clock node to not be of type syscon

* clk-kasprintf:
  clk: clocking-wizard: check return value of devm_kasprintf()
  clk: ti: clkctrl: check return value of kasprintf()
  clk: keystone: sci-clk: check return value of kasprintf()
  clk: si5341: free unused memory on probe failure
  clk: si5341: check return value of {devm_}kasprintf()
  clk: si5341: return error if one synth clock registration fails
  clk: cdce925: check return value of kasprintf()
  clk: vc5: check memory returned by kasprintf()
2023-06-26 08:55:22 -07:00
Stephen Boyd
6e11940ab3 Merge branches 'clk-renesas', 'clk-determine-rate', 'clk-allwinner', 'clk-samsung' and 'clk-amlogic' into clk-next
- Make clk_ops::determine_rate mandatory for muxes

* clk-renesas:
  clk: renesas: rzg2l: Convert to readl_poll_timeout_atomic()
  clk: renesas: mstp: Convert to readl_poll_timeout_atomic()
  clk: renesas: cpg-mssr: Convert to readl_poll_timeout_atomic()
  iopoll: Do not use timekeeping in read_poll_timeout_atomic()
  iopoll: Call cpu_relax() in busy loops
  clk: renesas: rzg2l: Fix CPG_SIPLL5_CLK1 register write
  clk: renesas: r8a779a0: Add PWM clock

* clk-determine-rate: (71 commits)
  clk: sprd: composite: Simplify determine_rate implementation
  ASoC: tlv320aic32x4: pll: Remove impossible condition in clk_aic32x4_pll_determine_rate()
  clk: Fix best_parent_rate after moving code into a separate function
  clk: Forbid to register a mux without determine_rate
  ASoC: tlv320aic32x4: div: Switch to determine_rate
  ASoC: tlv320aic32x4: pll: Switch to determine_rate
  clk: tegra: super: Switch to determine_rate
  clk: tegra: periph: Switch to determine_rate
  clk: stm32: composite: Switch to determine_rate
  clk: st: flexgen: Switch to determine_rate
  clk: sprd: composite: Switch to determine_rate
  clk: ingenic: tcu: Switch to determine_rate
  clk: ingenic: cgu: Switch to determine_rate
  clk: imx: scu: Switch to determine_rate
  clk: da8xx: clk48: Switch to determine_rate
  clk: si5351: clkout: Switch to determine_rate
  clk: si5351: msynth: Switch to determine_rate
  clk: si5351: pll: Switch to determine_rate
  clk: si5341: Switch to determine_rate
  clk: cdce706: clkout: Switch to determine_rate
  ...

* clk-allwinner:
  clk: sunxi-ng: a64: force select PLL_MIPI in TCON0 mux

* clk-samsung:
  clk: samsung: add CONFIG_OF dependency
  clk: samsung: Re-add support for Exynos4212 CPU clock
  clk: samsung: Add Exynos4212 compatible to CLKOUT driver
  dt-bindings: clock: samsung,exynos: add Exynos4212 clock compatible

* clk-amlogic:
  MAINTAINERS: repair pattern in ARM/Amlogic Meson SoC CLOCK FRAMEWORK
  clk: meson: pll: remove unneeded semicolon
  clk: meson: a1: Staticize rtc clk
  clk: meson: a1: add Amlogic A1 Peripherals clock controller driver
  clk: meson: a1: add Amlogic A1 PLL clock controller driver
  clk: meson: introduce new pll power-on sequence for A1 SoC family
  clk: meson: make pll rst bit as optional
  dt-bindings: clock: meson: add A1 Peripherals clock controller bindings
  dt-bindings: clock: meson: add A1 PLL clock controller bindings
2023-06-26 08:55:04 -07:00
Arnd Bergmann
37d1fc51dd More Qualcomm driver updates for v6.5
The detection of split/non-split firmware files in the MDT loader is
 corrected. The Geni driver is updated to not enable unused interrupts,
 in some configurations. The count unit for MSM8998 in BWMON is corrected.
 RPM master stats driver is corrected to check for the right return value
 of devm_ioremap().
 
 Support for socinfo version 18 and 19 are aded, and IPQ5300 is added to
 the list of platforms.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSLPJsVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fc9AQAMvf/8aE2FyhH3LE9n1otbRa82Lv
 5MjvAM9N6PUJgMSuA71lZm6Bh3h/3SpbGjuRGkfGi4ZpkjZiI37ButZQq8YKVcOi
 hDPjGiF8oiO1wk+JEwrC29jgpL+37T7/7jSynO2cYfu+uKXt3MhF9kmDeIiydjyf
 hpN6IhGuyLm+dx38x9Vzsq4ew4uFNos+zP0ZInScSJV8UQ5sJjUCjQ4FDu1bHoFn
 wQXa0Bd5ObYJilh71on9eJO7dQYLapv5omHI0lM04cYpYGfPpSTmXQwnbpmL7xqF
 dyLiE+eq6jpi5yWIVpEFFwonty7Ixuq4yuMwMafYVGIriQ8a8J56HvfvZQ2FSb7D
 1F/Rx74qkx1LEenNOBM5rUFyIGc93Up19DzFPNBX/WjJW0+7yBlXNUsg/bI2a/xV
 Z+jURxcUWKa/ugiqjMZRXQ7VXC2uhrjD8xn22+w8eyziRoPPecq5KITizHv3CkOT
 G7AhI69nFn8zhXHJ3cp4ci4AWzOCW4HXnTE9H8XMDFcu6hxylJDovrqCtt0nWqg+
 QPKSqVtUF7BX/UMhhE5XdxqkxG//MyMN2W4dowxv+u35+6DCydyEm3XFuD85ETnt
 YJx4iC5n8IGfb5jfOIyLK0JHQNU9ijPSd9rssLRebh96m4H0Op9gHlxDHyXghaRS
 umZA+uKoxQQZhEXn
 =KYPl
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTWk8ACgkQYKtH/8kJ
 Uicu3hAAgerZS9Wdt+w+2cUhnkWWayByRwUmTvowFUR8vsbWLJVf1UwYQFiHVXhn
 BsPSSGWSRm3vyUZjZyv3GegoWLsxH3LD8s7QngjPpF75HI+2ekD8J+tLNRiNqPll
 /cZ1iQFVoTtfYUzAFpgBrYlFYV9P7B/6ghjEhuMc0HWLN4xFJ+13HL5NdCtvbDyn
 zTrBSDlz3j94+PoS6n/y+9r8nLNZyp5Li5FUEoXf7uABI9dUqWokoSDV1hRA7zeF
 MewEEcH7p5AZiL54L7cfLAlKwPQrUNYjerNxeljrwcp621wECniB030JmYKslSzS
 ccfracaf7EBqRuu4SYH47VeLadikpBxrjP39CJFAlKQhB2X3uUNrSYjLyTLDkRRA
 X/SN4sbm0ipToa6FlGJ68D3Ca+MHs541U6fhMgQuJ+S4D0pBjbmKUmQfs76L2Eu4
 0ZDyYCQuJFmvd/P6ZKjX6hmkxDJ4OItop+K6doedAFf0/tAp6APry05aF56mbhDW
 tsBJ0ABlFNY73wMhSu7HMm2rB7mDl3LnVfv67HrWAzaB+c23rkUDki67a1Gtr3lV
 mG05JMSG2nETBRPv+II3pG/q7GzJwlqzHNxy3mwtBRILlzLjEl5fK+HgZRtGN8zr
 7620aNOKR3lA7XGih1/ztlbpVqgH0c6Ahnm3pCHoQJJjMrK8oWI=
 =YKVY
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

More Qualcomm driver updates for v6.5

The detection of split/non-split firmware files in the MDT loader is
corrected. The Geni driver is updated to not enable unused interrupts,
in some configurations. The count unit for MSM8998 in BWMON is corrected.
RPM master stats driver is corrected to check for the right return value
of devm_ioremap().

Support for socinfo version 18 and 19 are aded, and IPQ5300 is added to
the list of platforms.

* tag 'qcom-drivers-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencer
  dt-bindings: sram: qcom,imem: document qdu1000
  soc: qcom: icc-bwmon: Fix MSM8998 count unit
  dt-bindings: soc: qcom,rpmh-rsc: Require power-domains
  soc: qcom: socinfo: Add Soc ID for IPQ5300
  dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300
  soc: qcom: Fix a IS_ERR() vs NULL bug in probe
  soc: qcom: socinfo: Add support for new fields in revision 19
  soc: qcom: socinfo: Add support for new fields in revision 18
  dt-bindings: firmware: scm: Add compatible for SDX75
  soc: qcom: mdt_loader: Fix split image detection

Link: https://lore.kernel.org/r/20230615163104.1461905-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-21 22:15:11 +02:00
Arnd Bergmann
a08000d5e0 Qualcomm driver updates for v6.5
Konrad Dybcio is promoted, from reviewer, to co-maintainer.
 
 The mdt_loader gets a fix to the detection of split binaries, where the
 previous logic sometimes concluded that the first segments was not
 split, in a split image. The unconditional calling of
 scm_pas_mem_setup() turns out to cause a regression and is reverted.
 
 The altmode subfunction of pmic_glink is enabled for SM8450.
 
 A new driver for exposing power statistics from the RPM, for debugging
 purposes, is introduced.
 
 OCMEM gets a debug prints of the hardware version, QMI helpers are
 transitioned to alloc_ordered_workqueue() and an error message in
 ramp_controller is improved.
 
 An API is introduced to the SMEM driver to allow other drivers to query
 the SoC id, rather than open-coding the parsing of the relevant SMEM
 item. This is then used to clean up the Qualcomm NVMEM-based cpufreq
 driver.
 
 Socinfo is extended with knowledge about IPQ5018, IPQ5312 and IPQ5302.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSFHJsVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FrtoQAMUN2gF5ZP3rlSEkQbKNMDhNHXVw
 S8AexPk6Qw8BcEBOD4YPqrmfrMvNP7Bqh3QkfS/7m5vx0o8bUOw+Xz+C4+9LSUD7
 /qW29GlQllwMuRNOdH3J/nYXwpV5WJyiSF/jXy0/GRbz+D/XYSNDC57z/lXTcKKq
 dYJrKxms6EF4AgHe88V0bmk6/V4xfa5p6xW3pCG7GLqNHOvhZ16oUmoPiZGVpQMk
 go/HsoIB00HktKflTLOUXJWD6qVOVNCaQQEarx+zY1txfmvpVGL+PO6Eaxt00Sa4
 pHRvB0CIZPNvdDWELfsfRx6DbPBJRGBlneag04BI918fx4X+jn4uP+1jzw9am03U
 M78k0LGBY23Psy6KhoMu5MM4Cntt3kTQ0SwHl/xayzTrAhK2xdmd1bo67ArRl+HX
 OZrZ7Se3Cm16CAWqsW42so6MJeDllc8d/ahN/e2NwsNy1lhosK06jRJEdh3N238D
 ouL56HoxrweYB0kbK4TkPLewrLZC7DYnr0KMVsPhsSraeJBaBPOVZDhuNSUXXMtf
 WdyCRMMxKU3OweLcJiKuGFzNqr2963341Y6NlD+tf1Uy5IEnbIp4jFi9BsJBNVZt
 NucOXJYm5OJeAHp8BcMFbnL8uA1NqEYQXwezodPSIGqHzxBtGf6f0hALsIpiUQnA
 GLDp99yVujEN2dsE
 =9Fv4
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTVmkACgkQYKtH/8kJ
 Uid08g//b5kJZnsiWA43LrkblMSEdZoeijrn+x2NU95YQ4s/oz2RnUtgNCGDhM84
 Fi60PzU5L1JVj6GVeL51J5jlBGKzGqe4FfPTN4aPlSV4Z0B3cuevgWmHnw4Mh/zj
 t/1b5QVVZxbKKxb8MP+U2iAvyxVwIhIA4zehh0+XGagV3qquURO7QLtLUg42Yx51
 HFLADq2JI8trm+CjjCNBv9mq7EipC/g0nbsCs98nxl/sPC7PqtNxL6BXCuz3a8BX
 JvA1LVRP2JYkQfb6SMnTFiqkT6LdB7bt6oXZdnwnsNTI1nhFqbMJRMsToWb3HEvv
 9lprraDpaufbzvB1b+x8Aar4OmbbWaY2ZpNJqqzCM5eVW2Zs/p5J+ZfOYVigtQYO
 qIQvENv+eKETu4nVvdlf72FPAVe+GXnVAcl3LEwhMUxYcRMha4JT0i8mndnCzpT+
 tZLdkBMp/t7rZPIa7D+07Xmorefw9e9rwynQg2C2yw3AV5v7j09dPJDFITFcF6Yl
 7ADtoy7zHTTv6/0n04RfPC9jPMoi8RbPoVNMVAWW7t7S0984o3gqWXJPLWJdTzA/
 ODOupqmvSpZld1rUklKKH/dY/Ha7iUTSci7rZrXSafXR8LBEn2FO6ehZqUvk7T/u
 qM3rs5wacHP2OcNDtwHHJoyfHXpxaQ2JqVOcUNkcdcwhN9dbdxA=
 =4/0b
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

Qualcomm driver updates for v6.5

Konrad Dybcio is promoted, from reviewer, to co-maintainer.

The mdt_loader gets a fix to the detection of split binaries, where the
previous logic sometimes concluded that the first segments was not
split, in a split image. The unconditional calling of
scm_pas_mem_setup() turns out to cause a regression and is reverted.

The altmode subfunction of pmic_glink is enabled for SM8450.

A new driver for exposing power statistics from the RPM, for debugging
purposes, is introduced.

OCMEM gets a debug prints of the hardware version, QMI helpers are
transitioned to alloc_ordered_workqueue() and an error message in
ramp_controller is improved.

An API is introduced to the SMEM driver to allow other drivers to query
the SoC id, rather than open-coding the parsing of the relevant SMEM
item. This is then used to clean up the Qualcomm NVMEM-based cpufreq
driver.

Socinfo is extended with knowledge about IPQ5018, IPQ5312 and IPQ5302.

* tag 'qcom-drivers-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (23 commits)
  soc: qcom: ocmem: Add OCMEM hardware version print
  cpufreq: qcom-nvmem: use helper to get SMEM SoC ID
  cpufreq: qcom-nvmem: use SoC ID-s from bindings
  soc: qcom: smem: introduce qcom_smem_get_soc_id()
  soc: qcom: smem: Switch to EXPORT_SYMBOL_GPL()
  soc: qcom: socinfo: move SMEM item struct and defines to a header
  soc: qcom: mdt_loader: Fix unconditional call to scm_pas_mem_setup
  MAINTAINERS: Add Konrad Dybcio as linux-arm-msm co-maintainer
  dt-bindings: sram: qcom,imem: Document MSM8226
  soc: qcom: socinfo: Add Soc ID for IPQ5312 and IPQ5302
  dt-bindings: arm: qcom,ids: add SoC ID for IPQ5312 and IPQ5302
  soc: qcom: socinfo: Add IDs for IPQ5018 family
  dt-bindings: arm: qcom,ids: Add IDs for IPQ5018 family
  soc: qcom: Introduce RPM master stats driver
  dt-bindings: soc: qcom: Add RPM Master stats
  soc: qcom: qmi: Use alloc_ordered_workqueue() to create ordered workqueues
  soc: qcom: ramp_controller: Improve error message for failure in .remove()
  dt-bindings: soc: qcom: smd-rpm: allow MSM8226 over SMD
  soc: qcom: rpmpd: use correct __le32 type
  dt-bindings: soc: qcom: eud: Fix compatible string in the example
  ...

Link: https://lore.kernel.org/r/20230611010044.2481875-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-21 21:58:32 +02:00
Greg Kroah-Hartman
92852219a3 interconnect changes for 6.5
This pull request contains the interconnect changes for the 6.5-rc1 merge
 window which is a mix of core and driver changes with the following highlights:
 
 - Support for configuring QoS on the Qualcomm's RPM-based platforms, that
   required special handling of some interface (non-scaling) clocks.
 - Support for clock-based interconnect providers for cases when clock
   corresponds to bus bandwidth. This is used to enable CPU cluster bandwidth
   scaling on MSM8996 platforms. One patch is touching a file in the clock
   subsystem that has been acked by the maintainer.
 
 Core changes:
 	interconnect: add clk-based icc provider support
 	interconnect: icc-clk: fix modular build
 	interconnect: drop unused icc_get() interface
 
 Driver changes:
 	interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks
 	interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks
 	interconnect: qcom: rpm: Drop unused parameters
 	interconnect: qcom: rpm: Set QoS registers only once
 	interconnect: qcom: rpm: Handle interface clocks
 	interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks
 	interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore
 	interconnect: qcom: msm8996: Promote to core_initcall
 	interconnect: qcom: rpm: allocate enough data in probe()
 	dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF
 	clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq
 	dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes
 
 Signed-off-by: Georgi Djakov <djakov@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJkkyQsAAoJEIDQzArG2BZj7GQQAMLrW2sZcxJhq5Fe2wKV4W5M
 ItIE7xME1Vk9PvuulZIJ57tZIKfOTJpXwwbh6qWJOejYGePrmgtT89iS0fadO81f
 yCKv2O2hD+Xukv+gFzyuX3AYEfur7myaCTfmRx93xVDYUz0d95Kj4BlYA84xkjXU
 i+wte+nX/nw9W78s+Y9BHcs389a3HTre0WR1c0eOboPmt8D0U9cBOdiZMHkSUc+4
 /8RDUYRdsTBR0AblpPExm2JjoSRKUGEw7N8ZFZhOXaejCjmGoeVXeTdnHO+tjXaq
 HQ9290C9Pz0BZWdKXaFFfjc4Wqu3RYjdXJmHNo74a4sFHE+H/j33eRSgC24qMWg5
 5hRsH8+gv0ZhoyLv6Ucd2MRQQvvUYCLNNeTlQ2/RkOFuqewLKqpXCiihbuKUpOi0
 CLeWKTDjNlIM5murJURXX88+xjZ1UvpuBXe/U+i9jrhjSQ6IjnAppoDw7anrrxTE
 ldLGFPzJoWL8VO1H0povS08/kd25+fgkjL/3pZHagSMLjDWNOXA+xDLkRYGBCNi7
 rZpLT/4nBFTcrcYEsJ2EPAqHYK19kD76NVrz+Fj2gzF9Ych3q+2MSkLb132Qkyzf
 qLn3SqWJQoPAhy0kQbOt3XBnYon8QjVEpcZIWf9J3Qr2au4SdHi7hr3ki86a5Pfz
 ne03bJDC237hO6q4jY0b
 =Smk9
 -----END PGP SIGNATURE-----

Merge tag 'icc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next

Georgi writes:

interconnect changes for 6.5

This pull request contains the interconnect changes for the 6.5-rc1 merge
window which is a mix of core and driver changes with the following highlights:

- Support for configuring QoS on the Qualcomm's RPM-based platforms, that
  required special handling of some interface (non-scaling) clocks.
- Support for clock-based interconnect providers for cases when clock
  corresponds to bus bandwidth. This is used to enable CPU cluster bandwidth
  scaling on MSM8996 platforms. One patch is touching a file in the clock
  subsystem that has been acked by the maintainer.

Core changes:
	interconnect: add clk-based icc provider support
	interconnect: icc-clk: fix modular build
	interconnect: drop unused icc_get() interface

Driver changes:
	interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks
	interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks
	interconnect: qcom: rpm: Drop unused parameters
	interconnect: qcom: rpm: Set QoS registers only once
	interconnect: qcom: rpm: Handle interface clocks
	interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks
	interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore
	interconnect: qcom: msm8996: Promote to core_initcall
	interconnect: qcom: rpm: allocate enough data in probe()
	dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF
	clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq
	dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes

Signed-off-by: Georgi Djakov <djakov@kernel.org>

* tag 'icc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes
  interconnect: icc-clk: fix modular build
  clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq
  interconnect: drop unused icc_get() interface
  interconnect: qcom: rpm: allocate enough data in probe()
  interconnect: qcom: msm8996: Promote to core_initcall
  interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore
  interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks
  interconnect: qcom: rpm: Handle interface clocks
  interconnect: add clk-based icc provider support
  dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF
  interconnect: qcom: rpm: Set QoS registers only once
  interconnect: qcom: rpm: Drop unused parameters
  interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks
  interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks
2023-06-21 21:12:43 +02:00
Arnd Bergmann
055fdcac93 More Qualcomm ARM64 DTS changes for v6.5
This introduces support for the Qualcomm SDX75 platform, with the IDP
 reference board. On IPQ5332 the RDP474 board is added and on IPQ9574 the
 RDP454 is introduced.
 On SC8280XP, and hence Lenovo ThinkPad X13s, GPU support is added.
 
 For QDU1000, SDM845, SM670, SC8180X, SM6350 and SM8550 the RSC is added
 to the CPU cluster power-domain to flush sleep & wake votes as the
 cluster goes down.
 
 On IPQ5332 additional reserved-memory regions to improve post mortem
 debugging. UART1 is added. The MI01.2 board is renamed RDP441 and the
 RDP474 is added.
 
 On IPQ8074 critical thermal trip points are defined.
 
 As with IPQ5332 additional reserved-memory regions are used to improve
 post mortem debugging. Thermal sensors (tsens) are added and zones
 defined. The crypto engine is added, and support for the RDP454 board is
 added.
 
 Across MSM8916 and MSM8939 pinctrl state definitions are cleaned up and
 the purpose of msm8939-pm8916 is documented. MSM8939 has regulator
 definitions cleaned up, following to the previous effort on MSM8916.
 
 CPU Bus Fabric scaling support is added to MSM8996 Pro.
 
 On QCM2290 CPU idle states are added.
 
 For QDU1000 SDHCI is introduced and enabled on the IDP to gain eMMC
 support. IMEM and PIL information regions are defined for improved post
 mortem debugging.
 
 The Qualcomm Robotics RB2 kit gets its on-board buttons described.
 
 A few fixes are introduced for the newly merged SC8180X, in particluar
 the DisplayPort blocks are moved to the MMCX power domain to avoid power
 being reduced prematurely during boot.
 
 The SC8280XP GPU is added and enabled for the Lenovo Thinkpad X13s,
 and resets for the soundwire controllers are added. The OUI is
 specified for ethernet phys on SA8540P Ride platform, to avoid reset
 issues.
 
 Charger description is added to the PMI8998 PMIC and enabled across
 OnePlus 6/6T, SHIFT SHIFT6mq and Xiaomi Pocophone F1.
 
 On SM6350 CPU idle states and UART1 are added. And SM6375 gains GPU
 clock controller and IOMMU definitions.
 
 The Fairphone FP4 gains Bluetooth support.
 
 SM8150 is transitioned to use 2 interconnect-cells, and the USB
 interconnect path is described to ensure buses are adequately voted for.
 
 The same changes are done for SM8250, and the resolution of the
 static framebuffer on Sony Xperia 1 II and 5 II are corrected.
 
 The USB bus paths are also added to SM8350, SM8450 and SM8550.
 
 On SM8550 DisplayPort nodes are added, as is the PWM controller for
 driving the notification LED and the RTC is enabled. For the MTP and QRD
 boards, the soundcard and audio codecs are defined.
 
 A Tegra change, related to LP855X binding changes, was accidentally
 picked up and dropped again later.
 
 A number of DeviceTree fixes identified through validation was
 introduced as well. Additionally a few nodes got their default status
 changed to avoid unnecessarily having to enable them (e.g. the mdp/dpu
 node).
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSLOjsVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FlyUP/0PZFIRutqnwwr/daOZAhDgw6pQW
 jseUFIUb9yKan8KJZcHOf38xxqfj/bllQQNIQeM8qw03e7LJf/Mcteg3FYNgxD9m
 vAWdQby2ZBcAYy3Qxjc3H+cb2fPV8yEJZ4JX/yOuLPfx9zE8HMoT8M9JBHZlZc8T
 0fzgVxqRz1wt5Qjzv+BsWg4GUiTARtRbYxDVzdFZFDF6f7Xcpdsq+HaImJdYisXh
 m/2lQ34rDBTVOMN6Og5U7lGjfCyk6hn3k0OoSpObLRBNV34JH6ViDVhmNbFWKNNS
 QGFDAEa+jjQDrEo2cUHiHfnlKzcQpheLoco7MNkzDwy/8Rd3/k3ndj/+oCpgGea5
 VFTb0LygJPQnHfggzpxc+v2pBfoocEUvKrI+sluXeNnLua+jvlLz6Z8Wm6mVaBZv
 hzw4NqaXHRtzqgjo/37t7Hwns+uyd+rg/gjh8xfdu65/kVZiTstK1BGVCoKMs1LD
 J0UcQGaevfBH9+EYNcKly5qjEMhsUxwn4i7oyjerdQ7Wt4nwzPqfs7zv513Ns5bO
 eLG49FsCZjzvAn4AC3R1POPVrP2RBg/zeBzL/34gkgBLr/TR1k1zyPWxovb6Tuq9
 8R3T4XBA1kwh1c7R5av1033dyvW4N8y6vp9z+kExuPz4qQ+SsWKoXAeM2budkTQ/
 c3oBU6U+BH9oCvSV
 =Fga/
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEgoACgkQYKtH/8kJ
 UifYRg//Uu6CMkGFJCfMVNS8Z0lykAW3FtEupzi+lWVP+2i+QsR8FXTZ3EumyBA6
 QoRX1FtEKtRdJatMUgWlCbv8newKiII9fwKrV/EK7u/CTC79zX9ak3DonxXu7Z2i
 a6dzH5GVnHfVe7BTQdJuOylxKneMNNECmnkYYUWry1LES1zLhUZy67GsdbDSCxpF
 evzT8ly6NLSSJOJKXlcmwzcGMXhi7HrCdvsZhPdJZ1cN8c/tfrj+S8kmHxs5Qw3B
 TOjFi14w2CA/duvwQLV+0KIuHc/Vn8oYI0NnD96aahlZA+QFMk1hsdeETtXL6guf
 S4FKB+PNVtFnMCMq25xsTOaqEKjse8+xBgTN9TAvB67TJUQ3J2zibn1jjaGjtej7
 w2ry8FC/pgSFbs9KftAL7mDFCICo7qyOhpfuuG+s+ti1m7h5Fon2a+UKc0T0m80w
 qR1YXohi6rzXTlcV92m2CRZIvSBPf1UQAnFqyjZBIvePpD8/TqYs2M+IIM0dmaBC
 Xs+n+3ORIte7hws5BodXaWwsi0NTFm8rQaeK94Cj100kWMxrKZS5JIIdZ/Dy0rRk
 LXWKj1W4h6rrwM34r5oeyc0k9pYoc7coDItEqu8VyKz7pj9rjcG8B+lqdp6QjNK+
 +gNnVF4UmEbRpG6EZm9uC9IshiIQp/8DhO/lRZMb37v1YEB6/mg=
 =ThxV
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

More Qualcomm ARM64 DTS changes for v6.5

This introduces support for the Qualcomm SDX75 platform, with the IDP
reference board. On IPQ5332 the RDP474 board is added and on IPQ9574 the
RDP454 is introduced.
On SC8280XP, and hence Lenovo ThinkPad X13s, GPU support is added.

For QDU1000, SDM845, SM670, SC8180X, SM6350 and SM8550 the RSC is added
to the CPU cluster power-domain to flush sleep & wake votes as the
cluster goes down.

On IPQ5332 additional reserved-memory regions to improve post mortem
debugging. UART1 is added. The MI01.2 board is renamed RDP441 and the
RDP474 is added.

On IPQ8074 critical thermal trip points are defined.

As with IPQ5332 additional reserved-memory regions are used to improve
post mortem debugging. Thermal sensors (tsens) are added and zones
defined. The crypto engine is added, and support for the RDP454 board is
added.

Across MSM8916 and MSM8939 pinctrl state definitions are cleaned up and
the purpose of msm8939-pm8916 is documented. MSM8939 has regulator
definitions cleaned up, following to the previous effort on MSM8916.

CPU Bus Fabric scaling support is added to MSM8996 Pro.

On QCM2290 CPU idle states are added.

For QDU1000 SDHCI is introduced and enabled on the IDP to gain eMMC
support. IMEM and PIL information regions are defined for improved post
mortem debugging.

The Qualcomm Robotics RB2 kit gets its on-board buttons described.

A few fixes are introduced for the newly merged SC8180X, in particluar
the DisplayPort blocks are moved to the MMCX power domain to avoid power
being reduced prematurely during boot.

The SC8280XP GPU is added and enabled for the Lenovo Thinkpad X13s,
and resets for the soundwire controllers are added. The OUI is
specified for ethernet phys on SA8540P Ride platform, to avoid reset
issues.

Charger description is added to the PMI8998 PMIC and enabled across
OnePlus 6/6T, SHIFT SHIFT6mq and Xiaomi Pocophone F1.

On SM6350 CPU idle states and UART1 are added. And SM6375 gains GPU
clock controller and IOMMU definitions.

The Fairphone FP4 gains Bluetooth support.

SM8150 is transitioned to use 2 interconnect-cells, and the USB
interconnect path is described to ensure buses are adequately voted for.

The same changes are done for SM8250, and the resolution of the
static framebuffer on Sony Xperia 1 II and 5 II are corrected.

The USB bus paths are also added to SM8350, SM8450 and SM8550.

On SM8550 DisplayPort nodes are added, as is the PWM controller for
driving the notification LED and the RTC is enabled. For the MTP and QRD
boards, the soundcard and audio codecs are defined.

A Tegra change, related to LP855X binding changes, was accidentally
picked up and dropped again later.

A number of DeviceTree fixes identified through validation was
introduced as well. Additionally a few nodes got their default status
changed to avoid unnecessarily having to enable them (e.g. the mdp/dpu
node).

* tag 'qcom-arm64-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (94 commits)
  Revert "arm64: dts: adapt to LP855X bindings changes"
  arm64: dts: qcom: sc8280xp: Enable GPU related nodes
  arm64: dts: qcom: sc8280xp: Add GPU related nodes
  arm64: dts: qcom: msm8939-pm8916: Mark always-on regulators
  arm64: dts: qcom: msm8939: Define regulator constraints next to usage
  arm64: dts: qcom: msm8939-pm8916: Clarify purpose
  arm64: dts: qcom: msm8939: Fix regulator constraints
  arm64: dts: qcom: msm8939-sony-tulip: Allow disabling pm8916_l6
  arm64: dts: qcom: msm8939-sony-tulip: Fix l10-l12 regulator voltages
  arm64: dts: qcom: msm8939: Disable lpass_codec by default
  arm64: dts: qcom: msm8939-pm8916: Add missing pm8916_codec supplies
  arm64: dts: qcom: qrb4210-rb2: Enable on-board buttons
  arm64: dts: qcom: msm8916: Drop msm8916-pins.dtsi
  arm64: dts: qcom: msm8916/39: Rename wcnss pinctrl
  arm64: dts: qcom: msm8916/39: Cleanup audio pinctrl
  arm64: dts: qcom: apq8016-sbc: Drop unneeded MCLK pinctrl
  arm64: dts: qcom: msm8916/39: Consolidate SDC pinctrl
  arm64: dts: qcom: msm8916/39: Fix SD card detect pinctrl
  arm64: dts: qcom: msm8996: rename labels for HDMI nodes
  arm64: dts: qcom: sm8250: rename labels for DSI nodes
  ...

Link: https://lore.kernel.org/r/20230615162043.1461624-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-20 22:54:34 +02:00
Arnd Bergmann
60c2f542a7 Qualcomm ARM64 DeviceTree updates for v6.5
This introduces the RDP442 and RDP433 reference devices on IPQ5332 and
 IPQ9574, respectively. RDP418, RDP433, RDP449 and RDP453 on the IPQ9574
 are added. On MSM8939 the Square T2 board and the Sony Xperia M4 Aqua is
 added. Support for Acer Apire 1, built on the Snapdragon 7c platform is
 introduced. Fxtec Pro1X on SM6115 is added.  Lastly long floating
 support for SC8180X and the Lenovo Flex 5G, and the Primus reference
 device, has been added.
 
 On IPQ5332 and IPQ6018 QFPROM support is introduced, and as described
 above the RDP442 board on the prior. Download mode support and various
 reserved-memory regions are also introduced on IPQ6018.
 IPQ8074 gains another SPI controller.
 
 On IPQ9574 CPU frequency scaling, low speed busses, RNG, Watchdog,
 qfprom, SMEM and RPM are introduced. As are support for four new board,
 mentioned above.
 
 MSM8916 gains a range of structural improvements, to better suite the
 various boards supported. Regulator constraints are corrected and their
 states are adjusted to match reality (e.g. always-on regulators marked
 as always-on). BQ Aquaris X5 gains support for front flash LED.
 
 As mentioned above, MSM8939 support is introduced with support for
 boards from Sony and Square.
 
 MSM8953 gains DMA support in I2C masters.
 
 MSM8996-based Sony Xperia boards gains description of their RGB
 notification LED.
 
 On SA8775P support for UFS, USB, GPU clock and iommu controllers, PMU,
 AOSS, watchdog and missing low-speed controllers are added. On the Ride
 platform UFS, USB and an i2c bus are enabled.
 
 iommu properties are added to QSPI on both SC7180 and SC7280. LPASS
 clocks are adjusted and MDP node cleaned up slightly, on SC7180. As
 mentioned above, support for Acer Aspire 1 is introduced.
 
 Long lingering patches introducing SC8180X, the Lenovo Flex 5G and the
 Primus reference device has been merged.
 
 On SC8280XP ethernet is added and enabled on the automotive ride
 platform. An SDC controller is introduced and enabled on the SC8280XP
 CRD. On the Lenovo Thinkpad X13s and the CRD reference device the USB
 SuperSpeed phy is added to the Type-C graph, to enable support for
 orientation switching.
 
 Fairphone 3 gains support for its notification LED.
 
 On SDM845 the iommu stream for QSPI is defined, SHIFT SHIFT6mq gains
 support for flash LED and the RB3 (DB845c) board gains support for
 bonded/dual DSI-mode, to allow 4k output.
 
 On SM6115 CPU idle-states, crypto engine support and SuperSpeed USB PHY
 are introduced. As mentioned above Fxtec Pro1X is introduced. On the
 QRB4210 Robotics Platform RB2 USB, Audio and Compute DSPs, display,
 CAN-bus and GPIO LEDs are introduced, fixed regulators are described and
 the SD-card description is corrected.
 
 Support for crypto engine is added to SM8150, while Sony Xperia 1 and 5
 gains SD-card support, camera regulators and GPIO line names sorted out.
 
 SM8250 also gets support for crypto engine, and Sony Xperia 1 II and 5
 II gains support for hardware video accelerator.
 
 Crypto engine is introduced for SM8350 as well. The HDK gets the USB
 Type-C graph described for Superspeed orientation switching and
 DisplayPort output.
 
 On SM8450 video clock controller and crypto engine are added, missing
 opp levels are introduced and the USB Type-C graph is defined for
 orientation switching and altmode.
 
 SM8550 gains GPU and video clock controllers and missing opp levels are
 added. The WCD9385 audio codec is added for the SM8550 MTP and on the
 QRD PCIe, USB, audio display and flash LED are added.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSFGfkVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FeKoP/RFCA0hnqP0TGgzQq7TV1//WbVuZ
 5fxpWhSKYeb6e+oOJZdu/Xi7VwSWesZwQQkMRaEOXUpMGhtWBfLQEHc6FQiAzGkv
 h3GrOLQ1qqmfYEqDxYv4CgKjpO+w5Zx2uNOZkbRDRumT0EQ45T0hypYmRefBPq8s
 bOxNmRgY6goNZalZBb0HWvdZtfYB1tlrjVn5+rpEZb031KGhCSOH8SWx8wUdUHrj
 7EYR4EeQQsJZETiinU3F8l69eNUBwAi8TAW350A3nJj+FPZqwVhIhQKCR/bCZqXC
 U9vwcaqgYKi8rY5FR+bwJsiX4hY8W9bjq7pzrJyNvXsLtIeJ3jRnbF8z4SvNitOF
 UMOkQ9f6WrToRNSrwFhLB/ipV/TbnnE/MNzIxCwQ5W1BRYn7Tri1Ws61I/Kl1/ML
 eOWl6CSWzNW5lfkHumdOzydd4T43ECqqgNLEBTCpNRo7d/4XN/TCUK4tWJqb+4ou
 1aOG6/ujy6uhlocd0mZ1xPMDBrFNCrC4/BRj2hCmbuBE3Qs/AHHrF5LLMTkZBKHd
 Mip2gUKwqi2p4l0/KJxSSj0snrifUqU5V1QCchwcMFmt62mrfRU2u7Xoy9s7vlyP
 pbQEF/Pu91Yr5nUiBQEU77L5a9tTm0eI1iFl8GwBzZP7R46ahnAu3BQc/MXaPax/
 Z9hrTrB9y610Iuzy
 =OvdD
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSD3wACgkQYKtH/8kJ
 UidMjQ//YH19+b3UZ3O4r3sIoGTNB1rajNHCX72wwzQAdaHSMOTOUdkXradtstyp
 EPNyChMERvBGq2i16B0mEk9IiQ4y4CVwR9l3FZcaasV25RhfcGX3K1Wqxuepc1Hu
 OELo8W9Ih7rSg7paNj6YfJq1ka+AldZWPvtQG000czq59ZnUn7JvEeW7hd5BOdCJ
 O5RloIxHhLIOSyyc+sK0d3hXLjcZ8Od0Pnu/QYMzslmtc7YLaRgs0F5pxwz51k/P
 Uc+eOscCGcSHilmW7IE/IlevElg0GssyRn/BZ5121tMMKEYjEeR0EUy7I8zPaG45
 osKJQ5R7NBd2h185ZXprskd9drvQ8uwv8kxRs5GFF+cK+3PE3TtoipmBycEQROcH
 7WkQg7ffiPXT7Na+yTWqUXwnwzr/nhir7HTVx7VgBqmdUIzJKdqAbVLw/PTm0B6M
 QXUZfIS8gZFLePYwzkYqhYcTgtT6ZfEY5aN2/vpI0xyZsU0Z6nbFzPxlI+4rlDXm
 eZ7nD42RzifEqJUm7yKwGPkyY1U8rbwh4kNdaxZPk4ouB1puEYbF+Neo95MKlpRY
 ODEz0u6oVvJ2Ddg/RxFDtwB3hUXupc2qZcE92Smq4Two9wjgTkuSb3A3+8CEjXqH
 VFhBY65NxnwVEaabxE4wK9+wnLUnswza988BkkY7YrI+G8EZJL4=
 =jxMR
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM64 DeviceTree updates for v6.5

This introduces the RDP442 and RDP433 reference devices on IPQ5332 and
IPQ9574, respectively. RDP418, RDP433, RDP449 and RDP453 on the IPQ9574
are added. On MSM8939 the Square T2 board and the Sony Xperia M4 Aqua is
added. Support for Acer Apire 1, built on the Snapdragon 7c platform is
introduced. Fxtec Pro1X on SM6115 is added.  Lastly long floating
support for SC8180X and the Lenovo Flex 5G, and the Primus reference
device, has been added.

On IPQ5332 and IPQ6018 QFPROM support is introduced, and as described
above the RDP442 board on the prior. Download mode support and various
reserved-memory regions are also introduced on IPQ6018.
IPQ8074 gains another SPI controller.

On IPQ9574 CPU frequency scaling, low speed busses, RNG, Watchdog,
qfprom, SMEM and RPM are introduced. As are support for four new board,
mentioned above.

MSM8916 gains a range of structural improvements, to better suite the
various boards supported. Regulator constraints are corrected and their
states are adjusted to match reality (e.g. always-on regulators marked
as always-on). BQ Aquaris X5 gains support for front flash LED.

As mentioned above, MSM8939 support is introduced with support for
boards from Sony and Square.

MSM8953 gains DMA support in I2C masters.

MSM8996-based Sony Xperia boards gains description of their RGB
notification LED.

On SA8775P support for UFS, USB, GPU clock and iommu controllers, PMU,
AOSS, watchdog and missing low-speed controllers are added. On the Ride
platform UFS, USB and an i2c bus are enabled.

iommu properties are added to QSPI on both SC7180 and SC7280. LPASS
clocks are adjusted and MDP node cleaned up slightly, on SC7180. As
mentioned above, support for Acer Aspire 1 is introduced.

Long lingering patches introducing SC8180X, the Lenovo Flex 5G and the
Primus reference device has been merged.

On SC8280XP ethernet is added and enabled on the automotive ride
platform. An SDC controller is introduced and enabled on the SC8280XP
CRD. On the Lenovo Thinkpad X13s and the CRD reference device the USB
SuperSpeed phy is added to the Type-C graph, to enable support for
orientation switching.

Fairphone 3 gains support for its notification LED.

On SDM845 the iommu stream for QSPI is defined, SHIFT SHIFT6mq gains
support for flash LED and the RB3 (DB845c) board gains support for
bonded/dual DSI-mode, to allow 4k output.

On SM6115 CPU idle-states, crypto engine support and SuperSpeed USB PHY
are introduced. As mentioned above Fxtec Pro1X is introduced. On the
QRB4210 Robotics Platform RB2 USB, Audio and Compute DSPs, display,
CAN-bus and GPIO LEDs are introduced, fixed regulators are described and
the SD-card description is corrected.

Support for crypto engine is added to SM8150, while Sony Xperia 1 and 5
gains SD-card support, camera regulators and GPIO line names sorted out.

SM8250 also gets support for crypto engine, and Sony Xperia 1 II and 5
II gains support for hardware video accelerator.

Crypto engine is introduced for SM8350 as well. The HDK gets the USB
Type-C graph described for Superspeed orientation switching and
DisplayPort output.

On SM8450 video clock controller and crypto engine are added, missing
opp levels are introduced and the USB Type-C graph is defined for
orientation switching and altmode.

SM8550 gains GPU and video clock controllers and missing opp levels are
added. The WCD9385 audio codec is added for the SM8550 MTP and on the
QRD PCIe, USB, audio display and flash LED are added.

* tag 'qcom-arm64-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (195 commits)
  arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G
  arm64: dts: qcom: sc8180x: Introduce Primus
  arm64: dts: qcom: sc8180x: Add pmics
  arm64: dts: qcom: sc8180x: Add display and gpu nodes
  arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes
  arm64: dts: qcom: sc8180x: Add PCIe instances
  arm64: dts: qcom: sc8180x: Add QUPs
  arm64: dts: qcom: sc8180x: Add thermal zones
  arm64: dts: qcom: sc8180x: Add interconnects and lmh
  arm64: dts: qcom: Introduce the SC8180x platform
  arm64: dts: qcom: msm8916: Move aliases to boards
  arm64: dts: qcom: pm8916: Rename &wcd_codec -> &pm8916_codec
  arm64: dts: qcom: msm8916/39: Clean up MDSS labels
  arm64: dts: qcom: msm8916/39: Use consistent name for I2C/SPI pinctrl
  arm64: dts: qcom: msm8916/39: Rename &blsp1_uartN -> &blsp_uartN
  arm64: dts: qcom: msm8916: Rename &msmgpio -> &tlmm
  arm64: dts: qcom: qrb4210-rb2: Enable USB node
  arm64: dts: qcom: sm6115: Add USB SS qmp phy node
  arm64: dts: qcom: ipq5332: add support for the RDP442 variant
  dt-bindings: arm: qcom: document MI01.3 board based on IPQ5332 family
  ...

Link: https://lore.kernel.org/r/20230611004944.2481596-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-20 22:43:40 +02:00
Arnd Bergmann
a9c7f8d0cf arm64: tegra: Device tree changes for v6.5-rc1
This introduces support for the IGX Orin and Jetson Orin Nano devices
 and enables various additional features on the Jetson AGX Orin and
 Jetson Orin NX. This also enables some basic thermal support to prevent
 the devices from overheating.
 
 Support for the GPU on the Google Pixel C is enabled and various minor
 issues are fixed and cleaned up.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmSDSOsTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zobIYEACmgNyMW0vHcRRQcLo9RTqfOB0Pncy3
 BmZBU4MeebkxFsVFDMfWUyHrkptBporGkUyAWJw2RBORvrCbLj1OhW1y8V0GRl4s
 SIke/oC1834PKk5a6jmaauOYfFiHCyXzrwGnWFIYzIX+7Xn9tDsXjcJQWn1ngmJr
 xrKxp/Mp/3dsgZDaJEPhHAn9rWuGDrBMLhVK0uTAjh9Rx7cy7KE3qMVzBzp2R3Mg
 VK8vay6F2pJ3LkdozNX/Q56j77mfX7GFRPITulWblRLVRstW7g0qwrZd/jcQS74h
 2wpbJ5FdS/0pX9LBN2tgUuDtGxwXHvUl0/D4P7QyuOLpmK9CMt+mM8N7JwjErJn1
 A7A6BF6F18r+pQaqzfUaZcayrVqfwgDrFgIOOBNpvcvsCc1W6vnf0LSQOkCORY+K
 YNnCZvA81R4j0MuC8Q4j9hsdp2K0Ykdk32usAnSAM4E/pZhlwPcAFJm+EZ6Swd2Z
 eshCHVPXbIr3GJsUGhzm3bscjpD5sad500eWQrBGWRSioBEwCF+I+IXd5+v/7Xc+
 vp3NUyj4bJCCmV5OmnuaAZQMVpC3x7pXaQHCakZ9gLbGoUhf9qcS+lFWPM82tYXA
 kLn42PS9YjLCyigKdGYBiwXv3t2qQ7pm3U5WnMUY9vx6snPCa7MKIiTBQ3H9b0z3
 9tYmXmZBus1+Gg==
 =HPjl
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSDWcACgkQYKtH/8kJ
 UicmYg//bu3NoTNoQrez14Q0giWmFwRAT4YOXGUVGDY8Uac+lcc077x5Z/y3b6Ho
 vmczi94COl6c14WA0wSHbl+lINAV8LkQimJPMm7kpsYObGCHfwEM3k33fz5aJW8Q
 0e1MI0r5e/9pcFpuw58sqNjNnRN1aJLgVfJshSUUtA1QrcOlT1E1dm7kzpi66Rvz
 A61l8YLWMdwvfDxLz/jWi8r9LxcPtWchLPTiNw11CwLUvWspRQXTfERwpkFbLiu1
 tBFAg6vfMWTqt08e3VhW+SeVwUq0eVuOUvS0oUI+rvIfDL1c9xUAVN+PstC8XlbB
 3kv6RoB/e3OqeRKsxEzozgz/biV201wbGmkqLo2WtUN1a8PdqKbeMSRv3yvDhU5e
 dxeCFsMk9lPw2R0QjDPYIB6P9EEWHKwhj7n+NIKtNTd+aE91eD1QlrHsC8ZLUIuA
 6cJxAhwwdjXHGt6o7eT6nHMrJw1uBVqXc9zgAdDHCWtTc3kAUmD10dhrxV8EK6Ia
 f7UVonOQh6Y1OXeEN5iRXPOCaCF6XdNU/B/VB3FhE+tiWy6lm04seTz1s19vnNtk
 DIIE4oOfl5jef+pZM97ARCRZzmqG3Tu7W7GHalQFfj0oaQ5MVusmYVuoIznydbe9
 ul+W8LyRXRWa0isZDaSQCAp1pPHMSnhDaa6HfK1Tnsx2G9XCDOo=
 =jIxj
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-6.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

arm64: tegra: Device tree changes for v6.5-rc1

This introduces support for the IGX Orin and Jetson Orin Nano devices
and enables various additional features on the Jetson AGX Orin and
Jetson Orin NX. This also enables some basic thermal support to prevent
the devices from overheating.

Support for the GPU on the Google Pixel C is enabled and various minor
issues are fixed and cleaned up.

* tag 'tegra-for-6.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Enable thermal support on Jetson Orin Nano
  arm64: tegra: Enable thermal support on Jetson Orin NX
  arm64: tegra: Enable thermal support on Jetson AGX Orin
  arm64: tegra: Add Tegra234 thermal support
  arm64: tegra: Add a few blank lines for better readability
  arm64: tegra: Sort properties more logically
  arm64: tegra: Enable GPU on Smaug
  arm64: tegra: Add GPU power rail regulator on Smaug
  arm64: tegra: Update USB phy-name for Jetson Orin NX
  arm64: tegra: Enable USB device for Jetson AGX Orin
  arm64: tegra: Add Tegra234 pin controllers
  arm64: tegra: Support Jetson Orin Nano Developer Kit
  arm64: tegra: Add missing cache properties on Tegra210
  arm64: tegra: Fix PCIe regulator for Orin Jetson AGX
  arm64: tegra: Add CPU OPP tables and interconnects property
  arm64: tegra: Add support for IGX Orin

Link: https://lore.kernel.org/r/20230609193620.2275240-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-20 22:34:47 +02:00
Arnd Bergmann
868a11b602 STM32 STM32MP25 for v6.5, round 1
Highlights:
 ----------
 
 STM32MP25 family is composed of 4 SoCs defined as following:
 
   -STM32MP251: common part composed of 1*Cortex-A35,
    common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
    parallel and DSI display, 1*ETH ...
 
   -STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
    CAN-FD and LVDS display.
 
   -STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
   -STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
 
   A second diversity layer exists for security features/A35 frequency:
   -STM32MP25xY, "Y" gives information:
     -Y = A means A35@1.2GHz + no cryp IP and no secure boot.
     -Y = C means A35@1.2GHz + cryp IP and secure boot.
     -Y = D means A35@1.5GHz + no cryp IP and no secure boot.
     -Y = F means A35@1.5GHz + cryp IP and secure boot.
 
 This PR adds the STM32MP257F EV1 board support. This board embeds a
 STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
 2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
 -----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmSG5+AdHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIUXEA/4mb17fH6BUDc1wGHb
 kl7XJh8s9A98Wbjlei+fgZ6VfDRU1KuEkna/TJ+8QwBadb450RSPxCozWyaT94kq
 EeVHw2pyQELBA7T4Cu/3OzyD2dQj/hELbWKlUT5UedMibguxYb+IyxMqOrw29Ghb
 t5G1cfJknkbXQDKrEVDynUHoRcDIb3vLXhvL3Z8ExSDBaaVdhrpXyJow4fRBUgtY
 gqEnVJHOVHsu5k+Ah2/2SaMUpxfQIUduxFMsk7pAFiZU+nRQI03Cn6EKADCIgmS0
 1LZVhjfO15Tm5X2bDN+gHqC+3ASZGZqe4KkUF5RfIN+2K1Jo8CMCoezHga0y03Lb
 EN6PEoHhriqNs/2azFLTQbua0RzkdJxXNNWAG5I+I0qim6hicTV9YCkkxIQlhNxu
 K67BdvBEJrDNBYlkk4DDaiGRuPFSoitwYMnZqCrvLGtxtTbjrMjppCCvdJPrCGBr
 aY/1hLePnnxdBvCFKODKkiAT48gPjZoEhLrbegIY2XMqseciX4o9JZbXmnMVdpqD
 2l1M2xsyVe5Jxv8JRfnr6GfUj0FVIgxB8tUII7OpXxTGZN9MaOt/92DKTbvLdvma
 MwIOIMKB5QYFytCNwjFMI2LJopfiFJNUKk2Yd+WNWGaEG1LmdhTSIIROQBMDM5Zg
 xTR+DvbdtbgyTSSsuBDGw1UWnA==
 =WkNC
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSC/wACgkQYKtH/8kJ
 UidpWhAAn9bQwdIJdetMmMiJuvFJIqPg48K9OmvEpEYCxAwVFuKTV+ddGDM2kLwB
 rinJ5R92FsCUBN54mPpfq75atuhZA8S3Od4N8jbjK7Geqq0MIUv6yaGYNyKJfDrx
 NO3+UzIpF17eqiXDTY4ZEdw+FfWJ1fr1rKN2DNyqIQDIibvOR8smuAE9suIdNsht
 0k0LOCk+PXRaNws6wIeXM71v42trb8S5UG02qQzet1qwsK7OXUc7xouTr6vQ7xMR
 H4NiuEL0XfkhsxsSLhbFSpWzRoVcKhhyZzibNu4l5npBvL0VZPyYrJOU7MAODy5D
 IWIS07/BNWrKx/XhCyz7w0ID2SsMGxAgGeOMx1eG3WT5953z5tWOqBgZGWrObQMO
 QR4F2h+f9InLblHEdLa+n1Nfm6SAgGEA+JnDDHSbuiH1t/g01wazxCAi6Awoxur6
 jv7iINiy2UauRs7/Fns0z1J0gag/8afxTYiEzBQSMdrE4zgaKKGtryoflUOXZe9W
 foXtU4+mRAExrZN/3gxYQyvvLxQF7vllCYtuzeUyJzpXuYwE5clpjjEn93txXtPr
 EjIS+fg3cgABaD26607ueGomQIdKxjWj/1tZSaut1yWs/zeuRjS15dT68IzzI0mK
 Qk1v6mLx+gdnOQv8mn5JfzOC8MTDBrAE53B6M+mI9nZrV3VhhhE=
 =fxHg
 -----END PGP SIGNATURE-----

Merge tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/newsoc

STM32 STM32MP25 for v6.5, round 1

Highlights:
----------

STM32MP25 family is composed of 4 SoCs defined as following:

  -STM32MP251: common part composed of 1*Cortex-A35,
   common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
   parallel and DSI display, 1*ETH ...

  -STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
   CAN-FD and LVDS display.

  -STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
  -STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).

  A second diversity layer exists for security features/A35 frequency:
  -STM32MP25xY, "Y" gives information:
    -Y = A means A35@1.2GHz + no cryp IP and no secure boot.
    -Y = C means A35@1.2GHz + cryp IP and secure boot.
    -Y = D means A35@1.5GHz + no cryp IP and no secure boot.
    -Y = F means A35@1.5GHz + cryp IP and secure boot.

This PR adds the STM32MP257F EV1 board support. This board embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...

* tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (44 commits)
  MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE
  arm64: defconfig: enable ARCH_STM32 and STM32 serial driver
  arm64: dts: st: add stm32mp257f-ev1 board support
  dt-bindings: stm32: document stm32mp257f-ev1 board
  arm64: dts: st: introduce stm32mp25 pinctrl files
  arm64: dts: st: introduce stm32mp25 SoCs family
  arm64: introduce STM32 family on Armv8 architecture
  dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon
  pinctrl: stm32: add stm32mp257 pinctrl support
  dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
  ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
  ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
  ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
  ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
  ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
  ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
  ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
  ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
  ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
  ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
  ...

Link: https://lore.kernel.org/r/080fc303-45c1-6cc0-4c5e-694e730896a6@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-20 22:28:44 +02:00
Dario Binacchi
8f3ef556f8 dt-bindings: mfd: stm32f7: Add binding definition for CAN3
Add binding definition for CAN3 peripheral.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20230423172528.1398158-2-dario.binacchi@amarulasolutions.com
Signed-off-by: Lee Jones <lee@kernel.org>
2023-06-15 09:19:37 +01:00
Patrick Delaunay
94ec3d8b20 dt-bindings: rcc: stm32: Sync with u-boot copy for STM32MP13 SoC
Minor cosmetic change, aligned with files in U-Boot:
- change obsolete SPDX id : GPL-2.0+ and use the same license
  GPL-2.0-only for the 2 files
- use correct mail address gabriel.fernandez@foss.st.com
- remove extra space

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20230510184305.v2.1.I417093ddcea282be479f10a37147d1935a9050b7@changeid
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-06-14 18:06:22 -07:00
Bjorn Andersson
004823da9b Merge branch '20230526161129.1454-2-quic_anusha@quicinc.com' into clk-for-6.5
Merge the DeviceTree binding updates for IPQ9574 GCC adding clocks and
resets related to Crypto Engine, through a topic branch in order to make
them available in the DeviceTree source tree as well.
2023-06-13 15:19:18 -07:00
Bjorn Andersson
e5d57e7c94 Merge branch '20230526161129.1454-2-quic_anusha@quicinc.com' into arm64-for-6.5
Merge IPQ9574 Crypto Engine-related DeviceTree bindings, to gain the
additional clock defines needed to add the related nodes.
2023-06-13 15:17:30 -07:00
Anusha Rao
35e237b3d5 dt-bindings: clock: Add crypto clock and reset definitions
Add crypto clock and reset ID definitions for ipq9574.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526161129.1454-2-quic_anusha@quicinc.com
2023-06-13 15:17:22 -07:00
Kathiravan T
b56715957b dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300
Add the SoC ID for IPQ5300, which belong to the family of IPQ5332 SoC.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230605080531.3879-2-quic_kathirav@quicinc.com
2023-06-13 14:22:46 -07:00
Bjorn Andersson
0832b1c9d0 Merge branch '20230608125315.11454-2-srinivas.kandagatla@linaro.org' into arm64-for-6.5
Merge the SC8280XP LPASSCC DeviceTree bindings in order to get access
to the newly added reset defines.
2023-06-13 11:12:02 -07:00
Srinivas Kandagatla
83da70da40 dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP
The LPASS (Low Power Audio Subsystem) Audio clock controller provides reset
support when it is under the control of Q6DSP.

Add support for those resets and adds IDs for clients to request the reset.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-3-srinivas.kandagatla@linaro.org
2023-06-13 11:11:27 -07:00
Srinivas Kandagatla
bfc43a9c0c dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP
The LPASS (Low Power Audio Subsystem) clock controller provides reset
support when it is under the control of Q6DSP.

Add support for those resets and adds IDs for clients to request the reset.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-2-srinivas.kandagatla@linaro.org
2023-06-13 11:11:27 -07:00
Bjorn Andersson
68017e6b1b Merge branch '20230512122347.1219-3-quic_tdas@quicinc.com' into arm64-for-6.5
Merge the SDX75 GCC DeviceTree binding, in order to get access to the
clock defines in the DeviceTree source.
2023-06-13 11:06:07 -07:00
Runyang Chen
2cf4ec5344 dt-bindings: reset: mt8188: add thermal reset control bit
To support reset of infra_ao, add the index of infra_ao reset of thermal
for MT8188.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230525075011.7032-2-runyang.chen@mediatek.com
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-06-12 18:21:01 -07:00
Thierry Reding
09d990782a arm64: tegra: Add Tegra234 thermal support
Add device tree node for the BPMP thermal node on Tegra234 and add
thermal zone definitions.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-09 17:44:26 +02:00
Nishanth Menon
32a2e6ab2c dt-bindings: pinctrl: Drop k3
For convenience (less code duplication), the pin controller pin
configuration register values were defined in the bindings header.
These are not some IDs or other abstraction layer but raw numbers used
in the registers.

These constants do not fit the purpose of bindings. They do not
provide any abstraction, any hardware and driver independent ID. In
fact, the Linux pinctrl-single driver actually do not use the bindings
header at all.

Commit f2de003e14 ("dt-bindings: pinctrl: k3: Deprecate header with
register constants") already moved users to the local header, so, drop
the binding header. See background discussion in [1].

While at it, clean up the MAINTAINERS file which is the only reference
left.

[1]: https://lore.kernel.org/linux-arm-kernel/71c7feff-4189-f12f-7353-bce41a61119d@linaro.org/

Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230601173831.982429-1-nm@ti.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 08:56:18 +02:00
Alexandre Torgue
a45645472f dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
Add support for st,stm32mp257-pinctrl and st,stm32mp257-z-pinctrl.
Add packages AI, AK and AL (values : 0x100, 0x400 and 0x800)

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-08 16:01:08 +02:00
Prathamesh Shete
12382ad051 dt-bindings: gpio: Remove FSI domain ports on Tegra234
Ports S, T, U and V are in a separate controller that is part of the FSI
domain. Remove their definitions from the MAIN controller definitions to
get rid of the confusion.

This technically breaks ABI compatibility with old device trees. However
it doesn't cause issues in practice. The GPIO pins impacted by this are
used for non-critical functionality.

Fixes: a8b10f3d12 ("dt-bindings: gpio: Add Tegra234 support")
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
[treding@nvidia.com: rewrite commit message]
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-06 14:38:58 +02:00
Jacky Huang
476650a64b dt-bindings: reset: nuvoton: Document ma35d1 reset control
Add the dt-bindings header for Nuvoton ma35d1, that gets shared
between the reset controller and reset references in the dts.
Add documentation to describe nuvoton ma35d1 reset driver.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-05 13:18:08 +02:00
Jacky Huang
2f8b5eb589 dt-bindings: clock: nuvoton: add binding for ma35d1 clock controller
Add the dt-bindings header for Nuvoton ma35d1, that gets shared
between the clock controller and clock references in the dts.
Add documentation to describe nuvoton ma35d1 clock driver.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-05 13:18:08 +02:00
Matt Ranostay
8258d997b8 dt-bindings: ti-serdes-mux: Add defines for J784S4 SoC
There are 4 lanes in the single instance of J784S4 SERDES. Each SERDES
lane mux can select up to 4 different IPs. Define all the possible
functions.

Signed-off-by: Matt Ranostay <mranostay@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/755a14f1-92ad-ce4b-3fde-2a4b0650475c@axentia.se
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-06-01 07:19:51 +01:00
Dmitry Rokosov
98872da6c6 dt-bindings: clock: meson: add A1 Peripherals clock controller bindings
Add documentation and dt bindings for the Amlogic A1 Peripherals clock
controller.
A1 PLL clock controller has references to A1 Peripherals clock
controller objects, so reflect them in the schema.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230523135351.19133-6-ddrokosov@sberdevices.ru
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-05-30 17:52:47 +02:00
Dmitry Rokosov
e6c6ddb397 dt-bindings: clock: meson: add A1 PLL clock controller bindings
Add the documentation and dt bindings for Amlogic A1 PLL clock
controller.
Also include new A1 clock controller dt bindings to MAINTAINERS.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20230523135351.19133-4-ddrokosov@sberdevices.ru
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-05-30 17:52:42 +02:00
Bjorn Andersson
8368050625 Merge branch 'sm8450-sm8550-gpucc-binding' into arm64-for-6.5
Introduce DeviceTree bindings for SM8450 and SM8550 GPU clock
controller, to introduce the constants necessary to referr to these
clocks.
2023-05-26 18:27:58 -07:00
Bjorn Andersson
6de1bd7405 Merge branch 'sm8450-sm8550-gpucc-binding' into clk-for-6.5
Bring GPUCC DeviceTree bindings for SM8450 and SM8550 in through a topic
branch to allow sharing it with the DeviceTree source tree as well.
2023-05-26 18:22:17 -07:00
Jagadeesh Kona
778af143ad dt-bindings: clock: qcom: Add SM8550 graphics clock controller
Add device tree bindings for the graphics clock controller on
Qualcomm SM8550 platform.

Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524181800.28717-2-quic_jkona@quicinc.com
2023-05-26 18:22:07 -07:00
Konrad Dybcio
63f4e4b6f5 dt-bindings: clock: Add Qcom SM8450 GPUCC
Add device tree bindings for the graphics clock controller on Qualcomm
Technology Inc's SM8450 SoCs.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-1-4f40e282af1d@linaro.org
2023-05-26 18:22:04 -07:00
Maarten Zanders
91e47d4083 dt-bindings: leds-lp55xx: Add ti,charge-pump-mode
Add a binding to configure the internal charge pump for lp55xx.

Signed-off-by: Maarten Zanders <maarten.zanders@mind.be>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230421075305.37597-2-maarten.zanders@mind.be
2023-05-25 12:16:03 +01:00
Bjorn Andersson
e23893dbc3 Merge branch '20230524140656.7076-2-quic_tdas@quicinc.com' into HEAD
Merge the SM8450 Video Clock Controller DeviceTree binding topic branch
in order to get access to the clock constants defined by the binding.
2023-05-24 21:50:07 -07:00
Bjorn Andersson
521302ca64 Merge branch '20230512122347.1219-3-quic_tdas@quicinc.com' into clk-for-6.5
Merge SDX75 Global Clock Controller DeviceTree binding through a topic
branch, to allow inclusion in DeviceTree source as well.
2023-05-24 21:47:17 -07:00
Bjorn Andersson
cc8d2cf5cd Merge branch '20230524140656.7076-2-quic_tdas@quicinc.com' into HEAD
Merge the SM8450 Video Clock Controller DeviceTree binding through a
topic branch, in order to be able to use the introduced constants in
changes on DeviceTree source branch as well.
2023-05-24 21:47:16 -07:00
Konrad Dybcio
2aae5eaa94 dt-bindings: clock: Add SM8350 VIDEOCC
SM8350, like most recent higher-end chips has a separate clock
controller block just for the Venus IP. Document it.

The binding was separated as the driver, unlike the earlier ones, doesn't
expect clock-names to keep it easier to maintain.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-1-86c714a66a81@linaro.org
2023-05-24 21:46:09 -07:00
Taniya Das
1e910b2ba0 dt-bindings: clock: qcom: Add SM8450 video clock controller
Add device tree bindings for the video clock controller on Qualcomm
SM8450 platform.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524140656.7076-2-quic_tdas@quicinc.com
2023-05-24 21:43:04 -07:00
Imran Shaik
1c305ea86b dt-bindings: clock: qcom: Add GCC clocks for SDX75
Add support for qcom global clock controller bindings for SDX75 platform.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230512122347.1219-3-quic_tdas@quicinc.com
2023-05-24 21:02:36 -07:00
Konrad Dybcio
672b584c68 dt-bindings: power: qcom,rpmpd: Add SA8155P
Add a compatible for SA8155P platforms and relevant defines to the
include file.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230411-topic-hanaau-v2-1-fd3d70844b31@linaro.org
2023-05-24 20:34:49 -07:00
Kathiravan T
fe78d73a91 dt-bindings: arm: qcom,ids: add SoC ID for IPQ5312 and IPQ5302
Add the SoC ID for IPQ5312 and IPQ5302, which belong to the family of
IPQ5332 SoC.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230509033531.21468-2-quic_kathirav@quicinc.com
2023-05-24 20:09:11 -07:00
Robert Marko
e5b03cd101 dt-bindings: arm: qcom,ids: Add IDs for IPQ5018 family
Add SOC IDs for the IPQ5018 family.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230429193336.600629-1-robimarko@gmail.com
2023-05-24 20:06:17 -07:00
Dmitry Baryshkov
375cccc659 dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF
On msm8996 CBF interconnects power and performance CPU clusters. Add
corresponding interconnect defines to be used in device trees.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230512001334.2983048-2-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-05-18 19:02:14 +03:00
Konrad Dybcio
1738600082 dt-bindings: power: qcom,rpmpd: Format RPMh levels better
After adding the missing levels with a nice, easy-to-read diff,
reformat the defines to make them nice to look at..

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517-topic-kailua-rpmhpd-v2-2-3063ce19c491@linaro.org
2023-05-17 19:25:48 -07:00
Konrad Dybcio
4755e880b0 dt-bindings: power: qcom,rpmpd: add missing RPMH levels
There are a lot of RPMh levels that we haven't included yet.. some
sadly turned out to be necessary, add them!

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517-topic-kailua-rpmhpd-v2-1-3063ce19c491@linaro.org
2023-05-17 19:25:48 -07:00
Sumit Gupta
b0dae3df05 dt-bindings: tegra: Add ICC IDs for dummy memory clients
Add ICC IDs for dummy software clients representing CCPLEX clusters.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-05-16 12:06:55 +02:00
Srinivas Kandagatla
90848a2557
ASoC: qcom: q6dsp: add support to more display ports
Existing code base only supports one display port, this patch adds
support upto 8 display ports. This support is required to allow platforms
like X13s which have 3 display ports, and some of the Qualcomm SoCs
there are upto 7 Display ports.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org
Link: https://lore.kernel.org/r/20230509112202.21471-4-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org
2023-05-11 10:19:05 +09:00
Linus Torvalds
1c1094e47e - mailbox api: allow direct registration to a channel
Convert omap and pcc to use mbox_bind_client
 - omap and hi6220 : use of_property_read_bool
 - test: fix double-free and use spinlock header
 - rockchip and bcm-pdc: drop of_match_ptr
 - mpfs: change config symbol
 - mediatek gce: support MT6795
 - qcom apcs: consolidate of_device_id
 			 support IPQ9574
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmRWXwYACgkQf9lkf8eY
 P5V11Q/9G2V2V/QO6EJm8JQ6ElkO+cLeZezmyAhlt3l7n2B5WjEdnKX2nxOYmgZl
 qb+tYFJO7cd+lpMMTWz4PfOZbedkhrGXwzV8OMzXHJHfOdy3oojw8NYXY7IXdwsy
 jhik8jYSUx2vHYCTCbAT0SgNLWJHE+RMzFjg01Wb49zIqJf9kbw8RfmWItKGLBJt
 0ePSYW2o7LckMf3KSVV3YxfTlvX6Wb0rE0HXv/YI17XtDWT/RlpHb9rVvPWcpKfI
 wZjQ49wxjtpsilxAQijcT+gE2wmvx62S1HeSSwE7JZ/7k4Ihg269rUa3p0Dp3dcA
 RLyEhrLt3KWAWYWDXvsGVhaJvrtHI0BMA1Pb3C+qnjdcySs8AZgQbGTtI3RPOiuq
 3VCshYVZMEbVoXZOHFbov0e6pyBX5dLqU8W3FhfAVunovj/d7/+74h1uP6ecJjhP
 +DazIWSc20ATWUaD+UrjPhaGsNwEGceiJiY6nHhnzWZlu2K+2UXRlSrL/iAydvaj
 SRJeqHiY12fGPGVOScpCMylAGsa+VI+oA61JlMfjLvuyL4qSwNwZGpmCUlIod2AJ
 8vUGw254XMr5CiZ4u/D/cyi+7gJ4la53xNkNZIfFs7cP+gbCygaCHDy11bzQa+i1
 /sLR9voYIp0Woljds5a6L+o2bP5hkf/Uf+6WKEU8uaW98f5tA14=
 =NHj4
 -----END PGP SIGNATURE-----

Merge tag 'mailbox-v6.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - mailbox api: allow direct registration to a channel and convert omap
   and pcc to use mbox_bind_client

 - omap and hi6220 : use of_property_read_bool

 - test: fix double-free and use spinlock header

 - rockchip and bcm-pdc: drop of_match_ptr

 - mpfs: change config symbol

 - mediatek gce: support MT6795

 - qcom apcs: consolidate of_device_id and support IPQ9574

* tag 'mailbox-v6.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  dt-bindings: mailbox: qcom: add compatible for IPQ9574 SoC
  mailbox: qcom-apcs-ipc: do not grow the of_device_id
  dt-bindings: mailbox: qcom,apcs-kpss-global: use fallbacks for few variants
  dt-bindings: mailbox: mediatek,gce-mailbox: Add support for MT6795
  mailbox: mpfs: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE
  mailbox: bcm-pdc: drop of_match_ptr for ID table
  mailbox: rockchip: drop of_match_ptr for ID table
  mailbox: mailbox-test: Fix potential double-free in mbox_test_message_write()
  mailbox: mailbox-test: Explicitly include header for spinlock support
  mailbox: Use of_property_read_bool() for boolean properties
  mailbox: pcc: Use mbox_bind_client
  mailbox: omap: Use mbox_bind_client
  mailbox: Allow direct registration to a channel
2023-05-07 10:17:33 -07:00
Linus Torvalds
78b421b6a7 linux-watchdog 6.4-rc1 tag
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.14 (GNU/Linux)
 
 iEYEABECAAYFAmRTZSoACgkQ+iyteGJfRspyfACgojeDzj400vg0/ZfMrqvwGWiW
 rroAn13l3UIJI6dI8J89jjp2q5Xo0RSq
 =ECpF
 -----END PGP SIGNATURE-----

Merge tag 'linux-watchdog-6.4-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

 - Add watchdog driver for StarFive JH7100 and JH7110 Soc

 - Add Rockchip RK3588 devices

 - Add Qualcom IPQ5332 APSS, QCM2290 KPSS and SM6115 SoC devices

 - Add Mediatke MT8365 and MT6735 devices

 - Watchdog-core: Always set WDOG_HW_RUNNING when starting watchdog

 - Convert watchdog platform drivers to return void on the remove
   callback

 - Convert to devm_clk_get_enabled() helpers

 - ... and other small fixes and improvements

* tag 'linux-watchdog-6.4-rc1' of git://www.linux-watchdog.org/linux-watchdog: (72 commits)
  watchdog: dw_wdt: Simplify clk management
  watchdog: dw_wdt: Fix the error handling path of dw_wdt_drv_probe()
  watchdog: starfive: Fix the warning of starfive_wdt_match
  watchdog: starfive: Fix the probe return error if PM and early_enable are both disabled
  MAINTAINERS: Add fragment for Xilinx watchdog driver
  watchdog: menz069_wdt: fix timeout setting
  watchdog: menz069_wdt: fix watchdog initialisation
  dt-bindings: watchdog: alphascale-asm9260: convert to DT schema
  watchdog: loongson1_wdt: Implement restart handler
  dt-bindings: watchdog: Document Qualcomm SM6115 watchdog
  dt-bindings: watchdog: realtek,otto-wdt: simplify requiring interrupt-names
  dt-bindings: watchdog: toshiba,visconti-wdt: simplify with unevaluatedProperties
  dt-bindings: watchdog: fsl-imx7ulp-wdt: simplify with unevaluatedProperties
  dt-bindings: watchdog: arm,sp805: drop unneeded minItems
  dt-bindings: watchdog: drop duplicated GPIO watchdog bindings
  dt-bindings: reset: Add binding for MediaTek MT6735 TOPRGU/WDT
  drivers: watchdog: Add StarFive Watchdog driver
  dt-bindings: watchdog: Add watchdog for StarFive JH7100 and JH7110
  dt-bindings: watchdog: indentation, quotes and white-space cleanup
  watchdog: ebc-c384_wdt: Mark status as orphaned
  ...
2023-05-04 18:33:56 -07:00
AngeloGioacchino Del Regno
26e02e6c10 dt-bindings: mailbox: mediatek,gce-mailbox: Add support for MT6795
Add a compatible string for the MT6795 Helio X10 SoC using MT8173
binding and add a header for the MT6795's GCE mailbox.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-05-04 00:53:42 -05:00
Linus Torvalds
3af49062b0 - New Drivers
- Add support for  Renesas RZ/G2L MTU3
 
  - New Device Support
    - Add support for Lenovo Yoga Book X90F to Intel CHT WC
    - Add support for MAX5970 and MAX5978 to Simple MFD (I2C)
    - Add support for Meteor Lake PCH-S LPSS PCI to Intel LPSS PCI
    - Add support for AXP15060 PMIC to X-Powers PMIC collection
 
  - Remove Device Support
    - Remove support for Samsung 5M8751 and S5M8763 PMIC devices
 
  - New Functionality
    - Convert deprecated QCOM IRQ Chip to config registers
    - Add support for 32-bit address spaces to Renesas SMUs
 
  - Fix-ups
    - Make use of APIs / MACROs designed to simplify and demystify
    - Add / improve Device Tree bindings
    - Memory saving struct layout optimisations
    - Remove old / deprecated functionality
    - Factor out unassigned register addresses from ranges
    - Trivial: Spelling fixes, renames and coding style fixes
    - Rid 'defined but not used' warnings
    - Remove ineffective casts and pointer stubs
 
  - Bug Fixes
    - Fix incorrectly non-inverted mask/unmask IRQs on QCOM platforms
    - Remove MODULE_*() helpers from non-tristate drivers
    - Do not attempt to use out-of-range memory addresses associated with io_base
    - Provide missing export helpers
    - Fix remap bulk read optimisation fallout
    - Fix memory leak issues in error paths
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAmRROFAACgkQUa+KL4f8
 d2E9OxAAtG4Ac/I8Cp/VsTGGn5/pxxMnY/AWmdfkexp8bDQSvavKKQZ2wEwgFaTW
 GVaOIuWpG82fdoIAm1SkLs/gjPbXLnDJlxv8UcYa3kMQik/iiwrWl4zN2KBZqIIX
 qdg7fZNVAhi/qjue1YCHxKjMB80kK2LBTfwly+mbOXWMOBmoDh957oFuNBAa9W/A
 QxN9ckU/yVMjpeZQ1M97g/nUu+lKMypcCNHm1hklzqbchqgUiefdYS6t+g7zBgff
 zvwrlo+Tt0oIef95+TVmiVQBWJ+Cf8ssZphyL9I5dUH1Ft16BsNZYVvD1Eur1WGf
 N7szGDBZoqK5I6uUJ2t4+xiE4Mh1r+TIoCZuSwpDWS5IRKiWxTTZ9aDTXTKbnVKK
 Ov5SA3cdC2McXa0NCXB/47HzDTXhffH0SQ9x3JKlba2crSKt7LicVhjeflMOcHw+
 HuTzg3imeMQriLVrVcvgce+YOcF3G/bFX9jvxnp8WFY+MLKuTYCGqoUfY6EF6r4i
 F0Y6DmYDBGX3rND+zvXDVMjS+RymYTSMtY9PKOXEdY1WU9E8GAHSKhrOCyCO3aIm
 PZRC2GAzGQ5fRCkyXusk0kxJqBBxu1My/wUQ9xRjdMKszFxEgVVFIY7KLwanY5vW
 2akDnwOtu+37G9Qm4h2TpQdNLGTldZbbFcWrYGKzbNrVOjYw824=
 =EBtX
 -----END PGP SIGNATURE-----

Merge tag 'mfd-next-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "New Drivers:
   - Add support for  Renesas RZ/G2L MTU3

  New Device Support:
   - Add support for Lenovo Yoga Book X90F to Intel CHT WC
   - Add support for MAX5970 and MAX5978 to Simple MFD (I2C)
   - Add support for Meteor Lake PCH-S LPSS PCI to Intel LPSS PCI
   - Add support for AXP15060 PMIC to X-Powers PMIC collection

  Remove Device Support:
   - Remove support for Samsung 5M8751 and S5M8763 PMIC devices

  New Functionality:
   - Convert deprecated QCOM IRQ Chip to config registers
   - Add support for 32-bit address spaces to Renesas SMUs

  Fix-ups:
   - Make use of APIs / MACROs designed to simplify and demystify
   - Add / improve Device Tree bindings
   - Memory saving struct layout optimisations
   - Remove old / deprecated functionality
   - Factor out unassigned register addresses from ranges
   - Trivial: Spelling fixes, renames and coding style fixes
   - Rid 'defined but not used' warnings
   - Remove ineffective casts and pointer stubs

  Bug Fixes:
   - Fix incorrectly non-inverted mask/unmask IRQs on QCOM platforms
   - Remove MODULE_*() helpers from non-tristate drivers
   - Do not attempt to use out-of-range memory addresses associated with io_base
   - Provide missing export helpers
   - Fix remap bulk read optimisation fallout
   - Fix memory leak issues in error paths"

* tag 'mfd-next-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (88 commits)
  dt-bindings: mfd: ti,j721e-system-controller: Add SoC chip ID
  leds: bd2606mvv: Driver for the Rohm 6 Channel i2c LED driver
  dt-bindings: mfd: qcom,spmi-pmic: Document flash LED controller
  dt-bindings: mfd: x-powers,axp152: Document the AXP15060 variant
  mfd: axp20x: Add support for AXP15060 PMIC
  dt-bindings: mfd: x-powers,axp152: Document the AXP313a variant
  counter: rz-mtu3-cnt: Unlock on error in rz_mtu3_count_ceiling_write()
  dt-bindings: mfd: dlg,da9063: Document voltage monitoring
  dt-bindings: mfd: stm32: Remove unnecessary blank lines
  dt-bindings: mfd: qcom,spmi-pmic: Use generic ADC node name in examples
  dt-bindings: mfd: syscon: Add nuvoton,ma35d1-sys compatible
  MAINTAINERS: Add entries for Renesas RZ/G2L MTU3a counter driver
  counter: Add Renesas RZ/G2L MTU3a counter driver
  Documentation: ABI: sysfs-bus-counter: add cascade_counts_enable and external_input_phase_clock_select
  mfd: Add Renesas RZ/G2L MTU3a core driver
  dt-bindings: timer: Document RZ/G2L MTU3a bindings
  mfd: rsmu_i2c: Convert to i2c's .probe_new() again
  mfd: intel-lpss: Add Intel Meteor Lake PCH-S LPSS PCI IDs
  mfd: dln2: Fix memory leak in dln2_probe()
  mfd: axp20x: Fix axp288 writable-ranges
  ...
2023-05-02 10:41:31 -07:00
Linus Torvalds
e81507acdc Nothing looks out of the ordinary in this batch of clk driver updates. There
are a couple patches to the core clk framework, but they're all basically
 cleanups or debugging aids. The driver updates and new additions are dominated
 in the diffstat by Qualcomm and MediaTek drivers. Qualcomm gained a handful of
 new drivers for various SoCs, and MediaTek gained a bunch of drivers for
 MT8188. The MediaTek drivers are being modernized as well, so there are
 updates all over that vendor's clk drivers. There's also a couple other new clk
 drivers in here, for example the Starfive JH7110 SoC support is added.
 
 Outside of the two major SoC vendors though, we have the usual collection of
 non-critical fixes and cleanups to various clk drivers. It's good to see that
 we're getting more cleanups and modernization patches. Maybe one day we'll be
 able to properly split clk providers from clk consumers.
 
 Core:
  - Print an informational message before disabling unused clks
 
 New Drivers:
  - BCM63268 timer clock and reset controller
  - Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and
    MT8195 SoCs
  - Mediatek MT8188 SoC clk drivers
  - Clock driver for Sunplus SP7021 SoC
  - Clk driver support for Loongson-2 SoCs
  - Clock driver for Skyworks Si521xx I2C PCIe clock generators
  - Initial Starfive JH7110 clk/reset support
  - Global clock controller drivers for Qualcomm SM7150, IPQ9574, MSM8917 and IPQ5332 SoCs
  - GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P SoCs
 
 Updates:
  - Shrink size of clk_fractional_divider a little
  - Convert various clk drivers to devm_of_clk_add_hw_provider()
  - Convert platform clk drivers to remove_new()
  - Converted most Mediatek clock drivers to struct platform_driver
  - MediaTek clock drivers can be built as modules
  - Reimplement Loongson-1 clk driver with DT support
  - Migrate socfpga clk driver to of_clk_add_hw_provider()
  - Support for i3c clks on Aspeed ast2600 SoCs
  - Add clock generic devm_clk_hw_register_gate_parent_data
  - Add audiomix block control for i.MX8MP
  - Add support for determine_rate to i.MX composite-8m
  - Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate
  - Provide clock name in error message for clk-gpr-mux on get parent failure
  - Drop duplicate imx_clk_mux_flags macro
  - Register the i.MX8MP Media Disp2 Pix clock as bus clock
  - Add Media LDB root clock to i.MX8MP
  - Make i.MX8MP nand_usdhc_bus clock as non-critical
  - Fix the rate table for i.MX fracn-gppll
  - Disable HW control for the fracn-gppll in order to be controlled by
    register write
  - Add support for interger PLL in fracn-gppll
  - Add mcore_booted module parameter to i.MX93 provider
  - Add NIC, A55 and ARM PLL clocks to i.MX93
  - Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents
  - Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP to
    get more accurate clock rates
  - Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical
  - Update some of the i.MX critical clocks flags to allow glitchless
    on-the-fly rate change.
  - Add I2C5 clock on Renesas R-Car V3H
  - Exynos850: Add CMU_G3D clock controller for the Mali GPU
  - Extract Exynos5433 (ARM64) clock controller power management code to
    common driver parts
  - Exynos850: make PMU_ALIVE_PCLK clock critical
  - Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel
    Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car V4H
  - Add video capture (VIN) clocks on Renesas R-Car V3H
  - Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H
  - Support for Stromer Plus PLL on Qualcomm IPQ5332
  - Add a missing reset to Qualcomm QCM2290
  - Migrate Qualcomm IPQ4019 to clk_parent_data
  - Make USB GDSCs enter retention state when disabled on Qualcomm SM6375,
    MSM8996 and MSM8998 SoCs
  - Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk
  - Add two EMAC GDSCs on Qualcomm SC8280XP
  - Use shared rcg clk ops in Qualcomm SM6115 GCC
  - Park Qualcomm SM8350 PCIe PIPE clks when disabled
  - Add GDSCs to Qualcomm SC7280 LPASS audio clock controller
  - Add missing XO clocks to Qualcomm MSM8226 and MSM8974
  - Convert some Qualcomm clk DT bindings to YAML
  - Reparenting fix for the clock supplying camera modules on Rockchip rk3399
  - Mark more critical (bus-)clocks on Rockchip rk3588
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmRMbQURHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSUvyw//Vcqg0h8s+9npz0JsW+nffAXRguy1jum6
 tj10++zA+NBhKxmfhyOs/v9UK1nb2DXAhcTIjUDcTDkVy0b2pBUQoGEGMyy9TLve
 q4MfWx7CwKwASUG2Lr3f1n4qi/vT4PEDlvYzUO94p7c6Y6f6P4JHTCJlJR7cNb4o
 MyXgiXMxQGaxT0XucSR9J32VxqSbF9KQvb8q+tPV3CDMIWi96aO5ZyewY6KF8a/7
 chdXKYQXaYYG4/q4lNjZuvNQ2jidWqp0NlNw7M96U7SK5ESBryk4B4d1/J+QtzxX
 cuBTF1eoTKYlS3kPhhsuOhbsDi2SFE6D75ps5i9Y57ezSdS9qFcUsaNzUiN6t9ng
 uW+MRBTz20JDKBTLk6vD75O63fVDg3KG+kkLaF0Ax1Xa99sbrgBdNkPQ0Iu2AbSh
 assUmbz3s9MaPWj8LpOKLmactm4GbrQ2wtCEjguuynjaFoPUuyunReNkZ1yxfUUl
 MjRIYpvqVvYp29xHlBjN2cgttHjqVCBg8y7Io6RQonbIvnuN7Zo2cu+vbF7w7mdR
 2HtGBe/OFsnZmmsr0pIGQOU25otheIHPudEYLlXEKx03FaMzAXnnDe9f6xXWaWxk
 Wz0YBofejlkP9ycLjRas2BZo3T66TtAlbQH2UhrSpJZV02Jwfi+JwBaLi9dOwZ7O
 VL5HI5FSlG8=
 =bTtL
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Nothing looks out of the ordinary in this batch of clk driver updates.

  There are a couple patches to the core clk framework, but they're all
  basically cleanups or debugging aids. The driver updates and new
  additions are dominated in the diffstat by Qualcomm and MediaTek
  drivers. Qualcomm gained a handful of new drivers for various SoCs,
  and MediaTek gained a bunch of drivers for MT8188. The MediaTek
  drivers are being modernized as well, so there are updates all over
  that vendor's clk drivers. There's also a couple other new clk drivers
  in here, for example the Starfive JH7110 SoC support is added.

  Outside of the two major SoC vendors though, we have the usual
  collection of non-critical fixes and cleanups to various clk drivers.
  It's good to see that we're getting more cleanups and modernization
  patches. Maybe one day we'll be able to properly split clk providers
  from clk consumers.

  Core:
   - Print an informational message before disabling unused clks

  New Drivers:
   - BCM63268 timer clock and reset controller
   - Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and
     MT8195 SoCs
   - Mediatek MT8188 SoC clk drivers
   - Clock driver for Sunplus SP7021 SoC
   - Clk driver support for Loongson-2 SoCs
   - Clock driver for Skyworks Si521xx I2C PCIe clock generators
   - Initial Starfive JH7110 clk/reset support
   - Global clock controller drivers for Qualcomm SM7150, IPQ9574,
     MSM8917 and IPQ5332 SoCs
   - GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P
     SoCs

  Updates:
   - Shrink size of clk_fractional_divider a little
   - Convert various clk drivers to devm_of_clk_add_hw_provider()
   - Convert platform clk drivers to remove_new()
   - Converted most Mediatek clock drivers to struct platform_driver
   - MediaTek clock drivers can be built as modules
   - Reimplement Loongson-1 clk driver with DT support
   - Migrate socfpga clk driver to of_clk_add_hw_provider()
   - Support for i3c clks on Aspeed ast2600 SoCs
   - Add clock generic devm_clk_hw_register_gate_parent_data
   - Add audiomix block control for i.MX8MP
   - Add support for determine_rate to i.MX composite-8m
   - Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate
   - Provide clock name in error message for clk-gpr-mux on get parent
     failure
   - Drop duplicate imx_clk_mux_flags macro
   - Register the i.MX8MP Media Disp2 Pix clock as bus clock
   - Add Media LDB root clock to i.MX8MP
   - Make i.MX8MP nand_usdhc_bus clock as non-critical
   - Fix the rate table for i.MX fracn-gppll
   - Disable HW control for the fracn-gppll in order to be controlled by
     register write
   - Add support for interger PLL in fracn-gppll
   - Add mcore_booted module parameter to i.MX93 provider
   - Add NIC, A55 and ARM PLL clocks to i.MX93
   - Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents
   - Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP
     to get more accurate clock rates
   - Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical
   - Update some of the i.MX critical clocks flags to allow glitchless
     on-the-fly rate change.
   - Add I2C5 clock on Renesas R-Car V3H
   - Exynos850: Add CMU_G3D clock controller for the Mali GPU
   - Extract Exynos5433 (ARM64) clock controller power management code
     to common driver parts
   - Exynos850: make PMU_ALIVE_PCLK clock critical
   - Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel
     Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car
     V4H
   - Add video capture (VIN) clocks on Renesas R-Car V3H
   - Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H
   - Support for Stromer Plus PLL on Qualcomm IPQ5332
   - Add a missing reset to Qualcomm QCM2290
   - Migrate Qualcomm IPQ4019 to clk_parent_data
   - Make USB GDSCs enter retention state when disabled on Qualcomm
     SM6375, MSM8996 and MSM8998 SoCs
   - Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk
   - Add two EMAC GDSCs on Qualcomm SC8280XP
   - Use shared rcg clk ops in Qualcomm SM6115 GCC
   - Park Qualcomm SM8350 PCIe PIPE clks when disabled
   - Add GDSCs to Qualcomm SC7280 LPASS audio clock controller
   - Add missing XO clocks to Qualcomm MSM8226 and MSM8974
   - Convert some Qualcomm clk DT bindings to YAML
   - Reparenting fix for the clock supplying camera modules on Rockchip
     rk3399
   - Mark more critical (bus-)clocks on Rockchip rk3588"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (290 commits)
  clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
  clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers
  clk: rockchip: rk3588: make gate linked clocks critical
  clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk
  clk: qcom: add the GPUCC driver for sa8775p
  dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
  clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling
  clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc
  clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration
  dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property
  clk: starfive: Avoid casting iomem pointers
  clk: microchip: fix potential UAF in auxdev release callback
  clk: qcom: rpm: Use managed `of_clk_add_hw_provider()`
  clk: mediatek: fhctl: Mark local variables static
  clk: sifive: make SiFive clk drivers depend on ARCH_ symbols
  clk: uniphier: Use managed `of_clk_add_hw_provider()`
  clk: si5351: Use managed `of_clk_add_hw_provider()`
  clk: si570: Use managed `of_clk_add_hw_provider()`
  clk: si514: Use managed `of_clk_add_hw_provider()`
  clk: lmk04832: Use managed `of_clk_add_hw_provider()`
  ...
2023-04-29 17:29:39 -07:00
Linus Torvalds
1c15ca4e4e sound updates for 6.4-rc1
At this time, it's an interesting mixture of changes for both old and
 new stuff.  Majority of changes are about ASoC (lots of systematic
 changes for converting remove callbacks to void, and cleanups), while
 we got the fixes and the enhancements of very old PCI cards, too.
 
 Here are some highlights:
 
 ALSA/ASoC Core:
 - Continued effort of more ASoC core cleanups
 - Minor improvements for XRUN handling in indirect PCM helpers
 - Code refactoring of PCM core code
 
 ASoC:
 - Continued feature and simplification work on SOF, including addition
   of a no-DSP mode for bringup, HDA MLink and extensions to the IPC4
   protocol
 - Hibernation support for CS35L45
 - More DT binding conversions
 - Support for Cirrus Logic CS35L56, Freescale QMC, Maxim MAX98363,
   nVidia systems with MAX9809x and RT5631, Realtek RT712, Renesas R-Car
   Gen4, Rockchip RK3588 and TI TAS5733
 
 ALSA:
 - Lots of works for legacy emu10k1 and ymfpci PCI drivers
 - PCM kselftest fixes and enhancements
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmRJBkcOHHRpd2FpQHN1
 c2UuZGUACgkQLtJE4w1nLE8S/Q/+If1MEW+XXYushYU6VcWbHevwsRwmUZPtIJzT
 Nx4PE4Ia8rX++GbsH5Iqt6tmldbb/vMbwy7TGbn/Q4ju2cO5qGT4/qgWdC2TuUX6
 icWRHslJ//TffSd/yh1g6JIKBlcCmQeYcw5KoaLzBE/qO3iRP0IQUc17gkLKYNni
 u1XOGrU9zuh3uwz+UQFfUhB8NlKhD3HVYjwrbd3gwcDsE/0G+q76A/wWghfA+RAb
 0ruDhIDtJoem6PKQTwC05UgDpmwd7XFAIgcbOu7E7t/lr4YKwQZhQmJI0IexCR9i
 aLPqg3Q/6S+WFKpcPcGCHNljqRNp9lUlIXak+NsbCZ7mXKE6tALywAtuB57sZ0sO
 QM1YrmUAsi0RaD7foPcT64CAq8IVQ6aLWusXwvcxzzvJuHvJdeiBKiI5gmF0GqMu
 ZLpAMGCoKxft4Il2r+BPTbLHe57uHmp1fKMWUK4NfyIUW7jEdKmf7ALSSJmvcqwU
 +R0PXikc0lOo1GH9ZQojpVNFwV8XLOd2CWaNfoPl85A0+ngYhTY3ZRQ3qbYWHlU6
 zXAu06IUOef5phsn3zerJ1orV729Xdjf+JUbL0uxJvANsX6R93CQWw0tgrUI62EZ
 0vhoOp3PPZUKmDKvUo/NtIyuvSGREg3wDug5tiDOb53Qwfr2VIThJa999kNzH76c
 lHUfrv4=
 =7XGG
 -----END PGP SIGNATURE-----

Merge tag 'sound-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "At this time, it's an interesting mixture of changes for both old and
  new stuff. Majority of changes are about ASoC (lots of systematic
  changes for converting remove callbacks to void, and cleanups), while
  we got the fixes and the enhancements of very old PCI cards, too.

  Here are some highlights:

  ALSA/ASoC Core:
   - Continued effort of more ASoC core cleanups
   - Minor improvements for XRUN handling in indirect PCM helpers
   - Code refactoring of PCM core code

  ASoC:
   - Continued feature and simplification work on SOF, including
     addition of a no-DSP mode for bringup, HDA MLink and extensions to
     the IPC4 protocol
   - Hibernation support for CS35L45
   - More DT binding conversions
   - Support for Cirrus Logic CS35L56, Freescale QMC, Maxim MAX98363,
     nVidia systems with MAX9809x and RT5631, Realtek RT712, Renesas
     R-Car Gen4, Rockchip RK3588 and TI TAS5733

  ALSA:
   - Lots of works for legacy emu10k1 and ymfpci PCI drivers
   - PCM kselftest fixes and enhancements"

* tag 'sound-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (586 commits)
  ALSA: emu10k1: use high-level I/O in set_filterQ()
  ALSA: emu10k1: use high-level I/O functions also during init
  ALSA: emu10k1: fix error handling in snd_audigy_i2c_volume_put()
  ALSA: emu10k1: don't stop DSP in _snd_emu10k1_{,audigy_}init_efx()
  ALSA: emu10k1: fix SNDRV_EMU10K1_IOCTL_SINGLE_STEP
  ALSA: emu10k1: skip Sound Blaster-specific hacks for E-MU cards
  ALSA: emu10k1: fixup DSP defines
  ALSA: emu10k1: pull in some register definitions from kX-project
  ALSA: emu10k1: remove some bogus defines
  ALSA: emu10k1: eliminate some unused defines
  ALSA: emu10k1: fix lineup of EMU_HANA_* defines
  ALSA: emu10k1: comment updates
  ALSA: emu10k1: fix snd_emu1010_fpga_read() input masking for rev2 cards
  ALSA: emu10k1: remove unused emu->pcm_playback_efx_substream field
  ALSA: emu10k1: remove unused `resume` parameter from snd_emu10k1_init()
  ALSA: emu10k1: minor optimizations
  ALSA: emu10k1: remove remaining cruft from snd_emu10k1_emu1010_init()
  ALSA: emu10k1: remove apparently pointless EMU_HANA_OPTION_CARDS reads
  ALSA: emu10k1: remove apparently pointless FPGA reads
  ALSA: emu10k1: stop doing weird things with HCFG in snd_emu10k1_emu1010_init()
  ...
2023-04-27 10:58:37 -07:00
Linus Torvalds
d42b1c4757 Devicetree updates for v6.4, part 1:
Bindings:
 - Convert Qcom IOMMU, Amlogic timer, Freescale sec-v4.0, Toshiba
   TC358764 display bridge, Parade PS8622 display bridge, and  Xilinx
   FPGA bindings to DT schema format
 
 - Add qdu1000 and sa8775p SoC support to Qcom PDC interrupt controller
 
 - Add MediaTek MT8365 UART and SYSIRQ bindings
 
 - Add Arm Cortex-A78C and X1C core compatibles
 
 - Add vendor prefix for Novatek
 
 - Remove bindings for stih415, sti416, stid127 platforms
 
 - Drop uneeded quotes in schema files. This is preparation for yamllint
   checking quoting for us.
 
 - Add missing (unevaluated|additional)Properties constraints on child
   node schemas
 
 - Clean-up schema comments formatting
 
 - Fix I2C and SPI node bus names in schema examples
 
 - Clean-up some display compatibles schema syntax
 
 - Fix incorrect references to lvds.yaml
 
 - Gather all cache controller bindings in a common directory
 
 DT core:
 - Convert unittest to new void .remove platform device hook
 
 - kerneldoc fixes for DT address of_pci_range_to_resource/
   of_address_to_resource functions
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmRINPkACgkQ+vtdtY28
 YcPIBA//ajT3b/Q98+Tyo20lYMTYLT/5JVehkl6wSctrBd8Td+mt/qdK6H8qmz20
 yq5SvO1sdnF5jrZ0EIP1i2xPNcxJFQqqR4Cr8rjR53FerSru6L07a9F/n+2XWBZ3
 ZJgDxXSGapby5VJfrF0stqaiHDGLBmsfX+38LYym9OBY99zDbAtVJvH6/rBt02wP
 nSF3xp5hC4z9J1cmp69DQq9n85UYyodtKwT0DJMaSzD0KlrI2yBxc0xtT0l04ekK
 384aM6yesbQV9mdJm10HkKDjqMfEguD0BAlnklHN3q4gVQVqC2yb8VHoOasVVVjl
 461UGMw9YRTqNcQjhporZdvpaH0ZLW94lESDF4M9OlP+6Aw88ZHtOIeWkSD1eycw
 50aaEX6BRiOQopVopaRPme+AJMSh0e4nBewrsT8mzRsDUbpqZSedN+1CybeBH+TP
 un4NTimy4opOoXDRhYbFMBhiIqmxDAX2oZUpONstKrjhFW8b93H/n3deHE/fGsG8
 TCBjzAD8DCmOBZE3XcoC1ZwJpFc3L+CxZ/bekDvHsuJmdQEF1tLS5F/rO1ty780U
 wNskteSlMG0vKboNHvZfu/3CgtKLGQsiipUdw9f/5vGjq8epioBksSAL9Dyngt7H
 4BknZ73/upFVczaF55udIUMRpxKUavMnCPdKJH+vSNYPMB/3mEg=
 =u3lA
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "Bindings:

   - Convert Qcom IOMMU, Amlogic timer, Freescale sec-v4.0, Toshiba
     TC358764 display bridge, Parade PS8622 display bridge, and Xilinx
     FPGA bindings to DT schema format

   - Add qdu1000 and sa8775p SoC support to Qcom PDC interrupt
     controller

   - Add MediaTek MT8365 UART and SYSIRQ bindings

   - Add Arm Cortex-A78C and X1C core compatibles

   - Add vendor prefix for Novatek

   - Remove bindings for stih415, sti416, stid127 platforms

   - Drop uneeded quotes in schema files. This is preparation for
     yamllint checking quoting for us.

   - Add missing (unevaluated|additional)Properties constraints on child
     node schemas

   - Clean-up schema comments formatting

   - Fix I2C and SPI node bus names in schema examples

   - Clean-up some display compatibles schema syntax

   - Fix incorrect references to lvds.yaml

   - Gather all cache controller bindings in a common directory

  DT core:

   - Convert unittest to new void .remove platform device hook

   - kerneldoc fixes for DT address of_pci_range_to_resource/
     of_address_to_resource functions"

* tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits)
  dt-bindings: rng: Drop unneeded quotes
  dt-bindings: arm/soc: mediatek: Drop unneeded quotes
  dt-bindings: soc: qcom: Drop unneeded quotes
  dt-bindings: i2c: samsung: Fix 'deprecated' value
  dt-bindings: display: Fix lvds.yaml references
  dt-bindings: display: simplify compatibles syntax
  dt-bindings: display: mediatek: simplify compatibles syntax
  dt-bindings: drm/bridge: ti-sn65dsi86: Fix the video-interfaces.yaml references
  dt-bindings: timer: Drop unneeded quotes
  dt-bindings: interrupt-controller: qcom,pdc: document qcom,qdu1000-pdc
  dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p
  dt-bindings: reset: remove stih415/stih416 reset
  dt-bindings: net: dwmac: sti: remove stih415/sti416/stid127
  dt-bindings: irqchip: sti: remove stih415/stih416 and stid127
  dt-bindings: iommu: Convert QCOM IOMMU to YAML
  dt-bindings: irqchip: ti,sci-inta: Add optional power-domains property
  dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas
  of: address: Reshuffle to remove forward declarations
  of: address: Fix documented return value of of_pci_range_to_resource()
  of: address: Document return value of of_address_to_resource()
  ...
2023-04-27 09:23:57 -07:00
Patrick Delaunay
378b0e9f24 dt-bindings: mfd: stm32: Remove unnecessary blank lines
Remove double blank line.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230417181342.v2.1.I483a676579cc7e3ac07e1db649091553743fecc8@changeid
2023-04-26 11:40:35 +01:00
Linus Torvalds
5e0ca0bfc3 Thermal control updates for 6.4-rc1
- Add a thermal zone 'devdata' accessor and modify several drivers to
    use it (Daniel Lezcano).
 
  - Prevent drivers from using the 'device' internal thermal zone
    structure field directly (Daniel Lezcano).
 
  - Clean up the hwmon thermal driver (Daniel Lezcano).
 
  - Add thermal zone id accessor and thermal zone type accessor
    and prevent drivers from using thermal zone fields directly (Daniel
    Lezcano).
 
  - Clean up the acerhdf and tegra thermal drivers (Daniel Lezcano).
 
  - Add lower bound check for sysfs input to the x86_pkg_temp_thermal
    Intel thermal driver (Zhang Rui).
 
  - Add more thermal zone device encapsulation: prevent setting structure
    field directly, access the sensor device instead the thermal zone's
    device for trace, relocate the traces in drivers/thermal (Daniel
    Lezcano).
 
  - Use the generic trip point for the i.MX and remove the get_trip_temp
    ops (Daniel Lezcano).
 
  - Use the devm_platform_ioremap_resource() in the Hisilicon driver
    (Yang Li).
 
  - Remove R-Car H3 ES1.* handling as public has only access to the ES2
    version and the upstream support for the ES1 has been shutdown (Wolfram
    Sang).
 
  - Add a delay after initializing the bank in order to let the time to
    the hardware to initialze itself before reading the temperature
    (Amjad Ouled-Ameur).
 
  - Add MT8365 support (Amjad Ouled-Ameur).
 
  - Preparational cleanup and DT bindings for RK3588 support (Sebastian
    Reichel).
 
  - Add driver support for RK3588 (Finley Xiao).
 
  - Use devm_reset_control_array_get_exclusive() for the Rockchip driver
    (Ye Xingchen).
 
  - Detect power gated thermal zones and return -EAGAIN when reading the
    temperature (Mikko Perttunen).
 
  - Remove thermal_bind_params structure as it is unused (Zhang Rui)
 
  - Drop unneeded quotes in DT bindings allowing to run yamllint (Rob
    Herring).
 
  - Update the power allocator documentation according to the thermal
    trace relocation (Lukas Bulwahn).
 
  - Fix sensor 1 interrupt status bitmask for the Mediatek LVTS sensor
    (Chen-Yu Tsai).
 
  - Use the dev_err_probe() helper in the Amlogic driver (Ye Xingchen).
 
  - Add AP domain support to LVTS thermal controllers for mt8195
    (Balsam CHIHI).
 
  - Remove buggy call to thermal_of_zone_unregister() (Daniel Lezcano).
 
  - Make thermal_of_zone_[un]register() private to the thermal OF code
    (Daniel Lezcano).
 
  - Create a private copy of the thermal zone device parameters
    structure when registering a thermal zone (Daniel Lezcano).
 
  - Fix a kernel NULL pointer dereference in thermal_hwmon (Zhang Rui).
 
  - Revert recent message adjustment in thermal_hwmon (Rafael Wysocki).
 
  - Use of_property_present() for testing DT property presence in
    thermal control code (Rob Herring).
 
  - Clean up thermal_list_lock locking in the thermal core (Rafael
    Wysocki).
 
  - Add DLVR support for RFIM control in the int340x Intel thermal
    driver (Srinivas Pandruvada).
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmRGvsYSHHJqd0Byand5
 c29ja2kubmV0AAoJEILEb/54YlRxekAQAJ/hhUZyY2hcFveNfrutkO8OGY+/rtz8
 ozMxyfwAdHoD6/zg9zZQTHSQy3W9rx2FC3tYtwHlJopDYFQuNPsfrhYE97EfO9uT
 Baou3OhoXV+ZJ0EZqIuTNuLaDPD/Hg8KSNmZvb6p/30bLR3Y/gKZutX9+S0x8qpG
 y7JcA8qPDYTvNfxkDjYv3M7HlfpwIwpi/xPFuw9nI2Fdw0SYRWpHAQlNj6oaF0xT
 EaNIg5zh4rR81T34/DpaOm1mfrg3Lg9xOJMU0laS5sKkn5Ea8s0E5s3vb5Quup61
 eXL3DhxmsIv51+1URZMZIQo2FmogvLmgnIPQyaeSvtlic0t39YS70tL2i8JY6kfL
 Tkhm8bS8jKQ6Y8GUvUbE/qadWFgkV4/lFTREVkKuq0XUU/YEpl5iQJAc0iEa0soy
 SISucs/ugoFjqdlN1pNDv7mLIzqyYIF6tZekLZTVa1U++MHKRakY9folD3brc6xO
 ewp1yO6e/fYZJx0K8LNlBRzXqNuV1Tl+kBDvUNHDNAEN8jONiZ2v+pDQ+VqYYxIc
 1A2KVw0l3m0MQ97w3E8LqYJTH6f8bxSLxjXnHLSN0eAXJkn10olfz/RYNsqi+dUb
 YBnFU8t3plGMVGrDcoDtO6hkujUw3oF7pibWeXXFEvIyRUcOA2e94kd57i9a1zLS
 5yyH9UchFcQq
 =XNJE
 -----END PGP SIGNATURE-----

Merge tag 'thermal-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull thermal control updates from Rafael Wysocki:
 "These mostly continue to prepare the thermal control subsystem for
  using unified representation of trip points, which includes cleanups,
  code refactoring and similar and update several drivers (for other
  reasons), which includes new hardware support.

  Specifics:

   - Add a thermal zone 'devdata' accessor and modify several drivers to
     use it (Daniel Lezcano)

   - Prevent drivers from using the 'device' internal thermal zone
     structure field directly (Daniel Lezcano)

   - Clean up the hwmon thermal driver (Daniel Lezcano)

   - Add thermal zone id accessor and thermal zone type accessor and
     prevent drivers from using thermal zone fields directly (Daniel
     Lezcano)

   - Clean up the acerhdf and tegra thermal drivers (Daniel Lezcano)

   - Add lower bound check for sysfs input to the x86_pkg_temp_thermal
     Intel thermal driver (Zhang Rui)

   - Add more thermal zone device encapsulation: prevent setting
     structure field directly, access the sensor device instead the
     thermal zone's device for trace, relocate the traces in
     drivers/thermal (Daniel Lezcano)

   - Use the generic trip point for the i.MX and remove the
     get_trip_temp ops (Daniel Lezcano)

   - Use the devm_platform_ioremap_resource() in the Hisilicon driver
     (Yang Li)

   - Remove R-Car H3 ES1.* handling as public has only access to the ES2
     version and the upstream support for the ES1 has been shutdown
     (Wolfram Sang)

   - Add a delay after initializing the bank in order to let the time to
     the hardware to initialze itself before reading the temperature
     (Amjad Ouled-Ameur)

   - Add MT8365 support (Amjad Ouled-Ameur)

   - Preparational cleanup and DT bindings for RK3588 support (Sebastian
     Reichel)

   - Add driver support for RK3588 (Finley Xiao)

   - Use devm_reset_control_array_get_exclusive() for the Rockchip
     driver (Ye Xingchen)

   - Detect power gated thermal zones and return -EAGAIN when reading
     the temperature (Mikko Perttunen)

   - Remove thermal_bind_params structure as it is unused (Zhang Rui)

   - Drop unneeded quotes in DT bindings allowing to run yamllint (Rob
     Herring)

   - Update the power allocator documentation according to the thermal
     trace relocation (Lukas Bulwahn)

   - Fix sensor 1 interrupt status bitmask for the Mediatek LVTS sensor
     (Chen-Yu Tsai)

   - Use the dev_err_probe() helper in the Amlogic driver (Ye Xingchen)

   - Add AP domain support to LVTS thermal controllers for mt8195
     (Balsam CHIHI)

   - Remove buggy call to thermal_of_zone_unregister() (Daniel Lezcano)

   - Make thermal_of_zone_[un]register() private to the thermal OF code
     (Daniel Lezcano)

   - Create a private copy of the thermal zone device parameters
     structure when registering a thermal zone (Daniel Lezcano)

   - Fix a kernel NULL pointer dereference in thermal_hwmon (Zhang Rui)

   - Revert recent message adjustment in thermal_hwmon (Rafael Wysocki)

   - Use of_property_present() for testing DT property presence in
     thermal control code (Rob Herring)

   - Clean up thermal_list_lock locking in the thermal core (Rafael
     Wysocki)

   - Add DLVR support for RFIM control in the int340x Intel thermal
     driver (Srinivas Pandruvada)"

* tag 'thermal-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (55 commits)
  thermal: intel: int340x: Add DLVR support for RFIM control
  thermal/core: Alloc-copy-free the thermal zone parameters structure
  thermal/of: Unexport unused OF functions
  thermal/drivers/bcm2835: Remove buggy call to thermal_of_zone_unregister
  thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195
  dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
  thermal: amlogic: Use dev_err_probe()
  thermal/drivers/mediatek/lvts_thermal: Fix sensor 1 interrupt status bitmask
  MAINTAINERS: adjust entry in THERMAL/POWER_ALLOCATOR after header movement
  dt-bindings: thermal: Drop unneeded quotes
  thermal/core: Remove thermal_bind_params structure
  thermal/drivers/tegra-bpmp: Handle offline zones
  thermal/drivers/rockchip: use devm_reset_control_array_get_exclusive()
  dt-bindings: rockchip-thermal: Support the RK3588 SoC compatible
  thermal/drivers/rockchip: Support RK3588 SoC in the thermal driver
  thermal/drivers/rockchip: Support dynamic sized sensor array
  thermal/drivers/rockchip: Simplify channel id logic
  thermal/drivers/rockchip: Use dev_err_probe
  thermal/drivers/rockchip: Simplify clock logic
  thermal/drivers/rockchip: Simplify getting match data
  ...
2023-04-25 18:32:43 -07:00
Linus Torvalds
d53c3eaaef ARM: SoC devicetree changes for 6.4
The devicetree changes overall are again dominated by the Qualcomm
 Snapdragon platform that weighs in at over 300 changesets, but there
 are many updates across other platforms as well, notably Mediatek, NXP,
 Rockchips, Renesas, TI, Samsung and ST Microelectronics. These all
 add new features for existing machines, as well as new machines and
 SoCs.
 
 The newly added SoCs are:
 
  - Allwinner T113-s, an Cortex-A7 based variant of the RISC-V
    based D1 chip.
 
  - StarFive JH7110, a RISC-V SoC based on the Sifive U74 core
    like its JH7100 predecessor, but with additional CPU cores
    and a GPU.
 
  - Apple M2 as used in current Macbook Air/Pro and Mac Mini
    gets added, with comparable support as its M1 predecessor.
 
  - Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC
 
  - Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs,
    based on the Cortex-A53 and Cortex-A73 cores, respectively.
 
  - Qualcomm sa8775p is an automotive SoC derived from the
    Snapdragon family.
 
 Including the initial board support for the added SoC platforms,
 there are 52 new machines. The largest group are 19 boards
 industrial embedded boards based on the NXP i.MX6 (32-bit)
 and i.MX8 (64-bit) families.
 
 Others include:
 
  - Two boards based on the Allwinner f1c200s ultra-low-cost chip
 
  - Three "Banana Pi" variants based on the Amlogic g12b
    (A311D, S922X) SoC.
 
  - The Gl.Inet mv1000 router based on Marvell Armada 3720
 
  - A Wifi/LTE Dongle based on Qualcomm msm8916
 
  - Two robotics boards based on Qualcomm QRB chips
 
  - Three Snapdragon based phones made by Xiaomi
 
  - Five developments boards based on various Rockchip SoCs,
    including the rk3588s-khadas-edge2 and a few NanoPi
    models
 
  - The AM625 Beagleplay industrial SBC
 
 Another 14 machines get removed: both boards for the obsolete "oxnas"
 platform, three boards for the Renesas r8a77950 SoC that were only for
 pre-production chips, and various chromebook models based on the Qualcomm
 Sc7180 "trogdor" design that were never part of products.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmRGp0gACgkQYKtH/8kJ
 UicqgQ//cOC0FIvvzNztCrMDDXcDtltGJl28iyR9Ld8PIQL2/xv58yJ5GqQmF38b
 ZJSiRZL2TZ8nFG4/H19qirTkoAo3ryc1rcZM+hfxYsF8ikMh7hieUVgI5yo/+OaF
 Mf/qlu+Usx4Gvr6Kv8fQN9UhJQFBQm2MYumlMvZDC9l7Q1HAgJfq6Hsx1dNZJ05Y
 RwFk2bgeXze7o5gPwMPKzf88T+dfFBV7uNmPbFd8hAf//ZoMPlrvHt6kmmsVeoOk
 JsLC5jllh/TbC4GjnYi3f9ipJwsFbp+r5y69IWNsOXBn28cDPJd8pUQtvoFa7fQ4
 a3AgzXQM0Ns0cWwGqzHqm/rRX7Wr+Y57BqXUqP2JNCMGYdNO63i5KOE4gp/vbgxn
 0WJGC/4oaPyeSqY90LoMTNpvMpNOBjIZCyzyljsrwHuLA3bl7jZWP63Bxc65VhYR
 XQ6fKzW+Irz49gsyo6fiRhtZYgL+v310u9gigV7ahFrET6vu3K0QDdzbxWcF9cYi
 BD6OqmlTVbrBSVnKtk1TfSI2IRC8zq+SH7zBN+97OuRnUFe94og83JdsQQI9bl/o
 x2W/vedxcYaZrj5/1/mCjKskchJg3tvWExLs/0ZKCbol8lZ7RioSqg4EvLkkxF+0
 2gXJ7pzfmjqxcoPd90jj8dpbb5SvStz1AErSgkoVehKeOErWGTw=
 =j12m
 -----END PGP SIGNATURE-----

Merge tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "The devicetree changes overall are again dominated by the Qualcomm
  Snapdragon platform that weighs in at over 300 changesets, but there
  are many updates across other platforms as well, notably Mediatek,
  NXP, Rockchips, Renesas, TI, Samsung and ST Microelectronics. These
  all add new features for existing machines, as well as new machines
  and SoCs.

  The newly added SoCs are:

   - Allwinner T113-s, an Cortex-A7 based variant of the RISC-V based D1
     chip.

   - StarFive JH7110, a RISC-V SoC based on the Sifive U74 core like its
     JH7100 predecessor, but with additional CPU cores and a GPU.

   - Apple M2 as used in current Macbook Air/Pro and Mac Mini gets
     added, with comparable support as its M1 predecessor.

   - Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC

   - Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs, based on
     the Cortex-A53 and Cortex-A73 cores, respectively.

   - Qualcomm sa8775p is an automotive SoC derived from the Snapdragon
     family.

  Including the initial board support for the added SoC platforms, there
  are 52 new machines. The largest group are 19 boards industrial
  embedded boards based on the NXP i.MX6 (32-bit) and i.MX8 (64-bit)
  families.

  Others include:

   - Two boards based on the Allwinner f1c200s ultra-low-cost chip

   - Three 'Banana Pi' variants based on the Amlogic g12b (A311D, S922X)
     SoC.

   - The Gl.Inet mv1000 router based on Marvell Armada 3720

   - A Wifi/LTE Dongle based on Qualcomm msm8916

   - Two robotics boards based on Qualcomm QRB chips

   - Three Snapdragon based phones made by Xiaomi

   - Five developments boards based on various Rockchip SoCs, including
     the rk3588s-khadas-edge2 and a few NanoPi models

   - The AM625 Beagleplay industrial SBC

  Another 14 machines get removed: both boards for the obsolete 'oxnas'
  platform, three boards for the Renesas r8a77950 SoC that were only for
  pre-production chips, and various chromebook models based on the
  Qualcomm Sc7180 'trogdor' design that were never part of products"

* tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (836 commits)
  arm64: dts: rockchip: Add support for volume keys to rk3399-pinephone-pro
  arm64: dts: rockchip: Add vdd_cpu_big regulators to rk3588-rock-5b
  arm64: dts: rockchip: Use generic name for es8316 on Pinebook Pro and Rock 5B
  arm64: dts: rockchip: Drop RTC clock-frequency on rk3588-rock-5b
  arm64: dts: apple: t8112: Add PWM controller
  arm64: dts: apple: t600x: Add PWM controller
  arm64: dts: apple: t8103: Add PWM controller
  arm64: dts: rockchip: Add pinctrl gpio-ranges for rk356x
  ARM: dts: nomadik: Replace deprecated spi-gpio properties
  ARM: dts: aspeed-g6: Add UDMA node
  ARM: dts: aspeed: greatlakes: add mctp device
  ARM: dts: aspeed: greatlakes: Add gpio names
  ARM: dts: aspeed: p10bmc: Change power supply info
  arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMM050 Magnetometer
  arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMA255 Accelerometer
  arm64: dts: mediatek: mt6795: Add tertiary PWM node
  arm64: dts: rockchip: add panel to Anbernic RG353 series
  dt-bindings: arm: Add Data Modul i.MX8M Plus eDM SBC
  dt-bindings: arm: fsl: Add chargebyte Tarragon
  dt-bindings: vendor-prefixes: add chargebyte
  ...
2023-04-25 12:11:54 -07:00
Stephen Boyd
a9863979fb Merge branch 'clk-imx' into clk-next
* clk-imx: (25 commits)
  clk: imx: imx8ulp: update clk flag for system critical clock
  clk: imx: imx8ulp: Add tpm5 clock as critical gate clock
  clk: imx: imx8ulp: keep MU0_B clock enabled always
  clk: imx: imx8ulp: Add divider closest support to get more accurate clock rate
  clk: imx: imx8ulp: Fix XBAR_DIVBUS and AD_SLOW clock parents
  clk: imx: imx93: Add nic and A55 clk
  dt-bindings: clock: imx93: add NIC, A55 and ARM PLL CLK
  clk: imx: imx93: add mcore_booted module paratemter
  clk: imx: fracn-gppll: Add 300MHz freq support for imx9
  clk: imx: fracn-gppll: support integer pll
  clk: imx: fracn-gppll: disable hardware select control
  clk: imx: fracn-gppll: fix the rate table
  clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical
  clk: imx: imx8mp: Add LDB root clock
  dt-bindings: clock: imx8mp: Add LDB clock entry
  clk: imx: imx8mp: correct DISP2 pixel clock type
  clk: imx: drop duplicated macro
  clk: imx: clk-gpr-mux: Provide clock name in error message
  clk: imx: Let IMX8MN_CLK_DISP_PIXEL set parent rate
  clk: imx8mm: Let IMX8MM_CLK_LCDIF_PIXEL set parent rate
  ...
2023-04-25 11:52:39 -07:00
Stephen Boyd
c19c6c7b44 Merge branches 'clk-of', 'clk-samsung', 'clk-rockchip' and 'clk-qcom' into clk-next
* clk-of:
  clk: add missing of_node_put() in "assigned-clocks" property parsing

* clk-samsung:
  clk: samsung: exynos850: Make PMU_ALIVE_PCLK critical
  clk: samsung: Convert to platform remove callback returning void
  clk: samsung: exynos5433: Extract PM support to common ARM64 layer
  clk: samsung: Extract parent clock enabling to common function
  clk: samsung: Extract clocks registration to common function
  clk: samsung: exynos850: Add AUD and HSI main gate clocks
  clk: samsung: exynos850: Implement CMU_G3D domain
  clk: samsung: clk-pll: Implement pll0818x PLL type
  clk: samsung: Set dev in samsung_clk_init()
  clk: samsung: Don't pass reg_base to samsung_clk_register_pll()
  clk: samsung: Remove np argument from samsung_clk_init()
  dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
  dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D

* clk-rockchip:
  clk: rockchip: rk3588: make gate linked clocks critical
  clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent

* clk-qcom: (57 commits)
  clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
  clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk
  clk: qcom: add the GPUCC driver for sa8775p
  dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
  clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling
  clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc
  clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration
  dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property
  clk: qcom: rpm: Use managed `of_clk_add_hw_provider()`
  clk: qcom: Add Global Clock Controller driver for IPQ9574
  dt-bindings: clock: Add ipq9574 clock and reset definitions
  clk: qcom: gpucc-sm6375: Configure CX_GDSC disable wait value
  clk: qcom: gcc-sm6115: Mark RCGs shared where applicable
  clk: qcom: dispcc-qcm2290: Add MDSS_CORE reset
  dt-bindings: clock: dispcc-qcm2290: Add MDSS_CORE reset
  clk: qcom: apss-ipq-pll: add support for IPQ5332
  dt-bindings: clock: qcom,a53pll: add IPQ5332 compatible
  clk: qcom: apss-ipq-pll: refactor the driver to accommodate different PLL types
  dt-bindings: mailbox: qcom,apcs-kpss-global: fix SDX55 'if' match
  dt-bindings: mailbox: qcom,apcs-kpss-global: correct SDX55 clocks
  ...
2023-04-25 11:52:25 -07:00
Stephen Boyd
1a86e99fa0 Merge branches 'clk-starfive', 'clk-fractional' and 'clk-devmof' into clk-next
- Shrink size of clk_fractional_divider a little
 - Convert various clk drivers to devm_of_clk_add_hw_provider()

* clk-starfive:
  clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers
  clk: starfive: Avoid casting iomem pointers
  MAINTAINERS: generalise StarFive clk/reset entries
  reset: starfive: Add StarFive JH7110 reset driver
  clk: starfive: Add StarFive JH7110 always-on clock driver
  clk: starfive: Add StarFive JH7110 system clock driver
  reset: starfive: jh71x0: Use 32bit I/O on 32bit registers
  reset: starfive: Rename "jh7100" to "jh71x0" for the common code
  reset: starfive: Extract the common JH71X0 reset code
  reset: starfive: Factor out common JH71X0 reset code
  reset: Create subdirectory for StarFive drivers
  reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
  clk: starfive: Rename "jh7100" to "jh71x0" for the common code
  clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h
  clk: starfive: Factor out common JH7100 and JH7110 code
  clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
  dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
  dt-bindings: clock: Add StarFive JH7110 system clock and reset generator

* clk-fractional:
  clk: Remove mmask and nmask fields in struct clk_fractional_divider
  clk: rockchip: Remove values for mmask and nmask in struct clk_fractional_divider
  clk: imx: Remove values for mmask and nmask in struct clk_fractional_divider
  clk: Compute masks for fractional_divider clk when needed.

* clk-devmof:
  clk: uniphier: Use managed `of_clk_add_hw_provider()`
  clk: si5351: Use managed `of_clk_add_hw_provider()`
  clk: si570: Use managed `of_clk_add_hw_provider()`
  clk: si514: Use managed `of_clk_add_hw_provider()`
  clk: lmk04832: Use managed `of_clk_add_hw_provider()`
  clk: hsdk-pll: Use managed `of_clk_add_hw_provider()`
  clk: cdce706: Use managed `of_clk_add_hw_provider()`
  clk: axs10x: Use managed `of_clk_add_hw_provider()`
  clk: axm5516: Use managed `of_clk_add_hw_provider()`
  clk: axi-clkgen: Use managed `of_clk_add_hw_provider()`
2023-04-25 11:50:49 -07:00
Stephen Boyd
caca6ad367 Merge branches 'clk-xilinx', 'clk-broadcom' and 'clk-platform' into clk-next
- BCM63268 timer clock and reset controller
 - Convert platform clk drivers to remove_new

* clk-xilinx:
  clocking-wizard: Support higher frequency accuracy
  clk: zynqmp: pll: Remove the limit

* clk-broadcom:
  clk: bcm: Add BCM63268 timer clock and reset driver
  dt-bindings: clock: Add BCM63268 timer binding
  dt-bindings: reset: add BCM63268 timer reset definitions
  dt-bindings: clk: add BCM63268 timer clock definitions

* clk-platform: (25 commits)
  clk: xilinx: Convert to platform remove callback returning void
  clk: x86: Convert to platform remove callback returning void
  clk: uniphier: Convert to platform remove callback returning void
  clk: ti: Convert to platform remove callback returning void
  clk: tegra: Convert to platform remove callback returning void
  clk: stm32: Convert to platform remove callback returning void
  clk: mvebu: Convert to platform remove callback returning void
  clk: mmp: Convert to platform remove callback returning void
  clk: keystone: Convert to platform remove callback returning void
  clk: hisilicon: Convert to platform remove callback returning void
  clk: stm32mp1: Convert to platform remove callback returning void
  clk: scpi: Convert to platform remove callback returning void
  clk: s2mps11: Convert to platform remove callback returning void
  clk: pwm: Convert to platform remove callback returning void
  clk: palmas: Convert to platform remove callback returning void
  clk: hsdk-pll: Convert to platform remove callback returning void
  clk: fixed-rate: Convert to platform remove callback returning void
  clk: fixed-mmio: Convert to platform remove callback returning void
  clk: fixed-factor: Convert to platform remove callback returning void
  clk: axm5516: Convert to platform remove callback returning void
  ...
2023-04-25 11:50:36 -07:00
Stephen Boyd
6f7478e3bb Merge branches 'clk-mediatek', 'clk-sunplus', 'clk-loongson' and 'clk-socfpga' into clk-next
- Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and
   MT8195 SoCs
 - Converted most Mediatek clock drivers to struct platform_driver
 - MediaTek clock drivers can be built as modules
 - Mediatek MT8188 SoC clk drivers
 - Clock driver for Sunplus SP7021 SoC
 - Reimplement Loongson-1 clk driver with DT support
 - Clk driver support for Loongson-2 SoCs
 - Migrate socfpga clk driver to of_clk_add_hw_provider()

* clk-mediatek: (84 commits)
  clk: mediatek: fhctl: Mark local variables static
  clk: mediatek: Use right match table, include mod_devicetable
  clk: mediatek: Add MT8188 adsp clock support
  clk: mediatek: Add MT8188 imp i2c wrapper clock support
  clk: mediatek: Add MT8188 wpesys clock support
  clk: mediatek: Add MT8188 vppsys1 clock support
  clk: mediatek: Add MT8188 vppsys0 clock support
  clk: mediatek: Add MT8188 vencsys clock support
  clk: mediatek: Add MT8188 vdosys1 clock support
  clk: mediatek: Add MT8188 vdosys0 clock support
  clk: mediatek: Add MT8188 vdecsys clock support
  clk: mediatek: Add MT8188 mfgcfg clock support
  clk: mediatek: Add MT8188 ipesys clock support
  clk: mediatek: Add MT8188 imgsys clock support
  clk: mediatek: Add MT8188 ccusys clock support
  clk: mediatek: Add MT8188 camsys clock support
  clk: mediatek: Add MT8188 infrastructure clock support
  clk: mediatek: Add MT8188 peripheral clock support
  clk: mediatek: Add MT8188 topckgen clock support
  clk: mediatek: Add MT8188 apmixedsys clock support
  ...

* clk-sunplus:
  clk: Add Sunplus SP7021 clock driver

* clk-loongson:
  clk: clk-loongson2: add clock controller driver support
  dt-bindings: clock: add loongson-2 boot clock index
  MAINTAINERS: remove obsolete file entry in MIPS/LOONGSON1 ARCHITECTURE
  MIPS: loongson32: Update the clock initialization
  clk: loongson1: Re-implement the clock driver
  clk: loongson1: Remove the outdated driver
  dt-bindings: clock: Add Loongson-1 clock

* clk-socfpga:
  clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling
  clk: socfpga: use of_clk_add_hw_provider and improve error handling
  clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling
  clk: socfpga: use of_clk_add_hw_provider and improve error handling
  clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling
  clk: socfpga: use of_clk_add_hw_provider and improve error handling
2023-04-25 11:50:08 -07:00
Andrew Halaney
32c2f2a46d clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
Add the EMAC GDSCs to allow the EMAC hardware to be enabled.

Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230413191541.1073027-2-ahalaney@redhat.com
2023-04-24 07:22:01 -07:00
Yassine Oudjana
edb10ace4d dt-bindings: reset: Add binding for MediaTek MT6735 TOPRGU/WDT
Add a DT binding for the MT6735 top reset generation unit/watchdog timer.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20230302124015.75546-2-y.oudjana@protonmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2023-04-22 16:01:48 +02:00
Alain Volmat
5c899820ba dt-bindings: reset: remove stih415/stih416 reset
Remove the stih415 and stih416 reset dt-bindings since those
two platforms are no more supported.

Signed-off-by: Alain Volmat <avolmat@me.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230416200442.61554-1-avolmat@me.com
Signed-off-by: Rob Herring <robh@kernel.org>
2023-04-18 12:48:50 -05:00
Arnd Bergmann
718acce6f0 More Qualcomm ARM64 Devicetree updated for v6.4
Devicetree for the QCM2210/QCM2290 is introduced. Support for the RB1
 board is introduced on QRB2210, RB2 on QRB4210, the AL02 board on
 IPQ9574, the MI01.6 board is introduced on IPQ5332 and initial support
 for Xiaomi Mi A3 is introduced on SM6125.
 
 Support for the output-enable/disable flag is introduced in the
 pinctrl-msm driver, and the non-standard "input-enable" is dropped from
 a range of platforms.
 
 A wide range of smaller fixes are introduced, based on Devicetree
 validation.
 
 MSM8953 gains LPASS, MPSS and Wireless subsystem support.
 
 The iommus property is removed from PCIe nodes in all platforms, as the
 only the child devices should be associated with iommu groups, through
 the existing iommu-map property.
 
 A few QUP instances are introduced on the IPQ5332 platform, and support
 for the MI01.6 board is introduced.
 
 The reserved-memory map on Huawei Nexus 6P is updated with the addition
 of splash screen framebuffer memory and adjustment to the reserved
 memory region overlapping the smem region.
 
 Regulators are introduces for the SA8775P Ride platform.
 
 A regulator is marked always-on, for correctness, on Trogdor. Pinconf
 fixes are introduced to both sc7180 and sc7280 devices. A dedicated
 reviewers list is added for boards relevant to the Chromebook engineers.
 
 A set of pinconf fixes are introduced for sc8280xp, labels are
 introduced for Soundwire nodes.
 
 The sensor core remoteproc and FastRPC thereon, is introduce in SDM845
 and enabled for OnePlus 6/6T and Shift Shift6mq.
 
 RMTFS, remoteprocs, ath10k and ramoops is introduced for the Lenovo Tab
 P11.
 
 UFS support is introduced on SM6125.
 
 SM8150 no longer defines the GPU to be in headless mode by default, GPU
 speedbins are introduced.
 
 GPU speedbins are introduced for SM8250 as well, as is support for
 display on Xiaomi Mi Pad 5 Pro, with two different panels supported.
 
 Soundwire controllers, ADSP audio codec macros and the Inline Crypto
 Engine support is added to the SM8550 platform.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ4xScVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FyAEQANkYPPmcATVeCMu8ABqOGr2YpN2v
 d1e8/Kdtrg0qWtqnXgkcec/+HvOqxTYlqW/iYLGf2fkgheQhbY8YOv3AU7FEG9Jr
 RNsPiyZ/2o2VPcskS6jQSsbAGKaWbhSh7Ao2lSUNSsPuhHOYw/Nu3iRxKCE1FdHn
 yqF2b+cipMwogKgx4LFCLwRTAG6f9HumDb3dwLeiUFPZH321MeJu8FzHnLt/wU5Z
 64EzST7W2J5PlWdFEoJOXGDmxnM35hKJrzliRf5oqTHhUMUlyxQI6W61vSfsz5PP
 7AE8DEMHD9b5fbRUf2mcMffPmhdvL194dSx10eTFMEuyoe+19CaMiZV86Cf8HeZ7
 8K6ZZJ/tF/UrOBc7zMDtCUTm5f9MYyfiKqQNJekcpYWugQSsKw8TQZ58q4jM352R
 vvq2ywMDk2olt4Jn0on7L6M8x+uOGIMQG3B32jJijE0fRFdMcHJMwfxEBsrGmsUW
 vZvDdhQtIQSy6aLHFqwzFbGePq1GeYLjEh+PbT8EHkaCHFx0dA+EobLnwcyqJYky
 AmWA2wjbIYU96KahSZ4Sz3MWTy9MrhHa10bwWoBvOsp1AAM/gpx5nIgoHXmzp2pg
 cXgCqzUBgdMrWfjEFgtLY1HyRMGbQ7T+fQhaS5xn9TnHNqnvqLAW/APhyhrAWWXx
 475V7NXAQMDd5FQX
 =vVPv
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5eO4ACgkQYKtH/8kJ
 UifICRAAz4I3XrqaTmlk8HtHwCSxhQfpF/6B+HmFbRG/tNFzWu4rbCyju2Gja6bi
 lQDxP42uuH78m35rXtAA848bZ8BpUQesJcGuwQoPYRwCPTLZH493QryEZ2DM4rp1
 IjKe1FmuHlToBiPxBgk+3EqaulXM9wSvV6lb7HlsEx6vt8TC9i0IhnfD6jHJ7ESs
 Pln0nmTREAyNpdcGOfmCZ3m4Rc6rvz8WHu+pX/nYZIdF44txYJaVh4mU7T0DuxUo
 KF2rfpPko4FXxqN6V3fYBRuRihu9lAqPwg86imQruqHnc0Lrfw2IMAdnUtXcmJOo
 qrYvQgifJKd5TZ1aYrkiQk5jSA9Wy5Wt66rzu7XGC8XhEftYcs3D/gYkqfRifI+a
 d+dqYLYXOLTopdDRfGgnCa74cNs7A+Y/mUC+WZQmWFI4q7I9SUnipRfzZt44Vbmp
 mn1C6XIoeseO8HOHDx0dNUsgiDH/JDLZv1/RTT6fWj3+9R2fQKmtdq8i9ZBdKL7r
 M/bAsS8PENmV6Dv3bHWxIa4xC380bDgCrjsLdHh5Oqfvbv2NHpftHkOaCK8BgE/t
 8YubTKxaxw0YQ0NtI+ku6Km9VJCG1zDEiQPMYEcklEzUj09CfkfCqBg4EkI92u2i
 P215llOlgIUzAgad/S0H2YhIIdnhsacU4adPEDD3devtKWdH+PE=
 =HFrk
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

More Qualcomm ARM64 Devicetree updated for v6.4

Devicetree for the QCM2210/QCM2290 is introduced. Support for the RB1
board is introduced on QRB2210, RB2 on QRB4210, the AL02 board on
IPQ9574, the MI01.6 board is introduced on IPQ5332 and initial support
for Xiaomi Mi A3 is introduced on SM6125.

Support for the output-enable/disable flag is introduced in the
pinctrl-msm driver, and the non-standard "input-enable" is dropped from
a range of platforms.

A wide range of smaller fixes are introduced, based on Devicetree
validation.

MSM8953 gains LPASS, MPSS and Wireless subsystem support.

The iommus property is removed from PCIe nodes in all platforms, as the
only the child devices should be associated with iommu groups, through
the existing iommu-map property.

A few QUP instances are introduced on the IPQ5332 platform, and support
for the MI01.6 board is introduced.

The reserved-memory map on Huawei Nexus 6P is updated with the addition
of splash screen framebuffer memory and adjustment to the reserved
memory region overlapping the smem region.

Regulators are introduces for the SA8775P Ride platform.

A regulator is marked always-on, for correctness, on Trogdor. Pinconf
fixes are introduced to both sc7180 and sc7280 devices. A dedicated
reviewers list is added for boards relevant to the Chromebook engineers.

A set of pinconf fixes are introduced for sc8280xp, labels are
introduced for Soundwire nodes.

The sensor core remoteproc and FastRPC thereon, is introduce in SDM845
and enabled for OnePlus 6/6T and Shift Shift6mq.

RMTFS, remoteprocs, ath10k and ramoops is introduced for the Lenovo Tab
P11.

UFS support is introduced on SM6125.

SM8150 no longer defines the GPU to be in headless mode by default, GPU
speedbins are introduced.

GPU speedbins are introduced for SM8250 as well, as is support for
display on Xiaomi Mi Pad 5 Pro, with two different panels supported.

Soundwire controllers, ADSP audio codec macros and the Inline Crypto
Engine support is added to the SM8550 platform.

* tag 'qcom-arm64-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (85 commits)
  arm64: dts: qcom: Add base qrb4210-rb2 board dts
  arm64: dts: qcom: sm8550: add Soundwire controllers
  arm64: dts: qcom: sm8250: Add GPU speedbin support
  arm64: dts: qcom: sm8150: Add GPU speedbin support
  arm64: dts: qcom: sm8150: Don't start Adreno in headless mode
  arm64: dts: qcom: ipq5332: add support for the RDP468 variant
  arm64: dts: qcom: sdm630: move DSI opp-table out of DSI node
  arm64: dts: qcom: sm6115p-j606f: Enable ATH10K WiFi
  arm64: dts: qcom: sm6115p-j606f: Enable remoteprocs
  arm64: dts: qcom: sm6115: Add RMTFS
  arm64: dts: qcom: sm6115-j606f: Add ramoops node
  arm64: dts: qcom: msm8916-thwc-ufi001c: add function to pin config
  arm64: dts: qcom: sm8550: Add the Inline Crypto Engine node
  arm64: dts: MSM8953: Add lpass nodes
  arm64: dts: MSM8953: Add mpss nodes
  arm64: dts: MSM8953: Add wcnss nodes
  arm64: dts: qcom: sm8350: remove superfluous "input-enable"
  arm64: dts: qcom: sm8150: remove superfluous "input-enable"
  arm64: dts: qcom: apq8016: remove superfluous "input-enable"
  arm64: dts: qcom: sc8280xp-lenovo-thinkpad: correct pin drive-strength
  ...

Link: https://lore.kernel.org/r/20230414031550.2412379-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 18:01:50 +02:00
Arnd Bergmann
10678a0751 Qualcomm ARM64 updates for v6.4
PCI I/O and MEM ranges are corrected across all targets with PCIe
 enabled. Likewise is CPU clocks defined to be provided from CPUfreq for
 a wide range of platforms, to satisfy the OPP definitions, and LLCC bank
 information is corrected for all relevant platforms.
 
 IPQ5332 gains SMEM, CPUfreq and support for triggering download mode.
 The MI01.2 board is introduced.
 
 On MSM8916 WCN compatibles are moved to be defined per board, to avoid
 issues when boards rely on the incorrect defaults. Support for Yiming
 UZ801 4G modem stick is introduced.
 
 XO clock is defined and fed to RPMCC on MSM8953 and MSM8976, to ensure
 clock trees are properly rooted. DSI clocks feeding into gcc are
 described on MSM8953.
 
 On MSM8996 the external audio components are moved from the SoC dtsi. A
 few DWC3 quirks are added.
 
 On MSM8998 GPIO names are introduced for Sony Xperia XZ Premium, XZ1 and
 XZ1 Compact. A numbe of boards have GPIO keys properly marked as
 wakeup-source.
 
 The SA8775P platform is extended with CPUfreq, UARTs, I2C controllers,
 SPI controllers, SPMI and PMICs, PDC support. The associated PMICs gains
 reset and power key support, as well as thermal zones defined. Nodes are
 sorted. On top of this the SA8775P Ride board/platform is introduced.
 
 On SC7180 and SC7280 a range of fixes coming from DeviceTree validation are
 introduced, some clearing up unused properties, others correcting
 errors. A number of Google rev0 boards on SC7180 are dropped, as these
 are not considered to be in use by anyone anymore.
 
 On SC8280XP RTC support is introduced and enabled for the CRD and Lenovo
 Thinkpad X13s. It gains another UART, upon which Bluetooth is enabled on
 the Lenovo ThinkPad X13s. The touchpad definition is altered to attempt
 to probe both devices seen in the wild. A number of bug fixes are also
 introduced, and the regulator definitions on X13s are corrected.
 
 On SDM845 dynamic power coefficients are improved. BWMON compatible is
 corrected. Xiaomi Pocophone F1 gains notification LED. Sony Xperia XZ2,
 XZ2 Compact and XZ3 gains display, touchscreen, gpu and remoteproc
 support. OnePlus 6 and 6T gains hall sensor.
 
 GPU clock controller and remoteproc nodes are added for SM6115. CPU
 clock are defined to come from CPUfreq. Board-specific USB-properties
 are moved out of the SoC dtsi.
 
 On SM6375 L3 scaling, IMEM, RMTFS, RPM sleep stats, Tsens, modem
 remoteproc and WiFi nodes are added. Tsens thermal zones are defined and additional low power states
 are defined. Sony Xperia 10 IV gains volume down key support.
 
 On SM8150 another UART is introduced, to be used by GNSS on the SA8155
 ADP. Support for the Flash LED block in PM8150L is added.
 
 On SM8250 TPDM MM and PRNG is defined, MHI region is added to PCIe node.
 A few bug fixes are introduced after Devicetree validation.
 
 The DisplayPort controller on both SM8350 and SM8450 is defined and the
 related QMP instance is transitioned to the USB3/DP combo variant. IMEM
 and PIL info is introduced, for post mortem debugging of remoteprocs. On
 the HDK PMIC GLINK is enabled and role switch is enabled. Some audio
 resources are corrected.
 
 A typo in the USB role property of the Microsoft Surface is corrected,
 thanks to DeviceTree validation.
 
 PCIe controllers and PHYs descriptions are corrected, and pinctrl state
 definitions are moved from the soc to the board definition. BWMON
 compatibles are corrected. PM8550B gains the definition of the eUSB2
 repeater and this is enabled on the MTP. PMIC GLINK is also defined for
 the MTP and connected to DWC3, for role switching support.
 
 In addition to this, a range of cleanups based on Devicetree validation
 is introduced.
 
 A few clock bindings are introduced, from topic-branches shared with the
 clock tree, to aid introduction of references to these.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ0QQEVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F3WgQALGaxeK2rYNfVVR8YMrsjDYow2vq
 Uup1AxG2sAGdLBiegf0btiIlw6y+t7pdUuP+elKx3sLrx/UiJfa7/fqdMhfft3Qo
 16xhKIHQwokgGyl6hFJg2WTLrbC/qq60rB2YP/aR3pBCovu1nL/jX/9de28jNXUe
 FydCDCAfa1Zd3fDdp0uqGWA9mCSDDnlL0UuiP7PIkUFEEkPHdif/a3H1O5y1S+LW
 Eq38bJeMoQUYOYx4hYTxzmkCjbZVFEhho2lVyfHLy2fIaGuA4Gm4THnXMu5P9vIL
 Q4dNR6/XnquH2G9LcDLIcPWkWg8KkFDNnRQBkIkNZQAUqqY2klY/8sa0aZZJk53f
 KD393N/aWUV7tGYynLLc5oluoKLIlFFMdWVdxxR36zP70hu6Q2kGj4NUIB+odMdS
 QgJIyBBJ2dafvB5llXGaUXMOFYJYolcoss0EWfCU5jCg2XhxC8Q6mvpF1vAuCTTZ
 aueb0RlXxzdTcCy0jkqCl1GsBOuQONtAOnQ8nRE+8ookzLGJ8RBnoUmWUifzxnqe
 ueYdGPu2nnmqrbYAJqzr1Y9G7ImsX0V72iwC0wFFL8woZzDPGgEcDIyOaGCI3Hus
 P3weJ9WScj6ScRvRTI4EdZL03oaPPsF8zMA8xyXoCzeWtp3wsrtFNbVqAZSEvcAq
 a92owWcK+flh9Ckj
 =ZyN2
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5d90ACgkQYKtH/8kJ
 UifbkRAA0tH8h0ehQRsfgaijE+KNM5IOwi7iszD7NObNG+5Nal5QO6H9CvrEEbgv
 4c6qwkC7F+ZN+zTVeKTufqZ6/zkylW+AMzL4UuAl5BxhMMrWzsg1NR1+NlbKssEb
 EBbLll7uxohuK79JNjmor/VV+zJX+hOyAhsf6yo6gpYFiJdgrRGwWVFVflNTNQis
 mpw5U4SyFNo4lq/HDERuxWbbsTl+VmoCeezCRgolaVkq4RTeMNcIxbm/kJ+t9ela
 HNm6mpJWqUUGeNpos5VdCqLApxBQgYmwz1mPHTQfC0V9v8YlVnTTKVmw4lHoGnZp
 ADN7iQSqqpsOLjML3+7HfQ8FWTTpj6FbE+vcSTiLjnstv9oDYd2wf9FPzJqcDVTl
 MucZVPk75zutakDuHOxizdfSTXPnpyEXnpnEUla6E+BntkB5eCTz45NN9B35gowA
 fY437FQ95eY2mV2vpya91rH2Rtw5BJbZW6jsw+WxT29A67LBa+sJrTayDNzYLuUz
 GjSb2vmRr2r3WG1jy8QQxVC3R/t4rlqXBnmJ91nHNIgrGl5ExrIEt+IDRsqHlS7T
 V1xX4fl9Ge2zfZeoFPFhgIBpPtvEkW5mUKIjRX6EBvRnG9+T8CWuWSnJDuFa6AMZ
 kxAhqUojmDO8f1E/BPiHHCP31dfUrMOVor0fu9qu7o8/H/WPo04=
 =OcHF
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM64 updates for v6.4

PCI I/O and MEM ranges are corrected across all targets with PCIe
enabled. Likewise is CPU clocks defined to be provided from CPUfreq for
a wide range of platforms, to satisfy the OPP definitions, and LLCC bank
information is corrected for all relevant platforms.

IPQ5332 gains SMEM, CPUfreq and support for triggering download mode.
The MI01.2 board is introduced.

On MSM8916 WCN compatibles are moved to be defined per board, to avoid
issues when boards rely on the incorrect defaults. Support for Yiming
UZ801 4G modem stick is introduced.

XO clock is defined and fed to RPMCC on MSM8953 and MSM8976, to ensure
clock trees are properly rooted. DSI clocks feeding into gcc are
described on MSM8953.

On MSM8996 the external audio components are moved from the SoC dtsi. A
few DWC3 quirks are added.

On MSM8998 GPIO names are introduced for Sony Xperia XZ Premium, XZ1 and
XZ1 Compact. A numbe of boards have GPIO keys properly marked as
wakeup-source.

The SA8775P platform is extended with CPUfreq, UARTs, I2C controllers,
SPI controllers, SPMI and PMICs, PDC support. The associated PMICs gains
reset and power key support, as well as thermal zones defined. Nodes are
sorted. On top of this the SA8775P Ride board/platform is introduced.

On SC7180 and SC7280 a range of fixes coming from DeviceTree validation are
introduced, some clearing up unused properties, others correcting
errors. A number of Google rev0 boards on SC7180 are dropped, as these
are not considered to be in use by anyone anymore.

On SC8280XP RTC support is introduced and enabled for the CRD and Lenovo
Thinkpad X13s. It gains another UART, upon which Bluetooth is enabled on
the Lenovo ThinkPad X13s. The touchpad definition is altered to attempt
to probe both devices seen in the wild. A number of bug fixes are also
introduced, and the regulator definitions on X13s are corrected.

On SDM845 dynamic power coefficients are improved. BWMON compatible is
corrected. Xiaomi Pocophone F1 gains notification LED. Sony Xperia XZ2,
XZ2 Compact and XZ3 gains display, touchscreen, gpu and remoteproc
support. OnePlus 6 and 6T gains hall sensor.

GPU clock controller and remoteproc nodes are added for SM6115. CPU
clock are defined to come from CPUfreq. Board-specific USB-properties
are moved out of the SoC dtsi.

On SM6375 L3 scaling, IMEM, RMTFS, RPM sleep stats, Tsens, modem
remoteproc and WiFi nodes are added. Tsens thermal zones are defined and additional low power states
are defined. Sony Xperia 10 IV gains volume down key support.

On SM8150 another UART is introduced, to be used by GNSS on the SA8155
ADP. Support for the Flash LED block in PM8150L is added.

On SM8250 TPDM MM and PRNG is defined, MHI region is added to PCIe node.
A few bug fixes are introduced after Devicetree validation.

The DisplayPort controller on both SM8350 and SM8450 is defined and the
related QMP instance is transitioned to the USB3/DP combo variant. IMEM
and PIL info is introduced, for post mortem debugging of remoteprocs. On
the HDK PMIC GLINK is enabled and role switch is enabled. Some audio
resources are corrected.

A typo in the USB role property of the Microsoft Surface is corrected,
thanks to DeviceTree validation.

PCIe controllers and PHYs descriptions are corrected, and pinctrl state
definitions are moved from the soc to the board definition. BWMON
compatibles are corrected. PM8550B gains the definition of the eUSB2
repeater and this is enabled on the MTP. PMIC GLINK is also defined for
the MTP and connected to DWC3, for role switching support.

In addition to this, a range of cleanups based on Devicetree validation
is introduced.

A few clock bindings are introduced, from topic-branches shared with the
clock tree, to aid introduction of references to these.

* tag 'qcom-arm64-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (256 commits)
  arm64: dts: qcom: sc8280xp-x13s: Add bluetooth
  arm64: dts: qcom: sc8280xp: Define uart2
  arm64: dts: qcom: sc8280xp: Add "mhi" region to the PCIe nodes
  arm64: dts: qcom: sm8250: Add "mhi" region to the PCIe nodes
  arm64: dts: qcom: sdm845: Add "mhi" region to the PCIe nodes
  arm64: dts: qcom: sa8775p-ride: set gpio-line-names for PMIC GPIOs
  arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes
  arm64: dts: qcom: sa8775p: pmic: add thermal zones
  arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input
  arm64: dts: qcom: sa8775p: pmic: add the power key
  arm64: dts: qcom: sa8775p: add the Power On device node
  arm64: dts: qcom: sa8775p: add support for the on-board PMICs
  arm64: dts: qcom: sa8775p: add the spmi node
  arm64: dts: qcom: sa8775p: add the pdc node
  arm64: dts: qcom: sa8775p: sort soc nodes by reg property
  arm64: dts: qcom: sa8775p: pad reg properties to 8 digits
  arm64: dts: qcom: sc8280xp: correct Soundwire wakeup interrupt name
  arm64: dts: qcom: sdm845-tama: Enable GPI_DMA0/1
  arm64: dts: qcom: sdm845-tama: Enable GPU
  arm64: dts: qcom: sdm845-tama: Enable remoteprocs
  ...

Link: https://lore.kernel.org/r/20230410170233.5931-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 17:57:17 +02:00
Arnd Bergmann
c47b89b418 TI K3 device tree updates for v6.4
New features:
 * Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm
 * Add support for AM625 based BeaglePlay, AM62-LP-SK
 * Audio, RTC, watchdog support for AM625
 * McSPI for J7200,j721e, j721s2, J784s4
 * ADC for j721s2
 * Crypto acceleration, CPSW2G for J784s4
 
 Non critical fixes:
 AM62, AM62a:
 * Fix schematics error to increase DDR to 4GB on AM62a-SK
 * L2Cache size fix (AM62a/AM625)
 * ti,vbus-divider property to USB1 on AM625-SK
 * Gpio count fix for AM625
 
 J7200,j721e, j721s2, J784s4, AM68, AM69:
 * ti,sci-dev-id for J784s4 NAVSS nodes
 * j721e-sk: Drop application specific firmware name
 * am68-sk: Fix the gpio expander lines for production version
 
 Cleanups:
 * Pinmux header move to dt folder (next kernel PR, we will drop the uapi header).
 * j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmQ0EJgACgkQ3bWEnRc2
 JJ0SYRAApVR/RAGWBrYYAQ8oN+kIDaep3mHPtRMPtVwKyK0SU5FQZM7PWok2wdpH
 h0gw+1S4kZKcZsrz7153TzZHUNHtJ+TEG1g+EIhJh2OSV0SnqUOWucTS9nkt7MPs
 DvzbrF8RL9xCEi0dUtpBT+YEx0HF5AijkvjHWKBYI/XcbxmqrrQZ34wJxUR7qsFC
 nO8gADcQZjp14ZwP3b4Ag6jLMez2ERqZ3tM/if9WOlvpkQ3eI9e6Gjq5inMPjzNm
 gjqvN1gyWDi3pbG7Y+jrs/O26atnOTRAHUKww460x15nNi6a3qU1jN4awlBtANla
 UTu7CSuG1I6HWQaR2bGlWgkKxNOJAcfqtiCtMHsInYy7yDlwczC1KwWSFWdGxNoF
 6yelo+X4oJhiQOqhVQdHpyCiT4HoyEWaS1tsXcke16N8X0fjdTWIq1deqXp5vLdE
 ne5FYQK1y+HyGJJGeDddbV9zuUQby9KoziB+N/VHWgDjUGWbrdmSEA6C3BNcF5+4
 X6wd0NQPMc9sFVR5s3zGXrtozVMlkMuozCYlPVtaHDtNkGftGIq0KrsjQVIKiYwb
 GinjS8eM63p0PGiZRBf+49EkH/yC82svSM/XepEFUyvUPwYdm43zVUVz6tNqv3RT
 ms9wnzJpgRd+TcPn1xr5QojFxsnZjGr/Hb6mvbcU5S1OQfgkqZo=
 =zvF1
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5dgAACgkQYKtH/8kJ
 UieM1g//bYhlrB3jwoecovyxOocd85EnfP1ykwXvGVjF+UvHujfcH7ExZaCg3Km3
 RQbMVLwynhGRBvys1YwPRh09FjOSKoZwpyly0ROFCP9Sc6QJLjtzb7zVAo7U3A5K
 rVZ/ZeG3/OLqB3l5ZaJS6zVJppnvm3R0CtVlRO9oD/XUdKhRDQPCaXZyD3oaMCjY
 bXNs1y/giESPCzwnR8qVvVHGQ6JoMtnznff1zgodYvuo9+e3xSIpTZvbRY1Aguc1
 QbcaRISNqOpGsZHrUlw+PrPlIYQYb1osOq81R4g6NX3/J+UN9kz+uTb7f1xtrt+W
 tGbvVRQHNiRXHOC5fUGwxfcV3+M6YUKpCiap/l1brcchfeHb0La1+BN0dRMgybQf
 EG27jfHbAAEA8L7b1gutAY3yNfhJPvahWT/wQ0L4xhu33KpRSNwHBSkg6qXAFi1u
 aPWfRwm3bGpVoHltTVKdULqZb+bYKY/w8GfipbvCpI2LvX8MJrsFSxqFcSw1vgB7
 iNYebbVUI+e/UUTEeKYE4ct98vezbGNBTxFcsPgVQL5UHAkYrzXHet3WuDP73hEz
 w+01eIaDA8R1TnpgTX4doqgEj6illiv6WY2EUwoJzBGc76UVOQf2eraimWGp1Vtr
 mh8tlfjnErTv+iMPcBO8bjvBXDhQcb4iBN+5q8KkVvqtOtcSsjA=
 =3wzd
 -----END PGP SIGNATURE-----

Merge tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt

TI K3 device tree updates for v6.4

New features:
* Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm
* Add support for AM625 based BeaglePlay, AM62-LP-SK
* Audio, RTC, watchdog support for AM625
* McSPI for J7200,j721e, j721s2, J784s4
* ADC for j721s2
* Crypto acceleration, CPSW2G for J784s4

Non critical fixes:
AM62, AM62a:
* Fix schematics error to increase DDR to 4GB on AM62a-SK
* L2Cache size fix (AM62a/AM625)
* ti,vbus-divider property to USB1 on AM625-SK
* Gpio count fix for AM625

J7200,j721e, j721s2, J784s4, AM68, AM69:
* ti,sci-dev-id for J784s4 NAVSS nodes
* j721e-sk: Drop application specific firmware name
* am68-sk: Fix the gpio expander lines for production version

Cleanups:
* Pinmux header move to dt folder (next kernel PR, we will drop the uapi header).
* j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation

* tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (34 commits)
  arm64: dts: ti: k3-j784s4-evm: Add eMMC mmc0 support
  arm64: dts: ti: Enable audio on SK-AM62(-LP)
  arm64: dts: ti: k3-am62-main: Add McASP nodes
  arm64: dts: ti: k3-j784s4: Add MCSPI nodes
  arm64: dts: ti: k3-j721s2: Add MCSPI nodes
  arm64: dts: ti: k3-j7200: Add MCSPI nodes
  arm64: dts: ti: k3-j721e: Add MCSPI nodes
  arm64: ti: dts: Add support for AM62x LP SK
  arm64: dts: ti: Refractor AM625 SK dts
  dt-bindings: arm: ti: k3: Add compatible for AM62x LP SK
  arm64: dts: ti: k3-am625-sk: Add ti,vbus-divider property to usbss1
  arm64: dts: ti: k3-am68-sk-base-board: Update IO EXP GPIO lines for Rev E2
  arm64: dts: ti: Add k3-am625-beagleplay
  dt-bindings: arm: ti: Add BeaglePlay
  arm64: dts: ti: k3-j7200: Add overlay to enable CPSW5G ports in QSGMII mode
  arm64: dts: ti: j7200-main: Add CPSW5G nodes
  arm64: dts: ti: k3-j721e: Add overlay to enable CPSW9G ports in QSGMII mode
  arm64: dts: ti: k3-j721e: Add CPSW9G nodes
  arm64: dts: ti: k3-j784s4-evm: Enable MCU CPSW2G
  arm64: dts: ti: k3-j721s2-common-proc-board: Add pinmux information for ADC
  ...

Link: https://lore.kernel.org/r/20230410140521.3u3fftgnejakqnzj@shakable
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 17:49:20 +02:00
Arnd Bergmann
17e26de12a Renesas DTS updates for v6.4 (take two)
- Add PWM support for the R-Car H1 and H2 SoCs,
   - Add slide switch and I2C support for the Marzen development board,
   - Add SCI (serial) and Camera support for the RZ/G2L SoC and the
     RZ/G2L SMARC EVK development board,
   - Add IOMMU support for the R-Car V4H SoC,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZDO9eAAKCRCKwlD9ZEnx
 cDqrAP4wBrYlD0ih3wMZbcrHAZpIfhLLLlUBDT0JfYYy/mSGXwEA69C5A00Gx47o
 R4eLM6rSfPKw4KNJcLFwO5eqMsPzEQs=
 =uYv8
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5daMACgkQYKtH/8kJ
 UicMmw/9EPKDe59WyKOze/gv1OYbAChIIhU6ofuLe8ot3d5W9aqUq9ua3WFnXj4l
 yA96A8GElmTWLa1XXc6tl25HqAOVuacOTyrSWSfzknWj2w2AY8sssw1BCunxyZLK
 EG+FNakdYJsTDYUisG1dYFAe8uY/bcagnaJYOVX/+ofX8IaTEddC5pRSv7ytgHZt
 uK/Jk/S4rAK2XZPRU+xtZgbbD3fmBgVEbofWhYMalZJ5hBFLUfSSBt42LBKFg91J
 MfDpzfy8gz58G0B9Aoq80WLHdx15MHRdMwT8zmHaPYxOMiufxKCKztfpU9G6aktl
 PZ7RQgSelL7ZCrfJpJRi5Nd3YrcnNKC2MQulFCbs4BMfF5oLeyjxEsSxQIPum4rq
 T/yEgsNGK9VgWhYM6as80d+kLFQhEF3DQXcJK3RdpXemS2Yj2s3MXcsQrjQ8zQYY
 GMH999L0VpC0dgpB5SGWZyBRTX+h8Y0X+tg4OrkWYSVKkShGi6WJ/3GdqyNK2D3o
 ic8sx+IFrOKDr/mmbcJ2RiYdo16wQp6c/UkZ97Lq9vaXVi4lA6C8oymCEMpdsvbm
 bvSGI11hGEGsUOA2axbx7XxmkFfBPqUbiNgRWx1YT0u4ILYxRtL+IrFtYKcWcdHM
 Z5nzWC5Xv/XEvvnNYE/9NQWBEA2MEQG23AwwYvNYtYGwv48PO5w=
 =UIZB
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.4 (take two)

  - Add PWM support for the R-Car H1 and H2 SoCs,
  - Add slide switch and I2C support for the Marzen development board,
  - Add SCI (serial) and Camera support for the RZ/G2L SoC and the
    RZ/G2L SMARC EVK development board,
  - Add IOMMU support for the R-Car V4H SoC,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: r8a779a0: Revise renesas,ipmmu-main
  arm64: dts: renesas: falcon-csi-dsi: Set bus-type for MAX96712
  arm64: dts: renesas: r8a779g0: Add iommus to MMC node
  arm64: dts: renesas: r8a779g0: Add iommus to DMAC nodes
  arm64: dts: renesas: r8a779g0: Add IPMMU nodes
  arm64: dts: renesas: r8a779f0: Revise renesas,ipmmu-main
  arm64: dts: renesas: rzg2l-smarc: Enable CRU, CSI support
  arm64: dts: renesas: r9a07g044: Add CSI and CRU nodes
  arm64: dts: renesas: r9a07g044: Enable SCI0 using DT overlay
  ARM: dts: r8a7790: Add PWM device nodes
  ARM: dts: r8a7790: Add TPU device node
  ARM: dts: marzen: Enable I2C support
  ARM: dts: marzen: Add slide switches
  ARM: dts: r8a7779: Add PWM support
  dt-bindings: clock: r8a7779: Add PWM module clock
  arm64: dts: renesas: rzg2l: Add clock-names and reset-names to DMAC nodes

Link: https://lore.kernel.org/r/cover.1681113117.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 17:47:47 +02:00
Arnd Bergmann
d40a2f5062 RISC-V Devicetrees for v6.4
Microchip:
 A "fix" for the system controller's regs on PolarFire SoC, adding a
 missing reg property.
 The patch had been sitting there for months and I only re-found it
 recently, so you can guess how much of a "fix" it actually is. It'll
 become needed when the system controller's QSPI gets added in the future,
 but at present there's no urgency as the driver can handle both the
 current and "fixed" versions.
 
 StarFive:
 Basic support for the JH7110 & the associated first-party dev board, the
 VisionFive v2 (in two forms). There's a bunch of dt-bindings required
 for this too, all of which have had input from the DT folk. There's
 enough in this tag to boot to a console w/ an initramfs but little more.
 The SoC supports some of the "new" bit manipulation instructions, which
 is a good test for the recently added Zbb support in the kernel.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZC8o6wAKCRB4tDGHoIJi
 0pdpAP0Y0qkT5tZSV635h2XOrWBpW3D3Vpx6+LGmw2mRjhHVPgD+Mfe0LkP6Dbq3
 JS6fMISbgMAG/8dqcys/e0gmHksYJAk=
 =FsQ1
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5U/EACgkQYKtH/8kJ
 Uif0hhAAxHk3QfPh5BF/1TzzUdeOgXuCiT9sQWHB9VtX1N03nwRoMETbFPRxjI1v
 P/KckzA5nxVA8q8Me+hb5nRQFwiDOVsH5cBMMnPQ46NGImEaptZ7Jwf1/RT1yk6n
 eBg9vRipRhD56CYTE20iasjhwjVohljvce58Rg61oXQ2lK1dKxnIjPeDfypPz9/p
 149/wWUy8e6pGIciDw25hKGuxZiXHlO4OwdL0yWggXl/iuBi8l7gAQAcCv7vWNS3
 oM8t6n/o1Vr0L+MBJtBBKPmuPKu7u54+RWsaKrO3zyiRRKGjI/VMZOi5ZKcooynL
 ThAGlqCIrnXu25XJ2V7l95FDTdPeTljhh1FRyOIJjvzlCX9QBdr5suQU3q9zr+Mf
 ZdE5baezkwsTF+1Hi/Yc65gCAtUfQmGG88/TE1krFw4aaE1xVr7nAfDCpdLcCzDS
 D/1b9/4h/2B2dJIdBO3VdzKG4bTcaK3Eb6TX6z2zIZ6stNHcoDxr6dcQXdiGAoYu
 /I8zAX3zTo5Q8E0Y67h7ao4dxDqxVUIop/92OJeD3X3IkcJreXEuxBEEsRvs53P6
 /tqAsG5zPpW5GwfeopUHfFUYJRn+sLrqQ9zD+k4InwiCSlR/tJ7tBMXqyRsQUEyR
 P336MHjq10PRVmgKjsPpTx87K9f39Qgh6doHWAKBfMo/gSQ8z9U=
 =l6EI
 -----END PGP SIGNATURE-----

Merge tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

RISC-V Devicetrees for v6.4

Microchip:
A "fix" for the system controller's regs on PolarFire SoC, adding a
missing reg property.
The patch had been sitting there for months and I only re-found it
recently, so you can guess how much of a "fix" it actually is. It'll
become needed when the system controller's QSPI gets added in the future,
but at present there's no urgency as the driver can handle both the
current and "fixed" versions.

StarFive:
Basic support for the JH7110 & the associated first-party dev board, the
VisionFive v2 (in two forms). There's a bunch of dt-bindings required
for this too, all of which have had input from the DT folk. There's
enough in this tag to boot to a console w/ an initramfs but little more.
The SoC supports some of the "new" bit manipulation instructions, which
is a good test for the recently added Zbb support in the kernel.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree
  riscv: dts: starfive: Add StarFive JH7110 pin function definitions
  riscv: dts: starfive: Add initial StarFive JH7110 device tree
  dt-bindings: riscv: Add SiFive S7 compatible
  dt-bindings: interrupt-controller: Add StarFive JH7110 plic
  dt-bindings: timer: Add StarFive JH7110 clint
  dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
  dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
  riscv: dts: microchip: fix the mpfs' mailbox regs
  riscv: dts: microchip: add mpfs specific macb reset support

Link: https://lore.kernel.org/r/20230406-shank-impromptu-3d483bbc249f@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 15:24:00 +02:00
Arnd Bergmann
126c6da71f Qualcomm driver updates for v6.4
The Qualcomm SCM driver will now always clear the download bit, avoiding
 entering download mode on a clean reboot because the bootloader left it
 set. The vmid bitmap passed to qcom_scm_assign_mem() is transitioned to
 a well defined size. SM6375 support is added, and SC8180X,
 QDU1000/QRU1000, IPQ5332 and IPQ9574 compatibles are documented.
 
 GENI gains support for newer hardware with deeper FIFOs.
 
 The BWMON driver is updated to better handle the two register blocks,
 which are not consistent between MSM8998 and newer platforms.
 
 The LLCC driver no longer assumes a fixes stride across the various
 banks, and instead acquire the bank placement from DeviceTree. EDAC
 support for polling is introduced. EDAC support on SDM845 is disabled,
 as its been observed that accessing relevant registers is not permitted
 on most devices.
 
 PMIC GLINK is reworked to support defining which auxiliary children to
 spawn per platform, support for spawning a UCSI child is added and
 SM8450 and SM8550 is introduced.
 
 The RPM power-domain driver is cleaned up by moving and generalizing
 structures that are common between platforms, rather than duplicating
 everything. Macros are replaced with just direct definition of the
 relevant structures. Support for defining parent relationships between
 the power-domains is introduced, like it has been in rpmhpd for a long
 time.
 
 Number of processors has gone up, so max processor count in SMEM
 is bumped again. Error handling in SMSM is cleaned up using
 dev_err_probe().
 
 Socinfo is taught about IPQ9574, QCM2290, QRB2210, QRB4210, SM7150,
 SA8775P and a number of PMICs.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ0Ka0VHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F9MIP/0vjJCDf+EtUJpN1KxwMzmXZRuac
 wJweQdgfD8m+fB+33Gs9bX8Jw8j4zddZlM45XCHiNsQ72Gs8RqvwCBcjkxtCGrTq
 Jm33zEWcRjm/7Z1R4bOrGdRM92NAUJK0RePSNSpBoB4s5rdvzYHCYttXGe80A7xI
 nLLEpxAbUb3y6UtP7adqEpiWtIJ16Nv/Sa1uWGXyhwjwTuBCXFKG2UdsQxJhxLna
 CkkJ2d4tfVcRcYNh8DEZEX9qs9aikZJvH3QtTe2UpJz8hlNroqmgHZtAWdPbOzAY
 xAMv/UUeq+kquUJr0cRhcuIRBruUGhnXISqHsc0T6xqyfnq6dR4m/tVfwlQ15BKe
 zq17mJUiK7fZyWWSkBf8SOPgez8GUaD/2Zqssf4JIKeC/VT3uqW3oejhm6o+sfrG
 ik0Tph/SVhcVvUQOsVygdf4BQXvOJDnXoZo182XZV4FiESkxnbRlhedzk2+s3agU
 0F76hcNgASpskPw37A4uHHC9bwfpWJQWuGVHUVW9Me6CMxxaCcXWIhDc47i6NZeB
 vrwJGXs8dWCKj9pOdI1Fb9GJ7LvP7kQF9VfdwqA4jstWggooAkNaAfgYnAuprsAC
 kCCvBOfoB1LjB4fLjf5gJEwr9HOOwS9TPtsfd772IFXdI9zwv9ImDYRMpCX5L3pk
 aVEW4VjRI6TRTFMB
 =Bo2w
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5SFYACgkQYKtH/8kJ
 UieADQ/+JSEbvQapNaxgKpG6HS3uQq+24BUmBvh2MbM5SwPi6D0JqoUx5wtnpg91
 uBanGMKqCKkqc64jgNVsRwJW6/d8pdLLx7VCEsJaJPjhvBptD6K2QTFF5Gflbp7a
 HZmlteqMZG8zdc0KHSCuSXX6RtonAE9xBWBXe5EUhY22eyPB9okhNerRDSHU3add
 7fm48p3V5k4/atX4BFYiysiHoAWxnXW+mz1uSfTWuONkW8+vKrAcD5b9ujzXW6ZD
 TGXmKHY5M08BsqHqDcEBjReuIVcacs63H6rX0JMx0I7uCT1qNvmwEqLeXrXKoo0n
 hwumr+I2+CEzhhSCkZY8rWH/He7Kd7WxfLAxCMdaDBoZYbxGAAqytZGYBJUx8mY8
 RDA8YHfYWt56rhZL8SrwhD0dzLkeDTT5oKXFLtrTTcghOFNJl4uELhUU5wXJGP6q
 3GTK0nxIoBKznaCzAhD/9JonS8mO3GbigVhw/yGQeionwZJyl1DXdSeRYGezDeII
 eKjtKvngoKbt/3Il9yiL+JUaPFIfPwVrIGnMBQjayjyH8m+5TDHD0+f0R5mnW8g8
 qLvyga0GndPkFYS0Gpnw8Dqd5NfeRQVGkSJEELyFevnFHldZpVw8kCuejmfjXvGV
 tsOMjL0iZt4NrIZr5eFBa4b41o47hU8s9WYY/4VEaccuybTCxUc=
 =wYqZ
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

Qualcomm driver updates for v6.4

The Qualcomm SCM driver will now always clear the download bit, avoiding
entering download mode on a clean reboot because the bootloader left it
set. The vmid bitmap passed to qcom_scm_assign_mem() is transitioned to
a well defined size. SM6375 support is added, and SC8180X,
QDU1000/QRU1000, IPQ5332 and IPQ9574 compatibles are documented.

GENI gains support for newer hardware with deeper FIFOs.

The BWMON driver is updated to better handle the two register blocks,
which are not consistent between MSM8998 and newer platforms.

The LLCC driver no longer assumes a fixes stride across the various
banks, and instead acquire the bank placement from DeviceTree. EDAC
support for polling is introduced. EDAC support on SDM845 is disabled,
as its been observed that accessing relevant registers is not permitted
on most devices.

PMIC GLINK is reworked to support defining which auxiliary children to
spawn per platform, support for spawning a UCSI child is added and
SM8450 and SM8550 is introduced.

The RPM power-domain driver is cleaned up by moving and generalizing
structures that are common between platforms, rather than duplicating
everything. Macros are replaced with just direct definition of the
relevant structures. Support for defining parent relationships between
the power-domains is introduced, like it has been in rpmhpd for a long
time.

Number of processors has gone up, so max processor count in SMEM
is bumped again. Error handling in SMSM is cleaned up using
dev_err_probe().

Socinfo is taught about IPQ9574, QCM2290, QRB2210, QRB4210, SM7150,
SA8775P and a number of PMICs.

* tag 'qcom-drivers-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (51 commits)
  dt-bindings: firmware: document Qualcomm SC8180X SCM
  dt-bindings: sram: qcom,imem: document SM6375 IMEM
  soc: qcom: icc-bwmon: Handle global registers correctly
  soc: qcom: icc-bwmon: Remove unused struct member
  soc: qcom: smsm: Use dev_err_probe()
  firmware: qcom_scm: Add SM6375 compatible
  soc: qcom: llcc: Add configuration data for SM7150
  dt-bindings: arm: msm: Add LLCC for SM7150
  dt-bindings: soc: qcom: smd-rpm: re-add missing qcom,rpm-msm8994
  soc: qcom: pmic_glink: register ucsi aux device
  dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible
  dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible
  firmware: qcom_scm: Clear download bit during reboot
  dt-bindings: soc: qcom: aoss: Document QDU1000/QRU1000 compatible
  dt-bindings: firmware: qcom,scm: Update QDU1000/QRU1000 compatible
  dt-bindings: soc: qcom: smd-rpm: Add IPQ9574 compatible
  firmware: qcom_scm: Use fixed width src vm bitmap
  dt-bindings: firmware: qcom,scm: document IPQ5332 SCM
  dt-bindings: scm: Add compatible for IPQ9574
  soc: qcom: rpmpd: Remove useless comments
  ...

Link: https://lore.kernel.org/r/20230410152421.4477-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 14:34:30 +02:00
Bartosz Golaszewski
daa9e76d17 dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
Add the compatible for the Qualcomm Graphics Clock control module present
on sa8775p platforms. It matches the generic QCom GPUCC description. Add
device-specific DT bindings defines as well.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230411125910.401075-2-brgl@bgdev.pl
2023-04-13 20:36:09 -07:00
Peng Fan
5fd7b00ca2 dt-bindings: clock: imx93: add NIC, A55 and ARM PLL CLK
Add i.MX93 NIC, A55 and ARM PLL CLK.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230403095300.3386988-7-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-04-09 16:48:54 +03:00
Peng Fan
79643567cc dt-bindings: clock: imx8mp: Add LDB clock entry
Add LDB clock entry for i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230403094633.3366446-2-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-04-09 16:36:29 +03:00
Dylan Van Assche
77c7a41e05 dt-bindings: firmware: qcom: scm: add SSC_Q6 and ADSP_Q6 VMIDs
SSC_Q6 and ADSP_Q6 are used in the FastRPC driver for accessing
the secure world.

Signed-off-by: Dylan Van Assche <me@dylanvanassche.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230406173148.28309-3-me@dylanvanassche.be
2023-04-07 11:25:31 -07:00
Bjorn Andersson
5602dfc37a Merge branch '20230316072940.29137-2-quic_devipriy@quicinc.com' into HEAD
Merge the IPQ9574 Global Clock Controller Devicetree binding, to make
available the clock definitions used in the Devicetree source.
2023-04-07 10:35:12 -07:00
Bjorn Andersson
3a5c7ed3d8 Merge branch '20230316072940.29137-2-quic_devipriy@quicinc.com' into clk-for-6.4
Merge IPQ9574 Global Clock Controller binding through a topic branch to
allow it also be introduced in the Devicetree source tree.
2023-04-07 10:27:28 -07:00
Devi Priya
b065b23d3c dt-bindings: clock: Add ipq9574 clock and reset definitions
Add clock and reset ID definitions for ipq9574

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Co-developed-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230316072940.29137-2-quic_devipriy@quicinc.com
2023-04-07 10:27:16 -07:00
Balsam CHIHI
05aaa7fdb0 dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195.

Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230307154524.118541-2-bchihi@baylibre.com
2023-04-07 11:18:28 +02:00
Emil Renner Berthing
3de0c91032 dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
Add bindings for the always-on clock and reset generator (AONCRG) on the
JH7110 RISC-V SoC by StarFive Ltd.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:43:24 +01:00
Emil Renner Berthing
7fce1e39f0 dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
Add bindings for the system clock and reset generator (SYSCRG) on the
JH7110 RISC-V SoC by StarFive Ltd.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:43:15 +01:00
Bjorn Andersson
7c3a3554ba Merge branch '20230208091340.124641-1-konrad.dybcio@linaro.org' into HEAD
Introduce SM6115 GPUCC devicetree bindings, to make it possible to use
clock defines in the devicetree source.
2023-04-04 20:14:39 -07:00
Bjorn Andersson
25dac40a63 Merge branch '20230316-topic-qcm_dispcc_reset-v1-1-dd3708853014@linaro.org' into clk-for-6.4
Merge dt-binding include file additions through topic branch, to allow
them to be made available in DT source tree as well.
2023-04-04 19:55:56 -07:00
Konrad Dybcio
123ee7550e dt-bindings: clock: dispcc-qcm2290: Add MDSS_CORE reset
Add the MDSS_CORE reset which can be asserted to reset the state of
the entire MDSS.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230316-topic-qcm_dispcc_reset-v1-1-dd3708853014@linaro.org
2023-04-04 19:55:34 -07:00
Garmin.Chang
1086a5310f dt-bindings: clock: mediatek: Add new MT8188 clock
Add the new binding documentation for system clock
and functional clock on MediaTek MT8188.

Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230331123621.16167-2-Garmin.Chang@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-31 11:51:20 -07:00
Geert Uytterhoeven
f0545078e1 dt-bindings: clock: r8a7779: Add PWM module clock
Add the module clock used by the PWM Timers on the Renesas R-Car H1
(R8A7779) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1397b517fccbe716a71cfae770512ed577730a25.1679329211.git.geert+renesas@glider.be
2023-03-30 15:56:26 +02:00
Álvaro Fernández Rojas
2a67e196bb dt-bindings: reset: add BCM63268 timer reset definitions
Add missing timer reset definitions for BCM63268.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230322171515.120353-3-noltari@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-27 12:23:51 -07:00
Álvaro Fernández Rojas
0ca6a09700 dt-bindings: clk: add BCM63268 timer clock definitions
Add missing timer clock definitions for BCM63268.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230322171515.120353-2-noltari@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-27 12:23:51 -07:00
Yinbo Zhu
d8c0ee307a dt-bindings: clock: add loongson-2 boot clock index
The Loongson-2 boot clock was used to spi and lio peripheral and
this patch was to add boot clock index number.

Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230323025229.2971-1-zhuyinbo@loongson.cn
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-27 12:14:22 -07:00
Keguang Zhang
12de2f5024 dt-bindings: clock: Add Loongson-1 clock
Add devicetree binding document and related header file
for the Loongson-1 clock.

Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230321111817.71756-2-keguang.zhang@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-21 16:25:49 -07:00
Vlad.Karpovich
fa8c052b4c
ASoC: cs35l45: Support for GPIO pins configuration.
Adds device tree configuration for cs35l45 GPIOs

Signed-off-by: Vlad Karpovich <vkarpovi@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20230315154722.3911463-1-vkarpovi@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-21 12:46:39 +00:00
Nishanth Menon
f2de003e14 dt-bindings: pinctrl: k3: Deprecate header with register constants
For convenience (less code duplication), the pin controller pin
configuration register values were defined in the bindings header.
These are not some IDs or other abstraction layer but raw numbers used
in the registers.

These constants do not fit the purpose of bindings. They do not
provide any abstraction, any hardware and driver independent ID. In
fact, the Linux pinctrl-single driver actually do not use the bindings
header at all.

All of the constants were moved already to headers local to DTS
(residing in DTS directory), so remove any references to the bindings
header and add a warning that it is deprecated.

Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/linux-arm-kernel/71c7feff-4189-f12f-7353-bce41a61119d@linaro.org/
Link: https://lore.kernel.org/r/20230315155228.1566883-4-nm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-03-20 12:35:12 -05:00
Bjorn Andersson
518634f959 Merge branch '20230223180935.60546-1-otto.pflueger@abscue.de' into clk-for-6.4
Merge MSM8917 Global Clock Controller and RPM clock controller bindings
through topic branch, to make it possible to introduce in Devicetree
source depending on these.
2023-03-15 17:19:13 -07:00
Otto Pflüger
2d1fc2d804 dt-bindings: clock: Add MSM8917 global clock controller
Add a device tree binding to describe clocks, resets and power domains
provided by the global clock controller on MSM8917 SoCs and the very
similar QM215 SoCs.

Add the new compatibles to qcom,gcc-msm8909.yaml. There is
no need to create another YAML file because the bindings are identical
(MSM8917 GCC requires the same parent clocks as the MSM8909 GCC).

Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230223180935.60546-2-otto.pflueger@abscue.de
2023-03-15 17:19:05 -07:00
Bjorn Andersson
bfb23a538e Merge branch '20230307062232.4889-1-quic_kathirav@quicinc.com' into clk-for-6.4
Merge the IPQ5332 Global Clock Controller binding through a topic branch
to make it possible to include in Devicetree source as well.
2023-03-15 16:21:10 -07:00
Kathiravan T
f99cdbd858 dt-bindings: clock: Add Qualcomm IPQ5332 GCC
Add binding for the Qualcomm IPQ5332 Global Clock Controller.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230307062232.4889-4-quic_kathirav@quicinc.com
2023-03-15 16:20:59 -07:00
David Wronek
de7aeee0d9 dt-bindings: arm: qcom,ids: Add Soc ID for SM7150
Add the ID for the Qualcomm SM7150 SoC.

Signed-off-by: David Wronek <davidwronek@gmail.com>
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230305191745.386862-2-danila@jiaxyga.com
2023-03-15 15:31:15 -07:00
Bhupesh Sharma
ee6ae544dd dt-bindings: arm: qcom,ids: Add IDs for QRB4210
Add the ID for QRB4210 variant.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230315160151.2166861-2-bhupesh.sharma@linaro.org
2023-03-15 15:30:20 -07:00
Varadarajan Narayanan
fd972da1b2 dt-bindings: arm: qcom,ids: Add IDs for IPQ9574 and its variants
Add SOC ID for Qualcomm IPQ9574, IPQ9570, IPQ9554, IPQ9550,
IPQ9514 and IPQ9510

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1678774414-14414-2-git-send-email-quic_varada@quicinc.com
2023-03-15 15:25:47 -07:00
Konrad Dybcio
f26e18bda9 dt-bindings: arm: qcom,ids: Add IDs for QCM2290/QRB2210
Add the missing IDs for scuba and its QRB variant.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314-topic-scuba_socinfo-v2-1-44fa1256aa6d@linaro.org
2023-03-15 15:08:55 -07:00
Bjorn Andersson
3097d5e208 Merge branch '20230213165318.127160-2-danila@jiaxyga.com' into clk-for-6.4
Merge SM7180 Global Clock Controller binding through a dedicated topic
branch, so that it can be introduced into the Devicetree source tree as
well in the same kernel release.
2023-03-13 16:51:07 -07:00
Danila Tikhonov
bad27783c9 dt-bindings: clock: Add SM7150 GCC clocks
Add device tree bindings for global clock subsystem clock
controller for Qualcomm Technology Inc's SM7150 SoCs.

Co-developed-by: David Wronek <davidwronek@gmail.com>
Signed-off-by: David Wronek <davidwronek@gmail.com>
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230213165318.127160-2-danila@jiaxyga.com
2023-03-13 16:50:30 -07:00
Bartosz Golaszewski
26a4bf805c dt-bindings: arm: qcom: add the SoC ID for SA8775P
Add the SoC ID entry for SA8775P.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Eric Chanudet <echanude@redhat.com>
Tested-by: Eric Chanudet <echanude@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230209095753.447347-3-brgl@bgdev.pl
2023-03-13 16:34:36 -07:00
Konrad Dybcio
c413f34e7a dt-bindings: clock: Add Qcom SM6115 GPUCC
Add device tree bindings for graphics clock controller for Qualcomm
Technology Inc's SM6115 SoCs.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230208091340.124641-10-konrad.dybcio@linaro.org
2023-03-13 12:58:19 -07:00
Konrad Dybcio
94329ce6e3 dt-bindings: clock: Add Qcom SM6375 GPUCC
Add device tree bindings for graphics clock controller for Qualcomm
Technology Inc's SM6375 SoCs.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230208091340.124641-8-konrad.dybcio@linaro.org
2023-03-13 12:58:19 -07:00
Konrad Dybcio
a5b9c5c548 dt-bindings: clock: Add Qcom SM6125 GPUCC
Add device tree bindings for graphics clock controller for Qualcomm
Technology Inc's SM6125 SoCs.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230208091340.124641-6-konrad.dybcio@linaro.org
2023-03-13 12:58:19 -07:00
Wolfram Sang
fd9c55c0ac soc: renesas: rcar-sysc: Remove R-Car H3 ES1.* handling
R-Car H3 ES1.* was only available to an internal development group and
needed a lot of quirks and workarounds.  These become a maintenance
burden now, so our development group decided to remove upstream support
and disable booting for this SoC.  Public users only have ES2 onwards.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230307105645.5285-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-03-10 16:31:07 +01:00
Jeremy Kerr
ced8a02b34 dt-bindings: clock: ast2600: Expand comment on reset definitions
The current "not part of a gate" is a little ambiguous. Expand this a
little to clarify the reference to the paired clock + reset control.

Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20230302005834.13171-7-jk@codeconstruct.com.au
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-06 14:11:35 -08:00
Jeremy Kerr
1f15e0486b dt-bindings: clock: ast2600: remove IC36 & I3C7 clock definitions
The current ast2600 clock definitions include entries for i3c6 and i3c7
devices, which don't exist: there are no clock control lines documented
for these, and only i3c devices 0 through 5 are present.

So, remove the definitions for I3C6 and I3C7. Although this is a
potential ABI-breaking change, there are no in-tree users of these, and
any references would be broken anyway, as the hardware doesn't exist.

This is a partial cherry-pick and rework of ed44b8cdfdb and 1a35eb926d7
from Aspeed's own tree, originally by Dylan Hung
<dylan_hung@aspeedtech.com>.

Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20230302005834.13171-5-jk@codeconstruct.com.au
Tested-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-06 14:11:25 -08:00
Jeremy Kerr
1038b6978b dt-bindings: clock: ast2600: Add top-level I3C clock
The ast2600 hardware has a top-level clock for all i3c controller
peripherals (then gated to each individual controller), so add a
top-level i3c clock line to control this.

This is a partial cherry-pick and rework of ed44b8cdfdb and 1a35eb926d7
from Aspeed's own tree, originally by Dylan Hung
<dylan_hung@aspeedtech.com>.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20230302005834.13171-3-jk@codeconstruct.com.au
Tested-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-06 14:11:09 -08:00
Sam Protsenko
284f6dcb50 dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
Add main gate clocks for controlling AUD and HSI CMUs:
  - gout_aud_cmu_aud_pclk
  - gout_hsi_cmu_hsi_pclk

While at it, add missing PPMU (Performance Profiling Monitor Unit)
clocks for CMU_HSI.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20230223042133.26551-3-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-03-06 16:53:08 +01:00
Sam Protsenko
521568cff7 dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D
CMU_G3D generates Gondul GPU and bus clocks for BLK_G3D.
Add clock indices and binding documentation for CMU_G3D.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20230223042133.26551-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-03-06 16:53:07 +01:00
Herve Codina
f8c760e8fc
dt-bindings: soc: fsl: cpm_qe: Add TSA controller
Add support for the time slot assigner (TSA)
available in some PowerQUICC SoC such as MPC885
or MPC866.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/20230217145645.1768659-2-herve.codina@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05 23:36:55 +00:00
Linus Torvalds
11c7052998 ARM: SoC drivers for 6.3
As usual, there are lots of minor driver changes across SoC platforms
 from  NXP, Amlogic, AMD Zynq, Mediatek, Qualcomm, Apple and Samsung.
 These usually add support for additional chip variations in existing
 drivers, but also add features or bugfixes.
 
 The SCMI firmware subsystem gains a unified raw userspace interface
 through debugfs, which can be used for validation purposes.
 
 Newly added drivers include:
 
  - New power management drivers for StarFive JH7110, Allwinner D1 and
    Renesas RZ/V2M
 
  - A driver for Qualcomm battery and power supply status
 
  - A SoC device driver for identifying Nuvoton WPCM450 chips
 
  - A regulator coupler driver for Mediatek MT81xxv
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPtSN8ACgkQmmx57+YA
 GNkOSw/+JS5tElm/ZP7c3uWYp6uwvcb0jUlKW/U3aCtPiPEcYDLEqIEXwcNdaDMh
 m4rW3GYlW0IRL3FsyuYkSLx+EIIUIfs40wldYXJOqRDj0XasndiloIwltOQJGfd9
 C/UVM0FpJdxMJrcBMFgwLLQCIbAVnhHP34i6ppDRgxW/MfTeiCaaG6fnS70iv6mC
 oh2N7FoZSKDtTrFtlR5TqFiK5v/W1CgNJVuglkFB0ceFpjyBpp/8AT0FGS887xCz
 IYSTqm4Q/79vaZXI1Y2oog257cgdwsVqgPrnK5CuSFhTnAcJMCekiFelHq8Yhyuk
 Rw7j/B3KO3AOaxmR75c6SZdeZ+VHgUMRC/RKe3fay0sm3Zea2kAIPXA6Zn+r/cxb
 8M94V59qBz+f8XmpXRTK1UR3s3EbwFIuNyuDIkeorMtpSKtvqJXmZxGDwNIfXr2F
 /voo++MKjzdtdxdW/D/5Tc9DC0Pyb4HLi0EYj2QCzA03njmfLDF1w73NfzMec+GD
 R1zAd3FEbiJQx8Hin0PSPjYXpfMnkjkGAEcE9N9Ralg4ewNWAxfOFsAhHKTZNssL
 pitTAvHR/+dXtvkX7FUi2l/6fqn8nJUrg/xRazPPp3scRbpuk8m6P4MNr3/lsaHk
 HTQ/hYwDdecWLvKXjw5y9yIr3yhLmPPcloTVIIFFjsM0t8b+d9E=
 =p6Xp
 -----END PGP SIGNATURE-----

Merge tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "As usual, there are lots of minor driver changes across SoC platforms
  from NXP, Amlogic, AMD Zynq, Mediatek, Qualcomm, Apple and Samsung.
  These usually add support for additional chip variations in existing
  drivers, but also add features or bugfixes.

  The SCMI firmware subsystem gains a unified raw userspace interface
  through debugfs, which can be used for validation purposes.

  Newly added drivers include:

   - New power management drivers for StarFive JH7110, Allwinner D1 and
     Renesas RZ/V2M

   - A driver for Qualcomm battery and power supply status

   - A SoC device driver for identifying Nuvoton WPCM450 chips

   - A regulator coupler driver for Mediatek MT81xxv"

* tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits)
  power: supply: Introduce Qualcomm PMIC GLINK power supply
  soc: apple: rtkit: Do not copy the reg state structure to the stack
  soc: sunxi: SUN20I_PPU should depend on PM
  memory: renesas-rpc-if: Remove redundant division of dummy
  soc: qcom: socinfo: Add IDs for IPQ5332 and its variant
  dt-bindings: arm: qcom,ids: Add IDs for IPQ5332 and its variant
  dt-bindings: power: qcom,rpmpd: add RPMH_REGULATOR_LEVEL_LOW_SVS_L1
  firmware: qcom_scm: Move qcom_scm.h to include/linux/firmware/qcom/
  MAINTAINERS: Update qcom CPR maintainer entry
  dt-bindings: firmware: document Qualcomm SM8550 SCM
  dt-bindings: firmware: qcom,scm: add qcom,scm-sa8775p compatible
  soc: qcom: socinfo: Add Soc IDs for IPQ8064 and variants
  dt-bindings: arm: qcom,ids: Add Soc IDs for IPQ8064 and variants
  soc: qcom: socinfo: Add support for new field in revision 17
  soc: qcom: smd-rpm: Add IPQ9574 compatible
  soc: qcom: pmic_glink: remove redundant calculation of svid
  soc: qcom: stats: Populate all subsystem debugfs files
  dt-bindings: soc: qcom,rpmh-rsc: Update to allow for generic nodes
  soc: qcom: pmic_glink: add CONFIG_NET/CONFIG_OF dependencies
  soc: qcom: pmic_glink: Introduce altmode support
  ...
2023-02-27 10:04:49 -08:00
Linus Torvalds
1ec35eadc3 We have one small patch to the clk core this time around. It fixes a corner
case with the CLK_OPS_PARENT_ENABLE flag combined with clk_core_is_enabled()
 where it hangs the system. We'll simply assume the clk is disabled if the
 parent is disabled and the flag is set. Trying to turn on the parent to check
 the enable state of the clk runs into system hangs at boot. We let this bake in
 -next for a couple weeks to make sure there aren't any more issues because the
 last attempt to fix this ran into hangs and had to be reverted.
 
 Note: There were some more patches to the core framework around sync_state and
 disabling unused clks, but I asked for that to be reverted from the qcom PR
 because it isn't ready and we're still discussing the best solution on the
 list.
 
 Outside of the core clk framework, we have the usual collection of clk driver
 updates and support for new SoCs (which seems to never stop). The dirstat is
 dominated by Qualcomm because they added support for quite a few SoCs this time
 around and also migrated quite a few of their drivers to clk_parent_data. The
 other big diff is in the Mediatek clk drivers that saw a significant rework
 this cycle to similarly modernize the code, and we'll see that work continue in
 the next cycle as well. Nothing really jumps out as scary here, except that the
 significant churn in parent data descriptions can have typos that go unnoticed.
 More details below.
 
 Core:
  - Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled()
 
 New Drivers:
  - Add a new clk-gpr-mux clock type and use it on i.MX6Q to add ENET ref
    clocks
  - Support for Mediatek MT7891 SoC clks
  - Support for many Qualcomm clk controllers:
    - QDU1000/QRU1000 global clock controller
    - SA8775P global clock controller
    - SM8550 TCSR and display clock controller
    - SM6350 clock controller
    - MSM8996 CBF and APCS clock controllers
 
 Updates:
  - Various cleanups and improvements to Mediatek clk drivers to reduce
    code size and modernize the drivers
  - Support for Versa 5P49V60 clks
  - Disable R-Car H3 ES1.*, as it was only available to an internal
    development group and needed a lot of quirks and workarounds
  - Add PWM, Compare-Match Timer (TIM), USB, SDHI, and eMMC clocks and
    resets on Renesas RZ/V2M
  - Add display clocks on Renesas R-Car V4H
  - Add Camera Receiving Unit (CRU) clocks and resets on Renesas RZ/G2L
  - Free the imx_uart_clocks even if imx_register_uart_clocks returns early
  - Get the stdout clocks count from device tree on i.MX
  - Drop the clock count argument from imx_register_uart_clocks()
  - Keep the uart clocks on i.MX93 for when earlycon is used
  - Fix SPDX comment in i.MX6SLL clocks bindings header
  - Drop some unnecessary spaces from i.MX8ULP clocks bindings header
  - Add imx_obtain_fixed_of_clock() for allowing to add a clock that is
    not configured via devicetree
  - Fix the ENET1 gate configuration for i.MX6UL according to the
    reference manual
  - Add ENET refclock mux support for i.MX6UL
  - Add support for USB host/device configuration on Renesas RZ/N1
  - Add PLL2 programming support, and CAN-FD clocks on Renesas R-Car V4H
  - Add D1 CAN bus gates and resets for Allwinner
  - Mark D1 CPUX clock as critical on Allwinner
  - Reuse D1 driver for Allwinner R528/T113
  - Cleanup sunxi-ng Kconfig
  - Fix sunxi-ng kernel-doc issues
  - Model Allwinner H3/H5 DRAM clock as fixed clock
  - Use .determine_rate() instead of .round_rate() for the dualdiv, mpll,
    sclk-div and cpu-dyn-div amlogic clock drivers
  - DDR clocks were marked as critical in the proper clock driver for each
    AT91 SoC such that drivers/memory/atmel-sdramc.c to be deleted
    in the next releases as it only does clock enablement
  - Patch to avoid compiling dt-compat.o for all AT91 SoCs as only some of
    them may use it
  - Support synchronous power_off requests in the qcom GDSC driver for proper
    GPU power collapse
  - Drop test clocks from various Qualcomm clk drivers
  - Update parent references to use clk_parent_data/clk_hw in various Qualcomm clk drivers
  - Fixes for the Qualcomm MSM8996 CPU clock controller
  - Transition Qualcomm MSM8974 GCC off the externally defined sleep_clk
  - Add GDSCs in the global clock controller for Qualcomm QCS404
  - The SDCC core clocks on Qualcomm SM6115 are moved to floor_ops
  - Programming of clk_dis_wait for GPU CX GDSC on Qualcomm SC7180 and SDM845 are
    moved to use the recently introduced properties in the GDSC struct
  - Qualcomm's RPMh clock driver gains SM8550 and SA8775P clocks, and the IPA clock
    is added on a variety of platforms
  - De-duplicate identical clks in Qualcomm SMD RPM clk driver
  - Add a few missing clocks across msm8998, msm8992, msm8916, qcs404 to
    Qualcomm SDM RPM clk driver
  - Various Qualcomm clk drivers use devm_pm_runtime_enable() to simplify
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmP5L68RHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSXLxRAAx5C2PBxGnQS5Dqy7yGFBKhoyM6MnD131
 4wsWunTzw/fx3MWTRUBu1FYq7ZN38dmeUNeKVNO7QkfIzXe/Htxa5DJp8oJjeFkA
 WBlJr/S9pnCKJ1+jGgnEJ3AL8rtssc2nasS8Gj66eu3Zs3dA1MlUz1M0wqiGeD/Y
 2crg1nowHurxhsmdUM+6sBRZsCoUz1DxAynqOK25Ip08ygBGYRdkk3aCoyx1bICF
 02RwSTQP9pGykgkO7BMkr1pA000mlcawXflzfbY0bA57GKvITBaXh3PhVWwsAnqk
 utagT3G2/mQNBF+DVX4Xr5rRqYttDeATiS2D0B31x68Ovjw6kaA28QoY19oIjc1p
 D7CabcPnrdK6JFimJL/uEnjIpVnMW2kbTAkTdgGFNKqYUC1O+Mm5ZscKo8RUaiQ7
 8XAgJXnGxG7RlZDIMCj69xiZBR0I0wgyx6E7sqMK5j4/v9ezhUMemj4u/sNe3R1n
 ih43L2vXjftAhl7jlGQb6eFQjPU/n8kf1rte5miJxX2vFBgWqiCfKHnVSe8KSNU+
 gqhar55G9ACnYBjqApmySd/7IFBzmJSyWujXg+fwIu0ZI5ir+ZPr+rQ7RkAUqMij
 QCPvJa6XlRIyl6j54E5GaSFO3ZDc3wAZEs3I2N4yhYTDUGv342G3YdwNU+b0ioHB
 bDW5Gec9u2s=
 =Fle/
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "We have one small patch to the clk core this time around. It fixes a
  corner case with the CLK_OPS_PARENT_ENABLE flag combined with
  clk_core_is_enabled() where it hangs the system. We'll simply assume
  the clk is disabled if the parent is disabled and the flag is set.
  Trying to turn on the parent to check the enable state of the clk runs
  into system hangs at boot. We let this bake in -next for a couple
  weeks to make sure there aren't any more issues because the last
  attempt to fix this ran into hangs and had to be reverted.

  Note: There were some more patches to the core framework around
  sync_state and disabling unused clks, but I asked for that to be
  reverted from the qcom PR because it isn't ready and we're still
  discussing the best solution on the list.

  Outside of the core clk framework, we have the usual collection of clk
  driver updates and support for new SoCs (which seems to never stop).
  The dirstat is dominated by Qualcomm because they added support for
  quite a few SoCs this time around and also migrated quite a few of
  their drivers to clk_parent_data. The other big diff is in the
  Mediatek clk drivers that saw a significant rework this cycle to
  similarly modernize the code, and we'll see that work continue in the
  next cycle as well. Nothing really jumps out as scary here, except
  that the significant churn in parent data descriptions can have typos
  that go unnoticed. More details below.

  Core:
   - Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled()

  New Drivers:
   - Add a new clk-gpr-mux clock type and use it on i.MX6Q to add ENET
     ref clocks
   - Support for Mediatek MT7891 SoC clks
   - Support for many Qualcomm clk controllers:
      - QDU1000/QRU1000 global clock controller
      - SA8775P global clock controller
      - SM8550 TCSR and display clock controller
      - SM6350 clock controller
      - MSM8996 CBF and APCS clock controllers

  Updates:
   - Various cleanups and improvements to Mediatek clk drivers to reduce
     code size and modernize the drivers
   - Support for Versa 5P49V60 clks
   - Disable R-Car H3 ES1.*, as it was only available to an internal
     development group and needed a lot of quirks and workarounds
   - Add PWM, Compare-Match Timer (TIM), USB, SDHI, and eMMC clocks and
     resets on Renesas RZ/V2M
   - Add display clocks on Renesas R-Car V4H
   - Add Camera Receiving Unit (CRU) clocks and resets on Renesas RZ/G2L
   - Free the imx_uart_clocks even if imx_register_uart_clocks returns
     early
   - Get the stdout clocks count from device tree on i.MX
   - Drop the clock count argument from imx_register_uart_clocks()
   - Keep the uart clocks on i.MX93 for when earlycon is used
   - Fix SPDX comment in i.MX6SLL clocks bindings header
   - Drop some unnecessary spaces from i.MX8ULP clocks bindings header
   - Add imx_obtain_fixed_of_clock() for allowing to add a clock that is
     not configured via devicetree
   - Fix the ENET1 gate configuration for i.MX6UL according to the
     reference manual
   - Add ENET refclock mux support for i.MX6UL
   - Add support for USB host/device configuration on Renesas RZ/N1
   - Add PLL2 programming support, and CAN-FD clocks on Renesas R-Car
     V4H
   - Add D1 CAN bus gates and resets for Allwinner
   - Mark D1 CPUX clock as critical on Allwinner
   - Reuse D1 driver for Allwinner R528/T113
   - Cleanup sunxi-ng Kconfig
   - Fix sunxi-ng kernel-doc issues
   - Model Allwinner H3/H5 DRAM clock as fixed clock
   - Use .determine_rate() instead of .round_rate() for the dualdiv,
     mpll, sclk-div and cpu-dyn-div amlogic clock drivers
   - DDR clocks were marked as critical in the proper clock driver for
     each AT91 SoC such that drivers/memory/atmel-sdramc.c to be deleted
     in the next releases as it only does clock enablement
   - Patch to avoid compiling dt-compat.o for all AT91 SoCs as only some
     of them may use it
   - Support synchronous power_off requests in the qcom GDSC driver for
     proper GPU power collapse
   - Drop test clocks from various Qualcomm clk drivers
   - Update parent references to use clk_parent_data/clk_hw in various
     Qualcomm clk drivers
   - Fixes for the Qualcomm MSM8996 CPU clock controller
   - Transition Qualcomm MSM8974 GCC off the externally defined
     sleep_clk
   - Add GDSCs in the global clock controller for Qualcomm QCS404
   - The SDCC core clocks on Qualcomm SM6115 are moved to floor_ops
   - Programming of clk_dis_wait for GPU CX GDSC on Qualcomm SC7180 and
     SDM845 are moved to use the recently introduced properties in the
     GDSC struct
   - Qualcomm's RPMh clock driver gains SM8550 and SA8775P clocks, and
     the IPA clock is added on a variety of platforms
   - De-duplicate identical clks in Qualcomm SMD RPM clk driver
   - Add a few missing clocks across msm8998, msm8992, msm8916, qcs404
     to Qualcomm SDM RPM clk driver
   - Various Qualcomm clk drivers use devm_pm_runtime_enable() to
     simplify"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (228 commits)
  clk: qcom: apcs-msm8986: Include bitfield.h for FIELD_PREP
  clk: qcom: Revert sync_state based clk_disable_unused
  clk: imx: pll14xx: fix recalc_rate for negative kdiv
  clk: rs9: Drop unused pin_xin field
  MAINTAINERS: clk: imx: Add Peng Fan as reviewer
  clk: sprd: Add dependency for SPRD_UMS512_CLK
  clk: ralink: fix 'mt7621_gate_is_enabled()' function
  clk: mediatek: clk-mtk: Remove unneeded semicolon
  dt-bindings: clock: remove stih416 bindings
  dt-bindings: clock: add loongson-2 clock
  dt-bindings: clock: add loongson-2 clock include file
  clk: imx: fix compile testing imxrt1050
  clk: Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled()
  clk: imx: set imx_clk_gpr_mux_ops storage-class-specifier to static
  clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*
  dt-bindings: clock: Merge qcom,gpucc-sm8350 into qcom,gpucc.yaml
  clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC
  clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC
  dt-bindings: clock: qcom,sa8775p-gcc: add the power-domains property
  clk: qcom: cpu-8996: add missing cputype include
  ...
2023-02-25 15:16:23 -08:00
Linus Torvalds
8395d932d2 Devicetree updates for v6.3:
DT core:
 - Add node lifecycle unit tests
 
 - Add of_property_present() helper aligned with fwnode API
 
 - Print more information on reserved regions on boot
 
 - Update dtc to upstream v1.6.1-66-gabbd523bae6e
 
 - Use strscpy() to instead of strncpy() in DT core
 
 - Add option for schema validation on %.dtb targets
 
 Bindings:
 - Add/fix support for listing multiple patterns in DT_SCHEMA_FILES
 
 - Rework external memory controller/bus bindings to properly support
   controller specific child node properties
 
 - Convert loongson,ls1x-intc, fcs,fusb302, sil,sii8620, Rockchip RK3399
   PCIe, Synquacer I2C, and Synquacer EXIU bindings to DT schema format
 
 - Add RiscV SBI PMU event mapping binding
 
 - Add missing contraints on Arm SCMI child node allowed properties
 
 - Add a bunch of missing Socionext UniPhier glue block bindings and
   example fixes
 
 - Various fixes for duplicate or conflicting type definitions on DT
   properties
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmP1dxgACgkQ+vtdtY28
 YcOkBw//RU8EHTznVRBSbLbolpMPLVF4CGmWeE9bxLTZWIUaSG1NyhQgyKmzGqCR
 nsu/g14y3ZCrr4wkNvygWjumsuKu+uwMY0eQtEXEvpb47NBR/nhFaZ8/DWp2TeAr
 INizwgr1gc1l3n8cuTL8OBIsu37iNEDVrUuTkcJCdhJkTsEMLK0dA82uBEIWWGPR
 dWvhNFjplrCkzycfdbzTG4LMgzmtJ5RtVMT61FgwDd04UtBEOeB6wR3HME0UftG0
 XxpzTtskMDiqEgzFFI3tZr82u3SrDzYPjeJVQkZC3VigV+s/ZW1Yh2t7/NH9negl
 fsidcNvFBAQFLIPY1QT+wJj3h2jmVThTKUjXo7KrmPgC1gJMaKrMsqQfcI/uqHm3
 xFd+Vr/nspIBuuAth+04hdb0sBpvyYaEHoRwPWSWXTdNG7O50pZT5k+e0Lg/jjkM
 LmL79yVDPE5hFyH1TfYdUMb5Xn3hui//UUvLaTK0F1AjdEYIvUYchFi5H/Vg7szr
 +qGraGMH5fLyNjvI/X8K1ajKNa0xUAKK9JxqM308tD6tMWryZyF0MWD1sjPsvl7T
 wBm2fjGaEjapJ7vyywYyuZu3WpTY0eUtOGYIQQ6F+4Q/1h1aj4SeeEGmzZxvOivB
 CoWXpYkH/HPoAv+EwWXfGPV4pqxY8L3ZnzV13NcGSvE7Ha7+glo=
 =ywsL
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "DT core:

   - Add node lifecycle unit tests

   - Add of_property_present() helper aligned with fwnode API

   - Print more information on reserved regions on boot

   - Update dtc to upstream v1.6.1-66-gabbd523bae6e

   - Use strscpy() to instead of strncpy() in DT core

   - Add option for schema validation on %.dtb targets

  Bindings:

   - Add/fix support for listing multiple patterns in DT_SCHEMA_FILES

   - Rework external memory controller/bus bindings to properly support
     controller specific child node properties

   - Convert loongson,ls1x-intc, fcs,fusb302, sil,sii8620, Rockchip
     RK3399 PCIe, Synquacer I2C, and Synquacer EXIU bindings to DT
     schema format

   - Add RiscV SBI PMU event mapping binding

   - Add missing contraints on Arm SCMI child node allowed properties

   - Add a bunch of missing Socionext UniPhier glue block bindings and
     example fixes

   - Various fixes for duplicate or conflicting type definitions on DT
     properties"

* tag 'devicetree-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (66 commits)
  dt-bindings: regulator: Add mps,mpq7932 power-management IC
  of: dynamic: Fix spelling mistake "kojbect" -> "kobject"
  dt-bindings: drop Sagar Kadam from SiFive binding maintainership
  dt-bindings: sram: qcom,imem: document sm8450
  dt-bindings: interrupt-controller: convert loongson,ls1x-intc.txt to json-schema
  dt-bindings: arm: Add Cortex-A715 and X3
  of: dynamic: add lifecycle docbook info to node creation functions
  of: add consistency check to of_node_release()
  of: do not use "%pOF" printk format on node with refcount of zero
  of: unittest: add node lifecycle tests
  of: update kconfig unittest help
  of: add processing of EXPECT_NOT to of_unittest_expect
  of: prepare to add processing of EXPECT_NOT to of_unittest_expect
  of: Use preferred of_property_read_* functions
  of: Use of_property_present() helper
  of: Add of_property_present() helper
  of: reserved_mem: Use proper binary prefix
  dt-bindings: Fix multi pattern support in DT_SCHEMA_FILES
  of: reserved-mem: print out reserved-mem details during boot
  dt-bindings: serial: restrict possible child node names
  ...
2023-02-24 13:31:53 -08:00
Linus Torvalds
693fed981e Char/Misc and other driver subsystem changes for 6.3-rc1
Here is the large set of driver changes for char/misc drivers and other
 smaller driver subsystems that flow through this git tree.
 
 Included in here are:
   - New IIO drivers and features and improvments in that subsystem
   - New hwtracing drivers and additions to that subsystem
   - lots of interconnect changes and new drivers as that subsystem seems
     under very active development recently.  This required also merging
     in the icc subsystem changes through this tree.
   - FPGA driver updates
   - counter subsystem and driver updates
   - MHI driver updates
   - nvmem driver updates
   - documentation updates
   - Other smaller driver updates and fixes, full details in the shortlog
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCY/inQw8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+yksvwCeOvU//SPwrbIpaeHAmHUv0PSVOrwAoKmt4ICh
 hQUudlztfkvUJxKIH0gh
 =Sjk4
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver subsystem updates from Greg KH:
 "Here is the large set of driver changes for char/misc drivers and
  other smaller driver subsystems that flow through this git tree.

  Included in here are:

   - New IIO drivers and features and improvments in that subsystem

   - New hwtracing drivers and additions to that subsystem

   - lots of interconnect changes and new drivers as that subsystem
     seems under very active development recently. This required also
     merging in the icc subsystem changes through this tree.

   - FPGA driver updates

   - counter subsystem and driver updates

   - MHI driver updates

   - nvmem driver updates

   - documentation updates

   - Other smaller driver updates and fixes, full details in the
     shortlog

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (223 commits)
  scripts/tags.sh: fix incompatibility with PCRE2
  firmware: coreboot: Remove GOOGLE_COREBOOT_TABLE_ACPI/OF Kconfig entries
  mei: lower the log level for non-fatal failed messages
  mei: bus: disallow driver match while dismantling device
  misc: vmw_balloon: fix memory leak with using debugfs_lookup()
  nvmem: stm32: fix OPTEE dependency
  dt-bindings: nvmem: qfprom: add IPQ8074 compatible
  nvmem: qcom-spmi-sdam: register at device init time
  nvmem: rave-sp-eeprm: fix kernel-doc bad line warning
  nvmem: stm32: detect bsec pta presence for STM32MP15x
  nvmem: stm32: add OP-TEE support for STM32MP13x
  nvmem: core: use nvmem_add_one_cell() in nvmem_add_cells_from_of()
  nvmem: core: add nvmem_add_one_cell()
  nvmem: core: drop the removal of the cells in nvmem_add_cells()
  nvmem: core: move struct nvmem_cell_info to nvmem-provider.h
  nvmem: core: add an index parameter to the cell
  of: property: add #nvmem-cell-cells property
  of: property: make #.*-cells optional for simple props
  of: base: add of_parse_phandle_with_optional_args()
  net: add helper eth_addr_add()
  ...
2023-02-24 12:47:33 -08:00
Stephen Boyd
b64baafa24 Merge branches 'clk-loongson' and 'clk-qcom' into clk-next
* clk-loongson:
  dt-bindings: clock: add loongson-2 clock
  dt-bindings: clock: add loongson-2 clock include file

* clk-qcom: (143 commits)
  clk: qcom: apcs-msm8986: Include bitfield.h for FIELD_PREP
  clk: qcom: Revert sync_state based clk_disable_unused
  dt-bindings: clock: Merge qcom,gpucc-sm8350 into qcom,gpucc.yaml
  clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC
  clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC
  dt-bindings: clock: qcom,sa8775p-gcc: add the power-domains property
  clk: qcom: cpu-8996: add missing cputype include
  clk: qcom: gcc-sa8775p: remove unused variables
  clk: qcom: smd-rpm: provide RPM_SMD_XO_CLK_SRC on MSM8996 platform
  clk: qcom: add msm8996 Core Bus Framework (CBF) support
  dt-bindings: clock: qcom,msm8996-cbf: Describe the MSM8996 CBF clock controller
  clk: qcom: add the driver for the MSM8996 APCS clocks
  clk: qcom: gcc-qcs404: fix duplicate initializer warning
  clk: qcom: cpu-8996: change setup sequence to follow vendor kernel
  clk: qcom: cpu-8996: fix PLL clock ops
  clk: qcom: cpu-8996: fix ACD initialization
  clk: qcom: cpu-8996: fix PLL configuration sequence
  clk: qcom: cpu-8996: move qcom_cpu_clk_msm8996_acd_init call
  clk: qcom: cpu-8996: setup PLLs before registering clocks
  clk: qcom: cpu-8996: simplify the cpu_clk_notifier_cb
  ...
2023-02-23 11:04:25 -08:00
Stephen Boyd
60950df7b4 Merge branches 'clk-microchip', 'clk-allwinner', 'clk-mediatek', 'clk-imx' and 'clk-core' into clk-next
- Various cleanups and improvements to Mediatek clk drivers to reduce
   code size and modernize the drivers
 - Support for Mediatek MT7891 SoC clks

* clk-microchip:
  clk: at91: do not compile dt-compat.c for sama7g5 and sam9x60
  clk: at91: mark ddr clocks as critical

* clk-allwinner:
  clk: sunxi-ng: d1: Add CAN bus gates and resets
  dt-bindings: clock: Add D1 CAN bus gates and resets
  clk: sunxi-ng: d1: Mark cpux clock as critical
  clk: sunxi-ng: d1: Allow building for R528/T113
  clk: sunxi-ng: Move SoC driver conditions to dependencies
  clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies
  clk: sunxi-ng: Avoid computing the rate twice
  clk: sunxi-ng: h3/h5: Model H3 CLK_DRAM as a fixed clock
  clk: sunxi-ng: fix ccu_mmc_timing.c kernel-doc issues

* clk-mediatek: (29 commits)
  clk: mediatek: clk-mtk: Remove unneeded semicolon
  clk: mediatek: remove MT8195 vppsys/0/1 simple_probe
  dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys driver
  clk: mediatek: add MT7981 clock support
  dt-bindings: clock: mediatek: add mt7981 clock IDs
  dt-bindings: clock: Add compatibles for MT7981
  clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe()
  clk: mediatek: clk-mt7986-topckgen: Properly keep some clocks enabled
  clk: mediatek: clk-mt6795-topckgen: Migrate to mtk_clk_simple_probe()
  clk: mediatek: clk-mt8186-topckgen: Migrate to mtk_clk_simple_probe()
  clk: mediatek: clk-mt8192: Migrate topckgen to mtk_clk_simple_probe()
  clk: mediatek: clk-mtk: Register MFG notifier in mtk_clk_simple_probe()
  clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs
  clk: mediatek: mt8186: Join top_adj_div and top_muxes
  clk: mediatek: mt8192: Join top_adj_divs and top_muxes
  clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divs
  clk: mediatek: mt8173: Migrate pericfg/topckgen to mtk_clk_simple_probe()
  clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe()
  clk: mediatek: Switch to mtk_clk_simple_probe() where possible
  clk: mediatek: mt8173: Break down clock drivers and allow module build
  ...

* clk-imx:
  clk: imx: pll14xx: fix recalc_rate for negative kdiv
  MAINTAINERS: clk: imx: Add Peng Fan as reviewer
  clk: imx: fix compile testing imxrt1050
  clk: imx: set imx_clk_gpr_mux_ops storage-class-specifier to static
  clk: imx6ul: add ethernet refclock mux support
  clk: imx6ul: fix enet1 gate configuration
  clk: imx: add imx_obtain_fixed_of_clock()
  clk: imx6q: add ethernet refclock mux support
  clk: imx: add clk-gpr-mux driver
  dt-bindings: imx8ulp: clock: no spaces before tabs
  clk: imx6sll: add proper spdx license identifier
  clk: imx: imx93: invoke imx_register_uart_clocks
  clk: imx: remove clk_count of imx_register_uart_clocks
  clk: imx: get stdout clk count from device tree
  clk: imx: avoid memory leak

* clk-core:
  clk: Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled()
2023-02-23 11:04:12 -08:00
Linus Torvalds
d5176cdbf6 Core changes:
- Add PINCTRL_PINFUNCTION() macro and use it in several
   drivers.
 
 New drivers:
 
 - New driver for the StarFive JH7110 SoC "sys" and "aon"
   (always-on) pin controllers. (RISC-V.)
 
 - New subdriver for the Qualcomm QDU1000/QRU1000 SoC pin
   controller.
 
 - New subdrivers for the Qualcomm SM8550 SoC and LPASS
   pin controllers.
 
 - New subdriver for the Qualcomm SA8775P SoC pin controller.
 
 - New subdriver for the Qualcomm IPQ5332 SoC pin controller.
 
 - New (trivial) support for Qualcomm PM8550 and PMR735D PMIC
   pin control.
 
 - New subdriver for the Mediatek MT7981 SoC pin controller.
 
 Improvements:
 
 - Several cleanups and refactorings to the Intel drivers.
 
 - Add 4KOhm bias support to the Intel driver.
 
 - Use the NOIRQ_SYSTEM_SLEEP_PM_OPS for the AT91 driver.
 
 - Support general purpose clocks in the Qualcomm MSM8226 SoC.
 
 - Several conversions to use the new I2C .probe_new() call.
 
 - Massive clean-up of the Qualcomm Device Tree YAML schemas.
 
 - Add VIN[45] pins, groups and functions to the Renesas
   r8a77950 SoC driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmP1/+EACgkQQRCzN7AZ
 XXMKXw//VTMUTZ5mS9GWk8F3MSkHQ9p1nE9I7KxMHWkWZ5b7kNWUI8x7SM1FO42L
 mlIWeHEr5ZJxooZYYllrgVcEB70LMobFf5dwNaF7V4toIwlHCF8FZ5yAN6fS3Do8
 hykck13KWirNl/gBYFhy9s8hRdaAnW7bFN/gewuKAFJH3NCAztrJiug4ggkkR1N6
 rRlmi0RaOPjVcb/osvgAUxfpdW69VxlEDs/viJdIdx4criRZI0qphmfAhYU0wKl+
 o0qFu1R/qTvtikKNrb/7yzKIXokraMP2lL+QniOVbiaj5Cyl0liO65+wtOIjYQSd
 J7dwelecHX7Q8QJCIeugBf7DQskw0a9OlXNUucvgD4q7sKY/JrwFSp9Zyf2PKUaL
 iBqEoC6XNjPvK97+Zx1uj1BkPk0ikYUKHXLMuLchcINevGr8xphpkfVL3/S4jNDR
 n0SxnvtvhY1lqAu+czhotMDBsj5UrnDKd4KDIpWdoUeHCql11F7iPRurTQcl/4qF
 vYTZ/5PwYTlJJV6/Ra10jcHXBQmbcWyYK+gIqfT8nYTWDAx96Dw0gx7ggObv9XFr
 rt3RbH2J/cEx1VdspWe4wu9SYmBBiQuubI/Ii9WpPNfIfNyBWwaELYXjSYhTt/07
 TivLZbvn2Efu7n7hVubx/DkArLGpVevSdWtOwalTCtBaMUSUdGA=
 =P75R
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Nothing special, notably a lot of new Qualcomm hardware is supported,
  a RISC-V reference SoC and then some cleanups both in code and device
  tree bindings.

  Core changes:

   - Add PINCTRL_PINFUNCTION() macro and use it in several drivers

  New drivers:

   - New driver for the StarFive JH7110 SoC "sys" and "aon" (always-on)
     pin controllers. (RISC-V.)

   - New subdriver for the Qualcomm QDU1000/QRU1000 SoC pin controller

   - New subdrivers for the Qualcomm SM8550 SoC and LPASS pin
     controllers

   - New subdriver for the Qualcomm SA8775P SoC pin controller

   - New subdriver for the Qualcomm IPQ5332 SoC pin controller

   - New (trivial) support for Qualcomm PM8550 and PMR735D PMIC pin
     control

   - New subdriver for the Mediatek MT7981 SoC pin controller

  Improvements:

   - Several cleanups and refactorings to the Intel drivers

   - Add 4KOhm bias support to the Intel driver

   - Use the NOIRQ_SYSTEM_SLEEP_PM_OPS for the AT91 driver

   - Support general purpose clocks in the Qualcomm MSM8226 SoC

   - Several conversions to use the new I2C .probe_new() call

   - Massive clean-up of the Qualcomm Device Tree YAML schemas

   - Add VIN[45] pins, groups and functions to the Renesas r8a77950 SoC
     driver"

* tag 'pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (118 commits)
  pinctrl: qcom: Add support for i2c specific pull feature
  pinctrl: starfive: Add StarFive JH7110 aon controller driver
  pinctrl: starfive: Add StarFive JH7110 sys controller driver
  dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl
  dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl
  pinctrl: add mt7981 pinctrl driver
  dt-bindings: pinctrl: add bindings for MT7981 SoC
  dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated
  pinctrl: qcom: Introduce IPQ5332 TLMM driver
  dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl
  dt-bindings: pinctrl: qcom: lpass-lpi: correct GPIO name pattern
  pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS
  dt-bindings: pinctrl: qcom,sm8550-lpass-lpi-pinctrl: add SM8550 LPASS
  pinctrl: at91: use devm_kasprintf() to avoid potential leaks
  dt-bindings: pinctrl: qcom: correct gpio-ranges in examples
  dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs
  dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern
  dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern
  dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and example
  dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example
  ...
2023-02-22 11:05:56 -08:00
Linus Torvalds
1b72607d73 Thermal control updates for 6.3-rc1
- Rework a large bunch of drivers to use the generic thermal trip
    structure and use the opportunity to do more cleanups by removing
    unused functions from the OF code (Daniel Lezcano).
 
  - Remove core header inclusion from drivers (Daniel Lezcano).
 
  - Fix some locking issues related to the generic thermal trip rework
    (Johan Hovold).
 
  - Fix a crash when requesting the critical temperature on tegra, which
    is related to the generic trip point work (Jon Hunter).
 
  - Clean up thermal device unregistration code (Viresh Kumar).
 
  - Fix and clean up thermal control core initialization error code
    paths (Daniel Lezcano).
 
  - Relocate the trip points handling code into a separate file (Daniel
    Lezcano).
 
  - Make the thermal core fail registration of thermal zones and cooling
    devices if the thermal class has not been registered (Rafael Wysocki).
 
  - Add trip point initialization helper functions for ACPI-defined trip
    points and modify two thermal drivers to use them (Rafael Wysocki,
    Daniel Lezcano).
 
  - Make the core thermal control code use sysfs_emit_at() instead of
    scnprintf() where applicable (ye xingchen).
 
  - Consolidate code accessing the Intel TCC (Thermal Control Circuitry)
    MSRs by introducing library functions for that and making the
    TCC-related code in thermal drivers use them (Zhang Rui).
 
  - Enhance the x86_pkg_temp_thermal driver to support dynamic tjmax
    changes (Zhang Rui).
 
  - Address an "unsigned expression compared with zero" warning in the
    intel_soc_dts_iosf thermal driver (Yang Li).
 
  - Update comments regarding two functions in the Intel Menlow thermal
    driver (Deming Wang).
 
  - Use sysfs_emit_at() instead of scnprintf() in the int340x thermal
    driver (ye xingchen).
 
  - Make the intel_pch thermal driver support the Wellsburg PCH (Tim
    Zimmermann).
 
  - Modify the intel_pch and processor_thermal_device_pci thermal drivers
    use generic trip point tables instead of thermal zone trip point
    callbacks (Daniel Lezcano).
 
  - Add production mode attribute sysfs attribute to the int340x thermal
    driver (Srinivas Pandruvada).
 
  - Rework dynamic trip point updates handling and locking in the int340x
    thermal driver (Rafael Wysocki).
 
  - Make the int340x thermal driver use a generic trip points table
    instead of thermal zone trip point callbacks (Rafael Wysocki, Daniel
    Lezcano).
 
  - Clean up and improve the int340x thermal driver (Rafael Wysocki).
 
  - Simplify and clean up the intel_pch thermal driver (Rafael Wysocki).
 
  - Fix the Intel powerclamp thermal driver and make it use the common
    idle injection framework (Srinivas Pandruvada).
 
  - Add two module parameters, cpumask and max_idle, to the Intel powerclamp
    thermal driver to allow it to affect only a specific subset of CPUs
    instead of all of them (Srinivas Pandruvada).
 
  - Make the Intel quark_dts thermal driver Use generic trip point
    objects instead of its own trip point representation (Daniel
    Lezcano).
 
  - Add toctree entry for thermal documents and fix two issues in the
    Intel powerclamp driver documentation (Bagas Sanjaya).
 
  - Use strscpy() to instead of strncpy() in the thermal core (Xu Panda).
 
  - Fix thermal_sampling_exit() (Vincent Guittot).
 
  - Add Mediatek Low Voltage Thermal Sensor (LVTS) driver (Balsam Chihi).
 
  - Add r8a779g0 RCar support to the rcar_gen3 thermal driver (Geert
    Uytterhoeven).
 
  - Fix useless call to set_trips() when resuming in the rcar_gen3
    thermal control driver and add interrupt support detection at init
    time to it (Niklas Söderlund).
 
  - Fix memory corruption in the hi3660 thermal driver (Yongqin Liu).
 
  - Fix include path for libnl3 in pkg-config file for libthermal (Vibhav
    Pant).
 
  - Remove syscfg-based driver for st as the platform is not supported
    any more (Alain Volmat).
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmPuJuESHHJqd0Byand5
 c29ja2kubmV0AAoJEILEb/54YlRxef0P/3h73rPjGEyuDlvXaazyXsJ2ItIoGeXF
 v9sDwK3IPeFTNwAu80RySXQViOG6G1e5Cl8Ee+LuuMZfPRlBnr3n35BazejDDK0N
 u3YAhPqtNOvWqr31T3A27dYtK+feFR2QL9SGFP0E4yxS1jpMOSO4Q24z7yaXdegT
 hD8YT1HbTW4Cra7A17qdXsG8LkIe0+GQXy7Ig/Dul1eqXTM4RSReGTmXic66hGpv
 lutqIQl8VdjmVBcQtTustpdycAD9zj07xd9BvOyM0lmF90zt6S0VOWFDsk+8u1jA
 FCiuRLBAM1xbguxGubahTVOM051J/MdfM5WqGgPtesNIXlDq4Je2WUGC07jGvSfV
 DMjNNb+nTkD3BK+BEe+rgv3KZBngj4p2sGHFW19v3EPdGftzohqDD5Oqn0GpsKR0
 J4GaT04T66A6jlNdzY/nPfOIw5FYEAsMwx4hR0qtEWDMT4uYtXQYM5iml9TBDoDx
 Kqyx+N8KhaKnQ4PLZ0MwtusyZydKQC1S1YK6G2eo+bXeJEre07FjZkiNfURi5gv9
 lrKS5nbAGBqUrNV4XnS18RmGAC+bxuQrNA5Gr0ouYaaLMT+jGzcdu1yCMeWJxwZI
 fFGAwE6sOU8EtmdGJrQdJt4eKCnpzOS7I1XuMDTBstl8Wv92x/YbH39vOl9wbJVs
 rmSkM+4t+sXb
 =tZwm
 -----END PGP SIGNATURE-----

Merge tag 'thermal-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull thermal control updates from Rafael Wysocki:
 "The majority of changes here are related to the general switch-over to
  using arrays of generic trip point structures registered along with a
  thermal zone instead of trip point callbacks (this has been done
  mostly by Daniel Lezcano with some help from yours truly on the Intel
  drivers front).

  Apart from that and the related reorganization of code, there are some
  enhancements of the existing driver and a new Mediatek Low Voltage
  Thermal Sensor (LVTS) driver. The Intel powerclamp undergoes a major
  rework so it will use the generic idle_inject facility for CPU idle
  time injection going forward and it will take additional module
  parameters for specifying the subset of CPUs to be affected by it
  (work done by Srinivas Pandruvada).

  Also included are assorted fixes and a whole bunch of cleanups.

  Specifics:

   - Rework a large bunch of drivers to use the generic thermal trip
     structure and use the opportunity to do more cleanups by removing
     unused functions from the OF code (Daniel Lezcano)

   - Remove core header inclusion from drivers (Daniel Lezcano)

   - Fix some locking issues related to the generic thermal trip rework
     (Johan Hovold)

   - Fix a crash when requesting the critical temperature on tegra,
     which is related to the generic trip point work (Jon Hunter)

   - Clean up thermal device unregistration code (Viresh Kumar)

   - Fix and clean up thermal control core initialization error code
     paths (Daniel Lezcano)

   - Relocate the trip points handling code into a separate file (Daniel
     Lezcano)

   - Make the thermal core fail registration of thermal zones and
     cooling devices if the thermal class has not been registered
     (Rafael Wysocki)

   - Add trip point initialization helper functions for ACPI-defined
     trip points and modify two thermal drivers to use them (Rafael
     Wysocki, Daniel Lezcano)

   - Make the core thermal control code use sysfs_emit_at() instead of
     scnprintf() where applicable (ye xingchen)

   - Consolidate code accessing the Intel TCC (Thermal Control
     Circuitry) MSRs by introducing library functions for that and
     making the TCC-related code in thermal drivers use them (Zhang Rui)

   - Enhance the x86_pkg_temp_thermal driver to support dynamic tjmax
     changes (Zhang Rui)

   - Address an "unsigned expression compared with zero" warning in the
     intel_soc_dts_iosf thermal driver (Yang Li)

   - Update comments regarding two functions in the Intel Menlow thermal
     driver (Deming Wang)

   - Use sysfs_emit_at() instead of scnprintf() in the int340x thermal
     driver (ye xingchen)

   - Make the intel_pch thermal driver support the Wellsburg PCH (Tim
     Zimmermann)

   - Modify the intel_pch and processor_thermal_device_pci thermal
     drivers use generic trip point tables instead of thermal zone trip
     point callbacks (Daniel Lezcano)

   - Add production mode attribute sysfs attribute to the int340x
     thermal driver (Srinivas Pandruvada)

   - Rework dynamic trip point updates handling and locking in the
     int340x thermal driver (Rafael Wysocki)

   - Make the int340x thermal driver use a generic trip points table
     instead of thermal zone trip point callbacks (Rafael Wysocki,
     Daniel Lezcano)

   - Clean up and improve the int340x thermal driver (Rafael Wysocki)

   - Simplify and clean up the intel_pch thermal driver (Rafael Wysocki)

   - Fix the Intel powerclamp thermal driver and make it use the common
     idle injection framework (Srinivas Pandruvada)

   - Add two module parameters, cpumask and max_idle, to the Intel
     powerclamp thermal driver to allow it to affect only a specific
     subset of CPUs instead of all of them (Srinivas Pandruvada)

   - Make the Intel quark_dts thermal driver Use generic trip point
     objects instead of its own trip point representation (Daniel
     Lezcano)

   - Add toctree entry for thermal documents and fix two issues in the
     Intel powerclamp driver documentation (Bagas Sanjaya)

   - Use strscpy() to instead of strncpy() in the thermal core (Xu
     Panda)

   - Fix thermal_sampling_exit() (Vincent Guittot)

   - Add Mediatek Low Voltage Thermal Sensor (LVTS) driver (Balsam
     Chihi)

   - Add r8a779g0 RCar support to the rcar_gen3 thermal driver (Geert
     Uytterhoeven)

   - Fix useless call to set_trips() when resuming in the rcar_gen3
     thermal control driver and add interrupt support detection at init
     time to it (Niklas Söderlund)

   - Fix memory corruption in the hi3660 thermal driver (Yongqin Liu)

   - Fix include path for libnl3 in pkg-config file for libthermal
     (Vibhav Pant)

   - Remove syscfg-based driver for st as the platform is not supported
     any more (Alain Volmat)"

* tag 'thermal-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (135 commits)
  thermal/drivers/st: Remove syscfg based driver
  thermal: Remove core header inclusion from drivers
  tools/lib/thermal: Fix include path for libnl3 in pkg-config file.
  thermal/drivers/hisi: Drop second sensor hi3660
  thermal/drivers/rcar_gen3_thermal: Fix device initialization
  thermal/drivers/rcar_gen3_thermal: Create device local ops struct
  thermal/drivers/rcar_gen3_thermal: Do not call set_trips() when resuming
  thermal/drivers/rcar_gen3: Add support for R-Car V4H
  dt-bindings: thermal: rcar-gen3-thermal: Add r8a779g0 support
  thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver
  dt-bindings: thermal: mediatek: Add LVTS thermal controllers
  thermal/drivers/mediatek: Relocate driver to mediatek folder
  tools/lib/thermal: Fix thermal_sampling_exit()
  Documentation: powerclamp: Fix numbered lists formatting
  Documentation: powerclamp: Escape wildcard in cpumask description
  Documentation: admin-guide: Add toctree entry for thermal docs
  thermal: intel: powerclamp: Add two module parameters
  Documentation: admin-guide: Move intel_powerclamp documentation
  thermal: core: Use sysfs_emit_at() instead of scnprintf()
  thermal: intel: powerclamp: Fix duration module parameter
  ...
2023-02-21 12:32:05 -08:00
Linus Torvalds
950b6662e2 SoC: DT changes for 6.3
About a quarter of the changes are for 32-bit arm, mostly filling in
 device support for existing machines and adding minor cleanups, mostly
 for Qualcomm and Samsung based machines.
 
 Two new 32-bit SoCs are added, both are quad-core Cortex-A7 chips from
 Rockchips that have been around for a while but were lacking kernel
 support so far: RV1126 is a Vision SoC with an NPU and is used in the
 Edgeble Neural Compute Module 2(Neu2) board, while RK3128 is design for
 TV boxes and so far only comes with a dts for its refernece design.
 
 The other 32-bit boards that were added are two ASpeed AST2600 based BMC
 boards, the Microchip sam9x60_curiosity development board (Armv5 based!),
 the Enclustra PE1 FPGA-SoM baseboard, and a few more boards for i.MX53
 and i.MX6ULL.
 
 On the RISC-V side, there are fewer patches, but a total of ten new
 single-board computers based on variations of the Allwinner D1/T113 chip,
 plus one more board based on Microchip Polarfire.
 
 As usual, arm64 has by far the most changes here, with over 700 non-merge
 changesets, among them over 400 alone for Qualcomm. The newly added SoCs
 this time are all recent high-end embedded SoCs for various markets,
 each on comes with support for its reference board:
 
  - Qualcomm SM8550 (Snapdragon 8 Gen 2) for mobile phones
  - Qualcomm QDU1000/QRU1000 5G RAN platform
  - Rockchips RK3588/RK3588s for tablets, chromebooks and SBCs
  - TI J784S4 for industrial and automotive applications
 
 In total, there are 46 new arm64 machines:
  - Reference platforms for each of the five new SoCs
  - Three Amlogic based development boards
  - Six embedded machines based on NXP i.MX8MM and i.MX8MP
  - The Mediatek mt7986a based Banana Pi R3 router
  - Six tablets based on Qualcomm MSM8916 (Snapdragon 410),
    SM6115 (Snapdragon 662) and SM8250 (Snapdragon 865)
  - Two LTE dongles, also based on MSM8916
  - Seven mobile phones, based on Qualcomm MSM8953 (Snapdragon 610),
    SDM450 and SDM632
  - Three chromebooks based on Qualcomm SC7280 (Snapdragon 7c)
  - Nine development boards based on Rockchips RK3588, RK3568,
    RK3566 and RK3328.
  - Five development machines based on TI K3 (AM642/AM654/AM68/AM69)
 
 The cleanup of dtc warnings continues across all platforms, adding
 to the total number of changes.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPvpVYACgkQmmx57+YA
 GNm3iA/+NgaiEgwxaot1eoBqKImyP6NtC9VHFYRbscVkaBEkdNpm2zeVX92E2/8d
 dZuGiOqY5VC+e53Rbig6m0GLrctYJfZTdJ0tYih8cwkB0jVL6bHzFQE1ugZkXkQC
 /dXx2ozNQD1XqfgXqi7OC2PeaBqBxOK4UFrhUvjfzR68GuZmWpdC4+1mdIs106D1
 252vV3y3biMDKXg1SgTXc4t8nb/ZT69gJpgJdbNuypDcAVrqlLaQZQ1sdEUu2wsh
 6XnBZKe8srkFFwN+eR0Tdf9MhneUFJxLQsAajAm4WN1QiGrqtU42mrpJE80b6Uic
 wnkvgwfyGVeGivM4/bAkeug5dCiElzCiwQBCKzL95ucf75Z8SfmhFAVAqji/MFBF
 yzfetUld975qI0Bw6zh9dJALz6hElZAbbvcGI1imlXjVIsOwINvCoB5r3YPJw7FR
 2nhJrsXs8h37VZgkeTlMp5BMu9j0AQKoBL4zbOSdrDr+XuOvuzIez+8ashFLijvu
 FO+qlXfHUC7WsR6wktVumCsADnVRPJZN0UeMhSFixceD/njVaRZBk3BOY5Ea9wjm
 G0s3KpqnLgEMrjDW3FLBf8xb9qEQPBAyeYUL9d0MHByz8W7iI/dQjEie0UEzmCqI
 J+cDdhMCKDNYOF0Xk8d9k2g5/p62/0akmncOBCZRJf9bMHklBWY=
 =I8Ga
 -----END PGP SIGNATURE-----

Merge tag 'soc-dt-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC DT updates from Arnd Bergmann:
 "About a quarter of the changes are for 32-bit arm, mostly filling in
  device support for existing machines and adding minor cleanups, mostly
  for Qualcomm and Samsung based machines.

  Two new 32-bit SoCs are added, both are quad-core Cortex-A7 chips from
  Rockchips that have been around for a while but were lacking kernel
  support so far: RV1126 is a Vision SoC with an NPU and is used in the
  Edgeble Neural Compute Module 2(Neu2) board, while RK3128 is design
  for TV boxes and so far only comes with a dts for its refernece
  design.

  The other 32-bit boards that were added are two ASpeed AST2600 based
  BMC boards, the Microchip sam9x60_curiosity development board (Armv5
  based!), the Enclustra PE1 FPGA-SoM baseboard, and a few more boards
  for i.MX53 and i.MX6ULL.

  On the RISC-V side, there are fewer patches, but a total of ten new
  single-board computers based on variations of the Allwinner D1/T113
  chip, plus one more board based on Microchip Polarfire.

  As usual, arm64 has by far the most changes here, with over 700
  non-merge changesets, among them over 400 alone for Qualcomm. The
  newly added SoCs this time are all recent high-end embedded SoCs for
  various markets, each on comes with support for its reference board:

   - Qualcomm SM8550 (Snapdragon 8 Gen 2) for mobile phones
   - Qualcomm QDU1000/QRU1000 5G RAN platform
   - Rockchips RK3588/RK3588s for tablets, chromebooks and SBCs
   - TI J784S4 for industrial and automotive applications

  In total, there are 46 new arm64 machines:
   - Reference platforms for each of the five new SoCs
   - Three Amlogic based development boards
   - Six embedded machines based on NXP i.MX8MM and i.MX8MP
   - The Mediatek mt7986a based Banana Pi R3 router
   - Six tablets based on Qualcomm MSM8916 (Snapdragon 410), SM6115
     (Snapdragon 662) and SM8250 (Snapdragon 865)
   - Two LTE dongles, also based on MSM8916
   - Seven mobile phones, based on Qualcomm MSM8953 (Snapdragon 610),
     SDM450 and SDM632
   - Three chromebooks based on Qualcomm SC7280 (Snapdragon 7c)
   - Nine development boards based on Rockchips RK3588, RK3568, RK3566
     and RK3328.
   - Five development machines based on TI K3 (AM642/AM654/AM68/AM69)

  The cleanup of dtc warnings continues across all platforms, adding to
  the total number of changes"

* tag 'soc-dt-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (1035 commits)
  dt-bindings: riscv: correct starfive visionfive 2 compatibles
  ARM: dts: socfpga: Add enclustra PE1 devicetree
  dt-bindings: altera: Add enclustra mercury PE1
  arm64: dts: qcom: msm8996: align RPM G-Link clock-controller node with bindings
  arm64: dts: qcom: qcs404: align RPM G-Link node with bindings
  arm64: dts: qcom: ipq6018: align RPM G-Link node with bindings
  arm64: dts: qcom: sm8550: remove invalid interconnect property from cryptobam
  arm64: dts: qcom: sc7280: Adjust zombie PWM frequency
  arm64: dts: qcom: sc8280xp-pmics: Specify interrupt parent explicitly
  arm64: dts: qcom: sm7225-fairphone-fp4: enable remaining i2c busses
  arm64: dts: qcom: sm7225-fairphone-fp4: move status property down
  arm64: dts: qcom: pmk8350: Use the correct PON compatible
  arm64: dts: qcom: sc8280xp-x13s: Enable external display
  arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink
  arm64: dts: qcom: sc8280xp: Add USB-C-related DP blocks
  arm64: dts: qcom: sm8350-hdk: enable GPU
  arm64: dts: qcom: sm8350: add GPU, GMU, GPU CC and SMMU nodes
  arm64: dts: qcom: sm8350: finish reordering nodes
  arm64: dts: qcom: sm8350: move more nodes to correct place
  arm64: dts: qcom: sm8350: reorder device nodes
  ...
2023-02-20 15:49:56 -08:00
Balsam CHIHI
498e2f7a6e dt-bindings: thermal: mediatek: Add LVTS thermal controllers
Add LVTS thermal controllers dt-binding definition for mt8192 and mt8195.

Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230209105628.50294-3-bchihi@baylibre.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-02-15 17:28:34 +01:00
Arnd Bergmann
68907175ec More Qualcomm driver updates for 6.3
The qcom_scm.h file is moved into firmware/qcom, to avoid having any
 Qualcomm-specific files directly in include/linux.
 
 Support for PMIC GLINK is introduced, which on newer Qualcomm platforms
 provides an interface to the firmware implementing battery management
 and USB Type-C handling. Together with the base driver comes the custom
 altmode support driver.
 
 SMD RPM gains support for IPQ9574, and socinfo is extended with support
 for revision 17 of the information format and soc_id for IPQ5332 and
 IPQ8064 are added.
 
 The qcom_stats  is changes not to fail when not all parts are
 initialized.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmPmiz4VHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FMZ8QANXJEr7U2KX/yd4riBju6Btn0unl
 I8TR5XlaQAoBUbyp4yTcCUfCe0mEiNcE/YgJwzSKY3mNxc9vLhn1GgqdF+5RFTZw
 0H8GBjUpQiRoCC2+pq3YCEisQ49HYXy9W3ys6t1Y3l8xUDLhw5CkeKOGQCqeBDX7
 pCflPy7HFUQwPhGt7AOmpNj8+Kh4GnpJHF3D2ShAMFNOn4+l0v8Gh7zDw62FmhBg
 gjA7eS2aZS7KmqEJMAC4dEFdmhvvN+a80KaWNOOQn2sdLtD64pRW2hknxinPRN+t
 dGQKeD+VGFHLfxWO40Lv0nP8P/EWjXiZdhO8HXLmVjHC56G/MG8AW0BkvxW9jPAa
 QGlzY0TbEbi0MbbAnyCJTy6USGtVUZbEmfcZ8r3rUJX5xO8eszSjueD6fH/nKIgo
 hDIIG8nSLf5TCY+NJzGr8dKENiElsgsfdNAypoX6kpXCRUCXxkiKlWzy/3oywVcO
 bKm5xs76YNNaANFf46oO6kts7nrOcegyTAdvauFemy1Q3KSWQuFP4jNpcRvWnVMN
 8/BlQ+a5uGofN/wwHS2CPmE1r8njEqlPc7wWNc0ugoRO4kAUtB2UldjjS/ZfaFvH
 BZiDDXhjScPj8lKk4kzGOb34W5AKkwFbTwSR1oN0ckW9UNDx51pNu72YlU8WLydV
 VHmzD9ndTkWSmp7W
 =+KgT
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPqVbkACgkQmmx57+YA
 GNnlFRAAuaoe9/7kOAliVks4vkJ8284POk50kuS5llzNAP4BPsQIJakE6dOOiTY1
 01qbvTlu5pK+f2ls+3WQYr5Rhgck4BUEFD+t9WcPtOpB1uq0puyWj3fwuErjDFJv
 S6nKp2P0tpru5VzQFPROyrBCw5Zlkc0U9FID4P1Ub5ulxxDWJ4ODb9Q+C9DtDxJo
 HuUGRnGPLmAJd4ymKzCtnqcg3gocFdrl9K+msFuJwAgdZ0xB893l3wyOFn2k97Uh
 8m8WEI/NbCTfDEjag3+yx9Sl3rZhtav0EnlIqowBHQFvxFaBDnvW6H4QmNRugAog
 +kH1hVzojj35jDllwL07OJzdjqW497Z9i+MEGz45h/8FvvdqJ+71UTkOwr+vnWKu
 zuEzEfM+bB434UBCQihJ7emx7eCac3TP3Von/NigDDBIXDu8iqNgUNmB8eNyN+gJ
 Db1mdatG4TuSEqnzetX4XKLP3eydxG8lkEZDOcWlhRz8CSWx9KkBU7W+hVNCBLdV
 kdhjvZpb5cRcqc/KsS22hmB3HIoISGkLrBOvqs375+Sg9PFxBGst+q24kf9MEDFz
 ypj/CRiMzkNq8IBwGF003CVhDHmlloq2afQ7YX0w1sEE0XOCIDE0YWNNb9fcoTAC
 MeDL9R4VgfjR/8Bj7zgnYOMAt6hRoHXsZ1gtS29doIH5iLdTXVI=
 =8eLr
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

More Qualcomm driver updates for 6.3

The qcom_scm.h file is moved into firmware/qcom, to avoid having any
Qualcomm-specific files directly in include/linux.

Support for PMIC GLINK is introduced, which on newer Qualcomm platforms
provides an interface to the firmware implementing battery management
and USB Type-C handling. Together with the base driver comes the custom
altmode support driver.

SMD RPM gains support for IPQ9574, and socinfo is extended with support
for revision 17 of the information format and soc_id for IPQ5332 and
IPQ8064 are added.

The qcom_stats  is changes not to fail when not all parts are
initialized.

* tag 'qcom-drivers-for-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: socinfo: Add IDs for IPQ5332 and its variant
  dt-bindings: arm: qcom,ids: Add IDs for IPQ5332 and its variant
  dt-bindings: power: qcom,rpmpd: add RPMH_REGULATOR_LEVEL_LOW_SVS_L1
  firmware: qcom_scm: Move qcom_scm.h to include/linux/firmware/qcom/
  MAINTAINERS: Update qcom CPR maintainer entry
  dt-bindings: firmware: document Qualcomm SM8550 SCM
  dt-bindings: firmware: qcom,scm: add qcom,scm-sa8775p compatible
  soc: qcom: socinfo: Add Soc IDs for IPQ8064 and variants
  dt-bindings: arm: qcom,ids: Add Soc IDs for IPQ8064 and variants
  soc: qcom: socinfo: Add support for new field in revision 17
  soc: qcom: smd-rpm: Add IPQ9574 compatible
  soc: qcom: pmic_glink: remove redundant calculation of svid
  soc: qcom: stats: Populate all subsystem debugfs files
  dt-bindings: soc: qcom,rpmh-rsc: Update to allow for generic nodes
  soc: qcom: pmic_glink: add CONFIG_NET/CONFIG_OF dependencies
  soc: qcom: pmic_glink: Introduce altmode support
  soc: qcom: pmic_glink: Introduce base PMIC GLINK driver
  dt-bindings: soc: qcom: Introduce PMIC GLINK binding
  soc: qcom: dcc: Drop driver for now

Link: https://lore.kernel.org/r/20230210182242.2023901-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-02-13 16:22:33 +01:00
Arnd Bergmann
01e9d2c6be Qualcomm driver updates for v6.3
This introduces a new driver for the Data Capture and Compare block,
 which provides a mechanism for capturing hardware state (access MMIO
 registers) either upon request of triggered automatically e.g. upon a
 watchdog bite, for post mortem analysis.
 
 The remote filesystem memory share driver gains support for having its
 memory bound to more than a single VMID.
 
 The SCM driver gains the minimal support needed to support a new
 mechanism where secure world can put calls on hold and later request
 them to be retried.
 
 Support for the new SA8775P platform is added to rpmhpd, QDU1000 is
 added to the SCM driver and a long list of platforms are added to the
 socinfo driver. Support for socinfo data revision 16 is also introduced.
 
 Lastly a driver to program the ramp controller in MSM8976 is introduced.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmPSqkcVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FZJoQANgP9rQgJ/JNvKMHA0ZiBK5NmCi+
 Km+b2ufICk1au7IhiwRDTlZZBSozShIqSp8ua+WsKQqzKd2Reyj3F33/TZdZrHg+
 LW7A3g8e6a6Ook/iJgD0LiTlaGz+/umQ7lnUaaARUPv4JZ/y+pCphTdxTwRXNhvw
 T6ndjbx7W/qhb9WlZaP3Jnd4z3csr1fpiOfvK1TgJpgZzsKUUq/V9SSRKs3BS5lK
 gG/F9wxfRVhpjZZCdx9cCO4WtI4xwuocxdGhzljH0AHvAAgab/c7w9YKrkFpGib6
 lj3sJ+TLC/nZc93Swzk4Sv57F//f1EhBvWZImBiZioR7IPPrcotdVa0wKOuiEmPn
 TWPnEDk+5KiTG4iXOfQ6z0NbAM9S057El0nb8jYw6rx04xOHZYpb5w6172ftYNFk
 0DSfNuEImh8YZwhwRKbP1LHemwliUptaFonYc9SrFW+Y9MLh69TTTggv/N6YzLK5
 /e+RQ7tjE/idg//iZAK649mqzZCnHc+di3S055otcqm3Uhr5/xYfIwFce6ssTNjK
 SNaK9LjwE+g7Rqy0jQV7uFyQ+HXy443TX8fRnnwZHMv+M+U+9VpuNYaNL3cJ9j7S
 qsCUWcjN36pFCPMrDPSSmW5VEQD+WJOwGA4ZqQrUVXvLgtEfHZPd0PID8kxul6PE
 KRl0gMt770iAnUtK
 =EWZ7
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPqVYUACgkQmmx57+YA
 GNnD1xAApXNA9N+BLLjfOXErNlKWTQXHThSQIvHxx7xubIy3Nm/soGCJFcp45hYJ
 IW74MuOy5N3ngFe4HzGyUiHW/9E9BLZGh0ZzHUO/dIhG7io3zAC7tDw6bbwu67Wz
 NhWBurgsy5BL7jjX/bBDKZuthyEI6IlD2TYLeFqrD63ZoryviyvD3IKS4JAo8zg3
 Fz7z8Cr9v02cur6QJum95iNxogncX8L1/WQwRfHXsMV4MgteArTuNTh8zAXBPAlV
 T7ENWe/2U6GCvoU295hl5NLHwARSm1bsSNYVCJR5cvSBXqd8U06WDFLBttUdRg8J
 32KCWDLZ/J8IF69DvOWRfh+cmJmlM14o2uNLSnFbV2PyNh4LORsWCbx2J4zX147T
 nocFySuOxP9g4+7h0zv5FFm+uAS7RPIPLKCdCsYR3RbZl5cbZmnvJzQIgLKaVa+e
 fprcDT6X8HhODDtj49kEtK7kRe3dFz0MwiHf9wxyx7rm1eIlqGI3reHaU4fcaml2
 PqgtuShMGx3uSnpHsi2j/sXuCEmKpNSwOBPU1INNgKm2FmMFy4OYsPbe7s1vdTpi
 irJ3CC/3Uk9r4CEoJe3G9TURFQyEpNISjdCEa21tGD0miMrdsB79JMU/nJkiLpg9
 7l8EDMU33HYKsAqqezocNqzreV2s0YjFPs7Vts5aIh+aecS/Kzk=
 =B0bJ
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

Qualcomm driver updates for v6.3

This introduces a new driver for the Data Capture and Compare block,
which provides a mechanism for capturing hardware state (access MMIO
registers) either upon request of triggered automatically e.g. upon a
watchdog bite, for post mortem analysis.

The remote filesystem memory share driver gains support for having its
memory bound to more than a single VMID.

The SCM driver gains the minimal support needed to support a new
mechanism where secure world can put calls on hold and later request
them to be retried.

Support for the new SA8775P platform is added to rpmhpd, QDU1000 is
added to the SCM driver and a long list of platforms are added to the
socinfo driver. Support for socinfo data revision 16 is also introduced.

Lastly a driver to program the ramp controller in MSM8976 is introduced.

* tag 'qcom-drivers-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (33 commits)
  firmware: qcom: scm: Add wait-queue handling logic
  dt-bindings: firmware: qcom,scm: Add optional interrupt
  Revert "dt-bindings: power: rpmpd: Add SM4250 support"
  Revert "soc: qcom: rpmpd: Add SM4250 support"
  soc: qcom: socinfo: Add a bunch of older SoCs
  dt-bindings: arm: qcom,ids: Add a bunch of older SoCs
  dt-bindings: arm: qcom,ids: Add QRD board ID
  soc: qcom: socinfo: Fix soc_id order
  dt-bindings: soc: qcom: smd-rpm: Exclude MSM8936 from glink-channels
  dt-bindings: firmware: qcom: scm: Separate VMIDs from header to bindings
  soc: qcom: rmtfs: Optionally map RMTFS to more VMs
  dt-bindings: reserved-memory: rmtfs: Make qcom,vmid an array
  dt-bindings: firmware: scm: Add QDU1000/QRU1000 compatible
  dt-bindings: firmware: qcom,scm: narrow clocks and interconnects
  dt-bindings: firmware: qcom,scm: document MSM8226 clocks
  soc: qcom: ramp_controller: Make things static
  soc: qcom: rmphpd: add power domains for sa8775p
  dt-bindings: power: qcom,rpmpd: document sa8775p
  PM: AVS: qcom-cpr: Fix an error handling path in cpr_probe()
  soc: qcom: dcc: rewrite description of dcc sysfs files
  ...

Link: https://lore.kernel.org/r/20230126163008.3676950-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-02-13 16:21:41 +01:00
Arnd Bergmann
7dbdc16fc8 More Qualcomm ARM64 DT updates for 6.3
The new Qualcomm QDU1000 and QRU1000 platforms, and the IDP device on
 these are introduced. New support for a couple of USB modem sticks from
 THWC are introduced, so is support for Xiaomi Mi Pad 5 Pro and the Pro
 SKU of the Herobrine device.
 
 The Core Bus Fabric (CBF) is introduced on MSM8996. Interconnect paths
 for UFS are also described.
 
 A few fixes related to the power-grid of herobrine, on SC7280, are
 introduced.
 
 QFPROM is introduced on IPQ8074 and Interconnect providers are added for
 SDM670.
 
 On SDM845 the duplicated wcd9340 audio coded description is moved from
 devices to a common file, audio devices are added to the OnePlus 6 and
 6T.
 
 On SM6115 debug UART, SMP2P, watchdog nodes are introduced, and the
 platform is switched to use #address/size-cells of 2, in line with most
 other platforms.
 
 Camera control interface and clock controllers are added for SM6350, and
 the CCI interface is enabled on the Fairphone FP4.
 
 On SM8350 the interconnect reference of SDHCI controller is corrected,
 DSI1 PHY clocks are properly described as sources for the Display clock
 controller and DSI1 is wired up to the display controller.
 
 The firmware paths are corrected for the Sony Xperia Nagara platform.
 
 The GPR bus, audio servic3es and LPASS pinctrl nodes are added for the
 SM8550 platform. Additionally a few small typos/errors are corrected.
 
 gpio-ranges are corrected across MSM8953, SM6115 and SC8280XP and a
 range of DT validation issues are corrected.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmPmmt0VHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FuXsP/0/VRqYf9SxY5iVEWAuUnsf+sVAT
 fGzZ0YvE3NQoYA0xoExVYZWrDDzkdSp2RoMbLh8kWyku1BCmEeV/X8RnbLoQAM8D
 txUJjpazAVxRiMoDgxxyGpn55KVxb6gAO8fXi9mbc6X+0wsPoWsghZVx5AicEiIY
 3f3m63yFjLGO7aOKs7wfBx5odgUuXoBBzzHYw+VKnp9NAhfMLudM7JCa8kTrOnOZ
 JaPMnvbaQg7i1WEW6jJt4Gbp4+f+IqfYhm1RkzzJbVmf1bYWEEhHltM1p50gwkAK
 fFG6mV+j6WqhJd9myhswvuP9YrBQ0cxZjKErBTNSxzegzgOFfxnG4LsRZRh5oJjq
 qZC+edkPXe6DDIidcGcGvkGekc3c1Xidnwoui7xwIFQ/KN+zZDDg+psnAH3L1On+
 /vWKNetiwXZ5uN3yv8WmTm/5YDLBltjh7RlQVo448RMKSfyt6VEJaJHcJN3G3Nof
 J5F8EJI/EanDU9XjpUEEYGZ2e3yagtc9x6ThVMX+k8tqxhZLxhVDRi7SnY0XKfjQ
 5FVE45sX+J5jlnRu6lx4xF2sgO5jUvTEs1vVY/1IloAfCHipsbhQfU8f4KUN0bNO
 XmTDzsDYK/QXGTYQ27P/xCqu8fRTDbRD8cBF5PWEBbw8uDWtK5bZk1mZFjdkNCge
 E3pIAn6Gs8MANubJ
 =wSbI
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPqTZgACgkQmmx57+YA
 GNlv9g//f6Ya0tDtXwr7GTU3HZc/lEEhibifep5aohWuTsMqoUiic1lLdV2/aXsW
 FZxgQ5TaH7UluqZ1Acrxt9+saYaMu15SBgBXM///pYcY7r5p/sKlRSrNU1sKZv29
 psTGrhotU03TM5XFmavu9su7l34sAO1NAiXTF9h/bSdaX4KYUSQCucBlSFQ7Q2c4
 XlqI9uy79NHIC+O6x4RXdYvmAUb6rQ9rZ4WQOzy+gkFbF19gpz9X+XP5nDMPnfnw
 C31+4SrvMI2/sej+3CZjwg/Vfz5Ahq1WKrOd8jPcdpGiXmfP3iDZlMV9dMbwQbzS
 cF7Jx8S7/p6KaAn8OtnCaD4rar17YJnIjpzlP6gZKj82WCheaK2hwDYT1FcR80bj
 tmjH2hvV8X48njgUga18ZM489xdPkw3rWH/jmH8lnntTqOdR0lsbqlnpsztrO/4H
 W0FVXiKanvwOSYE3Z6I7QrL1ajB+33/nnqPiaevkajtoeGShap5v32FieIjrwa8x
 fYMNjxAegzDUUxQNm7omc+oL7PYTwo26qqJcWiMqa8l6LVx/+o6WPmLIZkzGkEAC
 qqzPU/m55c+E+tEkBf9aW1QMgjBfjdysfnu158mgfVH2ouc2l7p92FqMgWCEz2qo
 XSA0dU2enNus2qJM9oAXPzahPzvM8pHN+EPUFnzVupPqlgawnP8=
 =nzqV
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

More Qualcomm ARM64 DT updates for 6.3

The new Qualcomm QDU1000 and QRU1000 platforms, and the IDP device on
these are introduced. New support for a couple of USB modem sticks from
THWC are introduced, so is support for Xiaomi Mi Pad 5 Pro and the Pro
SKU of the Herobrine device.

The Core Bus Fabric (CBF) is introduced on MSM8996. Interconnect paths
for UFS are also described.

A few fixes related to the power-grid of herobrine, on SC7280, are
introduced.

QFPROM is introduced on IPQ8074 and Interconnect providers are added for
SDM670.

On SDM845 the duplicated wcd9340 audio coded description is moved from
devices to a common file, audio devices are added to the OnePlus 6 and
6T.

On SM6115 debug UART, SMP2P, watchdog nodes are introduced, and the
platform is switched to use #address/size-cells of 2, in line with most
other platforms.

Camera control interface and clock controllers are added for SM6350, and
the CCI interface is enabled on the Fairphone FP4.

On SM8350 the interconnect reference of SDHCI controller is corrected,
DSI1 PHY clocks are properly described as sources for the Display clock
controller and DSI1 is wired up to the display controller.

The firmware paths are corrected for the Sony Xperia Nagara platform.

The GPR bus, audio servic3es and LPASS pinctrl nodes are added for the
SM8550 platform. Additionally a few small typos/errors are corrected.

gpio-ranges are corrected across MSM8953, SM6115 and SC8280XP and a
range of DT validation issues are corrected.

* tag 'qcom-arm64-for-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (81 commits)
  arm64: dts: qcom: sc7280: Power herobrine's 3.3 eDP/TS rail more properly
  arm64: dts: qcom: pmk8550: fix PON compatible
  arm64: dts: qcom: sm8550: fix DSI controller compatible
  arm64: dts: qcom: sc7280: Hook up the touchscreen IO rail on evoker
  arm64: dts: qcom: sc7280: Hook up the touchscreen IO rail on villager
  arm64: dts: qcom: sc7280: Add 3ms ramp to herobrine's pp3300_left_in_mlb
  arm64: dts: qcom: sc7280: On QCard, regulator L3C should be 1.8V
  arm64: dts: qcom: sc8280xp: correct LPASS GPIO gpio-ranges
  arm64: dts: qcom: msm8992-lg-bullhead: Enable regulators
  arm64: dts: qcom: sm6115: correct TLMM gpio-ranges
  arm64: dts: qcom: msm8953: correct TLMM gpio-ranges
  arm64: dts: qcom: msm8992-lg-bullhead: Correct memory overlaps with the SMEM and MPSS memory regions
  arm64: dts: qcom: sm8350-hdk: correct LT9611 pin function
  arm64: dts: qcom: sm8350-hdk: align pin config node names with bindings
  arm64: dts: qcom: sm6350: Use specific qmpphy compatible
  arm64: dts: qcom: sm6115: Add smp2p nodes
  arm64: dts: qcom: sm7225-fairphone-fp4: Enable CCI busses
  arm64: dts: qcom: sm6350: Add CCI nodes
  arm64: dts: qcom: sm6350: Add camera clock controller
  dt-bindings: clock: add QCOM SM6350 camera clock bindings
  ...

Link: https://lore.kernel.org/r/20230210192908.2039976-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-02-13 15:47:52 +01:00
Alain Volmat
d10e9f8813 dt-bindings: clock: remove stih416 bindings
Remove the stih416 clock dt-bindings since this platform is no
more supported.

Signed-off-by: Alain Volmat <avolmat@me.com>
Link: https://lore.kernel.org/r/20230209091659.1409-11-avolmat@me.com
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-02-10 15:47:13 -08:00
Yinbo Zhu
01d63ce425 dt-bindings: clock: add loongson-2 clock include file
This file defines all Loongson-2 SoC clock indexes, it should be
included in the device tree in which there's device using the
clocks.

Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221129034157.15036-1-zhuyinbo@loongson.cn
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-02-10 15:32:28 -08:00
Jianlong Huang
716129d3b7 dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl
Add pinctrl bindings for StarFive JH7110 SoC aon pinctrl controller.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Link: https://lore.kernel.org/r/20230209143702.44408-3-hal.feng@starfivetech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-10 23:44:07 +01:00
Jianlong Huang
d6e0a66009 dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl
Add pinctrl bindings for StarFive JH7110 SoC sys pinctrl controller.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Link: https://lore.kernel.org/r/20230209143702.44408-2-hal.feng@starfivetech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-10 23:44:07 +01:00
Bjorn Andersson
c0cf43f63a Merge branch '20221213152617.296426-1-konrad.dybcio@linaro.org' into HEAD
Merge DT binding to gain Camera clock defines for SM6350
2023-02-08 20:09:15 -08:00
Konrad Dybcio
717607f1a4 dt-bindings: clock: add QCOM SM6350 camera clock bindings
Add device tree bindings for camera clock controller for
Qualcomm Technology Inc's SM6350 SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213152617.296426-1-konrad.dybcio@linaro.org
2023-02-08 20:08:21 -08:00
Kathiravan T
4ad66c3f4b dt-bindings: arm: qcom,ids: Add IDs for IPQ5332 and its variant
Add SOC ID for Qualcomm IPQ5332 and IPQ5322 variants.

Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230208055709.13162-2-quic_kathirav@quicinc.com
2023-02-08 19:36:16 -08:00
Dmitry Baryshkov
bdd133c2ee dt-bindings: power: qcom,rpmpd: add RPMH_REGULATOR_LEVEL_LOW_SVS_L1
Add define for another power saving state used on SM8350 for the GPU.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230206145707.122937-3-dmitry.baryshkov@linaro.org
2023-02-08 19:29:46 -08:00
Christian Marangi
d615ef0c92 dt-bindings: arm: qcom,ids: Add Soc IDs for IPQ8064 and variants
Add Soc IDs for Qualcomm IPQ8064 and variants.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230124143236.1038-1-ansuelsmth@gmail.com
2023-02-08 14:49:39 -08:00
Georgi Djakov
b1f5e7ff0c Merge branch 'icc-sa8775p' into icc-next
* icc-sa8775p
  dt-bindings: interconnect: qcom: document the interconnects for sa8775p
  interconnect: qcom: add a driver for sa8775p
  dt-bindings: interconnect: qcom,sa8775p-rpmh: fix a typo

Link: https://lore.kernel.org/r/20230118140825.242544-2-brgl@bgdev.pl
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-02-06 15:39:41 +02:00
Georgi Djakov
b9544fb577 Merge branch 'icc-sdm670' into icc-next
* icc-sdm670
  dt-bindings: interconnect: add sdm670 interconnects
  interconnect: qcom: add sdm670 interconnects

Link: https://lore.kernel.org/r/20230111005155.50452-1-mailingradian@gmail.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-02-06 15:39:15 +02:00
Georgi Djakov
863ed40ea9 Merge branch 'icc-ip0-migration' into icc-next
Commits 2f3724930e ("interconnect: qcom: sc7180: Drop IP0
interconnects") and 2fb251c265 ("interconnect: qcom: sdx55: Drop IP0
interconnects") removed IP0 interconnects (and ipa-virt devices support)
in favour of the RPMH clocks. Follow this example for other platforms
defining IP0 RPMH resource. While we are at it, remove several leftover
from the mentioned patches.

* icc-ip0-migration:
  interconnect: qcom: sdx55: drop IP0 remnants
  interconnect: qcom: sc7180: drop IP0 remnants
  interconnect: move ignore_list out of of_count_icc_providers()
  interconnect: qcom: sm8150: Drop IP0 interconnects
  interconnect: qcom: sm8250: Drop IP0 interconnects
  interconnect: qcom: sc8180x: Drop IP0 interconnects
  interconnect: qcom: sc8280xp: Drop IP0 interconnects
  dt-bindings: interconnect: qcom: Remove ipa-virt compatibles
  dt-bindings: interconnect: qcom: drop IPA_CORE related defines

Link: https://lore.kernel.org/r/20230109002935.244320-1-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-02-06 15:38:22 +02:00
Arnd Bergmann
f7401f6bc7 TI K3 device tree updates for v6.3
New features:
 J784S4 SoC and EVM support
 AM68 and AM69 StarterKit, phyBOARD-Electra-AM642, Siemens IoT2050 M.2
 AM62A7 SK additional peripherals
 AM62 SK USB support
 
 Non critical fixes
 AM62:
 McSPI Clock ID fixes
 MMC TAP value updates
 J7200:
 pinmux range update
 All:
 Cache DT node fixes
 
 Cleanups:
 Reorder dts Makefile entries alphabetically
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEEyRC2zAhGcGjrhiNExEYeRXyRFuMFAmPdN9UQHHZpZ25lc2hy
 QHRpLmNvbQAKCRDERh5FfJEW4w4NB/9BebQHfTau/InqXqL24ofgqzpEbq51zmcl
 2TN1cCMG7Dpln8cvIwoj2KBLkTD//gP5Vx5oTdbFo5EJ/cH5Ohg39zLy773+ZU9O
 tD3wqzI1jUZjvn4H+atds1r5TmDyBoyRiDq90h6XiAFvu72GabW3wCF6wj3kQirl
 5a8+gjKZuEeV990ypppmsKWdZcfEX2b84tGdz+4vtMFNbQamXfbmrozYB1Fcjj3Y
 sZDi8J+HUmUq+wHpaoQVSTfeKQxnHg4nmrn5jVifGnEQcKNQUjRvSrZ0Mh3ARbXR
 OdhA5U+5urEUK3YtDj7STW2VmKCSZiTyEsXwNPCuEMk3/4THWLk6
 =Ddwb
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPg3wAACgkQmmx57+YA
 GNkwZw//fJqEFL7a8QXVwIF2xkCyPvLMliD4KpqrLGp48XcWo/PoJhAgp2oP5qG8
 keN8VqlYSth1BKqL8UCY7bU3tR7TfGWFTF9r0TnNW/ZGY3HwEntSTeoNXUgF4rGW
 3F7euW2+2DELAzmoHNNCR7i4IaCnlXgZBEzxKOmLPmJtbzWIIKWJCHGyw2kjfCqo
 8rOIwHQjEOQ9iDe9j96BE89meVRqOrNM3YoUn0Wyah28Vm1qyhLX9enbeUPw7TYe
 CzfLQCF0POre42iOYOqwBeflnrgj1ZqTbO+FnKCozJhgLesZEdL6Yv19vjnE04VN
 7kriiPTKSH4jrOccvc3SFHuekUfRnlCF+Tsku/Ft+JjtvSHMghqsIgtLMoMforrC
 c5iBmem4xnoVvyjWlgvI8NfLvRSZQ1HWe9SsF282Iy950LxqrLwH9nXzPd5HMJNB
 tBp+sWa3fzW/u4Qic7YppwZ6w0lX8jbnC3qn1ngBudM9UjrHupHmsDaTE94VWi1B
 PjjcPmAXKDje1IiLBVG0mRBVmr5hFf3wZq2j6+ylr8aq7QqWE4ksHFk1m9XitQ2T
 dIsuH6nJXP/bhjv3Kgfb4igHFewmh9PiZJ9OQ/H2A1Zz1P2owX2G1gc9qXrePfvs
 lX/X4n+hNOt+l9YmJKCTlfuOpnuslqtM9Dt6ZMMcKFw7f9/+Hgg=
 =StZP
 -----END PGP SIGNATURE-----

Merge tag 'ti-k3-dt-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt

TI K3 device tree updates for v6.3

New features:
J784S4 SoC and EVM support
AM68 and AM69 StarterKit, phyBOARD-Electra-AM642, Siemens IoT2050 M.2
AM62A7 SK additional peripherals
AM62 SK USB support

Non critical fixes
AM62:
McSPI Clock ID fixes
MMC TAP value updates
J7200:
pinmux range update
All:
Cache DT node fixes

Cleanups:
Reorder dts Makefile entries alphabetically

* tag 'ti-k3-dt-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (25 commits)
  arm64: dts: ti: Makefile: Rearrange entries alphabetically
  arch: arm64: dts: Add support for AM69 Starter Kit
  dt-bindings: arm: ti: Add binding for AM69 Starter Kit
  arm64: dts: ti: iot2050: Add support for M.2 variant
  dt-bindings: arm: ti: Add binding for Siemens IOT2050 M.2 variant
  arm64: dts: ti: iot2050: Add layout of OSPI flash
  arm64: dts: ti: k3-j7200: Fix wakeup pinmux range
  arm64: dts: ti: k3-am68-sk: Add support for AM68 SK base board
  arm64: dts: ti: Add initial support for AM68 SK System on Module
  dt-bindings: arm: ti: Add binding for AM68 SK
  arm64: dts: Update cache properties for ti
  arm64: dts: ti: Add support for phyBOARD-Electra-AM642
  dt-bindings: arm: ti: Add bindings for PHYTEC AM64x based hardware
  arm64: dts: ti: k3-am62a7-sk: Enable USB1 node
  arm64: dts: ti: k3-am62a7-sk: Enable ethernet port
  arm64: dts: ti: k3-am62a-main: Add more peripheral nodes
  arm64: dts: ti: k3-am62a-mcu: Add MCU domain peripherals
  arm64: dts: ti: Add support for J784S4 EVM board
  arm64: dts: ti: Add initial support for J784S4 SoC
  dt-bindings: pinctrl: k3: Introduce pinmux definitions for J784s4
  ...

Link: https://lore.kernel.org/r/642cf238-43e5-d6fa-68b5-a9dfbc0277bf@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-02-06 12:05:36 +01:00
Arnd Bergmann
426082a214 Introduce MediaTek regulator coupler driver to ensure that the SRAM
voltage in par with the GPU voltage. This allows for a stable use of the
 GPU.
 
 mtk-mutex:
 - add support for MT8188 vdosys0 path
 - allow it to be build as module
 - add support for MT8195 vdosys1 path
 
 mmsys:
 - add MT8188 vdosys0 path
 - allow to be build as a module
 - add MT8195 vdosys1 path
 - add support for CMDQ
 - allow for up to 64 reset bits
 - add supprot for the MT8195 vppsys[0,1] pathes
 
 pm-domains:
 - keep power for the MT8186 ADSP on by default
 - add support for MT8188
 - add support for buck isolation needed in specific pm-domains for
   MT8188 and MT8192
 
 mtk-svs:
 - enable IRQ later to allow using kexec
 - several improvments on the code base
 - fix modalias
 
 pmic wrapper:
 - convert binding to yaml. As this is thightly coupled to the MT6357
   PMIC, I took patches regarding it as well.
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmPaoLsXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH44bw//Wpo6qdxzTOOEGkzdD7JairN5
 ozPZyIiSTcg+zVWNJ5sbMMe3xtjIXJVpzI3yfJtx4BTtjns1FNsLeLpVKrS1RVd+
 fiSAmhrioYUHk7H599tArs4H+5h1lJkcpf1X+7fX5mc9yCQSsAmAcVeFA5TMbKpS
 wdr460r7sUZtSLSVLHza1R7k4V3OLHzMzSztBTtgryE/rV9y/1rQ3hb8aiEgu4h1
 5igUDXJfzsmGc45UxCaWZnrziREhSMWe0kc4eGDQSGL6Nc/mjZ9wjhDDnzfcwDTE
 mkvTEAgiS6Jh/hoqHmwyzTO3lZRTIxOc/d5eKTzwk3z7fglGt35wN6jJRHC7Utwx
 aSt4x8R+3CrlUaAY2FC/1oxt3ONbcLqxPGVUTbvQYxCeXSTagEok1PxyKZZl1bKe
 XYbJfm0q9tujxItgbF79j6UD0eWVZ9/UM68gkiaUfZ3AYQdLh9J7nqPScu6UqRR5
 5gCeLm41/BOrnObmpv0g6VcGfpIjej8gfJinDLgcjUMW8nv38UpglUojeFJutT7b
 BGMmSC/GR57d2NmhGkWSgdYsjrU6iADf936WdKSSfYswkxrOWLgYSd41bym1fluK
 JxUYJga4S6Xu3Pjj9vbX60Vi7d9LitEuyAQbi540TP148NjBs0d29puhOGK8USPh
 z+Jaoaj+j6XSSg0fotQ=
 =8+S0
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPdCowACgkQmmx57+YA
 GNknYQ//X3Eg6K4AM3EJ2eKuVyVbqChPwTo1SGgyKb2GpTCvkHlb9yNfKe+LluA8
 /KLm7bmvpyTA0yegXmjMNo0HmHw5Qu5wsWTdb74JifAWaH9kh+8AGRptFZO+4bzx
 /Twj3ZkqqTqzI+NETRcL13sVIEE8y+iGRBVUi8kIxQVS7BYbuBUc0gkgEfbYEfIB
 sLa+swF9NT/h8cd0jg4TJqTL3F6pUr28JzGcg5fs5JH0WqSkbxELJcW65x73OCdW
 RjU9ioLVKDjFq6m/6KEq7QzWb35ebItG4yLSH6nwT9l7B/KV9pC0TIapiKLlne0N
 HlerHU512ynbvtSo+8zyL+gKGiPvQqxyLb/Sd669edSqeCASi8dlKcwxT/boldzu
 JZLf7qBJR5X8BLrFp8RhWs2D3Mockq8aXc4WGNPnzuvOvRQrl5sfkH8spl2pjkT+
 rd6i77IWd+munKldZzFwwDlAhvmpPFWA1F3ogViFiLsy17UwId2AO37FGPbtZ7BL
 xqJIkLAqfXqUri6KM/MFC5njbWimIfDKmsmQ+FA8DMO7+OFnnNEVKewp63XcOv+m
 mXkUzoMHnG6GB7tQie5AbwD4RKE14Rr1uiYZRRfdht+zreYYEvqfbowU2dL3OTnr
 EVnXNSUChOKfW4OBUrX6nKbvni0ffzRaC+aLyBdE8yqMCr7v1RA=
 =fPm5
 -----END PGP SIGNATURE-----

Merge tag 'v6.2-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into soc/drivers

Introduce MediaTek regulator coupler driver to ensure that the SRAM
voltage in par with the GPU voltage. This allows for a stable use of the
GPU.

mtk-mutex:
- add support for MT8188 vdosys0 path
- allow it to be build as module
- add support for MT8195 vdosys1 path

mmsys:
- add MT8188 vdosys0 path
- allow to be build as a module
- add MT8195 vdosys1 path
- add support for CMDQ
- allow for up to 64 reset bits
- add supprot for the MT8195 vppsys[0,1] pathes

pm-domains:
- keep power for the MT8186 ADSP on by default
- add support for MT8188
- add support for buck isolation needed in specific pm-domains for
  MT8188 and MT8192

mtk-svs:
- enable IRQ later to allow using kexec
- several improvments on the code base
- fix modalias

pmic wrapper:
- convert binding to yaml. As this is thightly coupled to the MT6357
  PMIC, I took patches regarding it as well.

* tag 'v6.2-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (41 commits)
  soc: mediatek: mtk-svs: add missing MODULE_DEVICE_TABLE
  soc: mediatek: mtk-devapc: Switch to devm_clk_get_enabled()
  soc: mtk-svs: mt8183: refactor o_slope calculation
  soc: mediatek: mtk-svs: delete superfluous platform data entries
  soc: mediatek: mtk-svs: move svs_platform_probe into probe
  soc: mediatek: mtk-svs: improve readability of platform_probe
  soc: mediatek: mtk-svs: clean up platform probing
  soc: mediatek: mtk-svs: keep svs alive if CONFIG_DEBUG_FS not supported
  soc: mediatek: mtk-svs: Use pm_runtime_resume_and_get() in svs_init01()
  soc: mediatek: mtk-svs: reset svs when svs_resume() fail
  soc: mediatek: mtk-svs: restore default voltages when svs_init02() fail
  soc: mediatek: mmsys: add support for MT8195 VPPSYS
  dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
  soc: mediatek: Introduce mediatek-regulator-coupler driver
  soc: mediatek: mtk-svs: Enable the IRQ later
  soc: mediatek: add mtk-mutex support for mt8195 vdosys1
  soc: mediatek: add mtk-mutex component - dp_intf1
  soc: mediatek: mmsys: add reset control for MT8195 vdosys1
  soc: mediatek: mmsys: add mmsys for support 64 reset bits
  soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1
  ...

Link: https://lore.kernel.org/r/396d51fc-81f3-4a2b-d7a7-b966bfe3002a@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-02-03 14:22:19 +01:00
Bjorn Andersson
3ef1569b2b Merge branch '20230112204446.30236-2-quic_molvera@quicinc.com' into arm64-for-6.3
Merge DT binding in order to get GCC clock defines.
2023-01-31 10:01:36 -06:00
Bjorn Andersson
ac4fdb86a0 Merge branch 'icc-qdu1000-immutable' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into HEAD
Merge DT binding to gain interconnect defines.
2023-01-31 10:01:18 -06:00
Oleksij Rempel
4e197ee880 clk: imx6ul: add ethernet refclock mux support
Add ethernet refclock mux support and set it to internal clock by
default. This configuration will not affect existing boards.

clock tree before this patch:
fec1 <- enet1_ref_125m (gate) <- enet1_ref (divider) <-,
                                                       |- pll6_enet
fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-´

after this patch:
fec1 <- enet1_ref_sel(mux) <- enet1_ref_125m (gate) <- ...
               `--<> enet1_ref_pad                      |- pll6_enet
fec2 <- enet2_ref_sel(mux) <- enet2_ref_125m (gate) <- ...
               `--<> enet2_ref_pad

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Lee Jones <lee@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230131084642.709385-17-o.rempel@pengutronix.de
2023-01-31 14:45:17 +02:00
Oleksij Rempel
5f82bfced6 clk: imx6ul: fix enet1 gate configuration
According to the "i.MX 6UltraLite Applications Processor Reference Manual,
Rev. 2, 03/2017", BIT(13) is ENET1_125M_EN which is not controlling root
of PLL6. It is controlling ENET1 separately.

So, instead of this picture (implementation before this patch):
fec1 <- enet_ref (divider) <---------------------------,
                                                       |- pll6_enet (gate)
fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-´

we should have this one (after this patch):
fec1 <- enet1_ref_125m (gate) <- enet1_ref (divider) <-,
                                                       |- pll6_enet
fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-´

With this fix, the RMII reference clock will be turned off, after
setting network interface down on each separate interface
(ip l s dev eth0 down). Which was not working before, on system with both
FECs enabled.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230131084642.709385-16-o.rempel@pengutronix.de
2023-01-31 14:45:16 +02:00
Oleksij Rempel
8bb289bb48 clk: imx6q: add ethernet refclock mux support
Add ethernet refclock mux support and set it to internal clock by
default. This configuration will not affect existing boards since
machine code currently overwrites this default.

The machine code will be fixed in a separate patch.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230131084642.709385-3-o.rempel@pengutronix.de
2023-01-31 14:45:03 +02:00
Daniel Golle
a6473d0f9f dt-bindings: clock: mediatek: add mt7981 clock IDs
Add MT7981 clock dt-bindings, include topckgen, apmixedsys,
infracfg, and ethernet subsystem clocks.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/e353d32b5a4481766519a037afe1ed44e31ece1a.1674703830.git.daniel@makrotopia.org
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-01-30 16:46:06 -08:00
Arnd Bergmann
d70eec528e Amlogic ARM64 DT changes for v6.3:
- Merge of immutable bindings branch with Reset & power domain binding
 - New boards:
  - Odroid-N2L (Smaller version of Odroid-N2+)
  - BananaPi M2-Pro (Variant of BPI=M5 with on-board wifi)
  - Radxa Zero2 (New version of Radza Zero with A311D SoC)
 - Add DT node for the VIPNano-QI on the A311D
 - DT bindings fixups covering all SoC families
  - MAC address nodes
  - ethernet PHY node name
  - scpi & child node names
  - SD/SDIO node name
  - USB supply name
  - invalid clock-names
  - rng node name
  - rtc node name
  - ETH phy mux node name
  - button & adc keys node name
  - leds node names
  - RK818 pmic properties
 - remove CPU opps below 1GHz for G12A boards, like it was done for G12B/SM1
 - Fix WiFi/Bt definition around P212 & Khadas VIM1
 - Add audio node to P212
 - Fix FAN trip definition to Odroid-HC4
 - Fix gpio-fan gpios definition
 - Permit Radxa Zero OTG on USB1
 - Fix VDDIO_C enable gpio by using OPEN DRAIN flag
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmPXyPgACgkQd9zb2sjI
 SdGEThAArSPnao6jiA/XNx/Rdx1BASsLRsDRzK0KyZheekq6JyN9/X8Vp/t1bgxM
 jYCvI2MsAeBx3YAsRVMfwK8FrDVe3vg/3C6H0UiUTb7GkhmSIb4aUEK/exTU2bGf
 FbGK6S/RhTPg518xtw2ydRKQ74P+uPo1nPATqcJ7y5IcCTIKrdvdDe2bFC+aVgHb
 44egFwqsG3HnkaHM0XcQeP3ttWPEc6dF29BG989JeW/LteU4P8ORfjj8xqI78l+m
 1/mpl5/pHa+gurvPEsYTr1isDBEj/l5OHABvq/e/pO+7Rcl5Kk/iaV6cxvAmCgUz
 MKAQveNcVjv5kh5fl1GEufCcdszqtmZKyjUthh3l4jHsmtgt5vSX/QTT5tgSPCe4
 ppsuYnCxIkyaWNlCmvQeOOKIEJkGaTcvZxF+tL9uhLpvhsoB0jJWlERz5mHQTT4A
 eo+ePoISW1nCJwHLV/tG+0SzyF44uFDbgnC48RlQ2kBv4bFYFSHsvC7cOk+y6K+g
 BE4RVIrQkS1nMH79uS9OR9EdyD6BSdgarLIAv8aXtpfArZ6iOAMy4eeAyB5z2vy8
 LaCXpRAJ+TchVytut+GDYG5XI4XBXUtXFBnbMKXC8WO9eVYPndpWNRz4pXGTDpvi
 ZSkv0Nn/JTW7z1CONRkGyz2smBADkJHtrsrJXUECVg+MAtag+A0=
 =OkGG
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPYP+gACgkQmmx57+YA
 GNk7GBAAn6+qkRN6Kto6Drt7gNk/aiBMM9eFD22c1uuVqwBK5mQSQXIvR2uTr5Nn
 3e1Dx3VC24Le7RkzNMP3FdH0xRsQApG7ooyYUFBlT8v257t298wBDa/XmkTkuH/m
 gC3kaTJUO/heW2On2wF7BWKpkB6XnxjZtlbCKfan6rhcV4ozQDZd8pPF9UsMew7a
 A82X8lT9UKTUxRpiJjD8u7hbYot7+9rOLQ79zPSnqKtrk8CzPDvQvcDKWZHTCjr3
 TKl6O4dsXpr+TiUyAXCbrQwvru50TLKWKos+QgWBdoXlufZ82SI57vry4WNTI6hC
 rxzez/B30c9u8GCZ2lMSNO75vxneGYRCEylyHsDeTWmeyWablb/N1PE+/WBgUTB8
 V2RWoFinbKRfOfRGnAaCl2QsVOQocFjEZqltPz6lkp456QJJ2vimQ7B44f0Z8Qv0
 SDZNUP6Npf3ksYl8Fis+q4DRyeIPbIxgrXS0A52uR6JL89QkV+sJ3rw29fGp71Fs
 kKtHUuTyiWADkBGJ2wxPpG/Zub8suLKjWgz6ePaKgVfsjmLXV3SC/f5HfQ6qlJHp
 UvM7lLFo1cTJkgY3lGSyFWGpGAi3a0AVEvHsp2yrhWGj7/2VYXXw9HEhtuKSPlMo
 2KZAUB0bCw5/DqWARYk74U5WCxQrEw/MRk5QtYsozDV41E8K0I0=
 =871y
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-arm64-dt-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dt

Amlogic ARM64 DT changes for v6.3:
- Merge of immutable bindings branch with Reset & power domain binding
- New boards:
 - Odroid-N2L (Smaller version of Odroid-N2+)
 - BananaPi M2-Pro (Variant of BPI=M5 with on-board wifi)
 - Radxa Zero2 (New version of Radza Zero with A311D SoC)
- Add DT node for the VIPNano-QI on the A311D
- DT bindings fixups covering all SoC families
 - MAC address nodes
 - ethernet PHY node name
 - scpi & child node names
 - SD/SDIO node name
 - USB supply name
 - invalid clock-names
 - rng node name
 - rtc node name
 - ETH phy mux node name
 - button & adc keys node name
 - leds node names
 - RK818 pmic properties
- remove CPU opps below 1GHz for G12A boards, like it was done for G12B/SM1
- Fix WiFi/Bt definition around P212 & Khadas VIM1
- Add audio node to P212
- Fix FAN trip definition to Odroid-HC4
- Fix gpio-fan gpios definition
- Permit Radxa Zero OTG on USB1
- Fix VDDIO_C enable gpio by using OPEN DRAIN flag

* tag 'amlogic-arm64-dt-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: (43 commits)
  arm64: dts: meson: add support for Radxa Zero2
  dt-bindings: arm: amlogic: add support for Radxa Zero2
  arm64: dts: meson: add support for BananaPi M2-Pro
  dt-bindings: arm: amlogic: add support for BananaPi M2-Pro
  arm64: dts: meson: bananapi-m5: convert dts to dtsi
  arm64: dts: meson: bananapi-m5: remove redundant status from sound node
  arm64: dts: meson: bananapi-m5: switch VDDIO_C pin to OPEN_DRAIN
  arm64: dts: meson: radxa-zero: allow usb otg mode
  arm64: dts: meson-gxm-khadas-vim2: use gpio-fan matrix instead of an array
  arm64: dts: meson-g12b-odroid: Add initial support for Hardkernel ODROID-N2L
  arm64: dts: meson-g12b: move common node into new odroid.dtsi
  dt-bindings: arm: amlogic: document Odroid-N2L
  arm64: dts: amlogic: meson-sm1-odroid-hc4: fix active fan thermal trip
  arm64: dts: meson: add audio playback to S905X-P212 dts
  arm64: dts: meson: remove WiFi/BT nodes from Khadas VIM1
  arm64: dts: meson: move pwm_ef node in P212 dtsi
  arm64: dts: meson: add Broadcom WiFi to P212 dtsi
  arm64: dts: amlogic: meson-g12b-odroid-go-ultra: fix rk818 pmic properties
  arm64: dts: amlogic: meson-gxbb-kii-pro: fix led node name
  arm64: dts: amlogic: meson-gxl-s905d-phicomm-n1: fix led node name
  ...

Link: https://lore.kernel.org/r/c1641ffd-71c9-9ac9-89d9-c22da4acea10@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30 23:08:40 +01:00
Arnd Bergmann
050bbd6e58 Amlogic Drivers changes for v6.3:
- Merge of immutable bindings branch with Reset & power domain binding
 - Addition of NNA power domain for A311D SoC
 - meson_sm.txt  conversionto dt-schema
 - mark amlogic,meson-gx-pwrc bindings as deprecated
 - fix of meson_sm driver by using NULL instead of 0
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmPXxmwACgkQd9zb2sjI
 SdFUhg/9FVN0zGzhu/jtUgJ0gi1/c651aF4rojhq3H6xNGMGHAvFuzP2s2cZMUBd
 VG3E2hEM8AhYo0HZF4IVABZ7SlzY2YsimHR0ZoOrE6X719KuEFlYCV4HWqs4OyV2
 NNR5A4m1N4qCNBH7aSpdgN4JeBqRZUycVnRIAAM2RpqXHQIRyJCja2QLL8LULg8w
 fuepmu29Sb/Yi7GA4yIJTUkCKtijAg+q7P0kuiTpE5od6Vm43n9ITzIAHVJXbRlU
 4Lg6/19j1UflZA8t8CXnn8+nySa/E/owOA82YrY2m+/SG9ZMm97n9syj17weTuyJ
 UPzjKnKnqRYQIcOlfxIBH9NvC46/TJJSGkPQ8lwCid8s8kq29KXiTuIAMXNPrfAB
 KTrQRVjb92aMR5+cwiEe810ViyU27L9TIkqy2nvj7dEaa36p9W1D1QULgZiDccPj
 vgPFSu1SiGO549PxeXnIMKTXh5T/06mXdBjKzSFamYiBr7Y8gc606YNW9poPY12s
 yLwW7UiqG4q3CC9tLvFeX69JSPvIQDxZvVtlppHN0pmzP0U7iMy9KxUu93iK6xtO
 eWIL63jsZTF3RR+xbawiJtBQxMMPvfxzELJCWhISdYvwK9OekATDRd5aqovdyWSU
 71HQBgaBbCHcyfmaqzkMjdBJm/rOJiDJvJhIl3Pd8BOg8bLgZ+M=
 =+uBi
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX6/MACgkQmmx57+YA
 GNmH3g/9GBO61b8NJMndoPrYXFKCAL7Zf9tej/d5pjILi97PVV42nFRxXKY3xJaS
 UEXgy/XRjR0PWYl65d6rzh9Moq95jd0HLq5gBOkeBhsKqfFXX9nJGXf9BT4IkJfj
 OBvcpB2BxbtQouuo3Qj6w8WSV7nXYZSCrQIXrDfqxkn0LkZSGBBp6VPtlpe1An4i
 CTOgRQ7iNyofsG/VUG1ySqubhNznUMkpydiy7T6mk9/JIaz+1s4b92ybpiHGyknB
 YYCBv8LXi+/z/s/SxOLcvfRJN5mPpLjwfFX705mel7+GY0JTDG97UJSAUiB2if6q
 CazVP9fkUEP+fbRn+o9K/HbfpkDchlBYnaij0Ai+mGHGJUWCs746GR8+oTedvzvp
 ehRVXfcY4eGyrhYA6IoVx8WxX0m8xeyikwkWsEd6wwA5y661ARKLnddLIdk6byEZ
 NvGSk3NHKc/dt6SOXHFG9HhF1dTOFVoTwXjNu5yOvqfgregwZf08j/vk2n5V/14t
 rmn1F6FJhuyizFlAfMYlzr4U9QfBZ3fe4drYDPl0NbYBlw6jR0QJ8gofTYi4f5S6
 HTgYxbsQ8U54d2LCJlkbLLDw9egxC3GaqMznTj7QcwDv8djHJqGyxaKvTKwZri2p
 p0DtKPdqHYkyjj/qF+chk8ZLM4/Ik1l8olwbyptyvosHhBMWwFM=
 =1+2i
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers

Amlogic Drivers changes for v6.3:
- Merge of immutable bindings branch with Reset & power domain binding
- Addition of NNA power domain for A311D SoC
- meson_sm.txt  conversionto dt-schema
- mark amlogic,meson-gx-pwrc bindings as deprecated
- fix of meson_sm driver by using NULL instead of 0

* tag 'amlogic-drivers-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  firmware: meson_sm: stop using 0 as NULL pointer
  dt-bindings: power: amlogic,meson-gx-pwrc: mark bindings as deprecated
  dt-bindings: firmware: convert meson_sm.txt to dt-schema
  soc: amlogic: meson-pwrc: Add NNA power domain for A311D
  dt-bindings: power: Add G12A NNA power domain
  dt-bindings: reset: meson-g12a: Add missing NNA reset

Link: https://lore.kernel.org/r/ec9552d8-96df-a677-ab94-9723f5c30f1c@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30 17:10:27 +01:00
Arnd Bergmann
d5d39b46f0 - introduce Allwinner PPU driver
- limit iteration in sram debugfs
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQSPRixG1tysKC2PKM10Ba7+DO8kkwUCY9RTJgAKCRB0Ba7+DO8k
 kx95AP0X7OJAPv+c2E+LUkgR+GzOHWSefZm600tteEgcC3SBVQEAg3g/QyLk18SM
 LkZdm5++fSkxX0EwSrMthUq8P1CU5w4=
 =CS1P
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX3k0ACgkQmmx57+YA
 GNnL/Q//WrC02t6Kl+L4Pk9rWJS5pgdM2dUb3XAfR8/vp9PRW5yuPnxT41sv2dP4
 uBMF1t6FKtJimabB6DFD8mZeiW3JiamEH/PSd0Qo11NX8pPmJhDYXYTUdy6fTHhB
 JMFK+piOkgVPiv55ROgXCEvTDd1wOedC3SumEMo2bZkpFRGcylYbb/k/MJbjktjA
 oC2tIGeDV7BxKjl7NxyLwfV7+TqswVd6OvacWKgUZuGxR1laHitDM6ggv9YvA1K4
 w5CE5xaHoBXhtway0DdrAfURzhldn59Q6UdUvcHuYfjt6Di7RD431jJdQnlRTP9G
 WaUZYjIrTb2izyz5AWcDLI2O3Gzg8eBhoINLjSw7aaScQnPEB1g69M+nhQyOfh/w
 gC8M2ti7T7uX4HbAuhdOnfBtf6qaG6LluDlOClPTBmWcZvpKTzcqlx3ZNjMUfVGa
 z+Ft5ui8pdQmxtHUPt1xH6AFk5GMkgnSGTI5Kc302EntetPxG7UMgq3km4QfCBY6
 6x/tF7GxgfYIbDGwr6qXpe5g8Oyuo7zqxKmChRiQjmCudKdG+rqdQfGYlvNdBtHq
 YJABQEb/+DDu+75tfURS0CY6eiMRr3NQUFgLExZv/hL2mN56j4IrALB39TRVwEON
 WKSFBq71G/BFWvNxIc2YsdR8+MechEZW2KmY1F2n6OXy+pJvo9I=
 =nXYr
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-drivers-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/drivers

- introduce Allwinner PPU driver
- limit iteration in sram debugfs

* tag 'sunxi-drivers-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  soc: sunxi: Add Allwinner D1 PPU driver
  dt-bindings: power: Add Allwinner D1 PPU
  soc: sunxi: sram: Only iterate over SRAM children

Link: https://lore.kernel.org/r/Y9RXXATRNqEv0GJT@jernej-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30 16:12:12 +01:00
Arnd Bergmann
75dae633c9 RISC-V SoC drivers for v6.3-mw0
It's all StarFive stuff this time:
 Their new JH7110 SoC uses a SiFive core complex, and therefore a
 SiFive cache controller too. That needed a compatible added to both the
 binding and driver.
 The JH7110 also has power domains, which are supported by a new driver
 and a corresponding dt-binding.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY9A3iwAKCRB4tDGHoIJi
 0qE4AQDPCcoarT/vLZ28H4wBHPUBxnmU1rut3uNM4f1lIqK0PgD+N6N3xGajmVy0
 UzD8/qg2gua94rx/2dmE4PWvun+newk=
 =Lqa0
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX3XUACgkQmmx57+YA
 GNmTrw//amIzDDsnOBOblQMV0yJCpOgj/r6azaYdb2M7a++3ysdUVDnqz9E0VlkE
 YusfPAg//Fc/6/r6nV6CiCodoprC5g8dkrhFvLUllLnvSQP9Fz/BB99o93aITGUj
 gqRubCpEnVbsDkinUKDKw8A/RSkMhxsTN3d+JhuZi9RtISUiiNpAGJavut5AsLZS
 r7ADgNQppcHE02ujdLNszYOZdQgOh00ewKtDWw6RsBGcybTRSuiGnANtaEufvl+W
 pROapERp/ca8o6odUXaoP7YLFDAHtCbgREdzRtaOtO0HEcP8BKawpJvDHVtTScaQ
 h5o//DGHKBRDYOVykzAlPdjLXQqvN2vb8Li2SO1DdHvD9Mdjqg0XFKUUIv/7kVu8
 uIpat254aGujDsBX+1y+cePSh7UJvjv6KHQz3gVIpfPCcceKXyR7zTrMobC5d2/b
 ALBgDXhzfy00v/CFKYjBSIskLaLTSx9fz5CRan2xbpo0TpB8o7hb/nCcRJkGOGUW
 1LojbM+vdaX/isqxNFAfowCDfBwyLaygvL8HCjT0IKuZ1End9GBuiYDMDfssw1M0
 cDepFYy5e2VOfKVhexC2ZTL5n7RDpFy3lVSrVD4gFERZg7iH2UtU4QHHbOujNxe9
 yBHIaEFtKJy7244XM3ug8wP6eRDhjo3OFJkMrecdCOQVx3knAUU=
 =Dfx0
 -----END PGP SIGNATURE-----

Merge tag 'riscv-soc-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers

RISC-V SoC drivers for v6.3-mw0

It's all StarFive stuff this time:
Their new JH7110 SoC uses a SiFive core complex, and therefore a
SiFive cache controller too. That needed a compatible added to both the
binding and driver.
The JH7110 also has power domains, which are supported by a new driver
and a corresponding dt-binding.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-soc-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  soc: starfive: Add StarFive JH71XX pmu driver
  dt-bindings: power: Add starfive,jh7110-pmu
  soc: sifive: ccache: Add StarFive JH7110 support
  dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC

Link: https://lore.kernel.org/r/Y9LNIm9pkr+Owv/e@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30 16:08:36 +01:00
Marcel Ziswiler
8864eac551 dt-bindings: imx8ulp: clock: no spaces before tabs
This fixes the following warnings:

include/dt-bindings/clock/imx8ulp-clock.h:204: warning: please, no space
 before tabs
include/dt-bindings/clock/imx8ulp-clock.h:215: warning: please, no space
 before tabs

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230119085421.102804-3-marcel@ziswiler.com
2023-01-29 20:29:40 +02:00
Marcel Ziswiler
899788efa4 clk: imx6sll: add proper spdx license identifier
This fixes the following error:

include/dt-bindings/clock/imx6sll-clock.h:1: warning: Improper SPDX
 comment style for 'include/dt-bindings/clock/imx6sll-clock.h', please
 use '/*' instead
include/dt-bindings/clock/imx6sll-clock.h:1: warning: Missing or
 malformed SPDX-License-Identifier tag in line 1

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230119085421.102804-2-marcel@ziswiler.com
2023-01-29 20:29:38 +02:00
Samuel Holland
84def5abbb dt-bindings: power: Add Allwinner D1 PPU
The Allwinner D1 family of SoCs contain a PPU power domain controller
separate from the PRCM. It can power down the video engine and DSP, and
it contains special logic for hardware-assisted CPU idle. Other recent
Allwinner SoCs (e.g. TV303) have a PPU with a different set of domains.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20230126063419.15971-2-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-01-27 23:20:30 +01:00
Nancy.Lin
664a39b8e7 dt-bindings: reset: mt8195: add vdosys1 reset control bit
Add vdosys1 reset control bit for MT8195 platform.

Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230113104434.28023-3-nancy.lin@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-25 16:05:14 +01:00
Walker Chen
1fc7606d50 dt-bindings: power: Add starfive,jh7110-pmu
Add bindings for the Power Management Unit on the StarFive JH7110 SoC.

Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-01-20 21:55:29 +00:00
Bartosz Golaszewski
2579af94c8 dt-bindings: interconnect: qcom: document the interconnects for sa8775p
Add a DT binding document for the RPMh interconnects on Qualcomm sa8775p
platforms.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230118140825.242544-2-brgl@bgdev.pl
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-01-19 20:22:11 +02:00
Richard Acayan
81ccf45571 dt-bindings: interconnect: add sdm670 interconnects
There are controllable interconnects on Snapdragon 670. Add the
compatible strings to the documentation and interconnect ID definitions.

The device tree header was generated by
linux-interconnect-driver-generator and the copyright year was changed.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230111005155.50452-2-mailingradian@gmail.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-01-19 20:12:40 +02:00
Garmin.Chang
1725dde87f dt-bindings: power: Add MT8188 power domains
Add power domains dt-bindings for MT8188.

Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221223080553.9397-2-Garmin.Chang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-19 17:17:37 +01:00
Konrad Dybcio
dfe5ac7023 Revert "dt-bindings: power: rpmpd: Add SM4250 support"
SM4250 and SM6115 use a shared device tree and the RPMPDs are
identical. There's no need for a separate entry, so remove it.

This reverts commit 45ac44ed10.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113152232.2624545-2-konrad.dybcio@linaro.org
2023-01-18 21:13:10 -06:00
Bjorn Andersson
f0a6702111 Merge branch '20230112204446.30236-2-quic_molvera@quicinc.com' into HEAD 2023-01-18 20:47:06 -06:00
Melody Olvera
8c8acefcee dt-bindings: clock: Add QDU1000 and QRU1000 GCC clocks
Add device tree bindings for global clock controller on QDU1000 and
QRU1000 SoCs.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230112204446.30236-2-quic_molvera@quicinc.com
2023-01-18 20:46:43 -06:00
Dmitry Baryshkov
93a63522de dt-bindings: clock: qcom,gcc-apq8084: add GCC_MMSS_GPLL0_CLK_SRC
Add GCC_MMSS_GPLL0_CLK_SRC, the branch clock gating gpll0 clock for the
multimedia subsystem.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111060402.1168726-3-dmitry.baryshkov@linaro.org
2023-01-18 18:27:35 -06:00
Bjorn Andersson
411f657db2 Merge branch '20230103-topic-sm8550-upstream-dispcc-v3-1-8a03d348c572@linaro.org' into HEAD
Merge the DT binding in order to get the dispcc include file.
2023-01-18 17:35:55 -06:00
Neil Armstrong
553f9bd455 dt-bindings: clock: document SM8550 DISPCC clock controller
Document device tree bindings for display clock controller for
Qualcomm SM8550 SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-dispcc-v3-1-8a03d348c572@linaro.org
2023-01-18 17:34:47 -06:00
Stephan Gerhold
56abffc793 dt-bindings: arm: qcom,ids: Add a bunch of older SoCs
Sync the SoC IDs in qcom,ids.h with relevant entries from Qualcomm's LK
bootloader [1] that is used for almost all older Qualcomm SoCs.

Several of these are already supported, e.g.:
  - MSM8960 -> APQ8060, MSM8260, ...
  - MSM8976 -> APQ8076
  - MSM8956 -> APQ8056
Others are currently being worked on, e.g.:
  - MSM8909(W) -> APQ8009(W), MSM8905, MSM8209, ...
  - MSM8939 -> MSM8239, ...

And even all remaining ones added are close enough to what is already
supported so that future support is realistic (if someone steps up to
do the work).

Add all of them at once to avoid having to add them one by one in the
future. This will also benefit other projects making use of the same
dt-bindings, e.g. bootloaders where adding support for all these SoCs
is a bit easier than on Linux.

[1]: 9d563e4a1d/platform/msm_shared/smem.h (L286)

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104115348.25046-4-stephan@gerhold.net
2023-01-18 17:14:39 -06:00
Stephan Gerhold
8b949c0e2c dt-bindings: arm: qcom,ids: Add QRD board ID
QRD (Qualcomm Reference Design) = 0xb = 11 is used on many devices that
were originally derived from some reference design provided by Qualcomm.

Examples of existing devices in Linux would be:
  - msm8916-longcheer-l8150/l8910, msm8916-wingtech-wt88047
  - msm8953-xiaomi-daisy/tissot/vince
  - msm8998-fxtec-pro1
  - sm4250-oneplus-billie2

Add it to qcom,ids.h so the qcom,board-id properties can be rewritten
more clearly using the macros in a future patch set, i.e.

  qcom,board-id = <QCOM_BOARD_ID(QRD, 1, 0) 0> instead of
  qcom,board-id = <0x1000b 0x00>

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104115348.25046-3-stephan@gerhold.net
2023-01-18 17:14:39 -06:00
Bartosz Golaszewski
0fff9fa043 dt-bindings: clock: Add Qualcomm SA8775P GCC
Add DT bindings for the GCC clock on SA8775P platforms. Add relevant
DT include definitions as well.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117180429.305266-2-brgl@bgdev.pl
2023-01-18 16:21:23 -06:00
Dmitry Baryshkov
e51c94dd9c dt-bindings: interconnect: qcom: drop IPA_CORE related defines
These interconnects are modeled as clks, not interconnects, therefore
remove corresponding defines from the binding as they're unused.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230109002935.244320-10-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-01-18 16:16:19 +02:00
Etienne Carriere
323b8d0ddb dt-binding: gpio: publish binding IDs under dual license
Changes gpio.h DT binding header file to be published under GPLv2 or
BSD-2-Clause license terms. This change allows this GPIO generic
bindings header file to be used in software components as bootloaders
and OSes that are not published under GPLv2 terms.

All contributors to gpio.h file in copy.

Cc: Stephen Warren <swarren@nvidia.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Andrew Jeffery <andrew@aj.id.au>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220905145555.674800-1-etienne.carriere@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
2023-01-17 14:43:55 -06:00
Arnd Bergmann
61b7f8920b ARM: s3c: remove all s3c24xx support
The platform was deprecated in commit 6a5e69c7dd ("ARM: s3c: mark
as deprecated and schedule removal") and can be removed. This includes
all files that are exclusively for s3c24xx and not shared with s3c64xx,
as well as the glue logic in Kconfig and the maintainer file entries.

Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Christer Weinigel <christer@weinigel.se>
Cc: Guillaume GOURAT <guillaume.gourat@nexvision.tv>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Simtec Linux Team <linux@simtec.co.uk>
Cc: openmoko-kernel@lists.openmoko.org
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-16 09:26:05 +01:00
Apurva Nandan
a0c01bc565 dt-bindings: pinctrl: k3: Introduce pinmux definitions for J784s4
Add pinctrl macros for J784s4 SoC. These macro definitions are
similar to that of J721s2, but adding new definitions to avoid
any naming confusions in the soc dts files.

checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses

However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230112142725.77785-3-a-nandan@ti.com
2023-01-15 22:24:36 +05:30
Bjorn Andersson
538b0ba217 Merge branch '20230109130523.298971-3-konrad.dybcio@linaro.org' into drivers-for-6.3 2023-01-10 22:55:42 -06:00
Konrad Dybcio
45ca30eb9d dt-bindings: firmware: qcom: scm: Separate VMIDs from header to bindings
The SCM VMIDs represent predefined mappings that come from the
irreplaceable and non-omittable firmware that comes with every
Qualcomm SoC (unless you steal engineering samples from the factory)
and help clarify otherwise totally magic numbers which we are
required to pass to the secure world for some parts of the SoC to
work at all (with modem being the prime example).

On top of that, with changes to the rmtfs binding, secure VMIDs will
become useful to have in device trees for readability. Separate them
out and add to include/dt-bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109130523.298971-3-konrad.dybcio@linaro.org
2023-01-10 22:55:28 -06:00
Dmitry Baryshkov
477c404428 dt-bindings: clock: qcom: gcc-sm8450: drop test clock
The test clock apparently it's not used by anyone upstream. Remove it.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-8-dmitry.baryshkov@linaro.org
2023-01-10 22:44:29 -06:00
Dmitry Baryshkov
ca0844a2b9 dt-bindings: clock: qcom: gcc-sm8350: drop test clock
The test clock apparently it's not used by anyone upstream. Remove it.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-7-dmitry.baryshkov@linaro.org
2023-01-10 22:44:29 -06:00
Bjorn Andersson
19d2810822 Merge branch '20230104093450.3150578-2-abel.vesa@linaro.org' into arm64-for-6.3
Merge the TCSR clock binding, to gain the Devicetree include file.
2023-01-10 12:27:27 -06:00
Abel Vesa
d220193c50 dt-bindings: clock: Add SM8550 TCSR CC clocks
Add bindings documentation for clock TCSR driver on SM8550.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104093450.3150578-2-abel.vesa@linaro.org
2023-01-10 12:24:40 -06:00
Bjorn Andersson
ee7ccd5fe8 Merge branch 'icc-sm8550-immutable' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.3
Merge the immutable SM8550 interconnect branch, to gain the include file
from the binding.
2023-01-10 12:21:27 -06:00
Neil Armstrong
0960ec915a dt-bindings: clock: document SM8550 DISPCC clock controller
Document device tree bindings for display clock controller for
Qualcomm SM8550 SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-dispcc-v3-1-8a03d348c572@linaro.org
2023-01-10 12:19:19 -06:00
Bartosz Golaszewski
b4f0370d3c dt-bindings: power: qcom,rpmpd: document sa8775p
Add a compatible for sa8775p platforms and relevant defines to the include
file.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109174511.1740856-14-brgl@bgdev.pl
2023-01-10 10:28:01 -06:00
Samuel Holland
925b61ba2d dt-bindings: clock: Add D1 CAN bus gates and resets
The D1 CCU contains gates and resets for two CAN buses. While the CAN
bus controllers are only documented for the T113 SoC, the CCU is the
same across all SoC variants.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221231231429.18357-6-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-01-08 22:06:10 +01:00
Abel Vesa
d8aa375bd7 dt-bindings: clock: Add SM8550 TCSR CC clocks
Add bindings documentation for clock TCSR driver on SM8550.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104093450.3150578-2-abel.vesa@linaro.org
2023-01-06 11:10:37 -06:00
Georgi Djakov
163ea2048d Merge branch 'icc-qdu1000' into icc-next
Add dt bindings and driver support for the Qualcomm QDU1000 and QRU1000
SoCs.

The Qualcomm Technologies, Inc. Distributed Unit 1000 and Radio Unit
1000 are new SoCs meant for enabling Open RAN solutions. See more at
https://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/qualcomm_5g_ran_platforms_product_brief.pdf

Link: https://lore.kernel.org/r/20221216230914.21771-1-quic_molvera@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-01-05 16:17:08 +02:00
Melody Olvera
991f1372d0 dt-bindings: interconnect: Add QDU1000/QRU1000 devices
Add separate schema for QDU1000 and QRU1000 interconnect devices
to document the different NoCs on these platforms.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221216230914.21771-2-quic_molvera@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-01-05 16:14:07 +02:00
Tomeu Vizoso
340ea839b4 dt-bindings: power: Add G12A NNA power domain
Add define for the NNA power domain for the NPU in the G12A.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20221202115223.39051-3-tomeu.vizoso@collabora.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-02 11:29:38 +01:00
Tomeu Vizoso
a439267609 dt-bindings: reset: meson-g12a: Add missing NNA reset
Doesn't appear in the TRM I have, but it is used by the downstream
galcore driver.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20221202115223.39051-2-tomeu.vizoso@collabora.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-02 11:29:38 +01:00
Abel Vesa
66773faf05 dt-bindings: interconnect: Add Qualcomm SM8550
The Qualcomm SM8550 SoC has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221202232054.2666830-2-abel.vesa@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-12-29 11:36:33 +02:00
Konrad Dybcio
7afc1f6977 dt-bindings: clock: add QCOM SM6350 camera clock bindings
Add device tree bindings for camera clock controller for
Qualcomm Technology Inc's SM6350 SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213152617.296426-1-konrad.dybcio@linaro.org
2022-12-28 12:32:51 -06:00
Dmitry Baryshkov
ba796801d2 dt-bindings: clocks: qcom: rpmcc: add LN_BB_CLK_PIN clocks
Add pin-controlled Low-Noise BB clock definition.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-2-dmitry.baryshkov@linaro.org
2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
a5ac24ba17 arm64: dts: qcom: sm8450: add RPMH_REGULATOR_LEVEL_LOW_SVS_D1
Add another power saving state used on SM8450. Unfortunately adding it
in proper place causes renumbering of all the opp states in sm8450.dtsi

Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207012803.114959-2-dmitry.baryshkov@linaro.org
2022-12-28 10:54:39 -06:00
Dmitry Baryshkov
031bc3a9f9 dt-bindings: clock: qcom: gcc-qcs404: add two GDSC entries
On QCS404 platform the Global Clock Controller supports two GDSCs: MDSS
(display) and OXILI (GPU). Add corresponding indices.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226042154.2666748-2-dmitry.baryshkov@linaro.org
2022-12-27 11:59:10 -06:00
Tam Nguyen
0985cd5208 dt-bindings: power: r8a779g0: Add missing A3DUL power domain
Add the power domain index for the A3DUL domain, as described in the
R-Car V4H Series Hardware User's Manual Rev. 0.51 and later.

Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
[geert: Manual reference]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/d61cf54b58629a76e007b9505dac7c2beb3b30db.1669740926.git.geert+renesas@glider.be
2022-12-26 11:06:25 +01:00
Linus Torvalds
9cf5b508bd remoteproc updates for v6.2
rproc-virtio device names are now auto generated, to avoid conflicts
 between remoteproc instances.
 
 The imx_rproc driver is extended with support for communicating with and
 attaching to a running M4 on i.MX8QXP, as well as support for
 attaching to the M4 after self-recovering from a crash. Support is
 added for i.MX8QM and mailbox channels are reconnected during the
 recovery process, in order to avoid data corruption.
 
 The Xilinx Zynqmp firmware interface is extended and support for the
 Xilinx R5 RPU is introduced.
 
 Various resources leaks, primarily in error paths, throughout the
 Qualcomm drivers are corrected.
 
 Lastly a fix to ensure that pm_relax is invoked even if the remoteproc
 instance is stopped between a crash is being reported and the recovery
 handler is scheduled.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmOh+HgVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FXYsQAILCBlk/0DFZNGDU1OJaK8P3JF4y
 /+w8P2kjD5ZABZ96vEnYQyXUj42/MbOtfvBApMYxkwV3rGyW4jQKXa4HF0+cjAyN
 TrcWGJ7fVeOEZm4fi/jhN+4xzOVOGev2bHQVaFlBYD5yLArC2WAe5eyETl7OqSur
 0nZb0lLJ7nQAlSdlLYUFYoxYZz8aOTssyVQDdnKbtdc5DRL6R8d2+RTArtyY5gZI
 ri+JC1UMKuX6qk81PjjUzWRlDGt2+deeDntMnti1XJr2IX6CJuKsI/T0+KnLW/so
 +nlf7RCKvHivOyxw/Q7Qr2a15RKdtLGR+LI2iCiadzzCVoIs5KPUfqM8u5qAmo1w
 XM6/Jc0sdxXRBl31cTDNXbUEo5UjqXHZ96fhe4IZnoyUUm0ZiXkTF1GUMT+U/G6q
 aK654CQa6AkGocowVg0A5N4VX030hcGf3yb8WQDTHILvjLPZsqZpuk7IR8F9TE2U
 CW2cMVo3YXHvIVTrdZkBqzpvubtx28V6wNMKifihzWSKIrV4siYupGnmO0gKvJOe
 TX+EGZRUKIXpCzwye19hDYKFnyxpL+w9HU5ssiv47hYygL26MCVVlZ0Jm12fQqsh
 2zmARVuNMY5+dGjcDL80LhQFRicaiQx4eOOI196ca8o5tl7ZtmvsCgZd23XcZ0Ws
 vsLAlnCKzNjjrF99
 =sO5/
 -----END PGP SIGNATURE-----

Merge tag 'rproc-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux

Pull remoteproc updates from Bjorn Andersson:
 "rproc-virtio device names are now auto generated, to avoid conflicts
  between remoteproc instances.

  The imx_rproc driver is extended with support for communicating with
  and attaching to a running M4 on i.MX8QXP, as well as support for
  attaching to the M4 after self-recovering from a crash. Support is
  added for i.MX8QM and mailbox channels are reconnected during the
  recovery process, in order to avoid data corruption.

  The Xilinx Zynqmp firmware interface is extended and support for the
  Xilinx R5 RPU is introduced.

  Various resources leaks, primarily in error paths, throughout the
  Qualcomm drivers are corrected.

  Lastly a fix to ensure that pm_relax is invoked even if the remoteproc
  instance is stopped between a crash is being reported and the recovery
  handler is scheduled"

* tag 'rproc-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (25 commits)
  remoteproc: core: Do pm_relax when in RPROC_OFFLINE state
  remoteproc: qcom: q6v5: Fix missing clk_disable_unprepare() in q6v5_wcss_qcs404_power_on()
  remoteproc: qcom_q6v5_pas: Fix missing of_node_put() in adsp_alloc_memory_region()
  remoteproc: qcom_q6v5_pas: detach power domains on remove
  remoteproc: qcom_q6v5_pas: disable wakeup on probe fail or remove
  remoteproc: qcom: q6v5: Fix potential null-ptr-deref in q6v5_wcss_init_mmio()
  remoteproc: sysmon: fix memory leak in qcom_add_sysmon_subdev()
  remoteproc: sysmon: Make QMI message rules const
  drivers: remoteproc: Add Xilinx r5 remoteproc driver
  firmware: xilinx: Add RPU configuration APIs
  firmware: xilinx: Add shutdown/wakeup APIs
  firmware: xilinx: Add ZynqMP firmware ioctl enums for RPU configuration.
  arm64: dts: xilinx: zynqmp: Add RPU subsystem device node
  dt-bindings: remoteproc: Add Xilinx RPU subsystem bindings
  remoteproc: core: Use device_match_of_node()
  remoteproc: imx_rproc: Correct i.MX93 DRAM mapping
  remoteproc: imx_rproc: Enable attach recovery for i.MX8QM/QXP
  remoteproc: imx_rproc: Request mbox channel later
  remoteproc: imx_rproc: Support i.MX8QM
  remoteproc: imx_rproc: Support kicking Mcore from Linux for i.MX8QXP
  ...
2022-12-21 09:37:14 -08:00
Linus Torvalds
f2855eec19 - qcom: enable sc8280xp, sm8550 and sm4250 support
- ti: default to ARCH_K3 for msg manager
 - mediatek: add mt8188 and mt8186 support
             request irq only after got ready
 - zynq-ipi: fix error handling after device_register
 - mpfs: check sys-con status
 - rockchip: simplify by using device_get_match_data
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmOh4IcACgkQf9lkf8eY
 P5UVgw/+LMCzDu7Dqm9PfcVyW2I1EWV2BpHsJRjn9ivxPCrnPAburZb9x9uPzL5u
 q3192eRuy1MSpGX4lBVFYIZc4V7NrXINmMCB61s87k3g/bXxA3KzkgooxxPEo9LJ
 KbxzHngoLj+0+Mr6uXqv/rjudohFbl81yn0JfkdEPygj3XmAMaLmOqVEbV7JmbUU
 IdyQUfxyEWmozotF5w0ndVhoOhXYnE44XnlimAv0DDU/kxEy1D1JAG/D5oUTjnPw
 FZpdMwaCB/YObHJGLARwDRyKCA8h3eRsf/iGzsoaNy7GHyGcSCZJ/efy6q7KXdMM
 jabptiuAFjM0NXzqf+L0y6oYvV9ESQr17P5Q9sLUdT66fFPctUUHcGnmLdFGQZEf
 3d3ShLCWGYhb0Th9giQkrqcArxwRhiIc9SoBn39CRLiM+cvzcfSDBghTfdJpQb5X
 VfzJqaWJSi3AE+uhXchOUFDlNQVp0/5DH/1Y/WyOpQI2wZ/jPVh3JzU9J5Tmakyn
 Hl2doj1LNZstUfS7GBSM4P8peDYOx2cv57auD7FOu4enDjVGCyBhuAcD9Z5KonEg
 4Y06K8omL1NEFZ3/t3NiG+WANWrEGjHxCtPItU2BFhEqQ6iMLURoj6FcNK7NcQB5
 zq+Xs9ISSQlgDwMYTWWIZcqQ4/egFG5VW572187pptiMRxHezjw=
 =j33p
 -----END PGP SIGNATURE-----

Merge tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - qcom: enable sc8280xp, sm8550 and sm4250 support

 - ti: default to ARCH_K3 for msg manager

 - mediatek:
    - add mt8188 and mt8186 support
    - request irq only after got ready

 - zynq-ipi: fix error handling after device_register

 - mpfs: check sys-con status

 - rockchip: simplify by using device_get_match_data

* tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  dt-bindings: mailbox: qcom-ipcc: Add compatible for SM8550
  mailbox: mtk-cmdq: Do not request irq until we are ready
  mailbox: zynq-ipi: fix error handling while device_register() fails
  mailbox: mtk-cmdq-mailbox: Use platform data directly instead of copying
  mailbox: arm_mhuv2: Fix return value check in mhuv2_probe()
  dt-bindings: mailbox: mediatek,gce-mailbox: add mt8188 compatible name
  dt-bindings: mailbox: add GCE header file for mt8188
  mailbox: mpfs: read the system controller's status
  mailbox: mtk-cmdq: add MT8186 support
  mailbox: mtk-cmdq: add gce ddr enable support flow
  mailbox: mtk-cmdq: add gce software ddr enable private data
  mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number
  mailbox: rockchip: Use device_get_match_data() to simplify the code
  dt-bindings: mailbox: qcom-ipcc: Add sc8280xp compatible
  mailbox: config: ti-msgmgr: Default set to ARCH_K3 for TI msg manager
  mailbox: qcom-apcs-ipc: Add SM4250 APCS IPC support
  dt-bindings: mailbox: qcom: Add SM4250 APCS compatible
2022-12-21 09:31:18 -08:00
Linus Torvalds
e79041113b phy-for-6.2
- New support:
         - Allwinner H616 USB PHY and A100 DPHY support
         - TI J721s2, J784s4 and J721e support
 	- Freescale i.MX8MP PCIe PHY support
 	- New driver for Renesas Ethernet SERDES supporting R-Car S4-8
 	- Qualcomm SM8450 PCIe1 PHY support in EP mode
 
   - Updates:
         - again a big pile of updates on qcom-qmp-* drivers following the
           driver split and reorganization merged earlier
 	- Phy order of API calls documentation update
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmOfIbYACgkQfBQHDyUj
 g0fSbw//Rgfk+owGLWyJ3PxRXiDhZaJdBUQNuZEe46TjGKKHvWLJ4+ig6vrXlPgr
 8mVte7jEMZubO7YE/1Vifv9xiFmjo+5R4//WlfkIwy/0SFR8+N+DPQiGU7i7ecov
 uzkFN26qsi4aQrKmxyadGJQzHipaLViBkr6fqfuFcmyDiFII0FoVa/mV7ZQlFtl3
 cDv3leFnp3HQ9mr/mKhOSmbyWCEQHqQvjDwB50R915WfH9PLV2jYddfO4Cbwpr4r
 7m7wX2EiFlQ1o2gwcFQdLiDkA8YL9Kw3wOChpbcCu4gOapJ+GWqCk0AqS9m8MMWF
 HnyAyHw3NxDagwV6sN19Xxa7XgkPJZPn6/92BfGYeD6H5gxmYwdROeU2/x6Qt1+z
 scTl1m6z8X9WWwjnWK1cqVqBPUXoJJ2smym6VBHh3f4AJAVmwZy+yyk1Oar5qa2M
 yDWV7nIRJQmXnuQ+XsG5rmXmmMwOuBgng4NsNX9PjhdVy6/1FUOJuMCr8ldPLAkG
 Lpg+GN8w6tn2G0bxrHzWeAOytxjK5XuXch99BHmXDl+NgIpp/6DuyddXmvG4nrvk
 R6eDv86UOQgGP2h7SujUm9f6RIWb3nJrYN27r+IHK/z5LjSMfylSSu13GvMjZkt4
 Et5Q4Wk9MomHFQkhiTGTd9WlSvb497RgzKhBhMg/lJoSyTi9Eew=
 =4HRP
 -----END PGP SIGNATURE-----

Merge tag 'phy-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Pull phy updates from Vinod Koul:
 "This tme we have again a big pile of qcom-qmp-* changes, one new
  driver and bunch of new hardware support.

  New hardware support:

   - Allwinner H616 USB PHY and A100 DPHY support

   - TI J721s2, J784s4 and J721e support

   - Freescale i.MX8MP PCIe PHY support

   - New driver for Renesas Ethernet SERDES supporting R-Car S4-8

   - Qualcomm SM8450 PCIe1 PHY support in EP mode

   - Qualcomm SC8280XP PCIe PHY support (including x4 mode)

   - Fixed Qualcomm SC8280XP USB4-USB3-DP PHY DT bindings

  Updates:

   - A big pile of updates on qcom-qmp-* drivers following the driver
     split and reorganization merged earlier

   - Phy order of API calls documentation update"

* tag 'phy-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (174 commits)
  phy: ti: phy-j721e-wiz: add j721s2-wiz-10g module support
  dt-bindings: phy-j721e-wiz: add j721s2 compatible string
  phy: use devm_platform_get_and_ioremap_resource()
  phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY variant
  phy: allwinner: phy-sun6i-mipi-dphy: Add a variant power-on hook
  phy: allwinner: phy-sun6i-mipi-dphy: Set the enable bit last
  phy: allwinner: phy-sun6i-mipi-dphy: Make RX support optional
  dt-bindings: sun6i-a31-mipi-dphy: Add the A100 DPHY variant
  dt-bindings: sun6i-a31-mipi-dphy: Add the interrupts property
  phy: qcom-qmp-pcie: drop redundant clock allocation
  phy: qcom-qmp-usb: drop redundant clock allocation
  phy: qcom-qmp: drop unused type header
  phy: qcom-qmp-usb: drop sc8280xp reference-clock source
  dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: drop reference-clock source
  phy: qcom-qmp-combo: add support for updated sc8280xp binding
  phy: qcom-qmp-combo: rename DP_PHY register pointer
  phy: qcom-qmp-combo: rename common-register pointers
  phy: qcom-qmp-combo: clean up DP clock callbacks
  phy: qcom-qmp-combo: separate clock and provider registration
  phy: qcom-qmp-combo: add clock registration helper
  ...
2022-12-19 08:40:58 -06:00
Linus Torvalds
b8fd76f418 IOMMU Updates for Linux v6.2
Including:
 
 	- Core code:
 	  - map/unmap_pages() cleanup
 	  - SVA and IOPF refactoring
 	  - Clean up and document return codes from device/domain
 	    attachment code
 
 	- AMD driver:
 	  - Rework and extend parsing code for ivrs_ioapic, ivrs_hpet
 	    and ivrs_acpihid command line options
 	  - Some smaller cleanups
 
 	- Intel driver:
 	  - Blocking domain support
 	  - Cleanups
 
 	- S390 driver:
 	  - Fixes and improvements for attach and aperture handling
 
 	- PAMU driver:
 	  - Resource leak fix and cleanup
 
 	- Rockchip driver:
 	  - Page table permission bit fix
 
 	- Mediatek driver:
 	  - Improve safety from invalid dts input
 	  - Smaller fixes and improvements
 
 	- Exynos driver:
 	  - Fix driver initialization sequence
 
 	- Sun50i driver:
 	  - Remove IOMMU_DOMAIN_IDENTITY as it has not been working
 	    forever
 	  - Various other fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmOd1PQACgkQK/BELZcB
 GuO7NxAAiwJUO99pTwvqnByzcC783AuE/fqKHDb9DZaN6Cr0VXSbKEwm8Lc2PC00
 2CTwK/zGhy8BKBQnPiooJ+YOMPjE4yhFIF9jr5ASH5AVWv8EEFpo8zIFKAcF5rh/
 c2Y5RIUwsGXuhR7U3lMTw84r39TZG2eHPwTEU6KvEJ1LCOMyD8IBYrZK2rvpGpem
 3swXUfF5bQGAT8LlIFN7p+qsVs6ZtuD40qre3kerjrBtCPUMlxIIV5TJ8oQTecsk
 vKpD51mEVW+rjUKvqui8NDYuPfT76F2FPS37dfA1F36p8dmsMGSrtWngNm73r546
 AmY8Gui6wKsv4Qn7Mxv49f/WZIXzdRTXOKx/zhYvvGxu7keqQIRIWYcLSxqfaGku
 cqJT401Ws1NHmRpx/t90lMH/anY5+kUMRTQG9Iq5ruLhExskd0SJcffa1i7YIGIe
 lPCTDf7MOXfDudR0Dtp87pGZQBaSkrSzZvb7qZY3Bj83WGZnLPpl6Z3N8KbkGzEO
 zNNvv1CtxZnIPrdOaKvfxQlAKiWKxkPRHuqk1TE8hkoNOe5ZgdOSJP5SeCrZ5tEf
 qljPXvDVF9f8CYw7QlfEDnbLnqDMGZpPAGqKPItbaijQLPZx4Jm4dw6+7i9hETIa
 wJ+1R9iAf+qiR0rlqueALKRaI4DjE8RU8yYSDpn2kn0BUOhWmb8=
 =ZM/m
 -----END PGP SIGNATURE-----

Merge tag 'iommu-updates-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu updates from Joerg Roedel:
 "Core code:
   - map/unmap_pages() cleanup
   - SVA and IOPF refactoring
   - Clean up and document return codes from device/domain attachment

  AMD driver:
   - Rework and extend parsing code for ivrs_ioapic, ivrs_hpet and
     ivrs_acpihid command line options
   - Some smaller cleanups

  Intel driver:
   - Blocking domain support
   - Cleanups

  S390 driver:
   - Fixes and improvements for attach and aperture handling

  PAMU driver:
   - Resource leak fix and cleanup

  Rockchip driver:
   - Page table permission bit fix

  Mediatek driver:
   - Improve safety from invalid dts input
   - Smaller fixes and improvements

  Exynos driver:
   - Fix driver initialization sequence

  Sun50i driver:
   - Remove IOMMU_DOMAIN_IDENTITY as it has not been working forever
   - Various other fixes"

* tag 'iommu-updates-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (74 commits)
  iommu/mediatek: Fix forever loop in error handling
  iommu/mediatek: Fix crash on isr after kexec()
  iommu/sun50i: Remove IOMMU_DOMAIN_IDENTITY
  iommu/amd: Fix typo in macro parameter name
  iommu/mediatek: Remove unused "mapping" member from mtk_iommu_data
  iommu/mediatek: Improve safety for mediatek,smi property in larb nodes
  iommu/mediatek: Validate number of phandles associated with "mediatek,larbs"
  iommu/mediatek: Add error path for loop of mm_dts_parse
  iommu/mediatek: Use component_match_add
  iommu/mediatek: Add platform_device_put for recovering the device refcnt
  iommu/fsl_pamu: Fix resource leak in fsl_pamu_probe()
  iommu/vt-d: Use real field for indication of first level
  iommu/vt-d: Remove unnecessary domain_context_mapped()
  iommu/vt-d: Rename domain_add_dev_info()
  iommu/vt-d: Rename iommu_disable_dev_iotlb()
  iommu/vt-d: Add blocking domain support
  iommu/vt-d: Add device_block_translation() helper
  iommu/vt-d: Allocate pasid table in device probe path
  iommu/amd: Check return value of mmu_notifier_register()
  iommu/amd: Fix pci device refcount leak in ppr_notifier()
  ...
2022-12-19 08:34:39 -06:00
Elvis Wang
359f608f66 dt-bindings: mailbox: add GCE header file for mt8188
Add Global Command Engine(GCE) header file to define the GCE thread priority,
GCE subsys id, event and constant for mt8188.

Signed-off-by: Elvis Wang <Elvis.Wang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno<angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:30 -06:00
Linus Torvalds
b611996ef2 linux-watchdog 6.2-rc1 tag
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.14 (GNU/Linux)
 
 iEYEABECAAYFAmOcmvEACgkQ+iyteGJfRso1OwCfWAZIdbdWdeEVq33zAT4/TZKE
 foYAn0ebKrOX26HEAmGgZy4Ze2pdFxVo
 =toMy
 -----END PGP SIGNATURE-----

Merge tag 'linux-watchdog-6.2-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

 - Add Advantech EC watchdog driver

 - Add support for MT6795 Helio X10 watchdog and toprgu

 - Add support for MT8188 watchdog device

 - Remove #ifdef guards for PM related functions

 - Other fixes and improvements

* tag 'linux-watchdog-6.2-rc1' of git://www.linux-watchdog.org/linux-watchdog:
  watchdog: aspeed: Enable pre-timeout interrupt
  watchdog: iTCO_wdt: Set NO_REBOOT if the watchdog is not already running
  watchdog: rn5t618: add support for read out bootstatus
  watchdog: kempld: Remove #ifdef guards for PM related functions
  watchdog: omap: Remove #ifdef guards for PM related functions
  watchdog: twl4030: Remove #ifdef guards for PM related functions
  watchdog: at91rm9200: Remove #ifdef guards for PM related functions
  watchdog: Add Advantech EC watchdog driver
  dt-bindings: watchdog: mediatek,mtk-wdt: Add compatible for MT8173
  dt-bindings: watchdog: mediatek,mtk-wdt: Add compatible for MT6795
  dt-bindings: watchdog: mediatek: Convert mtk-wdt to json-schema
  watchdog: mediatek: mt8188: add wdt support
  dt-bindings: reset: mt8188: add toprgu reset-controller header file
  dt-bindings: watchdog: Add compatible for MediaTek MT8188
  watchdog: mtk_wdt: Add support for MT6795 Helio X10 watchdog and toprgu
2022-12-17 08:34:01 -06:00
Linus Torvalds
0015edd6f6 A pile of clk driver updates with a small tracepoint patch to the clk core this
time around. The core framework is effectively unchanged, with the majority of
 the diff going to the Qualcomm clk driver directory because they added two 3k
 line files that are almost all clk data (Abel Vesa from Linaro tried to shrink
 the number of lines down, but it doesn't seem to be possible without
 sacrificing readability). The second big driver this time around is the
 Rockchip rk3588 clk and reset unit, at _only_ 2.5k lines.
 
 Ignoring the big clk drivers from the familiar SoC vendors, there's just a
 bunch of little clk driver updates and fixes throughout here. It's the usual
 set of clk data fixups to describe proper parents, or add frequencies to
 frequency tables, or plug memory leaks when function calls fail. Also, some
 drivers are converted to use modern clk_hw APIs, which is always nice to see.
 And data is deduplicated, leading to a smaller kernel Image. Overall this batch
 has a larger collection of cleanups than it typically does. Maybe that means
 there are less new SoCs right now that need supporting, and the focus has
 shifted to quality and reliability. I can dream.
 
 New Drivers:
  - Frequency hopping controller hardware on MediaTek MT8186
  - Global clock controller for Qualcomm SM8550
  - Display clock controller for Qualcomm SC8280XP
  - RPMh clock controller for Qualcomm QDU1000 and QRU1000 SoCs
  - CPU PLL on MStar/SigmaStar SoCs
  - Support for the clock and reset unit of the Rockchip rk3588
 
 Updates:
  - Tracepoints for clk_rate_request structures
  - Debugfs support for fractional divider clk
  - Make MxL's CGU driver secure compatible
  - Ingenic JZ4755 SoC clk support
  - Support audio clks on X1000 SoCs
  - Remove flags from univ/main/syspll child fixed factor clocks across
    MediaTek platforms
  - Fix clock dependency for ADC on MediaTek MT7986
  - Fix parent for FlexSPI clock for i.MX93
  - Add USB suspend clock on i.MX8MP
  - Unmap anatop base on error for i.MX93 driver
  - Change enet clock parent to wakeup_axi_root for i.MX93
  - Drop LPIT1, LPIT2, TPM1 and TPM3 clocks for i.MX93
  - Mark HSIO bus clock and SYS_CNT clock as critical on i.MX93
  - Add 320MHz and 640MHz entries to PLL146x
  - Add audio shared gate and SAI clocks for i.MX8MP
  - Fix a possible memory leak in the error path of rockchip PLL creation
  - Fix header guard for V3S clocks
  - Add IR module clock for f1c100s
  - Correct the parent clocks for the (High Speed) Serial Communication
    Interfaces with FIFO ((H)SCIF) modules and the mixed-up Ethernet
    Switch clocks on Renesas R-Car S4-8
  - Add timer (TMU, CMT) and Cortex-A76 CPU core (Z0) clocks on Renesas
    R-Car V4H
  - Two PLL driver fixups for the Amlogic clk driver
  - Round SD clock rate to improve parent clock selection
  - Add Ethernet Switch and internal SASYNCPER clocks on Renesas R-Car
    S4-8
  - Add DMA (SYS-DMAC), SPI (MSIOF), external interrupt (INTC-EX) serial
    (SCIF), PWM (PWM and TPU), SDHI, and HyperFLASH/QSPI (RPC-IF) clocks
    on Renesas R-Car V4H
  - Add Multi-Function Timer Pulse Unit (MTU3a) clock and reset on
    Renesas RZ/G2L
  - Fix endless loop on Renesas RZ/N1
  - Correct the parent clocks for the High Speed Serial Communication
    Interfaces with FIFO (HSCIF) modules on the Renesas R-Car V4H SoC
    Note: HSCIF0 is used for the serial console on the White-Hawk
    development board
  - Various clk DT binding improvements and conversions to YAML
  - Qualcomm SM8150/SM8250 display clock controller cleaned up
  - Some missing clocks for Qualcomm SM8350 added
  - Qualcomm MSM8974 Global and Multimedia clock controllers transitioned
    to parent_data and parent_hws
  - Use parent_data and add network resets for Qualcomm IPQ8074
  - Qualcomm Krait clock controller modernized
  - Fix pm_runtime usage in Qualcomm SC7180 and SC7280 LPASS clock
    controllers
  - Enable retention mode on Qualcomm SM8250 USB GDSCs
  - Cleanup Qualcomm RPM and RPMh clock drivers to avoid duplicating
    clocks which definition could be shared between platforms
  - Various NULL pointer checks added for allocations
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmOXq7wRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSU2sg/+JIguM/vYw92d3hGePFKaz5lmFXSjzRXp
 HMbbnuclAzc/C7jKGwypP2GMdVxOPvzxG4cW9Q25cTw4SuELg2nIBn9UvRteCEDA
 uGf8h0Xw/sJfyRhZbAlnbLxtn3qntQL8F2VbPJ+umDYnghD0Mq0WBMeHEoeXGXpb
 PVdEYsgpHo3EbgCL8rjErw9XDHBTGRgNXPounpKjD3Kwmj+CXWgopsma7Hzf2G/6
 VxBbcxDZA6OaEzJAKGVeIHBYLwY0aGPP2ouC2RQDBzSb7n6PjqDkOCdP6w1ab9Nl
 XehAup5p5Zgd314YgQlE9BoXwhXanZyVT88D6WbfN+qjksDm9n+W+5O9suN2eLrt
 h+YgmFdUAESUAJTbIyF6tiLUEIDKjKrJyU+HZX0peOhGIYbw3fMUACR+JrCbmCCZ
 rTTOWh92q7v39to+QIFsKwtVLl9IlRTCaA3tbhv/FH2gplJlOhvPgulAfV+JRtTZ
 1YND5adsFNsc69ZK8TTT2NzXUnU0XhocNNL1SegYXZpfHoNmg5CUQiPYMMASCJcI
 V1+qznLUeUUonkhexFTMrJHGL4e4ITzESi7IOTVcJ6Wco+gXOrOMHfONbahEsCYn
 UQIPC9tw9qwV6D3Sf9C8zFtBP26w7+UuJ8ZFpmhpf+fevF5i2TsG6x7Y31mlxzww
 OZ+r5dsauc4=
 =6vbl
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk driver updates from Stephen Boyd:
 "A pile of clk driver updates with a small tracepoint patch to the clk
  core this time around.

  The core framework is effectively unchanged, with the majority of the
  diff going to the Qualcomm clk driver directory because they added two
  3k line files that are almost all clk data (Abel Vesa from Linaro
  tried to shrink the number of lines down, but it doesn't seem to be
  possible without sacrificing readability).

  The second big driver this time around is the Rockchip rk3588 clk and
  reset unit, at _only_ 2.5k lines.

  Ignoring the big clk drivers from the familiar SoC vendors, there's
  just a bunch of little clk driver updates and fixes throughout here.

  It's the usual set of clk data fixups to describe proper parents, or
  add frequencies to frequency tables, or plug memory leaks when
  function calls fail. Also, some drivers are converted to use modern
  clk_hw APIs, which is always nice to see. And data is deduplicated,
  leading to a smaller kernel Image.

  Overall this batch has a larger collection of cleanups than it
  typically does. Maybe that means there are less new SoCs right now
  that need supporting, and the focus has shifted to quality and
  reliability. I can dream.

  New Drivers:
   - Frequency hopping controller hardware on MediaTek MT8186
   - Global clock controller for Qualcomm SM8550
   - Display clock controller for Qualcomm SC8280XP
   - RPMh clock controller for Qualcomm QDU1000 and QRU1000 SoCs
   - CPU PLL on MStar/SigmaStar SoCs
   - Support for the clock and reset unit of the Rockchip rk3588

  Updates:
   - Tracepoints for clk_rate_request structures
   - Debugfs support for fractional divider clk
   - Make MxL's CGU driver secure compatible
   - Ingenic JZ4755 SoC clk support
   - Support audio clks on X1000 SoCs
   - Remove flags from univ/main/syspll child fixed factor clocks across
     MediaTek platforms
   - Fix clock dependency for ADC on MediaTek MT7986
   - Fix parent for FlexSPI clock for i.MX93
   - Add USB suspend clock on i.MX8MP
   - Unmap anatop base on error for i.MX93 driver
   - Change enet clock parent to wakeup_axi_root for i.MX93
   - Drop LPIT1, LPIT2, TPM1 and TPM3 clocks for i.MX93
   - Mark HSIO bus clock and SYS_CNT clock as critical on i.MX93
   - Add 320MHz and 640MHz entries to PLL146x
   - Add audio shared gate and SAI clocks for i.MX8MP
   - Fix a possible memory leak in the error path of rockchip PLL
     creation
   - Fix header guard for V3S clocks
   - Add IR module clock for f1c100s
   - Correct the parent clocks for the (High Speed) Serial Communication
     Interfaces with FIFO ((H)SCIF) modules and the mixed-up Ethernet
     Switch clocks on Renesas R-Car S4-8
   - Add timer (TMU, CMT) and Cortex-A76 CPU core (Z0) clocks on Renesas
     R-Car V4H
   - Two PLL driver fixups for the Amlogic clk driver
   - Round SD clock rate to improve parent clock selection
   - Add Ethernet Switch and internal SASYNCPER clocks on Renesas R-Car
     S4-8
   - Add DMA (SYS-DMAC), SPI (MSIOF), external interrupt (INTC-EX)
     serial (SCIF), PWM (PWM and TPU), SDHI, and HyperFLASH/QSPI
     (RPC-IF) clocks on Renesas R-Car V4H
   - Add Multi-Function Timer Pulse Unit (MTU3a) clock and reset on
     Renesas RZ/G2L
   - Fix endless loop on Renesas RZ/N1
   - Correct the parent clocks for the High Speed Serial Communication
     Interfaces with FIFO (HSCIF) modules on the Renesas R-Car V4H SoC
     Note: HSCIF0 is used for the serial console on the White-Hawk
     development board
   - Various clk DT binding improvements and conversions to YAML
   - Qualcomm SM8150/SM8250 display clock controller cleaned up
   - Some missing clocks for Qualcomm SM8350 added
   - Qualcomm MSM8974 Global and Multimedia clock controllers
     transitioned to parent_data and parent_hws
   - Use parent_data and add network resets for Qualcomm IPQ8074
   - Qualcomm Krait clock controller modernized
   - Fix pm_runtime usage in Qualcomm SC7180 and SC7280 LPASS clock
     controllers
   - Enable retention mode on Qualcomm SM8250 USB GDSCs
   - Cleanup Qualcomm RPM and RPMh clock drivers to avoid duplicating
     clocks which definition could be shared between platforms
   - Various NULL pointer checks added for allocations"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (188 commits)
  clk: nomadik: correct struct name kernel-doc warning
  clk: lmk04832: fix kernel-doc warnings
  clk: lmk04832: drop superfluous #include
  clk: lmk04832: drop unnecessary semicolons
  clk: lmk04832: declare variables as const when possible
  clk: socfpga: Fix memory leak in socfpga_gate_init()
  clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE
  clk: st: Fix memory leak in st_of_quadfs_setup()
  clk: samsung: Fix memory leak in _samsung_clk_register_pll()
  clk: Add trace events for rate requests
  clk: Store clk_core for clk_rate_request
  clk: qcom: rpmh: add support for SM6350 rpmh IPA clock
  clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: mmcc-msm8974: move clock parent tables down
  clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: gcc-msm8974: move clock parent tables down
  clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  dt-bindings: clocks: qcom,mmcc: define clocks/clock-names for MSM8974
  dt-bindings: clock: split qcom,gcc-msm8974,-msm8226 to the separate file
  ...
2022-12-13 13:46:07 -08:00
Linus Torvalds
361c89a0da Pin control changes for the v6.2 kernel cycle:
Core changes:
 
 - Minor but nice and important documentation clean-ups.
 
 New drivers:
 
 - New subdriver for the Qualcomm SDM670 SoC.
 
 - New subdriver for the Intel Moorefield SoC.
 
 - New trivial support for the NXP Freescale i.MXRT1170 SoC.
 
 Other changes and improvements
 
 - A major clean-up of the Qualcomm pin control device tree bindings
   by Krzysztof.
 
 - A major header clean-up by Andy.
 
 - Some immutable irqchip clean-up for the Actions Semiconductor
   and Nuvoton drivers.
 
 - GPIO helpers for The Cypress cy8c95x0 driver.
 
 - Bias handling in the Mediatek MT7986 driver.
 
 - Remove the unused pins-are-numbered concept that never flew.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmOXJjQACgkQQRCzN7AZ
 XXOMaxAAuAv30XWa9sq5cMZKOlY3CLudZmxF5V7PSpFwAXiBPcPZu9ajxlaGJaAf
 +KOgJhNKYhTb4mBxsQR3X749qFFlxnbEXo9u7ka2bb5bCEkP6ZooqKSGclzAufrp
 azf1pmJYd2PoaZzwhpuosiWAzLNTeZBQPapU/d9KFIkNhvvY8dFG8YWrjV6YSMTr
 6sPWj7/FCqxAzplrQRUXapS+k5JyihyY4aHcFgJwijN6qmSRCxc49SA4VQvkZQZ3
 AP6NV1sX9JvbfgOm09Uk5doBnX4vyfeEshOq/c+XZVyr+ECzlGQARkgOXpPhPA8S
 28bY6aDaiu5HzOBauM4bp0Z4W7m7YWKWo1cDZNPVEAMF/oATOj/h3YFhLAy66RtV
 8BqEEXKvVwqGu0/utwlB1I+yLXvS0DN9C+TZ2y2aLfkgRHUonRrS1OKa0SSvvQp3
 3eXmwTJgqf01bcK7kkdDr6+1H6lRmol27Gir6We5jdOCu0LqQcSIYhCr0RzSirWm
 CHIZQTfo7J4S7pOrz7lhsFciqEQeQfsKXmSorLHrVNcGamIZZEdRhEqVxufqRU4B
 0hWoNqxjIDcqyZFFUe211OwNWNOUwMdvw5bCVkmhW5e7AylTrOi1ie1b/SlmDxRl
 k7NSVnIXdZmog0fYsSZy6qJM0FfTKXF7smnuZcBvgx61/MoCRDw=
 =PhTP
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "The two large chunks is the header clean-up from Andy and the Qualcomm
  DT bindings clean-up from Krzysztof. Each which could give rise to
  conflicts, but I haven't seen any.

  The YAML conversions happening around the device tree is the biggest
  item in the series and is the result of Rob Herrings ambition to
  autovalidate these trees against strict schemas and it is paying off
  in lots of bugs found and ever prettier device trees. Sooner or later
  the transition will be complete, Krzysztof is fixing up all of the
  Qualcomm stuff, which is pretty voluminous.

  Core changes:

   - minor but nice and important documentation clean-ups

  New drivers:

   - subdriver for the Qualcomm SDM670 SoC

   - subdriver for the Intel Moorefield SoC

   - trivial support for the NXP Freescale i.MXRT1170 SoC

  Other changes and improvements

   - major clean-up of the Qualcomm pin control device tree bindings by
     Krzysztof

   - major header clean-up by Andy

   - some immutable irqchip clean-up for the Actions Semiconductor and
     Nuvoton drivers

   - GPIO helpers for The Cypress cy8c95x0 driver

   - bias handling in the Mediatek MT7986 driver

   - remove the unused pins-are-numbered concept that never flew"

* tag 'pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (231 commits)
  pinctrl: thunderbay: fix possible memory leak in thunderbay_build_functions()
  dt-bindings: pinctrl: st,stm32: Deprecate pins-are-numbered
  dt-bindings: pinctrl: mediatek,mt65xx: Deprecate pins-are-numbered
  pinctrl: stm32: Remove check for pins-are-numbered
  pinctrl: mediatek: common: Remove check for pins-are-numbered
  pinctrl: qcom: remove duplicate included header files
  pinctrl: sunxi: d1: Add CAN bus pinmuxes
  pinctrl: loongson2: Fix some const correctness
  pinctrl: pinconf-generic: add missing of_node_put()
  pinctrl: intel: Enumerate PWM device when community has a capability
  pwm: lpss: Rename pwm_lpss_probe() --> devm_pwm_lpss_probe()
  pwm: lpss: Allow other drivers to enable PWM LPSS
  pwm: lpss: Include headers we are the direct user of
  pwm: lpss: Rename MAX_PWMS --> LPSS_MAX_PWMS
  pwm: Add a stub for devm_pwmchip_add()
  pinctrl: k210: call of_node_put()
  pinctrl: starfive: Use existing variable gpio
  dt-bindings: pinctrl: semtech,sx150xq: fix match patterns for 16 GPIOs matching
  pinconf-generic: fix style issues in pin_config_param doc
  pinctrl: pinctrl-loongson2: fix Kconfig dependency
  ...
2022-12-13 13:03:06 -08:00
Linus Torvalds
cdb9d35377 media updates for v6.2-rc1
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+QmuaPwR3wnBdVwACF8+vY7k4RUFAmOW44IACgkQCF8+vY7k
 4RWt2RAAnUPY7bj2DDGo5rJ54KjMXhz6usdOnh9Hzg5eegGzK2xXAOyKVg4AFsNk
 rXWkbEc5Rg2LJnMZg8dojsG/utOV+xtCidQCYdhUKLPDREDMjSuUy/vs3utllwkg
 MhO8JDY+OQHhqXaMFRz0suGvr1W4kDmRR7+4VciEEPX9k9CX+FMYnuVlNyxLZG03
 Hu/PSDC4ltU+P0xnLap3U681PWfUDAoSvhyQmvde39EspSBxzFTVy7Cw1VL7DvwQ
 Idrcxo37buGf8eF9Em02PBgzC00TV6yCy5wOPOemcozBgtDSeLSQjlUUaOqHZgKI
 uY4k8LI0efnJPWIqt/rGZ4OREK+m7RbyAKvQ/9ckblm3bjsJV/T8WGtnNHxDRBVD
 ypoSvFyJ+RU6eFUw2jG61Fx0vPocK8AGnQLK860ns52h5DxyxpPxWtvPyNZLNs59
 bjZPetbU7bgvGZ8aBJno84Q+4Bliel8zXWnQKrAV28gjwCt/q/Lbd9G7sUYCZwIE
 EMxcOP9r2J1Q8zQK6s9xdZx2lRINWD+9Hgh1toS2KGhkAtT5BWyBmD2MXqt88v04
 8MeyneYt6uiv5Lst41BhxT/hvIyFb9g3pW28TAUCPV9r5pjyJVRNvPjJEv6dnR2e
 eRmBHcyLG6/Q1Do+HY2DjjgOsAL7yDxQJNahqFM/cFGYMVmYNFU=
 =i0X1
 -----END PGP SIGNATURE-----

Merge tag 'media/v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media

Pull media updates from Mauro Carvalho Chehab:

 - DVB core changes to avoid refcount troubles and UAF

 - DVB API/core has gained support for DVB-C2 and DVB-S2X

 - New sensor drivers: ov08x40, ov4689.c, st-vgxy61 and tc358746.c

 - Removal of an unused sensor driver: s5k4ecgx

 - Move microchip_csi2dc to a new directory, named after the
   manufacturer

 - Add media controller support to Microship drivers

 - Old Atmel/Microship drivers that don't use media controler got moved
   to staging

 - New drivers added for Renesas RZ/G2L CRU and MIPI CSI-2 support

 - Allwinner A31 camera sensor driver code was now split into a bridge
   and a separate processor driver

 - Added a virtual stateless decoder driver in order to test core
   support for stateless drivers and test userspace apps using it

 - removed platform-based support for ov9650, as this is not used
   anymore

 - atomisp now uses videobuf2 and supports normal mmap mode

 - the imx7-media-csi driver got promoted from staging

 - rcar-vin driver has gained support for gen3 UDS (Up Down Scaler)

 - most i2c drivers now use I2C .probe_new() kAPI

 - lots of drivers fixes, cleanups and improvements

* tag 'media/v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (544 commits)
  media: s5c73m3: Switch to GPIO descriptors
  media: i2c: s5k5baf: switch to using gpiod API
  media: i2c: s5k6a3: switch to using gpiod API
  media: imx: remove code for non-existing config IMX_GPT_ICAP
  media: si470x: Fix use-after-free in si470x_int_in_callback()
  media: staging: stkwebcam: Restore MEDIA_{USB,CAMERA}_SUPPORT dependencies
  media: coda: Add check for kmalloc
  media: coda: Add check for dcoda_iram_alloc
  dt-bindings: media: s5c73m3: Fix reset-gpio descriptor
  media: dt-bindings: allwinner: h6-vpu-g2: Add IOMMU reference property
  media: s5k4ecgx: Delete driver
  media: s5k4ecgx: Switch to GPIO descriptors
  media: Switch to use dev_err_probe() helper
  headers: Remove some left-over license text in include/uapi/linux/v4l2-*
  headers: Remove some left-over license text in include/uapi/linux/dvb/
  media: usb: pwc-uncompress: Use flex array destination for memcpy()
  media: s5p-mfc: Fix to handle reference queue during finishing
  media: s5p-mfc: Clear workbit to handle error condition
  media: s5p-mfc: Fix in register read and write for H264
  media: imx: Use get_mbus_config instead of parsing upstream DT endpoints
  ...
2022-12-13 11:36:58 -08:00
Stephen Boyd
0e2c9884cb Merge branches 'clk-mediatek', 'clk-trace', 'clk-qcom' and 'clk-microchip' into clk-next
- Tracepoints for clk_rate_request structures

* clk-mediatek:
  clk: mediatek: fix dependency of MT7986 ADC clocks
  clk: mediatek: Change PLL register API for MT8186
  clk: mediatek: Add new clock driver to handle FHCTL hardware
  dt-bindings: clock: mediatek: Add new bindings of MediaTek frequency hopping
  clk: mediatek: Export PLL operations symbols
  clk: mediatek: mt8186-topckgen: Add GPU clock mux notifier
  clk: mediatek: mt8186-mfg: Propagate rate changes to parent
  clk: mediatek: mt8195-topckgen: Drop flags for main/univpll fixed factors
  clk: mediatek: mt8192: Drop flags for main/univpll fixed factors
  clk: mediatek: mt6795-topckgen: Drop flags for main/sys/univpll fixed factors
  clk: mediatek: mt8173: Drop flags for main/sys/univpll fixed factors
  clk: mediatek: mt8183: Drop flags for sys/univpll fixed factors
  clk: mediatek: mt8183: Compress top_divs array entries
  clk: mediatek: mt8186-topckgen: Drop flags for main/univpll fixed factors
  clk: mediatek: clk-mtk: Allow specifying flags on mtk_fixed_factor clocks

* clk-trace:
  clk: Add trace events for rate requests
  clk: Store clk_core for clk_rate_request

* clk-qcom: (69 commits)
  clk: qcom: rpmh: add support for SM6350 rpmh IPA clock
  clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: mmcc-msm8974: move clock parent tables down
  clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: gcc-msm8974: move clock parent tables down
  clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  dt-bindings: clocks: qcom,mmcc: define clocks/clock-names for MSM8974
  dt-bindings: clock: split qcom,gcc-msm8974,-msm8226 to the separate file
  clk: qcom: gcc-ipq4019: switch to devm_clk_notifier_register
  clk: qcom: rpmh: remove usage of platform name
  clk: qcom: rpmh: rename VRM clock data
  clk: qcom: rpmh: rename ARC clock data
  clk: qcom: rpmh: support separate symbol name for the RPMH clocks
  clk: qcom: rpmh: remove platform names from BCM clocks
  clk: qcom: rpmh: drop all _ao names
  clk: qcom: rpmh: reuse common duplicate clocks
  clk: qcom: rpmh: group clock definitions together
  clk: qcom: rpm: drop the platform from clock definitions
  clk: qcom: rpm: drop the _clk suffix completely
  ...

* clk-microchip:
  clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE
  clk: microchip: check for null return of devm_kzalloc()
2022-12-12 11:13:28 -08:00
Stephen Boyd
e0a1d1394b Merge branches 'clk-spear', 'clk-fract', 'clk-rockchip' and 'clk-imx' into clk-next
- Debugfs support for fractional divider clk

* clk-spear:
  clk: spear: Fix SSP clock definition on SPEAr600
  clk: spear: Fix CLCD clock definition on SPEAr600

* clk-fract:
  clk: fractional-divider: Regroup inclusions
  clk: fractional-divider: Show numerator and denominator in debugfs
  clk: fractional-divider: Split out clk_fd_get_div() helper

* clk-rockchip:
  clk: rockchip: Fix memory leak in rockchip_clk_register_pll()
  clk: rockchip: add clock controller for the RK3588
  clk: rockchip: add lookup table support
  clk: rockchip: simplify rockchip_clk_add_lookup
  clk: rockchip: allow additional mux options for cpu-clock frequency changes
  clk: rockchip: add pll type for RK3588
  clk: rockchip: add register offset of the cores select parent
  dt-bindings: clock: add rk3588 cru bindings
  dt-bindings: reset: add rk3588 reset definitions
  dt-bindings: clock: add rk3588 clock definitions
  clk: rockchip: use proper crypto0 name on rk3399

* clk-imx:
  clk: imx: rename imx_obtain_fixed_clk_hw() to imx_get_clk_hw_by_name()
  clk: imx8mn: fix imx8mn_enet_phy_sels clocks list
  clk: imx8mn: fix imx8mn_sai2_sels clocks list
  clk: imx: rename video_pll1 to video_pll
  clk: imx: replace osc_hdmi with dummy
  clk: imx8mn: rename vpu_pll to m7_alt_pll
  clk: imx: imxrt1050: add IMXRT1050_CLK_LCDIF_PIX clock gate
  clk: imx: imxrt1050: fix IMXRT1050_CLK_LCDIF_APB offsets
  clk: imx8mp: Add audio shared gate
  dt-bindings: clock: imx8mp: Add ids for the audio shared gate
  clk: imx: pll14xx: Add 320 MHz and 640 MHz entries for PLL146x
  clk: imx93: keep sys ctr clock always on
  clk: imx: keep hsio bus clock always on
  clk: imx93: drop tpm1/3, lpit1/2 clk
  dt-bindings: clock: imx93: drop TPM1/3 LPIT1/2 entry
  clk: imx93: correct enet clock
  clk: imx93: unmap anatop base in error handling path
  clk: imx: imx8mp: add shared clk gate for usb suspend clk
  dt-bindings: clocks: imx8mp: Add ID for usb suspend clock
  clk: imx93: correct the flexspi1 clock setting
2022-12-12 11:13:08 -08:00
Stephen Boyd
83907bf316 Merge branches 'clk-bindings', 'clk-renesas', 'clk-amlogic', 'clk-allwinner' and 'clk-ti' into clk-next
* clk-bindings:
  dt-bindings: clock: ti,cdce925: Convert to DT schema

* clk-renesas: (26 commits)
  clk: renesas: r8a779f0: Fix Ethernet Switch clocks
  clk: renesas: r8a779g0: Add Z0 clock support
  clk: renesas: r8a779g0: Add CMT clocks
  clk: renesas: r8a779g0: Add TMU and SASYNCRT clocks
  clk: renesas: r8a779f0: Fix SCIF parent clocks
  clk: renesas: r8a779f0: Fix HSCIF parent clocks
  clk: renesas: r9a06g032: Repair grave increment error
  clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PM
  clk: renesas: rzg2l: Fix typo in struct rzg2l_cpg_priv kerneldoc
  clk: renesas: r8a779a0: Fix SD0H clock name
  clk: renesas: r8a779g0: Add RPC-IF clock
  clk: renesas: r8a779g0: Add SDHI clocks
  clk: renesas: r8a779f0: Add SASYNCPER internal clock
  clk: renesas: r8a779f0: Fix SD0H clock name
  clk: renesas: r9a07g043: Drop WDT2 clock and reset entry
  clk: renesas: r9a07g044: Drop WDT2 clock and reset entry
  clk: renesas: r8a779g0: Add TPU clock
  clk: renesas: r8a779g0: Add PWM clock
  clk: renesas: r8a779g0: Add SCIF clocks
  clk: renesas: r9a07g044: Add MTU3a clock and reset entry
  ...

* clk-amlogic:
  clk: meson: pll: add pcie lock retry workaround
  clk: meson: pll: adjust timeout in meson_clk_pll_wait_lock()

* clk-allwinner:
  clk: sunxi-ng: f1c100s: Add IR mod clock
  clk: sunxi-ng: v3s: Correct the header guard of ccu-sun8i-v3s.h

* clk-ti:
  clk: ti: fix typo in ti_clk_retry_init() code comment
  clk: ti: dra7-atl: don't allocate `parent_names' variable
  clk: ti: change ti_clk_register[_omap_hw]() API
2022-12-12 11:12:52 -08:00
Linus Torvalds
01f3cbb296 SoC: DT changes for 6.2
The devicetree changes contain exactly 1000 non-merge changesets,
 including a number of new arm64 SoC variants from Qualcomm and Apple,
 as well as the Renesas r9a07g043f/u chip in both arm64 and riscv variants
 While we have occasionally merged support for non-arm SoCs in the past,
 this is now the normal path for riscv devicetree files.
 
 The most notable changes, by SoC platform, are:
 
  - The Apple T6000 (M1 Pro), T6001 (M1 Max) and T6002 (M2 Ultra)
    chips now have initial support. This is particularly nice as I am
    typing this on a T6002 Mac Studio with only a small number of driver
    patches.
 
  - Qualcomm MSM8996 Pro (Snapdragon 821), SM6115 (Snapdragon 662), SM4250
    (Snapdragon 460), SM6375 (Snapdragon 695), SDM670 (Snapdragon 670),
    MSM8976 (Snapdragon 652) and MSM8956 (Snapdragon 650) are all mobile
    phone chips that are closely related to others we already support.
    Adding those helps support more phones and we add several models
    from Sony (Xperia 10 IV, 5 IV, X, and X compact), OnePlus (One, 3,
    3T, and Nord N100), Xiaomi (Poco F1, Mi6), Huawei (Watch) and Google
    (Pixel 3a).  There are also new variants of the Herobrine and Trogdor
    chromebook motherboards.  SA8540P is an automotive SoC used in the
    Qdrive-3 development platform
 
  - Rockchips gains no new SoC variants, but a lot of new boards:
    three mobile gaming systems based on RK3326 Odroid-Go/rg351 family,
    two more Anbernic gaming systems based on RK3566 and a number of
    other RK356x based single-board computers.
 
  - Renesas RZ/G2UL (r9a07g043) was already supported for arm64, but as
    the newly added RZ/Five is based on the same design, this now gets
    reorganized in order to share most of the dts description between
    the two and add the RZ/Five SMARC EVK board support.
 
 Aside from that, there are the usual changes all over the tree:
 
  - New boards on other platforms contain two ASpeed BMC users, two
    Broadcom based Wifi routers, Zyxel NSA310S NAS, the i.MX6 based Kobo
    Aura2 ebook reader, two i.MX8 based development boards, two Uniphier
    Pro5 development boards, the STM32MP1 testbench board from DHCOR,
    the TI K3 based BeagleBone AI-64 board, and the Mediatek Helio X10
    based Sony Xperia M5 phone.
 
  - The Starfive JH7100 source gets reorganized in order to support the
    VisionFive V1 board.
 
  - Minor updates and cleanups for Intel SoCFPGA, Marvell PXA168,
    TI, ST, NXP, Apple, Broadcom, Juno, Marvell MVEBU, at91, nuvoton,
    Tegra, Mediatek, Renesas, Hisilicon, Allwinner, Samsung, ux500,
    spear, ...  The treewide cleanups now have a lot of fixes for cache
    nodes and other binding violoations.
 
  - Somewhat larger sets of reworks for NVIDIA Tegra, Qualcomm
    and Renesas platforms, adding a lot more on-chip device support
 
  - A rework of the way that DTB overlays are built.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmOSFNQACgkQmmx57+YA
 GNnAIg/+KAiUHpSI02V2sQyDXout2laM8fxl8pW4qREQLKV7U+fi74vbd297HSsv
 yxOrrvD6aU9QUzWvdYEezqZxUEoOAibEAE3qMaJZrCjzdtmQvIeUJQuNhhg/oGFP
 ZcSN8E+60qxsYwfXw9OHp5TTLi5X/ejRmJoPkC/DHbxbpu07YKT0aHf9qoeD8ntM
 8Y+qRiC9AYMnK49rw/HSsQIOXKC0tUQrfsavnJGKFE2wUAdD1ZFf34VtMu580USo
 eVX++hun/AKKhdU/ZV9xZKUCQTU405SwscGdP5OFtkjNqHCHwdcU10Kp/PxR3XNq
 t5Zmfg9PO/OfV17K91t60hkgfZsNojP6mvGwGhYSuIEYKbya3o4YrPJZb/8jd2Vr
 QclwN94m53zDTEfhdW4sJ1HGFV8FhQGjQ1PNBuUf2YXIztpuhd4PnCc/R31K4Yr8
 O0S2tl/PxUPB2ouHzpuB+4QMGYZjK3OmFNIEZ8tucIuwOeagkZmDUPuq6o1Nj0Je
 9XDJVAZf0wFztnbnAKdJkF15Fs8wT8wZLIZOnzy4Zp2HhKHkCKQ0EFSyN37WmM6l
 fKktQ/U7sULwrEGSz9cBuYjrq7uOsCnRZD2R6MbB0rs16oHIl4OrVSSzoqYQSTlo
 JOAimJJo2mLsslzaKr4TrqhUj9zkrYaWgOLPXD3c4MSLRK/Tqnk=
 =WCFd
 -----END PGP SIGNATURE-----

Merge tag 'soc-dt-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "The devicetree changes contain exactly 1000 non-merge changesets,
  including a number of new arm64 SoC variants from Qualcomm and Apple,
  as well as the Renesas r9a07g043f/u chip in both arm64 and riscv
  variants.

  While we have occasionally merged support for non-arm SoCs in the
  past, this is now the normal path for riscv devicetree files.

  The most notable changes, by SoC platform, are:

   - The Apple T6000 (M1 Pro), T6001 (M1 Max) and T6002 (M1 Ultra) chips
     now have initial support. This is particularly nice as I am typing
     this on a T6002 Mac Studio with only a small number of driver
     patches.

   - Qualcomm MSM8996 Pro (Snapdragon 821), SM6115 (Snapdragon 662),
     SM4250 (Snapdragon 460), SM6375 (Snapdragon 695), SDM670
     (Snapdragon 670), MSM8976 (Snapdragon 652) and MSM8956 (Snapdragon
     650) are all mobile phone chips that are closely related to others
     we already support.

     Adding those helps support more phones and we add several models
     from Sony (Xperia 10 IV, 5 IV, X, and X compact), OnePlus (One, 3,
     3T, and Nord N100), Xiaomi (Poco F1, Mi6), Huawei (Watch) and
     Google (Pixel 3a).

     There are also new variants of the Herobrine and Trogdor chromebook
     motherboards. SA8540P is an automotive SoC used in the Qdrive-3
     development platform

   - Rockchips gains no new SoC variants, but a lot of new boards: three
     mobile gaming systems based on RK3326 Odroid-Go/rg351 family, two
     more Anbernic gaming systems based on RK3566 and a number of other
     RK356x based single-board computers.

   - Renesas RZ/G2UL (r9a07g043) was already supported for arm64, but as
     the newly added RZ/Five is based on the same design, this now gets
     reorganized in order to share most of the dts description between
     the two and add the RZ/Five SMARC EVK board support.

  Aside from that, there are the usual changes all over the tree:

   - New boards on other platforms contain two ASpeed BMC users, two
     Broadcom based Wifi routers, Zyxel NSA310S NAS, the i.MX6 based
     Kobo Aura2 ebook reader, two i.MX8 based development boards, two
     Uniphier Pro5 development boards, the STM32MP1 testbench board from
     DHCOR, the TI K3 based BeagleBone AI-64 board, and the Mediatek
     Helio X10 based Sony Xperia M5 phone.

   - The Starfive JH7100 source gets reorganized in order to support the
     VisionFive V1 board.

   - Minor updates and cleanups for Intel SoCFPGA, Marvell PXA168, TI,
     ST, NXP, Apple, Broadcom, Juno, Marvell MVEBU, at91, nuvoton,
     Tegra, Mediatek, Renesas, Hisilicon, Allwinner, Samsung, ux500,
     spear, ... The treewide cleanups now have a lot of fixes for cache
     nodes and other binding violoations.

   - Somewhat larger sets of reworks for NVIDIA Tegra, Qualcomm and
     Renesas platforms, adding a lot more on-chip device support

   - A rework of the way that DTB overlays are built"

* tag 'soc-dt-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (979 commits)
  arm64: dts: apple: t6002: Fix GPU power domains
  arm64: dts: apple: t600x-pmgr: Fix search & replace typo
  arm64: dts: apple: Add t8103 L1/L2 cache properties and nodes
  arm64: dts: apple: Rename dart-sio* to sio-dart*
  arch: arm64: apple: t600x: Use standard "iommu" node name
  arch: arm64: apple: t8103: Use standard "iommu" node name
  ARM: dts: socfpga: Fix pca9548 i2c-mux node name
  dt-bindings: iio: adc: qcom,spmi-vadc: fix PM8350 define
  dt-bindings: iio: adc: qcom,spmi-vadc: extend example
  arm64: dts: qcom: sc8280xp: fix UFS DMA coherency
  arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombie
  arm64: dts: qcom: sm8250-sony-xperia-edo: fix no-mmc property for SDHCI
  arm64: dts: qcom: sdm845-sony-xperia-tama: fix no-mmc property for SDHCI
  arm64: dts: qcom: sda660-inforce-ifc6560: fix no-mmc property for SDHCI
  arm64: dts: qcom: sa8155p-adp: fix no-mmc property for SDHCI
  arm64: dts: qcom: qrb5165-rb: fix no-mmc property for SDHCI
  arm64: dts: qcom: sm8450: align MMC node names with dtschema
  arm64: dts: qcom: sc7180-trogdor: use generic node names
  arm64: dts: qcom: sm8450-hdk: add sound support
  arm64: dts: qcom: sm8450: add Soundwire and LPASS
  ...
2022-12-12 10:21:03 -08:00
Arnd Bergmann
9379885d07 More Qualcomm driver updates for 6.2
Socinfo is extended with knowledge about MSM8956, MSM8976, SM6115,
 SM4250, SM8150, SA8155 and SM8550.
 
 Support for RSC v3, as found in SM8550 is added to the RPMH RSC driver.
 
 Support for SM8550 and SM4250 ARC regulators are added to the RPM(h)
 power-domain drivers. SM8550 support is added to the LLCC driver.
 The AOSS QMP binding is declared compatible for SM8550.
 
 BWMON and LLCC now selects REGMAP_MMIO to ensure dependencies are built
 properly.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmOQtA8VHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FJl4QAJjmeWGK7Su6PNEn1ayFbFsPE6M1
 tVrWc122vTayvIH2yK2Q0g2vGmYUwiTrigNCRh0jfWVJvlk4MFcIFMM13R7UFXA5
 OcCC44SuaeBdbwlHrrhgUolWisSlyfFPiB+YIbR0L9I/fZgp5ayu30wJjHKBPyxu
 sNImIs7yDfMg9bDE3VkwqVq/wF+FnPBhJQFEV4+sMMlXJxuFvkjtgVil9iXDZc4z
 aOCsbs1IrMHGuMm/LUN8yeYmusqFpMHR3lGp+7/OwKclUkVzt59j1CyhWORXmnpF
 vh0Zyepj4qtKlADxy2jg52w0H3LWma75mnp4x9Dt6NziZ7EBOVT6yQgSQZEXmZ11
 FuIkz0+itsz/TkY8K+iMtnGgxMdCui1WNWNMkwXC4ETnJaZZnsZ42g7fLWN5cJYg
 g9GV24rMTrS+chYHRCQCtNXXwl+At5II8vnPuRP8W0fowCwqvOCB3VIoLqXiiUyG
 At6n6M0nazykLV19QvC2jgNFr5fhvHMRZ69rV7uQKuTrLblijzWF52cP3wlEPtzb
 tiRYiNagbIpvD2Jsov3vqC5nzSJaj6zFh1m88dmP2Nb7vBawfwvVEJEuqrWY1AGu
 0DjmgE+dmbjwJw5KV9XbS3+U/PBIHWCgjGPs8CUOeHjK01nbPnHgpjMUHLyTFSCn
 Q1q9S5Wb75MNR5z2
 =MwgS
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmORAKQACgkQmmx57+YA
 GNm4pA//WhEcmFPkzGy1CZejxvdDSlNzcL3q1nL+YEE2jRYfe7/FLbtDUcrENioQ
 htfF2d4zBf0Y5+cPQhBhsYnShTQKpaesotZ421wLI1XOR+yNA+zfOuukRPB1HGfn
 v2TvSiROlaxJfhXv/4Wv/UKpl/ud4alVIuqsW0ah68bL+1A2loj4rKPuwTBCjynR
 HMz5QQ0+UD8vBBFITM6qVQ1OLA3TdkLEBT7beSHXsSpBkGJ/jdeoGsF/XV6uigaM
 i2CRPDNTZzBN8XkGb/95sJXOWFDmr28DJe4OQOnqYNSDZey4udvIS1MxgGw6h2je
 nCKb8O6faYquvcxA2HIR46ywvKtQh/S54HJPPyqZPvZlqJe8LFTCdHzwo4HNcMTh
 S/7GIpJV5QwJH5tK/YRW+P2cnRmMfGoCcXlCelH6vgYYXeyZjdNmFaZH59h/PnX9
 e03cZehDMs1laZrhF4AZsdDcwu5AzMMpP4jHG7IoSM0H1BB6n7aQCVGMWWxSI876
 Y7xz7s93brnYwCTIJnM/nG+wuFe0ITavTKozbEWoMEfMb69w/fqMH6F11SJWZY+P
 LLywtFMhwsE7MEK8ZuWWLlseQG4a0AXljRE+DwVn1Kn53fjIKnZm6gPOUtjsoIgV
 mxmJRwJjCixZYWOIK60i5AsEwkwars9wmGIxjvPKy2USVVHPnO0=
 =u7Q7
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

More Qualcomm driver updates for 6.2

Socinfo is extended with knowledge about MSM8956, MSM8976, SM6115,
SM4250, SM8150, SA8155 and SM8550.

Support for RSC v3, as found in SM8550 is added to the RPMH RSC driver.

Support for SM8550 and SM4250 ARC regulators are added to the RPM(h)
power-domain drivers. SM8550 support is added to the LLCC driver.
The AOSS QMP binding is declared compatible for SM8550.

BWMON and LLCC now selects REGMAP_MMIO to ensure dependencies are built
properly.

* tag 'qcom-drivers-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: socinfo: Add SM6115 / SM4250 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for SM6115 / SM4250 and variants
  soc: qcom: socinfo: Add SM8150 and SA8155 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for SM8150 and SA8155
  dt-bindings: soc: qcom: apr: document generic qcom,apr compatible
  soc: qcom: Select REMAP_MMIO for ICC_BWMON driver
  soc: qcom: Select REMAP_MMIO for LLCC driver
  soc: qcom: rpmpd: Add SM4250 support
  dt-bindings: power: rpmpd: Add SM4250 support
  dt-bindings: soc: qcom: aoss: Add compatible for SM8550
  soc: qcom: llcc: Add configuration data for SM8550
  dt-bindings: arm: msm: Add LLCC compatible for SM8550
  soc: qcom: llcc: Add v4.1 HW version support
  soc: qcom: socinfo: Add SM8550 ID
  soc: qcom: rpmh-rsc: Avoid unnecessary checks on irq-done response
  soc: qcom: rpmh-rsc: Add support for RSC v3 register offsets
  soc: qcom: rpmhpd: Add SM8550 power domains
  dt-bindings: power: rpmpd: Add SM8550 to rpmpd binding
  soc: qcom: socinfo: Add MSM8956/76 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for MSM8956 and MSM8976

Link: https://lore.kernel.org/r/20221207154134.3233779-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-12-07 22:07:48 +01:00
Bhupesh Sharma
67d1af1c50 dt-bindings: arm: qcom,ids: Add SoC IDs for SM6115 / SM4250 and variants
Add SoC IDs for Qualcomm SM6115 / SM4250 and variants.

Cc: Bjorn Andersson <andersson@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221201141619.2462705-4-bhupesh.sharma@linaro.org
2022-12-05 16:50:39 -06:00
Bhupesh Sharma
87f67727e0 dt-bindings: arm: qcom,ids: Add SoC IDs for SM8150 and SA8155
Add SoC IDs for Qualcomm SM8150 and SA8155 SoCs.

Cc: Bjorn Andersson <andersson@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221201141619.2462705-2-bhupesh.sharma@linaro.org
2022-12-05 16:50:39 -06:00
Bhupesh Sharma
45ac44ed10 dt-bindings: power: rpmpd: Add SM4250 support
Add compatible and constants for the power domains exposed by the
SM4250 RPM.

Cc: Bjorn Andersson <andersson@kernel.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221127112204.1486337-2-bhupesh.sharma@linaro.org
2022-12-05 16:30:36 -06:00
Abel Vesa
147f6534b8 soc: qcom: socinfo: Add SM8550 ID
Add the ID for the Qualcomm SM8550 SoC.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221116112438.2643607-1-abel.vesa@linaro.org
2022-12-05 15:12:27 -06:00
Abel Vesa
f0f4727a12 dt-bindings: power: rpmpd: Add SM8550 to rpmpd binding
Add compatible and constants for the power domains exposed by the RPMH
in the Qualcomm SM8550 platform.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221116111745.2633074-2-abel.vesa@linaro.org
2022-12-05 15:11:05 -06:00
AngeloGioacchino Del Regno
484d7b4075 dt-bindings: arm: qcom,ids: Add SoC IDs for MSM8956 and MSM8976
Document the identifier of MSM8956/76.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221111120156.48040-7-angelogioacchino.delregno@collabora.com
2022-12-05 14:44:46 -06:00
Abel Vesa
47ba9c50bb dt-bindings: clock: Add SM8550 GCC clocks
Add device tree bindings for global clock controller on SM8550 SoCs.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130112852.2977816-2-abel.vesa@linaro.org
2022-12-01 17:26:41 -06:00
Robert Marko
bb524058eb dt-bindings: clock: qcom: ipq8074: add missing networking resets
Add bindings for the missing networking resets found in IPQ8074 GCC.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107132901.489240-2-robimarko@gmail.com
2022-12-01 17:26:35 -06:00
Arnd Bergmann
bcbc468528 Qualcomm ARM64 DTS updates for 6.2
This introduces support for SM4250, SM6115, SM6375 and SDM670 platforms
 and Sony Xperia 10 IV, Google Pixel 3a, OnePlus 3, OnePlus 3T, Google
 Pazquel and OnePlus Nord N100.
 
 A wide variety of updates to align with DeviceTree bindings across
 many/most platforms is introduced, and incorrectly styled comments are
 adjusted across the tree.
 
 Apps RSC is added to the cluster-idle power-domain across SM8150,
 SM8250, SM8350 and SM8450, to ensure sleep and wake votes are flushed as
 the last core is being powered down.
 
 Remoteproc firmware patches are aligned with agreed upon structure used
 in linux-firmware across Inforce 6560, Lenovo Miix 630, various Sony
 Xperia devices and Samsung Galaxy Book2 (although these are not
 available in linux-firmware today).
 
 On IPQ8074 CPU clocks are added, thermal zones are introduced and vqmmc
 supply is specified for the HK01 board.
 
 Alcatel OneTouch Idol 3 gains LED nodes and Samsung Galaxy A3U gained
 vibrator support.
 
 The application subsystem's IOMMU and the display subsystem is enabled
 for MSM8953.
 
 A new CPU frequency table is introduced for MSM8996Pro, to properly
 describe it separate of MSM8996. The GPU opp-table is extended as well.
 
 On SC7180 USB is marked as a wakeup source, USB gains required-opps to
 ensure that the core voltage rail is voted for as needed. The
 description of the fingerprint sensor in Trogdor is corrected.
 
 On SC7280 Wake-on-WLAN is introduced, and PHY parameters for the SNPS
 USB PHY is defined across SC7280.
 
 The memory map across Google Herobrine is adjusted, to regain unused
 memory on the WiFi SKUs.  A LTE SKU of the Evoker board is introduced
 and the bard gains touchscreen.
 NVME support is disabled on Villager boards, as it's not used.
 
 PCIe support is introduced on SC8280XP, with NVMe, SDX55 (5G) and WiFi
 enabled on the Lenovo Thinkpad X13s and Compute Reference Device. ADCs
 and thermal zones are intrduced for the same. Lenovo Thinkpad X13s
 gains LID switch support.
 
 Fairphone FP3 gains touchscreen support.
 
 Support for Xiaomi Poco F1 variant with EBBG panel.
 
 The round-robin ADC is enabled across DB845c, OnePlus devices and
 Pocophone F1 devices.
 
 The displayport controller on SDM845 is introduced.
 
 SM6350 gains SDHCI support and on Sony Xperia 10 III sd-card,
 touchscreen and GPI DMA is enabled.
 
 Fairphone FP4 got SD-card support.
 
 UFS PHY register ranges are corrected across SM8150, SM8250, SM8350 and
 SM8450.
 
 Sony Xperia 1 II got NFC support and Sony Xperia 5 III got PMIC
 regulators defined and USB definition corrected, to enable USB3.
 
 The SDHCI controller is described for SM8450 and microSD support is
 enabled for the HDK and QRD devices.
 
 SM8450 also gains camera CCI interface and display clock controller.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmN/QfsVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FR8wP/3ynHPC8Kq/exZfb2n5M6gS3+3YZ
 BxwCcjcwMCMBwFZUZ4LPYDctd+TL8rJ0htnK9Foq61i8FJl2cUqvU/OKtfD3W9gO
 wTzZC1bZJItZCreb4T7Kj2t3hBhO5dkG+UgbovfOgk9tJXvgNbio66ZGJqKDtU92
 ubIAJxFERACERT9g6gtAdBa2BEofG/zI2ei8HqkKP/7u51XXtRNzVCYXyHM8TydL
 M03U6snZNJkkj+UM8Wzrg9mxkheAOSyo0nLK58Lje2I4CjV5WToCZUICqm7z7l36
 GoBnDXaRacmb0gIco9sGMo5K7jNqQ/6U1JVJRAb+NNM16fp0mKOboZ8SLKI9oT6g
 9UXiylzzz0buvNzzTu7HF8JRNQvxBnLKC+nE/ekWQm6uhsmJ9DkrMBnxn5fyZ1iL
 5uFXcaVDagVQCdHOfYntQzKEGsoPwg0KQJbjoM+T3tkQX5NcWVP+06uYLWqRxgk5
 jTn98JXK+2w4yYdhCKr8U71mBoWwoYwOZiEnZlL+P+52gZUoWDgA65BGnoqYk2cW
 2KsfB+EM3ggye6a4X/gVVuCR8bYO5+YIUyoBWLRKd51xw0Mr99KUc+ugTmCKGZpW
 31p/NhgdvfOK9qLRhEVH9zDT24Jqo1tRF2NgtJrFufMcYbdNbB8BA22aDLoTbE0m
 Kru1n0WaaU4vBIbm
 =0+lj
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmOHYjwACgkQmmx57+YA
 GNn21Q/7B5vrpo21COOlybRqhhAJYKo1kouED1EW4Fh1qQ0PejkDEU9CZYuvTNyw
 l0sFewhdpV9cEhSDm6nuk+wcs15r3tBp9fWWWBMbLLi+MohO0rY3Wi7ZIZDbK9N8
 B1UqkCASqLRYbny6kT0JztlhdEAHlEJ2Bc63pHhVYdj74xyLm+ByIgGV0o0fWhNM
 dUtJwz+W+uYMg/5OFj/UMLBvXFdDzz/LmYKS8UYP0sxmhOUJd1yTqxyqCxECWe6z
 OgGeB+2bQ297OyWdQjZk6tucZcjpP0y6qtL1PQaDtfqMVXsaDKNqa+C1eTvTEQWT
 tzOuWq4I5z7+vEe3JlKwHFmeblvD5FhNqUzyJabxXbTpe7m7sLbyeJdYaXXd6lmk
 0hBAJdSNNqAoIMMXUWwDxzaTDzKq648fteP0VZIC2B24iSRz6tt2FhLi6X1Lh0Tj
 LDHsbHvQIY3cFmYqIbgRt+lMxyy+pZWRuZFhMeIrNE1T4OQn2X3l5DlGAjUw2i51
 KXWUHeUSWWE39FyV/V72BDIPM/kGrESdJACko989ZinKdvKSyyz9Tl4qKsYUWAFH
 XZf3BvvsP20WKLvF79n500RBOh0J2uhTGTv6zphXXj5nRvv6NFiS1C+MWwaVnO4L
 HABmamTgb/rkP36J7nOD3iBQxuYG4i/hDLG66Zibhf9gqUDAWV4=
 =c209
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM64 DTS updates for 6.2

This introduces support for SM4250, SM6115, SM6375 and SDM670 platforms
and Sony Xperia 10 IV, Google Pixel 3a, OnePlus 3, OnePlus 3T, Google
Pazquel and OnePlus Nord N100.

A wide variety of updates to align with DeviceTree bindings across
many/most platforms is introduced, and incorrectly styled comments are
adjusted across the tree.

Apps RSC is added to the cluster-idle power-domain across SM8150,
SM8250, SM8350 and SM8450, to ensure sleep and wake votes are flushed as
the last core is being powered down.

Remoteproc firmware patches are aligned with agreed upon structure used
in linux-firmware across Inforce 6560, Lenovo Miix 630, various Sony
Xperia devices and Samsung Galaxy Book2 (although these are not
available in linux-firmware today).

On IPQ8074 CPU clocks are added, thermal zones are introduced and vqmmc
supply is specified for the HK01 board.

Alcatel OneTouch Idol 3 gains LED nodes and Samsung Galaxy A3U gained
vibrator support.

The application subsystem's IOMMU and the display subsystem is enabled
for MSM8953.

A new CPU frequency table is introduced for MSM8996Pro, to properly
describe it separate of MSM8996. The GPU opp-table is extended as well.

On SC7180 USB is marked as a wakeup source, USB gains required-opps to
ensure that the core voltage rail is voted for as needed. The
description of the fingerprint sensor in Trogdor is corrected.

On SC7280 Wake-on-WLAN is introduced, and PHY parameters for the SNPS
USB PHY is defined across SC7280.

The memory map across Google Herobrine is adjusted, to regain unused
memory on the WiFi SKUs.  A LTE SKU of the Evoker board is introduced
and the bard gains touchscreen.
NVME support is disabled on Villager boards, as it's not used.

PCIe support is introduced on SC8280XP, with NVMe, SDX55 (5G) and WiFi
enabled on the Lenovo Thinkpad X13s and Compute Reference Device. ADCs
and thermal zones are intrduced for the same. Lenovo Thinkpad X13s
gains LID switch support.

Fairphone FP3 gains touchscreen support.

Support for Xiaomi Poco F1 variant with EBBG panel.

The round-robin ADC is enabled across DB845c, OnePlus devices and
Pocophone F1 devices.

The displayport controller on SDM845 is introduced.

SM6350 gains SDHCI support and on Sony Xperia 10 III sd-card,
touchscreen and GPI DMA is enabled.

Fairphone FP4 got SD-card support.

UFS PHY register ranges are corrected across SM8150, SM8250, SM8350 and
SM8450.

Sony Xperia 1 II got NFC support and Sony Xperia 5 III got PMIC
regulators defined and USB definition corrected, to enable USB3.

The SDHCI controller is described for SM8450 and microSD support is
enabled for the HDK and QRD devices.

SM8450 also gains camera CCI interface and display clock controller.

* tag 'qcom-arm64-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (261 commits)
  arm64: dts: qcom: sdm845-polaris: Don't duplicate DMA assignment
  arm64: dts: qcom: sm8350-sagami: Wire up USB regulators and fix USB3
  arm64: dts: qcom: sm8350-sagami: Add most RPMh regulators
  arm64: dts: qcom: sc7280: Make herobrine-audio-rt5682 mic dtsi's match more
  arm64: dts: qcom: trim addresses to 8 digits
  arm64: dts: msm8998: unify PCIe clock order withMSM8996
  arm64: dts: msm8998: add MSM8998 specific compatible
  arm64: dts: qcom: sc8280xp-x13s: enable WiFi controller
  arm64: dts: qcom: sc8280xp-x13s: enable modem
  arm64: dts: qcom: sc8280xp-x13s: enable NVMe SSD
  arm64: dts: qcom: sc8280xp-crd: enable WiFi controller
  arm64: dts: qcom: sc8280xp-crd: enable SDX55 modem
  arm64: dts: qcom: sc8280xp-crd: enable NVMe SSD
  arm64: dts: qcom: sc8280xp-crd: rename backlight and misc regulators
  arm64: dts: qcom: sa8295p-adp: enable PCIe
  arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodes
  arm64: dts: qcom: add sdm670 and pixel 3a device trees
  arm64: dts: qcom: sc7280: Add Google Herobrine WIFI SKU dts fragment
  arm64: dts: qcom: sc7280: Mark all Qualcomm reference boards as LTE
  arm64: dts: qcom: sm7225-fairphone-fp4: Enable SD card
  ...

Link: https://lore.kernel.org/r/20221124100650.1982448-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-30 15:01:31 +01:00
Arnd Bergmann
0c5f21291c
Merge tag 'v6.2-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into asahi-wip
New boards:
- Model A and blade baseboards for the SOQuartz (rk3568) SoM,
- Anberic RG351M, RG353V, RG353VS; Odroid Go Super, Advance gaming devices
- Odroid M1
- Theobroma px30 SoM with baseboard
- Rockchip's own rk3566 demo board

Some core support for per SoC specifics:
- crypto support for rk3399 and rk3328
- second I2S controller for rk3568
- Cache properties for follow the binding for rk3308 and rk3328

Bigger device support updates for:
- SOQuartz: PCIe2, video output, gpu, HDMI sound
- Rock 3A: eth regulator, eth clock input, Wifi+Bt, I2S, PCIe3

As well as some minor extensions for Rock960 (hdmi supplies),
rk3566-roc-pc (PCIe2), Rock 4C+ (thermal support), Pinephone Pro (Wifi+Bt)

* tag 'v6.2-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (51 commits)
  arm64: dts: rockchip: update cache properties for rk3308 and rk3328
  arm64: dts: rockchip: Add SOQuartz Model A baseboard
  dt-bindings: arm: rockchip: Add SOQuartz Model A
  arm64: dts: rockchip: Add SOQuartz blade board
  dt-bindings: arm: rockchip: Add SOQuartz Blade
  arm64: dts: rockchip: Add Anbernic RG351M
  arm64: dts: rockchip: Add Odroid Go Super
  arm64: dts: rockchip: Add Odroid Go Advance Black Edition
  dt-bindings: arm: rockchip: Add more RK3326 devices
  arm64: dts: rockchip: Move most of Odroid Go Advance DTS into a DTSI
  arm64: dts: rockchip: Add support of regulator for ethernet node on Rock 3A SBC
  arm64: dts: rockchip: Add support of external clock to ethernet node on Rock 3A SBC
  arm64: dts: rockchip: Add HDMI supplies on Rock960
  arm64: dts: rockchip: Add dts for rockchip rk3566 box demo board
  dt-bindings: rockchip: Add Rockchip rk3566 box demo board
  arm64: dts: rockchip: Enable PCIe 2 on SOQuartz CM4IO
  arm64: dts: rockchip: Enable HDMI sound on SOQuartz
  arm64: dts: rockchip: Enable video output and HDMI on SOQuartz
  arm64: dts: rockchip: Enable GPU on SOQuartz CM4
  arm64: dts: rockchip: enable pcie2 on rk3566-roc-pc
  ...

Link: https://lore.kernel.org/r/4716610.aeNJFYEL58@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-29 21:16:07 +01:00
Tanmay Shah
ba4fde74fc dt-bindings: remoteproc: Add Xilinx RPU subsystem bindings
Xilinx ZynqMP platform has dual-core ARM Cortex R5 Realtime Processing
Unit(RPU) subsystem. This patch adds dt-bindings for RPU subsystem
(cluster).

Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221114233940.2096237-2-tanmay.shah@amd.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2022-11-25 09:08:45 -07:00
Dario Binacchi
bedcf9d1dc clk: imx: rename video_pll1 to video_pll
Unlike audio_pll1 and audio_pll2, there is no video_pll2. Further, the
name used in the RM is video_pll. So, let's rename "video_pll1" to
"video_pll" to be consistent with the RM and avoid misunderstandings.

The IMX8MN_VIDEO_PLL1* constants have not been removed to ensure
backward compatibility of the patch.

No functional changes intended.

Fixes: 96d6392b54 ("clk: imx: Add support for i.MX8MN clock driver")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20221117113637.1978703-4-dario.binacchi@amarulasolutions.com
2022-11-25 11:18:16 +02:00
Dario Binacchi
a429c60bae clk: imx8mn: rename vpu_pll to m7_alt_pll
The IMX8MN platform does not have any video processing unit (VPU), and
indeed in the reference manual (document IMX8MNRM Rev 2, 07/2022) there
is no occurrence of its pll. From an analysis of the code and the RM
itself, I think vpu pll is used instead of m7 alternate pll, probably
for copy and paste of code taken from modules of similar architectures.

As an example for all, if we consider the second row of the "Clock Root"
table of chapter 5 (Clocks and Power Management) of the RM:

     Clock Root     offset     Source Select (CCM_TARGET_ROOTn[MUX])
        ...          ...                    ...
  ARM_M7_CLK_ROOT   0x8080            000 - 24M_REF_CLK
                                      001 - SYSTEM_PLL2_DIV5
				      010 - SYSTEM_PLL2_DIV4
				      011 - M7_ALT_PLL_CLK
				      100 - SYSTEM_PLL1_CLK
				      101 - AUDIO_PLL1_CLK
				      110 - VIDEO_PLL_CLK
				      111 - SYSTEM_PLL3_CLK
        ...          ...                    ...

but in the source code, the imx8mn_m7_sels clocks list contains vpu_pll
for the source select bits 011b.

So, let's rename "vpu_pll" to "m7_alt_pll" to be consistent with the RM.

The IMX8MN_VPU_* constants have not been removed to ensure backward
compatibility of the patch.

No functional changes intended.

Fixes: 96d6392b54 ("clk: imx: Add support for i.MX8MN clock driver")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20221117113637.1978703-2-dario.binacchi@amarulasolutions.com
2022-11-25 11:17:34 +02:00
Laurent Pinchart
f7eeb00845 media: dt-bindings: media: Add macros for video interface bus types
Add a new dt-bindings/media/video-interfaces.h header that defines
macros corresponding to the bus types from media/video-interfaces.yaml.
This allows avoiding hardcoded constants in device tree sources.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Jacopo Mondi <jacopo@jmondi.org>
Reviewed-by: Paul Elder <paul.elder@ideasonboard.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-11-25 08:41:45 +00:00
Johan Hovold
e1c4c5436b dt-bindings: phy: qcom,qmp-usb3-dp: fix sc8280xp binding
The current QMP USB3-DP PHY bindings are based on the original MSM8996
binding which provided multiple PHYs per IP block and these in turn were
described by child nodes.

The QMP USB3-DP PHY block provides a single multi-protocol PHY and even
if some resources are only used by either the USB or DP part of the
device there is no real benefit in describing these resources in child
nodes.

The original MSM8996 binding also ended up describing the individual
register blocks as belonging to either the wrapper node or the PHY child
nodes.

This is an unnecessary level of detail which has lead to problems when
later IP blocks using different register layouts have been forced to fit
the original mould rather than updating the binding. The bindings are
arguable also incomplete as they only the describe register blocks used
by the current Linux drivers (e.g. does not include the PCS LANE
registers).

This is specifically true for later USB4-USB3-DP QMP PHYs where the TX
registers are used by both the USB3 and DP parts of the PHY (and where
the USB4 part of the PHY was not covered by the binding at all). Notably
there are also no DP "RX" (sic) registers as described by the current
bindings and the DP "PCS" region is really a set of DP_PHY registers.

Add a new binding for the USB4-USB3-DP QMP PHYs found on SC8280XP which
further bindings can be based on.

Note that the binding uses a PHY index to access either the USB3 or DP
part of the PHY and that this can later be used also for the USB4 part
if needed.

Similarly, the clock inputs and outputs can later be extended to support
USB4.

Also note that the current binding is simply removed instead of being
deprecated as it was only recently merged and would not allow for
supporting DP mode.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221121085058.31213-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-11-24 22:51:50 +05:30
Arnd Bergmann
66b55cae49
Merge tag 'qcom-drivers-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
Qualcomm driver updates for 6.2

The qcom,msm-id and qcom,board-id DeviceTree properties are documented,
to allow them to be used in configurations or devices requiring these
and the socinfo driver is updated to reuse the introduced identifiers.

The rpmh-rsc driver is extended to register for PM runtime notifications
from the CPU clusters, in order to submit sleep and wake votes the last
core in a cluster is being powered down.

A mechanism for keeping rpmhpd resources voted until sync_state is
introduced, this ensures that power-domains required during boot are
kept enabled. The rpmhpd power-domains for SDM670 are also added.

Support for the new QDU1000/QRU1000 platform is introduced in the rpmhpd
and socinfo drivers.

The APR driver gains missing error handling. QMI message descriptors in
the PDR driver are made const.

Support for the RPM found in SM6375 is added. The SPM driver gains
support for MSM8939 and MSM8976 platforms.

The stats and command-db drvers are marked as not having PM support.

* tag 'qcom-drivers-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (36 commits)
  dt-bindings: firmware: scm: add sdm670 compatible
  soc: qcom: rpmh-rsc: Write CONTROL_TCS with next timer wakeup
  soc: qcom: rpmh-rsc: Save base address of drv
  PM: domains: Store the next hrtimer wakeup in genpd
  soc: qcom: rpmh-rsc: Attach RSC to cluster PM domain
  dt-bindings: soc: qcom: Update devicetree binding document for rpmh-rsc
  dt-bindings: soc: qcom: qcom,smd-rpm: Use qcom,smd-channels on MSM8976
  soc: qcom: apr: Add check for idr_alloc and of_property_read_string_index
  soc: qcom: socinfo: Add QDU1000/QRU1000 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for QDU1000/QRU1000
  soc: qcom: rpmhpd: Add QDU1000/QRU1000 power domains
  dt-bindings: power: rpmpd: Add QDU1000/QRU1000 to rpmpd binding
  dt-bindings: qcom: smp2p: Add WPSS node names to pattern property
  soc: qcom: spm: Implement support for SAWv2.3, MSM8976 L2 PM
  dt-bindings: soc: qcom: spm: Add compatibles for MSM8976 L2
  soc: qcom: llcc: make irq truly optional
  soc: qcom: spm: Add MSM8939 SPM register data
  dt-bindings: soc: qcom: spm: Add MSM8939 CPU compatible
  dt-bindings: soc: qcom: aoss: Add sc8280xp compatible
  dt-bindings: firmware: document Qualcomm SM6375 SCM
  ...

Link: https://lore.kernel.org/r/20221122202748.1854487-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-23 12:02:44 +01:00
Arnd Bergmann
83cbe78a9c dt-bindings: Changes for v6.2-rc1
New memory client IDs and IOMMU stream IDs, as well as new compatible
 strings are introduced to support more hardware on Tegra234. Some device
 tree bindings are converted to json-schema to allow formal validation.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmN7rm8THHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zobCvD/9AsZG67rQQjJwhouvUChcCezSyLvO7
 l1v0u6L4mRd4+aavhV8yjhi0KEBKPDPXmfvcaXEXfQ5Atpcb37KHRdEskHFGo2+K
 W47a/rdlN2wTacH/cGtzZ4S+phWEZSW27sGbZR7GWrVs2Au/O3Aug8IXFN2b6Flh
 1Z6Y+rQ1wNCrUMLmPoLkb/8l579udiJDwFQOQ4KhvzKaLXTj5WTDXyOLAxB52TYT
 almlmVhGwoDyzPWfMOVuFN5e4d3f4DLNJDI82frQrCdv3j3Tb+J3O9vZX3a4HcMv
 awXz2SIHnOCYDSGEQvI+Dphx1gkUMBaIwQ7bmzAprlissrDczvg1uEZ8uQ5XrLcM
 zi2q0rd/Z8Z6AzL4J8MNFkz/JmZqgbuGuCtRmB7dMYuFjkjhCe7ALMJYLBrJfwPB
 B+KNE4Ib/xvUmzjbhzPapssuuNd9CuTcVRdMGxZB30WSUzmrTQW/kV5m447dJOoL
 WvQbNc3RKqsMzpi7SK0zD7kCtrNk48/rNexxVxhnskNcdNOiNhBbaeYi6d894b1E
 dWoVpTBXOQbSjjlVTeQcU7HZGM/53WooGWToAb19uanaqee5bAJuiH/Lyq4YzNof
 DSfo+jSWLPP78ScfA3OtSyR3BA1oub1el3JqnNS4x09pI2ykctsRa35mWSBoGFNO
 ZWG4Fy0A+GlP3w==
 =Eawq
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmN9RpoACgkQmmx57+YA
 GNm9TA//VYQpWDs5HD22hi3koKiEX781cgIm6WAshMMb22S5XpXT4n1pJJdWyucY
 jt6mBSaMOWOAFHmhAzwTkAdYEUeT+J15sJbBj66PhgICCLfaE0HrnFXg9Vn8Js69
 evNCK5n+hzgeUrXPU20kuIzQ5Qc5OgZHiXflA3waYaOhdG4Tavd3wErAdz3QBQ3H
 I/UB8YirRFfVovw8cAh18fJgRsEtPIEX9qmG+tu8zKe1t7eyyijtehPv5faegE1t
 A7iiAdSZvRHua5gQs4ukdDupJQVLf/KSDx7nHW22JzU5T69j8hc442hpIMN+n79N
 KD15LBKZGdg1pjaoQWMIhEXAuxd50/pPAj+rskYgBQcuf7JuKpi026oqPz39/jkE
 rQFfsOl9oZmJ4lv4hvTXqOitW7TMoYpkTmMm2d9mpG1RonKynuLPTuSuvYOBs38f
 kV7g7x7JubLDw/rZ1pe6Thkd8lCDbqjOGJw3ppXsELUM9mpuPuIUkCSGBSSc+kcM
 gNENyVmioGDS2gVKkkhjlqHKjQb/0ixyz1gmhyWy5TSZ/Y/qW1hyaGfBqHsKvOwV
 2juitJtRxQOasR2/PP3U1Cjg+NmfTcuoBN6nhbdgf9ZDT58RM6bcpVOv1onY9hNX
 /G1V3HmhIdfix6fTDtgf7fZu4pziXpJ7cSkx3i4UyW98yPxuIQA=
 =OUO0
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-6.2-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

dt-bindings: Changes for v6.2-rc1

New memory client IDs and IOMMU stream IDs, as well as new compatible
strings are introduced to support more hardware on Tegra234. Some device
tree bindings are converted to json-schema to allow formal validation.

* tag 'tegra-for-6.2-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: usb: tegra-xusb: Convert to json-schema
  dt-bindings: pwm: tegra: Convert to json-schema
  dt-bindings: pinctrl: tegra194: Separate instances
  dt-bindings: pinctrl: tegra: Convert to json-schema
  dt-bindings: PCI: tegra234: Add ECAM support
  dt-bindings: pwm: tegra: Document Tegra234 PWM
  dt-bindings: Add bindings for Tegra234 NVDEC
  dt-bindings: tegra: Update headers for Tegra234
  dt-bindings: Add headers for NVDEC on Tegra234

Link: https://lore.kernel.org/r/20221121171239.2041835-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-22 23:00:58 +01:00
Abel Vesa
36759c4fe2 dt-bindings: clock: imx8mp: Add ids for the audio shared gate
All these IDs are for one single HW gate (CCGR101) that is shared
between these root clocks.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/1667811007-19222-2-git-send-email-shengjiu.wang@nxp.com
2022-11-22 00:04:49 +02:00
Peng Fan
352a308af7 dt-bindings: clock: imx93: drop TPM1/3 LPIT1/2 entry
Per updated Reference Mannual, the TPM[1,3] LPIT[1,2] root clock entries
are reserved, it is because writing the CCM registers does nothing
because the TPM[1,3] and LPIT[1,2] IPs source from bus clk, not from the
TPM[1,3] LPIT[1,2] entries. And because there is no SW entity is using the
entries since adding them, let's drop them.

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20221028095211.2598312-4-peng.fan@oss.nxp.com
2022-11-21 22:40:53 +02:00
Li Jun
5c1f7f1090 dt-bindings: clocks: imx8mp: Add ID for usb suspend clock
usb suspend clock has a gate shared with usb_root_clk.

Fixes: 9c140d9926 ("clk: imx: Add support for i.MX8MP clock driver")
Cc: stable@vger.kernel.org # v5.19+
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/1664549663-20364-1-git-send-email-jun.li@nxp.com
2022-11-21 17:56:06 +02:00
Jon Hunter
41155b6f6d dt-bindings: tegra: Update headers for Tegra234
Update the device-tree clock, memory, power and reset headers for
Tegra234 by adding the definitions for all the various devices.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21 13:27:17 +01:00
Runyang Chen
fea58041af dt-bindings: reset: mt8188: add toprgu reset-controller header file
Add toprgu reset-controller header file for MT8188

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20221026063327.20037-3-Runyang.Chen@mediatek.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2022-11-19 15:30:35 +01:00
Fabien Parent
59a316fdc4 dt-bindings: iommu: mediatek: add binding documentation for MT8365 SoC
Add IOMMU binding documentation for the MT8365 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Yong Wu <yong.wu@mediatek.com>
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20221001-iommu-support-v6-1-be4fe8da254b@baylibre.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-11-19 10:11:09 +01:00
Andre Przywara
f64603c972 clk: sunxi-ng: f1c100s: Add IR mod clock
For some reason the mod clock for the Allwinner F1C100s CIR (infrared
receiver) peripheral was not modeled in the CCU driver.

Add the clock description to the list, and wire it up in the clock list.
By assigning a new clock ID at the end, it extends the number of clocks.

This allows to use the CIR peripheral on any F1C100s series board.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221107005433.11079-5-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-11-16 19:49:18 +01:00
Konrad Dybcio
9285e61a56 dt-bindings: clock: add QCOM SM6375 display clock
Add device tree bindings for display clock controller for
Qualcomm Technology Inc's SM6375 SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221115155808.10899-1-konrad.dybcio@linaro.org
2022-11-15 10:46:31 -06:00
Sebastian Reichel
0a8eb7dae6 dt-bindings: reset: add rk3588 reset definitions
Add reset ID defines for rk3588.

Compared to the downstream bindings and previous rockchip
generations this uses continous gapless reset IDs starting
at 0 instead of register offsets as IDs. Thus all numbers
are different between upstream and downstream, but I kept
the names exactly the same.

Co-Developed-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20221018151407.63395-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-11-14 15:28:47 +01:00
Sebastian Reichel
f204a60e54 dt-bindings: clock: add rk3588 clock definitions
Add clock ID defines for rk3588.

Compared to the downstream bindings written by Elaine, this uses
continous gapless clock IDs starting at 0. Thus all numbers are
different between downstream and upstream, but I kept exactly the
same names.

Co-Developed-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20221018151407.63395-2-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-11-14 15:28:47 +01:00
Wei Li
c12c19877b dt-bindings: pinctrl: Correct the header guard of mt6795-pinfunc.h
Rename the header guard of mt6795-pinfunc.h from __DTS_MT8173_PINFUNC_H to
__DTS_MT6795_PINFUNC_H what corresponding with the file name.

Fixes: 81557a7156 ("dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings")
Signed-off-by: Wei Li <liwei391@huawei.com>
Link: https://lore.kernel.org/r/20221108094529.3597920-1-liwei391@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-11-10 09:19:43 +01:00
Bjorn Andersson
73d9c10a96 dt-bindings: clock: Add Qualcomm SC8280XP display clock bindings
The Qualcomm SC8280XP platform has two display clock controllers, add a
binding for these.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220926203800.16771-2-quic_bjorande@quicinc.com
2022-11-09 21:16:04 -06:00
Melody Olvera
3b1611f252 dt-bindings: arm: qcom,ids: Add SoC IDs for QDU1000/QRU1000
Add SoC IDs for Qualcomm QDU1000 and QRU1000 platforms and their
variants.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026190549.4005703-5-quic_molvera@quicinc.com
2022-11-07 11:49:41 -06:00
Melody Olvera
8aa5cac4a2 dt-bindings: power: rpmpd: Add QDU1000/QRU1000 to rpmpd binding
Add compatible and constants for the power domains exposed by the RPMH
in the Qualcomm QDU1000 and QRU1000 platforms.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026190549.4005703-3-quic_molvera@quicinc.com
2022-11-07 11:49:41 -06:00
Manivannan Sadhasivam
22f1d06f4f dt-bindings: iio: qcom: adc7-pm8350: Allow specifying SID for channels
As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC
has the static Slave ID (SID) assigned by default. The primary PMIC
PMK8350 is responsible for collecting the temperature/voltage data from
the slave PMICs and exposing them via it's registers.

For getting the measurements from the slave PMICs, PMK8350 uses the
channel ID encoded with the SID of the relevant PMIC. So far, the
dt-binding for the slave PMIC PM8350 assumed that there will be only
one PM8350 in a system. So it harcoded SID 1 with channel IDs.

But this got changed in platforms such as Lenovo X13s where there are a
couple of PM8350 PMICs available. So to address multiple PM8350s, change
the binding to accept the SID specified by the user and use it for
encoding the channel ID.

It should be noted that, even though the SID is static it is not
globally unique. Only the primary PMIC has the unique SID id 0.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-2-manivannan.sadhasivam@linaro.org
2022-11-06 21:11:11 -06:00
Robert Foss
c2b6ad7295 dt-bindings: clock: dispcc-sm8250: Add EDP_LINK_DIV_CLK_SRC index
Add this previously missing index, since it is supported by the SoCs
targeted by the dispcc-sm8250 driver.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221102090140.965450-4-robert.foss@linaro.org
2022-11-05 23:38:19 -05:00
Siarhei Volkau
4cb21b9ede dt-bindings: clock: Add Ingenic JZ4755 CGU header
This will be used from the devicetree bindings to specify the clocks
that should be obtained from the jz4755-cgu driver.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221027192024.484320-3-lis8215@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-27 14:51:23 -07:00
Aidan MacDonald
5e5b1005f9 dt-bindings: ingenic,x1000-cgu: Add audio clocks
Add bindings for audio-related clocks on the Ingenic X1000 SoC.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20221026194345.243007-5-aidanmacdonald.0x0@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-27 11:59:05 -07:00
Mikko Perttunen
0e2b014eeb dt-bindings: Add headers for NVDEC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers
necessary for NVDEC.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-10-24 14:53:35 +02:00
Viorel Suman
f5798ced41 dt-bindings: firmware: imx: sync with SCFW kit v1.13.0
Sync defines with the latest available SCFW kit version 1.13.0,
may be found at the address below:

https://www.nxp.com/webapp/Download?colCode=L5.15.32_2.0.0_SCFWKIT-1.13.0&appType=license

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-10-23 20:24:23 +08:00
Corentin Labbe
b136468a00 clk: rockchip: use proper crypto0 name on rk3399
RK3399 has 2 crypto instance, named crypto0 and crypto1 in the TRM.
Only reset for crypto1 is correctly named, but crypto0 is not.
Since nobody use them, add a 0 to be consistent with the TRM and
crypto1 entries.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20220927075511.3147847-27-clabbe@baylibre.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-17 22:45:55 +02:00
Richard Acayan
9ba5080e68 dt-bindings: power: rpmpd: add sdm670 power domains
Add the RPMh power domain IDs and compatible string for Snapdragon 670 to
make SDM670 power domains accessible to the device trees.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221004221130.14076-2-mailingradian@gmail.com
2022-10-17 13:19:40 -05:00
Krzysztof Kozlowski
a79a4b3097 dt-bindings: arm: qcom: document qcom,msm-id and qcom,board-id
The top level qcom,msm-id and qcom,board-id properties are utilized by
bootloaders on Qualcomm MSM platforms to determine which device tree
should be used and passed to the kernel.

The commit b32e592d3c ("devicetree: bindings: Document qcom board
compatible format") from 2015 was a consensus during discussion about
upstreaming qcom,msm-id and qcom,board-id fields.  There are however still
problems with that consensus:
1. It was reached 7 years ago but it turned out its implementation did
   not reach all possible products.

2. Initially additional tool (dtbTool) was needed for parsing these
   fields to create a QCDT image consisting of multiple DTBs, later the
   bootloaders were improved and they use these qcom,msm-id and
   qcom,board-id properties directly.

3. Extracting relevant information from the board compatible requires
   this additional tool (dtbTool), which makes the build process more
   complicated and not easily reproducible (DTBs are modified after the
   kernel build).

4. Some versions of Qualcomm bootloaders expect these properties even
   when booting with a single DTB.  The community is stuck with these
   bootloaders thus they require properties in the DTBs.

Since several upstreamed Qualcomm SoC-based boards require these
properties to properly boot and the properties are reportedly used by
bootloaders, document them along with the bindings header with constants
used by: bootloader, some DTS and socinfo driver.

Link: https://lore.kernel.org/r/a3c932d1-a102-ce18-deea-18cbbd05ecab@linaro.org/
Co-developed-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220830065744.161163-2-krzysztof.kozlowski@linaro.org
2022-10-17 13:19:40 -05:00
Linus Torvalds
979bb59016 These are the pin control changes for the v6.1 kernel cycle:
New drivers:
 
 - Cypress CY8C95x0 chip pin control support, along with an immediate
   cleanup.
 
 - Mediatek MT8188 SoC pin control support.
 
 - Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem)
   pin control support.
 
 - Qualcomm PM7250, PM8450
 
 - Rockchip RV1126 SoC pin control support.
 
 Improvements:
 
 - Fix some missing pins in the Armada 37xx driver.
 
 - Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP() macro.
 
 - Fix some GPIO irq_chips to be immutable.
 
 - Massive Qualcomm device tree binding cleanup, with more to come.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmNEhjMACgkQQRCzN7AZ
 XXMNXRAAuqKM8b/Kw7H9S2sBgMuESk2WKe/lmJ6mQCWK1iyo0xecEQi1wN3WGZt1
 DfoYHdsB45GWnRcwIVIl2wAjce72EFepCa/sut55TR/bLDxRfSiHGBKatSk5VkQp
 IGx75EtsRPgnZCUU3jQgrQEiI8eqj90nr8CugZwD7gocjAtaRJXb0cc3NPyk/TDh
 Wyku3rYuzztLCJHwsZ7Q9zh3s9b8Vb43pK9BW8HHeuODqMECaDWTEQUDetKz/Z8X
 v7v01PSOafBQUCoFPezz/20kOV9llxFSCeCqbwG3zvjPSjofVwSFoSH1Op4Ybr/t
 JWM8Py1+/G/rbsRhZuEahLJ+/eLy7SWABSUq2sxwCEr/VkzNCZ1jKH/qB1S7ZkI6
 GcHPbEeCDzcN+yfKIo8p6WHUYivpj2XKXqh/BWIY63rJ3ukrq3WHuJNvCO15F/TJ
 PDuLIL0RdNxSanoamsplNtFWA3ap92P2P933k+v06VEZpZys8j/JHFUaysbiqpL+
 GoHdRjspFC/4Ob3FwbbiYktpoKmRsZl7PCJSYnnz5nrHFUbQ4LtrgppqMgGXny16
 P0pW8IBmIF4yVteodQFsyYZq2yH91TengHleqoFsK0OjYXG0BmRm3lYWLjWbojxe
 U7E5T5qQo2rtdVct9d47UznK3IRThDDJx9DtG+Y19VpkKiOy6j8=
 =PvLX
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "There is nothing exciting going on, no core changes, just a few
  drivers and cleanups.

  New drivers:

   - Cypress CY8C95x0 chip pin control support, along with an immediate
     cleanup

   - Mediatek MT8188 SoC pin control support

   - Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem) pin
     control support

   - Qualcomm PM7250, PM8450

   - Rockchip RV1126 SoC pin control support

  Improvements:

   - Fix some missing pins in the Armada 37xx driver

   - Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP()
     macro

   - Fix some GPIO irq_chips to be immutable

   - Massive Qualcomm device tree binding cleanup, with more to come"

* tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (119 commits)
  MAINTAINERS: adjust STARFIVE JH7100 PINCTRL DRIVER after file movement
  pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100"
  pinctrl: Create subdirectory for StarFive drivers
  dt-bindings: pinctrl: st,stm32: Document interrupt-controller property
  dt-bindings: pinctrl: st,stm32: Document gpio-hog pattern property
  dt-bindings: pinctrl: st,stm32: Document gpio-line-names
  pinctrl: st: stop abusing of_get_named_gpio()
  pinctrl: wpcm450: Correct the fwnode_irq_get() return value check
  pinctrl: bcm: Remove unused struct bcm6328_pingroup
  pinctrl: qcom: restrict drivers per ARM/ARM64
  pinctrl: bcm: ns: Remove redundant dev_err call
  gpio: rockchip: request GPIO mux to pinctrl when setting direction
  pinctrl: rockchip: add pinmux_ops.gpio_set_direction callback
  pinctrl: cy8c95x0: Align function names in cy8c95x0_pmxops
  pinctrl: cy8c95x0: Drop atomicity on operations on push_pull
  pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux()
  pinctrl: sunxi: sun50i-h5: Switch to use dev_err_probe() helper
  pinctrl: stm32: Switch to use dev_err_probe() helper
  dt-bindings: qcom-pmic-gpio: Add PM7250B and PM8450 bindings
  pinctrl: qcom: spmi-gpio: Add compatible for PM7250B
  ...
2022-10-11 10:59:59 -07:00
Linus Torvalds
f23cdfcd04 IOMMU Updates for Linux v6.1:
Including:
 
 	- Removal of the bus_set_iommu() interface which became
 	  unnecesary because of IOMMU per-device probing
 
 	- Make the dma-iommu.h header private
 
 	- Intel VT-d changes from Lu Baolu:
 	  - Decouple PASID and PRI from SVA
 	  - Add ESRTPS & ESIRTPS capability check
 	  - Cleanups
 
 	- Apple DART support for the M1 Pro/MAX SOCs
 
 	- Support for AMD IOMMUv2 page-tables for the DMA-API layer. The
 	  v2 page-tables are compatible with the x86 CPU page-tables.
 	  Using them for DMA-API prepares support for hardware-assisted
 	  IOMMU virtualization
 
 	- Support for MT6795 Helio X10 M4Us in the Mediatek IOMMU driver
 
 	- Some smaller fixes and cleanups
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmNEC5oACgkQK/BELZcB
 GuNcOQ/6A5SXmcvDRLYZW1ENM5Z6xsZ1LabSZkjhYSpmbJyu8Uny/Z2aRWqxPMLJ
 hJeHTsWSLhrTq1VfjFhELHB3kgT2DRr7H3LXXaMNC6qz690EcavX1wKX2AxH0m22
 8YrktkyAmFQ3BG6rsQLdlMMasLph/x06ix/xO9opQZVFdj/fV0Jx7ekX1JK+U3hx
 MI96i5W3G5PBVHBypAvjxSlmA4saj9Fhk7l3IZL7py9AOKz7NypuwWRs+86PMBiO
 EzLt5aF4g8pmKChF/c9BsoIbjBYvTG/s3NbycIng0ACc2SOvf+EvtoVZQclWifbT
 lwti9PLdsoVUnPOZHLYOTx4xSf/UyoLVzaLxJ52aoXnNYe2qaX5DANXhT2mWIY/Y
 z1mzOkShmK7WF7a8arRyqJeLJ4SvDx8GrbvLiom3DAzmqVHzzFGadHtt5fvGYN4F
 Jet/JIN3HjECQbamqtPBpWquBFhLmgusPksIiyMFscRvYdZqkaVkTkElcF3WqAMm
 QkeecfoTQ9Vdtdz44ZVLRjKpS77yRZmHshp1r/rfSI+9Ok8uRI+xmmcyrAI6ElqH
 DH14tLHPzw694rTHF+bTCd+pPMGOoFLi0xAfUXAeGWm1uzC1JIRrVu5JeQNOUOSD
 5SQDXB7dPrhXngaws5Fx2u3amCO3688mslcGgM7q54kC+LyVo0E=
 =h0sT
 -----END PGP SIGNATURE-----

Merge tag 'iommu-updates-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu updates from Joerg Roedel:

 - remove the bus_set_iommu() interface which became unnecesary because
   of IOMMU per-device probing

 - make the dma-iommu.h header private

 - Intel VT-d changes from Lu Baolu:
	  - Decouple PASID and PRI from SVA
	  - Add ESRTPS & ESIRTPS capability check
	  - Cleanups

 - Apple DART support for the M1 Pro/MAX SOCs

 - support for AMD IOMMUv2 page-tables for the DMA-API layer.

   The v2 page-tables are compatible with the x86 CPU page-tables. Using
   them for DMA-API prepares support for hardware-assisted IOMMU
   virtualization

 - support for MT6795 Helio X10 M4Us in the Mediatek IOMMU driver

 - some smaller fixes and cleanups

* tag 'iommu-updates-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (59 commits)
  iommu/vt-d: Avoid unnecessary global DMA cache invalidation
  iommu/vt-d: Avoid unnecessary global IRTE cache invalidation
  iommu/vt-d: Rename cap_5lp_support to cap_fl5lp_support
  iommu/vt-d: Remove pasid_set_eafe()
  iommu/vt-d: Decouple PASID & PRI enabling from SVA
  iommu/vt-d: Remove unnecessary SVA data accesses in page fault path
  dt-bindings: iommu: arm,smmu-v3: Relax order of interrupt names
  iommu: dart: Support t6000 variant
  iommu/io-pgtable-dart: Add DART PTE support for t6000
  iommu/io-pgtable: Add DART subpage protection support
  iommu/io-pgtable: Move Apple DART support to its own file
  iommu/mediatek: Add support for MT6795 Helio X10 M4Us
  iommu/mediatek: Introduce new flag TF_PORT_TO_ADDR_MT8173
  dt-bindings: mediatek: Add bindings for MT6795 M4U
  iommu/iova: Fix module config properly
  iommu/amd: Fix sparse warning
  iommu/amd: Remove outdated comment
  iommu/amd: Free domain ID after domain_flush_pages
  iommu/amd: Free domain id in error path
  iommu/virtio: Fix compile error with viommu_capable()
  ...
2022-10-10 13:20:53 -07:00
Linus Torvalds
706eacadd5 Devicetree updates for v6.1:
DT core:
 
 - Fix node refcounting in of_find_last_cache_level()
 
 - Constify device_node in of_device_compatible_match()
 
 - Fix 'dma-ranges' handling in bus controller nodes
 
 - Fix handling of initrd start > end
 
 - Improve error reporting in of_irq_init()
 
 - Taint kernel on DT unittest running
 
 - Use strscpy instead of strlcpy
 
 - Add a build target, dt_compatible_check, to check for
   compatible strings used in kernel sources against compatible strings
   in DT schemas.
 
 - Handle DT_SCHEMA_FILES changes when rebuilding
 
 DT bindings:
 
 - LED bindings for MT6370 PMIC
 
 - Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller,
   mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc,
   and arm,versatile-sysreg to DT schema format
 
 - Add nvmem cells to u-boot,env schema
 
 - Add more LED_COLOR_ID definitions
 
 - Require 'opp-table' uses to be a node
 
 - Various schema fixes to match QEMU 'virt' DT usage
 
 - Tree wide dropping of redundant 'Device Tree Binding' in schema titles
 
 - More (unevaluated|additional)Properties fixes in schema child nodes
 
 - Drop various redundant minItems equal to maxItems
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmM7QzsACgkQ+vtdtY28
 YcNMgg//eZr/y+FUyF3tE7DRRmCzbptAfRG0Ccmj6z0VM9HNmOiacnNdqGjOFHj6
 CCFUHYsFJhiTwgM5MzMMZcQetrF+dZDok5HQNAkYqz5jtdcg1T0ZgrcpHcZpxfGv
 lpAFaDkyoWQ7BXJbgLJJFP6pZ4IDyekWjU49php5pYlmTvzLwMvYW2MYvElLJ4It
 tKi0XAzVyT/TrynFAOYDVO+kwZ4DDctsJM44K0LRW0e05Den9zCZDeVXik0J9l8o
 jMpVy5xgqAbNUe/TCj8n91nG/Cl3wiW8l8JGWPAcb3D1Em6CQlsJCGN1a/rSHUiE
 Pseql1ufUzpjcpTMnmdbRE/jWwJcLI2DqandxqIrEpUFmF4hlGeSviKib9qtacN0
 pWC5pZgxrWvM9rHbbe2cYLozkYd8eiRo2l8hfefTopYbQ3UHa2hsU+f6vm9t0Gru
 vxH7BmdlI22aGlnP0jl8t84v5cpu8O4C6Zmf2B/b5xj3Tif2GTLU1aYPuX3PkqHL
 F9Ni+JqhnQBl1+t90PJogEFicjeyrjUO9lkKbzuoWwiJk5AgJcGck8tkBotlWYPc
 B59DTigELMlssYIoF4/oX8ZF1QVmws6Xc0f9/GkgCEA0bR1qdo63qPjM9FIpd1G4
 9sUhxiQbPCtIMMwD1M26LGUE/C4WESL9VXjdakoMaj7ekon2vjw=
 =IDIz
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "DT core:

   - Fix node refcounting in of_find_last_cache_level()

   - Constify device_node in of_device_compatible_match()

   - Fix 'dma-ranges' handling in bus controller nodes

   - Fix handling of initrd start > end

   - Improve error reporting in of_irq_init()

   - Taint kernel on DT unittest running

   - Use strscpy instead of strlcpy

   - Add a build target, dt_compatible_check, to check for compatible
     strings used in kernel sources against compatible strings in DT
     schemas.

   - Handle DT_SCHEMA_FILES changes when rebuilding

  DT bindings:

   - LED bindings for MT6370 PMIC

   - Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller,
     mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc,
     and arm,versatile-sysreg to DT schema format

   - Add nvmem cells to u-boot,env schema

   - Add more LED_COLOR_ID definitions

   - Require 'opp-table' uses to be a node

   - Various schema fixes to match QEMU 'virt' DT usage

   - Tree wide dropping of redundant 'Device Tree Binding' in schema
     titles

   - More (unevaluated|additional)Properties fixes in schema child nodes

   - Drop various redundant minItems equal to maxItems"

* tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (62 commits)
  of: base: Shift refcount decrement in of_find_last_cache_level()
  dt-bindings: leds: Add MediaTek MT6370 flashlight
  dt-bindings: leds: mt6370: Add MediaTek MT6370 current sink type LED indicator
  dt-bindings: mailbox: Convert mtk-gce to DT schema
  of: base: make of_device_compatible_match() accept const device node
  of: Fix "dma-ranges" handling for bus controllers
  of: fdt: Remove unused struct fdt_scan_status
  dt-bindings: display: st,stm32-dsi: Handle data-lanes in DSI port node
  dt-bindings: timer: Add power-domains for TI timer-dm on K3
  dt: Add a check for undocumented compatible strings in kernel
  kbuild: take into account DT_SCHEMA_FILES changes while checking dtbs
  dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML
  dt-bindings: i2c: migrate mt7621 text bindings to YAML
  dt-bindings: power: gpcv2: correct patternProperties
  dt-bindings: virtio: Convert virtio,pci-iommu to DT schema
  dt-bindings: timer: arm,arch_timer: Allow dual compatible string
  dt-bindings: arm: cpus: Add kryo240 compatible
  dt-bindings: display: bridge: nxp,tda998x: Convert to json-schema
  dt-bindings: nvmem: u-boot,env: add basic NVMEM cells
  dt-bindings: remoteproc: qcom,adsp: enforce smd-edge schema
  ...
2022-10-10 13:13:51 -07:00
Linus Torvalds
3604a7f568 This update includes the following changes:
API:
 
 - Feed untrusted RNGs into /dev/random.
 - Allow HWRNG sleeping to be more interruptible.
 - Create lib/utils module.
 - Setting private keys no longer required for akcipher.
 - Remove tcrypt mode=1000.
 - Reorganised Kconfig entries.
 
 Algorithms:
 
 - Load x86/sha512 based on CPU features.
 - Add AES-NI/AVX/x86_64/GFNI assembler implementation of aria cipher.
 
 Drivers:
 
 - Add HACE crypto driver aspeed.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEn51F/lCuNhUwmDeSxycdCkmxi6cFAmM785cACgkQxycdCkmx
 i6dveBAAmGVYtrPmcGfA6CmzZ8ps9KdZxhjHjzLKwuqrOMulZvE2IYeUV4QtNqpQ
 6NLY2+TkqL0XIbCXoByIk32lMYIlXBaJdMYdHHDTeo7E2wqZn/46SPSWeNKazyJx
 dkL8Oj62nqDc2s0LOi3vLvod+sENFQ69R+vkHOa0fZhX0UBsac3NIXo+74Y2A7bE
 0+iQFKTWdNnoQzQ0j4q8WMiolKYh21iPZ9l5sjgMgichLCaE6PrITlRcaWrtPhey
 U1OmJtbTPsg+5X1r9KyLtoAXtBDONl66GQyne+p/ZYD8cMhxomjJaPlMhwWE/n4d
 d2KJKvoXoPPo4c+yNIS9hBav07ZriPl0q0jd2M1rd6oYTmFpaodTgIBfjvxO+wfV
 GoqDS8PEc42U1uwkuKC/cvfr6pB8WiybfXy+vSXBm/jUgIOO3y+eqsC8Jx9ZoQeG
 F+d34PYfJrJbmDRtcA6ZKdzN0OmKq7aCilx1kGKGPg0D+uq64FBo7zsT6XzTK8HL
 2Za9AACPn87xLQwGrKDSBfyrlSSIJm2FaIIPayUXHEo7cyoiZwbTpXRRJ1mDR+v9
 jzI+xPEXCthtjysuRmufNhTkiZUv3lZ8ORfQ0QFKR53tjZUm+dVQo0V/N/ZSXoSV
 SyRvXYO+ToXePAofNWl1LcO1grX/vxtFNedMkDLHXooRcnCaIYo=
 =rq2f
 -----END PGP SIGNATURE-----

Merge tag 'v6.1-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6

Pull crypto updates from Herbert Xu:
 "API:
   - Feed untrusted RNGs into /dev/random
   - Allow HWRNG sleeping to be more interruptible
   - Create lib/utils module
   - Setting private keys no longer required for akcipher
   - Remove tcrypt mode=1000
   - Reorganised Kconfig entries

  Algorithms:
   - Load x86/sha512 based on CPU features
   - Add AES-NI/AVX/x86_64/GFNI assembler implementation of aria cipher

  Drivers:
   - Add HACE crypto driver aspeed"

* tag 'v6.1-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (124 commits)
  crypto: aspeed - Remove redundant dev_err call
  crypto: scatterwalk - Remove unused inline function scatterwalk_aligned()
  crypto: aead - Remove unused inline functions from aead
  crypto: bcm - Simplify obtain the name for cipher
  crypto: marvell/octeontx - use sysfs_emit() to instead of scnprintf()
  hwrng: core - start hwrng kthread also for untrusted sources
  crypto: zip - remove the unneeded result variable
  crypto: qat - add limit to linked list parsing
  crypto: octeontx2 - Remove the unneeded result variable
  crypto: ccp - Remove the unneeded result variable
  crypto: aspeed - Fix check for platform_get_irq() errors
  crypto: virtio - fix memory-leak
  crypto: cavium - prevent integer overflow loading firmware
  crypto: marvell/octeontx - prevent integer overflows
  crypto: aspeed - fix build error when only CRYPTO_DEV_ASPEED is enabled
  crypto: hisilicon/qm - fix the qos value initialization
  crypto: sun4i-ss - use DEFINE_SHOW_ATTRIBUTE to simplify sun4i_ss_debugfs
  crypto: tcrypt - add async speed test for aria cipher
  crypto: aria-avx - add AES-NI/AVX/x86_64/GFNI assembler implementation of aria cipher
  crypto: aria - prepare generic module for optimized implementations
  ...
2022-10-10 13:04:25 -07:00
Linus Torvalds
bdc753c7fc Here's the main clk pull request for this merge window. We have some
late breaking reports that a patch series to rework clk rate range
 support broke boot on some devices, so I've left that branch out of this
 PR. Hopefully we can get to that next week, or punt on it and let it
 bake another cycle. That means we don't really have any changes to the
 core framework this time around besides a few typo fixes. Instead this
 is all clk driver updates and fixes.
 
 The usual suspects are here (again), with Qualcomm dominating the
 diffstat. We look to have gained support for quite a few new Qualcomm
 SoCs and Dmitry worked on updating many of the existing Qualcomm drivers
 to use clk_parent_data. After that we have MediaTek drivers getting some
 much needed updates, in particular to support GPU DVFS. There are also
 quite a few Samsung clk driver patches, but that's mostly because there
 was a maintainer change and so last release we missed some of those
 patches.
 
 Overall things look normal, but I'm slowly reviewing core framework code
 nowadays and that shows given the rate range patches had to be yanked
 last minute. Let's hope this situation changes soon.
 
 New Drivers:
  - Support for Renesas VersaClock7 clock generator family
  - Add Spreadtrum UMS512 SoC clk support
  - New clock drivers for MediaTek Helio X10 MT6795
  - Display clks for Qualcomm SM6115, SM8450
  - GPU clks for Qualcomm SC8280XP
  - Qualcomm MSM8909 and SM6375 global and SMD RPM clk drivers
 
 Deleted Drivers:
  - Remove DaVinci DM644x and DM646x clk driver support
 
 Updates:
  - Convert Baikal-T1 CCU driver to platform driver
  - Split reset support out of primary Baikal-T1 CCU driver
  - Add some missing clks required for RPiVid Video Decoder on RaspberryPi
  - Mark PLLC critical on bcm2835
  - More devm helpers for fixed rate registration
  - Various PXA168 clk driver fixes
  - Add resets for MediaTek MT8195 PCIe and USB
  - Miscellaneous of_node_put() fixes
  - Nuke dt-bindings/clk path (again) by moving headers to dt-bindings/clock
  - Convert gpio-clk-gate binding to YAML
  - Various fixes to AMD/Xilinx Zynqmp clk driver
  - Graduate AMD/Xilinx "clocking wizard" driver from staging
  - Add missing DPI1_HDMI clock in MT8195 VDOSYS1
  - Clock driver changes to support GPU DVFS on MT8183, MT8192, MT8195
    - Fix GPU clock topology on MT8195
    - Propogate rate changes from GPU clock gate up the tree
    - Clock mux notifiers for GPU-related PLLs
  - Conversion of more "simple" drivers to mtk_clk_simple_probe()
  - Hook up mtk_clk_simple_remove() for "simple" MT8192 clock drivers
  - Fixes to previous |struct clk| to |struct clk_hw| conversion on MediaTek
  - Shrink MT8192 clock driver by deduplicating clock parent lists
  - Change order between 'sim_enet_root_clk' and 'enet_qos_root_clk'
    clocks for i.MX8MP
  - Drop unnecessary newline in i.MX8MM dt-bindings
  - Add more MU1 and SAI clocks dt-bindings Ids
  - Introduce slice busy bit check for i.MX93 composite clock
  - Introduce white list bit check for i.MX93 composite clock
  - Add new i.MX93 clock gate
  - Add MU1 and MU2 clocks to i.MX93 clock provider
  - Add SAI IPG clocks to i.MX93 clock provider
  - add generic clocks for U(S)ART available on SAMA5D2 SoCs
  - reset controller support for Polarfire clocks
  - .round_rate and .set rate support for clk-mpfs
  - code cleanup for clk-mpfs
  - PLL support for PolarFire SoC's Clock Conditioning Circuitry
  - Add watchdog, I2C, pin control/GPIO, and Ethernet clocks on R-Car V4H
  - Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8
  - Add I2C clocks and resets on RZ/V2M
  - Document clock support for the RZ/Five SoC
  - mux-variant clock using the table variant to select parents
  - clock controller for the rv1126 soc
  - conversion of rk3128 to yaml and relicensing of the yaml bindings
    to gpl2+MIT (following dt-binding guildelines)
  - Exynos7885: add FSYS, TREX and MFC clock controllers
  - Exynos850: add IS and AUD (audio) clock controllers with bindings
  - ExynosAutov9: add FSYS clock controllers with bindings
  - ExynosAutov9: correct clock IDs in bindings of Peric 0 and 1 clock
    controllers, due to duplicated entries.  This is an acceptable ABI
    break: recently developed/added platform so without legacies, acked
    by known users/developers
  - ExynosAutov9: add few missing Peric 0/1 gates
  - ExynosAutov9: correct register offsets of few Peric 0/1 clocks
  - Minor code improvements (use of_device_get_match_data() helper, code
    style)
  - Add Krzysztof Kozlowski as co-maintainer of Samsung SoC clocks, as he
    already maintainers that architecture/platform
  - Keep Qualcomm GDSCs enabled when PWRSTS_RET flag is there, solving retention
    issues during suspend of USB on Qualcomm sc7180/sc7280 and SC8280XP
  - Qualcomm SM6115 and QCM2260 are moved to reuse PLL configuration
  - Qualcomm SDM660 SDCC1 moved to floor clk ops
  - Support for the APCS PLLs for Qualcomm IPQ8064, IPQ8074 and IPQ6018 was
    added/fixed
  - The Qualcomm MSM8996 CPU clocks are updated with support for ACD
  - Support for Qualcomm SDM670 GCC and RPMh clks was added
  - Transition to parent_data, parent_hws and use of ARRAY_SIZE() for
    num_parents was done for many Qualcomm SoCs
  - Support for per-reset defined delay on Qualcomm was introduced
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmM/trwRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSUEoA/+LiftbrF8Xtu7lGdxRjqLzRftUmHaUQWO
 d0cadtzMsgxzFJsxp99IiJBVJoaYCBOGlnZDx8p/JGv+mmdhl5+yHgKQbR8nEmTk
 5A+bdA1okOdm8SPBPMcLvuMjsgmx+DHkuxvnC2hT8ZGfQDoa+6PnObpP30LJkHT0
 oVY8g8ScEuHI5eJcNz3UgxAetKeJd+WRQPxKCrjsOeyhWuNAJ7wdTVQjjzH49X4C
 RS3fjeHvhr2VZm23IgildY++a6hPO72gtBjEpDRoFwnmWAVqUtxiwptoJJNkC5kB
 toD/ndQHOLh/XOJFKgksS20L4JHtSp5F3Ma8sIuOjAXmDCyqMdTQhydnl5Pyrow+
 ct8BMUGkx0Sw8pXBJYINtHpwTtIxvLu/sBNqBb/lRCWd8byrPlUnKvF/COcoxp27
 miZTwJI28fHU5a2K/46iWZCI5YUvVcnBSz8WbEWWvOltIT8S0JvZozA3KuRm5vys
 /k2HaQwO2I0QWQzPjfg6SRlTTWH6p+Hc47fSg7LSM6Scsb7ZraajTM2QOvgn7Mgp
 m/136q7jr9mvuLqqy1fBY3F2hDZYNSJX+UfmIFcpCyxvht0GVFN9YCc+Ibgyl2vQ
 P3b9LXV2OqhtDJg6ds7v8aPgAGUwUFO8GTPBG1cuom7z5u/kdIpjKaFAyr8wWSuJ
 wqPIFevggsA=
 =9jI+
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "We have some late breaking reports that a patch series to rework clk
  rate range support broke boot on some devices, so I've left that
  branch out of this. Hopefully we can get to that next week, or punt on
  it and let it bake another cycle. That means we don't really have any
  changes to the core framework this time around besides a few typo
  fixes. Instead this is all clk driver updates and fixes.

  The usual suspects are here (again), with Qualcomm dominating the
  diffstat. We look to have gained support for quite a few new Qualcomm
  SoCs and Dmitry worked on updating many of the existing Qualcomm
  drivers to use clk_parent_data. After that we have MediaTek drivers
  getting some much needed updates, in particular to support GPU DVFS.
  There are also quite a few Samsung clk driver patches, but that's
  mostly because there was a maintainer change and so last release we
  missed some of those patches.

  Overall things look normal, but I'm slowly reviewing core framework
  code nowadays and that shows given the rate range patches had to be
  yanked last minute. Let's hope this situation changes soon.

  New Drivers:
   - Support for Renesas VersaClock7 clock generator family
   - Add Spreadtrum UMS512 SoC clk support
   - New clock drivers for MediaTek Helio X10 MT6795
   - Display clks for Qualcomm SM6115, SM8450
   - GPU clks for Qualcomm SC8280XP
   - Qualcomm MSM8909 and SM6375 global and SMD RPM clk drivers

  Deleted Drivers:
   - Remove DaVinci DM644x and DM646x clk driver support

  Updates:
   - Convert Baikal-T1 CCU driver to platform driver
   - Split reset support out of primary Baikal-T1 CCU driver
   - Add some missing clks required for RPiVid Video Decoder on
     RaspberryPi
   - Mark PLLC critical on bcm2835
   - More devm helpers for fixed rate registration
   - Various PXA168 clk driver fixes
   - Add resets for MediaTek MT8195 PCIe and USB
   - Miscellaneous of_node_put() fixes
   - Nuke dt-bindings/clk path (again) by moving headers to
     dt-bindings/clock
   - Convert gpio-clk-gate binding to YAML
   - Various fixes to AMD/Xilinx Zynqmp clk driver
   - Graduate AMD/Xilinx "clocking wizard" driver from staging
   - Add missing DPI1_HDMI clock in MT8195 VDOSYS1
   - Clock driver changes to support GPU DVFS on MT8183, MT8192, MT8195
   - Fix GPU clock topology on MT8195
   - Propogate rate changes from GPU clock gate up the tree
   - Clock mux notifiers for GPU-related PLLs
   - Conversion of more "simple" drivers to mtk_clk_simple_probe()
   - Hook up mtk_clk_simple_remove() for "simple" MT8192 clock drivers
   - Fixes to previous |struct clk| to |struct clk_hw| conversion on
     MediaTek
   - Shrink MT8192 clock driver by deduplicating clock parent lists
   - Change order between 'sim_enet_root_clk' and 'enet_qos_root_clk'
     clocks for i.MX8MP
   - Drop unnecessary newline in i.MX8MM dt-bindings
   - Add more MU1 and SAI clocks dt-bindings Ids
   - Introduce slice busy bit check for i.MX93 composite clock
   - Introduce white list bit check for i.MX93 composite clock
   - Add new i.MX93 clock gate
   - Add MU1 and MU2 clocks to i.MX93 clock provider
   - Add SAI IPG clocks to i.MX93 clock provider
   - add generic clocks for U(S)ART available on SAMA5D2 SoCs
   - reset controller support for Polarfire clocks
   - .round_rate and .set rate support for clk-mpfs
   - code cleanup for clk-mpfs
   - PLL support for PolarFire SoC's Clock Conditioning Circuitry
   - Add watchdog, I2C, pin control/GPIO, and Ethernet clocks on R-Car
     V4H
   - Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8
   - Add I2C clocks and resets on RZ/V2M
   - Document clock support for the RZ/Five SoC
   - mux-variant clock using the table variant to select parents
   - clock controller for the rv1126 soc
   - conversion of rk3128 to yaml and relicensing of the yaml bindings
     to gpl2+MIT (following dt-binding guildelines)
   - Exynos7885: add FSYS, TREX and MFC clock controllers
   - Exynos850: add IS and AUD (audio) clock controllers with bindings
   - ExynosAutov9: add FSYS clock controllers with bindings
   - ExynosAutov9: correct clock IDs in bindings of Peric 0 and 1 clock
     controllers, due to duplicated entries. This is an acceptable ABI
     break: recently developed/added platform so without legacies, acked
     by known users/developers
   - ExynosAutov9: add few missing Peric 0/1 gates
   - ExynosAutov9: correct register offsets of few Peric 0/1 clocks
   - Minor code improvements (use of_device_get_match_data() helper,
     code style)
   - Add Krzysztof Kozlowski as co-maintainer of Samsung SoC clocks, as
     he already maintainers that architecture/platform
   - Keep Qualcomm GDSCs enabled when PWRSTS_RET flag is there, solving
     retention issues during suspend of USB on Qualcomm sc7180/sc7280
     and SC8280XP
   - Qualcomm SM6115 and QCM2260 are moved to reuse PLL configuration
   - Qualcomm SDM660 SDCC1 moved to floor clk ops
   - Support for the APCS PLLs for Qualcomm IPQ8064, IPQ8074 and IPQ6018
     was added/fixed
   - The Qualcomm MSM8996 CPU clocks are updated with support for ACD
   - Support for Qualcomm SDM670 GCC and RPMh clks was added
   - Transition to parent_data, parent_hws and use of ARRAY_SIZE() for
     num_parents was done for many Qualcomm SoCs
   - Support for per-reset defined delay on Qualcomm was introduced"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (283 commits)
  clk: qcom: gcc-sm6375: Ensure unsigned long type
  clk: qcom: gcc-sm6375: Remove unused variables
  clk: qcom: kpss-xcc: convert to parent data API
  clk: introduce (devm_)hw_register_mux_parent_data_table API
  clk: allow building lan966x as a module
  clk: clk-xgene: simplify if-if to if-else
  clk: ast2600: BCLK comes from EPLL
  clk: clocking-wizard: Depend on HAS_IOMEM
  clk: clocking-wizard: Use dev_err_probe() helper
  clk: nxp: fix typo in comment
  clk: pxa: add a check for the return value of kzalloc()
  clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975
  dt-bindings: clock: vc5: Add 5P49V6975
  clk: mvebu: armada-37xx-tbg: Remove the unneeded result variable
  clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe
  clk: Renesas versaclock7 ccf device driver
  dt-bindings: Renesas versaclock7 device tree bindings
  clk: ti: Balance of_node_get() calls for of_find_node_by_name()
  clk: imx: scu: fix memleak on platform_device_add() fails
  clk: vc5: Use regmap_{set,clear}_bits() where appropriate
  ...
2022-10-08 10:06:48 -07:00
Linus Torvalds
a09476668e Char/Misc and other driver changes for 6.1-rc1
Here is the large set of char/misc and other small driver subsystem
 changes for 6.1-rc1.  Loads of different things in here:
   - IIO driver updates, additions, and changes.  Probably the largest
     part of the diffstat
   - habanalabs driver update with support for new hardware and features,
     the second largest part of the diff.
   - fpga subsystem driver updates and additions
   - mhi subsystem updates
   - Coresight driver updates
   - gnss subsystem updates
   - extcon driver updates
   - icc subsystem updates
   - fsi subsystem updates
   - nvmem subsystem and driver updates
   - misc driver updates
   - speakup driver additions for new features
   - lots of tiny driver updates and cleanups
 
 All of these have been in the linux-next tree for a while with no
 reported issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCY0GQmA8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ylyVQCeNJjZ3hy+Wz8WkPSY+NkehuIhyCIAnjXMOJP8
 5G/JQ+rpcclr7VOXlS66
 =zVkU
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver updates from Greg KH:
 "Here is the large set of char/misc and other small driver subsystem
  changes for 6.1-rc1. Loads of different things in here:

   - IIO driver updates, additions, and changes. Probably the largest
     part of the diffstat

   - habanalabs driver update with support for new hardware and
     features, the second largest part of the diff.

   - fpga subsystem driver updates and additions

   - mhi subsystem updates

   - Coresight driver updates

   - gnss subsystem updates

   - extcon driver updates

   - icc subsystem updates

   - fsi subsystem updates

   - nvmem subsystem and driver updates

   - misc driver updates

   - speakup driver additions for new features

   - lots of tiny driver updates and cleanups

  All of these have been in the linux-next tree for a while with no
  reported issues"

* tag 'char-misc-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (411 commits)
  w1: Split memcpy() of struct cn_msg flexible array
  spmi: pmic-arb: increase SPMI transaction timeout delay
  spmi: pmic-arb: block access for invalid PMIC arbiter v5 SPMI writes
  spmi: pmic-arb: correct duplicate APID to PPID mapping logic
  spmi: pmic-arb: add support to dispatch interrupt based on IRQ status
  spmi: pmic-arb: check apid against limits before calling irq handler
  spmi: pmic-arb: do not ack and clear peripheral interrupts in cleanup_irq
  spmi: pmic-arb: handle spurious interrupt
  spmi: pmic-arb: add a print in cleanup_irq
  drivers: spmi: Directly use ida_alloc()/free()
  MAINTAINERS: add TI ECAP driver info
  counter: ti-ecap-capture: capture driver support for ECAP
  Documentation: ABI: sysfs-bus-counter: add frequency & num_overflows items
  dt-bindings: counter: add ti,am62-ecap-capture.yaml
  counter: Introduce the COUNTER_COMP_ARRAY component type
  counter: Consolidate Counter extension sysfs attribute creation
  counter: Introduce the Count capture component
  counter: 104-quad-8: Add Signal polarity component
  counter: Introduce the Signal polarity component
  counter: interrupt-cnt: Implement watch_validate callback
  ...
2022-10-08 08:56:37 -07:00
Linus Torvalds
33e591dee9 phy-for-6.1
- New support:
 	- Bjorn Andersson provided Qualcomm SC8280XP eDP & DP and USB3 UNI phy support
 	- Chris Morgan added Rockchip rk3568 inno dsidphy support
 	- Colin Foster converted ocelot-serdes phy binding to yaml
 	- Geert Uytterhoeven converted Renesas gen2-usb phy binding to yaml
 	- Horatiu Vultur added RGMII suport in lan966x driver
 	- Konrad Dybcio provided Qualcomm SM6375 usb snps-femto-v2 bindings
 	- Michael Riesch added support for rockchip rk356x csi-dphya
 	- Richard Acayan provided Qualcomm sdm670 usb2 bindings
 	- Vincent Shih provided new Sunplus USB2 PHY driver
 
   - Updates:
 	- Chunfeng Yun provided Mediatek hdmi, ufs, tphy and xsphy updates
 	  to use bitfield helpers.
 	- Dmitry Baryshkov & Johan Hovold continued with Qualcomm qmp phy
 	  driver split and cleanup. More patches are under review and
 	  expected that next cycle might see completion of this activity.
 	- Roger Quadros added support for TI wiz driver for j7200 10g
 	- Sandeep Maheswaram added support in Qualcomm femto phy driver to
 	  override params to help with tuning
 	- Siddharth Vadapalli added SGMII support in TI wiz driver
 	- Yuan Can did bunch of dev_err_probe simplification
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmNAI0YACgkQfBQHDyUj
 g0f1Og//T7iaDW6Psq8hOkQE756JwrIxjJRHuNxnVDOpdjN7XTrXYE46pFyjMrkx
 hVHd1QDQMLkLsGNPzt2QdJ7i3xwSJ/iPeskfqvWgEJdKUP+AtGTSkyOiyikadcy5
 rdaG0OrBhMiQNMvAnS3zmYL/tqZeOxvjisYsevlPDNQAINqF2AFl2ravbc3kLxnb
 5zAAWwv11oVYVONTqUfd4gW7KsU2de8wU6UY9jk1iJaWT1u9O8EmDEXbOHONhcTN
 tA52Yw1PJXsurbpgtJIgUec6IIqHM0iG2/VS5l4UJTtddzNYhihFFTtD6noSiDCM
 Wzijf/uFJDckDakzwYPf6XSw+Y9Md1JkNlQQ/I+DzL0TddJZvu10RNtmwZQVbhWN
 SvgGsPKsjMFf3av8N4/gjnYHcWdAOU7Rz0hd1k6KqkzbUrbWWUoExpW9yCFCjN7i
 rAQ+7wG4UwNkbaOz0ZOBtDzDUn2gE2mH366eZHZ25FhdRwzxMKW5O/uJF0oOcSf6
 o5ln1G7/5Ml0RT9OChj+vkiRP0/lOUrC40HyHaEmohPKGPkFcGUznEI6X3soqhlC
 xUNlY3FF1NeU5eHthnUXPOMySurK72VEVLTrVSCZzmFZPkN34UjdU/adKnzCO2+9
 un2EKfAtPlXEQKxqc13JtZ5AXmZZ3GIstdjXWWcgPthJ6h5FbIg=
 =N3+u
 -----END PGP SIGNATURE-----

Merge tag 'phy-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Pull phy updates from Vinod Koul:
 "This contains bunch of new device support and one new Sunplus driver
  along with updates which include another big round of qmp phy
  conversion.

  New support:
   - Qualcomm SC8280XP eDP & DP and USB3 UNI phy (Bjorn Andersson)
   - Rockchip rk3568 inno dsidphy (Chris Morgan)
   - ocelot-serdes phy yaml binding (Colin Foster)
   - Renesas gen2-usb phy yaml binding (Geert Uytterhoeven)
   - RGMII suport in lan966x driver (Horatiu Vultur)
   - Qualcomm SM6375 usb snps-femto-v2 bindings (Konrad Dybcio)
   - Rockchip rk356x csi-dphya (Michael Riesch)
   - Qualcomm sdm670 usb2 bindings (Richard Acayan)
   - Sunplus USB2 PHY (Vincent Shih)

  Updates:
   - Mediatek hdmi, ufs, tphy and xsphy updates to use bitfield helpers
     (Chunfeng Yun)
   - Continued Qualcomm qmp phy driver split and cleanup. More patches
     are under review and expected that next cycle might see completion
     of this activity (Dmitry Baryshkov & Johan Hovold)
   - TI wiz driver support for j7200 10g (Roger Quadros)
   - Qualcomm femto phy driver support for override params to help with
     tuning (Sandeep Maheswaram)
   - SGMII support in TI wiz driver (Siddharth Vadapalli)
   - dev_err_probe simplification (Yuan Can)"

* tag 'phy-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (170 commits)
  phy: phy-mtk-dp: make array driving_params static const
  dt-bindings: phy: qcom,qusb2: document sdm670 compatible
  phy: qcom-qmp-pcie: fix resource mapping for SDM845 QHP PHY
  phy: rockchip-snps-pcie3: only look for rockchip,pipe-grf on rk3588
  phy: tegra: xusb: Enable usb role switch attribute
  phy: mediatek: fix build warning of FIELD_PREP()
  phy: qcom-qmp-usb: Use dev_err_probe() to simplify code
  phy: qcom-qmp-ufs: Use dev_err_probe() to simplify code
  phy: qcom-qmp-pcie-msm8996: Use dev_err_probe() to simplify code
  phy: qcom-qmp-combo: Use dev_err_probe() to simplify code
  phy: qualcomm: call clk_disable_unprepare in the error handling
  phy: intel: Use dev_err_probe() to simplify code
  phy: tegra: xusb: Use dev_err_probe() to simplify code
  phy: qcom-snps: Use dev_err_probe() to simplify code
  phy: qcom-qusb2: Use dev_err_probe() to simplify code
  phy: qcom-qmp-pcie: Use dev_err_probe() to simplify code
  phy: ti: phy-j721e-wiz: fix reference leaks in wiz_probe()
  phy: mediatek: mipi: remove register access helpers
  phy: mediatek: mipi: mt8183: use common helper to access registers
  phy: mediatek: mipi: mt8183: use GENMASK to generate bits mask
  ...
2022-10-07 16:03:01 -07:00
Linus Torvalds
ae9559594c - Core Frameworks
- Fix 'mfd_of_node_list' OF node entry resource leak
 
  - New Drivers
    - Add support for Ocelot VSC7512 Networking Chip
    - Add support for MediaTek MT6370 subPMIC
    - Add support for Richtek RT5120 (I2C) PMIC
 
  - New Device Support
    - Add support for Rockchip RV1126 and RK3588 to Syscon
    - Add support for Rockchip RK817 Battery Charger to RK808
    - Add support for Silergy SY7636a Voltage Regulator to Simple MFD
    - Add support for Qualcomm PMP8074 PMIC to QCOM SPMI
    - Add support for Secure Update to Intel M10 BMC
 
  - New Functionality
    - Provide SSP type to Intel's LPSS (PCI) SPI driver
 
  - Fix-ups
    - Remove legacy / unused code; stmpe, intel_soc_pmic_crc, syscon
    - Unify / simplify; intel_soc_pmic_crc
    - Trivial reordering / spelling, etc; Makefile, twl-core
    - Convert to managed resources; intel_soc_pmic_crc
    - Use appropriate APIs; intel_soc_pmic_crc
    - strscpy() conversion; htc-i2cpld, lpc_ich, mfd-core
    - GPIOD conversion; htc-i2cpld, stmpe
    - Add missing header file includes; twl4030-irq
    - DT goodies; stmpe, mediatek,mt6370, x-powers,axp152,
                  aspeed,ast2x00-scu, mediatek,mt8195-scpsys,
 		 qcom,spmi-pmic, syscon, qcom,tcsr, rockchip,rk817,
 		 sprd,ums512-glbreg, dlg,da9063
 
  - Bug Fixes
    - Properly check return values; sm501, htc-i2cpld
    - Repair Two-Wire Bus Mode; da9062-core
    - Fix error handling; intel_soc_pmic_core, fsl-imx25-tsadc,
                          lp8788, lp8788-irq
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAmM9e3IACgkQUa+KL4f8
 d2EGYRAArUG1tPdUWYzZweXCbojG+Q8nz0+yLQ/64tfNXRPTovUdwNDwP/l3i+46
 5K74gAsVONQQwORhDPM0QNZH5enFVKz6UcBnjM8hDDk4Ip8GEgbmPQjxrY4RpQq8
 CL3IXzPHX6LnmGUhxdm1GvKrKt+bATdYZUnAN865afxpXUQMKJt1dZcVWFHSmMco
 7EGVUfyEER/w3RehXSsqlEjEfiBsdCNoPigql1Kwb4Vdaf26hXlMvQ4Iw92yOXeC
 vaFuWaTDlzH+aQAGn4r56OjB+kIxAXvz/yUcuOZKHSKVQYj78QjBOG4KV94B3sVQ
 6j9WIZ1kNeHVOcI/sNflvN2xQOe2dT87ZxpnZpp11tYFJQE+ZuQX2c5RQC/uSqmV
 NRmYrpgDgJl/J7RUWcqBO0FV26FdcB0AQVRobgSR1Q8ii8LPifKq8w8XzOvrYwQF
 eGfmAZOTFwxFDrJrR9eHxfBLBTewVTCwtfq7FQkTQLWOqMCDDSdczsQUyMh6kQSx
 FVW/HJAdiohnafJgoD0noPrAulmsT2+WQX1EP4JDcpIEAoZAq+Z96yRqSWV/8q0i
 KlJlAD+mAvZAEjHlkuVXlGTsOl6k7wZL5ICrd8I8b77wcn1FKIbu9lwKTIjVrL1K
 r++Egr/ABXlMMX4lzka6+49Ua2PpRrN5Ln4ALmKhRBZVjjazA8A=
 =GgPZ
 -----END PGP SIGNATURE-----

Merge tag 'mfd-next-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "Core Frameworks:
   - Fix 'mfd_of_node_list' OF node entry resource leak

  New Drivers:
   - Add support for Ocelot VSC7512 Networking Chip
   - Add support for MediaTek MT6370 subPMIC
   - Add support for Richtek RT5120 (I2C) PMIC

  New Device Support:
   - Add support for Rockchip RV1126 and RK3588 to Syscon
   - Add support for Rockchip RK817 Battery Charger to RK808
   - Add support for Silergy SY7636a Voltage Regulator to Simple MFD
   - Add support for Qualcomm PMP8074 PMIC to QCOM SPMI
   - Add support for Secure Update to Intel M10 BMC

  New Functionality:
   - Provide SSP type to Intel's LPSS (PCI) SPI driver

  Fix-ups:
   - Remove legacy / unused code; stmpe, intel_soc_pmic_crc, syscon
   - Unify / simplify; intel_soc_pmic_crc
   - Trivial reordering / spelling, etc; Makefile, twl-core
   - Convert to managed resources; intel_soc_pmic_crc
   - Use appropriate APIs; intel_soc_pmic_crc
   - strscpy() conversion; htc-i2cpld, lpc_ich, mfd-core
   - GPIOD conversion; htc-i2cpld, stmpe
   - Add missing header file includes; twl4030-irq
   - DT goodies; stmpe, mediatek,mt6370, x-powers,axp152,
     aspeed,ast2x00-scu, mediatek,mt8195-scpsys, qcom,spmi-pmic, syscon,
     qcom,tcsr, rockchip,rk817, sprd,ums512-glbreg, dlg,da9063

  Bug Fixes:
   - Properly check return values; sm501, htc-i2cpld
   - Repair Two-Wire Bus Mode; da9062-core
   - Fix error handling; intel_soc_pmic_core, fsl-imx25-tsadc, lp8788,
     lp8788-irq"

* tag 'mfd-next-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (60 commits)
  mfd: syscon: Remove repetition of the regmap_get_val_endian()
  mfd: ocelot-spi: Add missing MODULE_DEVICE_TABLE
  power: supply: Add charger driver for Rockchip RK817
  dt-bindings: mfd: mt6370: Fix the indentation in the example
  mfd: da9061: Fix Failed to set Two-Wire Bus Mode.
  mfd: htc-i2cpld: Fix an IS_ERR() vs NULL bug in htcpld_core_probe()
  dt-bindings: mfd: qcom,tcsr: Drop simple-mfd from IPQ6018
  mfd: sm501: Add check for platform_driver_register()
  dt-bindings: mfd: mediatek: Add scpsys compatible for mt8186
  mfd: twl4030: Add missed linux/device.h header
  dt-bindings: mfd: dlg,da9063: Add missing regulator patterns
  dt-bindings: mfd: sprd: Add bindings for ums512 global registers
  mfd: intel_soc_pmic_chtdc_ti: Switch from __maybe_unused to pm_sleep_ptr() etc
  dt-bindings: mfd: syscon: Add rk3588 QoS register compatible
  mfd: stmpe: Switch to using gpiod API
  mfd: qcom-spmi-pmic: Add pm7250b compatible
  dt-bindings: mfd: Add missing (unevaluated|additional)Properties on child nodes
  mfd/omap1: htc-i2cpld: Convert to a pure GPIO driver
  mfd: intel-m10-bmc: Add d5005 bmc secure update driver
  dt-bindings: mfd: syscon: Drop ref from reg-io-width
  ...
2022-10-07 11:24:20 -07:00
Linus Torvalds
4078aa6850 ata changes for 6.1-rc1
* Print the timeout value for internal command failures due to a
   timeout (from Tomas).
 
 * Improve parameter names in ata_dev_set_feature() to clarify this
   function use (from Niklas).
 
 * Improve the ahci driver low power mode setting initialization to allow
   more flexibility for the user (from Rafael).
 
 * Several patches to remove redundant variables in libata-core,
   libata-eh and the pata_macio driver and to fix typos in comments (from
   Jinpeng, Shaomin, Ye).
 
 * Some code simplifications and macro renaming (for clarity) in various
   functions of libata-core (from me).
 
 * Add a missing check for a potential failure of sata_scr_read() in
   sata_print_link_status() (from Li).
 
 * Cleanup of libata Kconfig PATA_PLATFORM and PATA_OF_PLATFORM options
   (from Lukas).
 
 * Cleanups of ata dt-bindings and improvements of libahci_platform, ahci
   and libahci code (from Serge)
 
 * New driver for Synopsys AHCI SATA controllers, based of the generic
   ahci code (from Serge). One compilation warning fix is added for this
   driver (from me).
 
 * Several fixes to macros used to discover a drive capabilities to be
   consistent with the ACS specifications (from Niklas).
 
 * A couple of simplifcations to some libata functions, removing
   unnecessary arguments (from Niklas).
 
 * An improvements to libata-eh code to avoid unnecessary link reset when
   revalidating a drive after a failed command. In practice, this extra,
   unneeded reset, reset does not cause any arm beyond slightly slowing
   down error recovery (from Niklas).
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQSRPv8tYSvhwAzJdzjdoc3SxdoYdgUCYz0asgAKCRDdoc3SxdoY
 drHoAQCJhb6MuQHzbN/wR5cTGAfWXQJWBJx2mJr7oKJCrB34PwD/RzphcsuaXDta
 kwbTGlpitegByZTDKt9eMRLWmKgyngw=
 =CnJj
 -----END PGP SIGNATURE-----

Merge tag 'ata-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata

Pull ata updates from Damien Le Moal:

 - Print the timeout value for internal command failures due to a
   timeout (from Tomas)

 - Improve parameter names in ata_dev_set_feature() to clarify this
   function use (from Niklas)

 - Improve the ahci driver low power mode setting initialization to
   allow more flexibility for the user (from Rafael)

 - Several patches to remove redundant variables in libata-core,
   libata-eh and the pata_macio driver and to fix typos in comments
   (from Jinpeng, Shaomin, Ye)

 - Some code simplifications and macro renaming (for clarity) in various
   functions of libata-core (from me)

 - Add a missing check for a potential failure of sata_scr_read() in
   sata_print_link_status() (from Li)

 - Cleanup of libata Kconfig PATA_PLATFORM and PATA_OF_PLATFORM options
   (from Lukas)

 - Cleanups of ata dt-bindings and improvements of libahci_platform,
   ahci and libahci code (from Serge)

 - New driver for Synopsys AHCI SATA controllers, based of the generic
   ahci code (from Serge). One compilation warning fix is added for this
   driver (from me)

 - Several fixes to macros used to discover a drive capabilities to be
   consistent with the ACS specifications (from Niklas)

 - A couple of simplifcations to some libata functions, removing
   unnecessary arguments (from Niklas)

 - An improvements to libata-eh code to avoid unnecessary link reset
   when revalidating a drive after a failed command. In practice, this
   extra, unneeded reset, reset does not cause any arm beyond slightly
   slowing down error recovery (from Niklas)

* tag 'ata-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata: (45 commits)
  ata: libata-eh: avoid needless hard reset when revalidating link
  ata: libata: drop superfluous ata_eh_analyze_tf() parameter
  ata: libata: drop superfluous ata_eh_request_sense() parameter
  ata: fix ata_id_has_dipm()
  ata: fix ata_id_has_ncq_autosense()
  ata: fix ata_id_has_devslp()
  ata: fix ata_id_sense_reporting_enabled() and ata_id_has_sense_reporting()
  ata: libata-eh: Remove the unneeded result variable
  ata: ahci_st: Enable compile test
  ata: ahci_st: Fix compilation warning
  MAINTAINERS: Add maintainers for DWC AHCI SATA driver
  ata: ahci-dwc: Add Baikal-T1 AHCI SATA interface support
  ata: ahci-dwc: Add platform-specific quirks support
  dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA controller DT schema
  ata: ahci: Add DWC AHCI SATA controller support
  ata: libahci_platform: Add function returning a clock-handle by id
  dt-bindings: ata: ahci: Add DWC AHCI SATA controller DT schema
  ata: ahci: Introduce firmware-specific caps initialization
  ata: ahci: Convert __ahci_port_base to accepting hpriv as arguments
  ata: libahci: Don't read AHCI version twice in the save-config method
  ...
2022-10-07 10:48:49 -07:00
Linus Torvalds
7171a8da00 ARM: devicetree updates for 6.1
Most of the changes fall into one of three categories: adding support
 for additional devices on existing machines, cleaning up issues found
 by the ongoing conversion to machine-readable bindings, and addressing
 minor mistakes in the existing DT data.
 
 Across SoC vendors, Qualcomm and Freescale stick out as getting the most
 updates, which corresponds to their dominance in the mobile phone and
 embedded industrial markets, respectively.
 
 There are 636 non-merge changeset in this branch, which is a little
 lower than most times, but more importantly we only add 36 machine
 files, which is about half of what we had the past few releases.
 
 Eight new SoCs are added, but all of them are variations of already
 supported SoC families, and most of them come with one reference board
 design from the SoC vendor:
 
  - Mediatek MT8186 is a Chromebook/Tablet type SoC, similar to the
    MT65xx series of phone SoCs, with two Cortex-A76 and six Cortex-A55
    cores.
 
  - TI AM62A is another member of the K3 family with Cortex-A53 cores,
    this one is targetted at Video/Vision processing for industrial
    and automotive applications.
 
  - NXP i.MX8DXL is another chip for this market in the ever-growing
    i.MX8 family, this one again with two Cortex-A35 cores.
 
  - Renesas R-Car H3Ne-1.7G (R8A779MB) and R-Car V3H2 (R8A77980A) are
    minor updates of R8A77951 and R8A77980, respectively.
 
  - Qualcomm IPQ8064-v2.0, IPQ8062 and IPQ8065 are all variants of the
    IPQ8064 chip, with minimally different features.
 
 The AMD Pensando Elba and Apple M1 Ultra SoC support was getting close
 this time, but in the end did not make the cut.
 
 The new machines based on existing SoC support are fairly uneventful:
 
  - Sony Xperia 1 IV is a fairly recent phone based on Qualcomm
    Snapdragon 8 Gen 1.
 
  - Three Samsung phones based on Snapdragon 410: Galaxy E5, E7 and
    Grand Max. These are added for both 32-bit and 64-bit kernels,
    as they originally shipped running 32-bit code.
 
  - Two new servers using AST2600 BMCs: AMD DaytonaX and Ampere
    Mt. Mitchell
 
  - Three new machines based on Rockchips RK3399 and RK3566:
    Anberic RG353P and RG503, Pine64 Pinephone Pro, Open AI Lab
 
  - Multiple NXP i.MX6/i.MX8 based boards: Kontron SL/BL i.MX8MM OSM-S,
    i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board
 
  - Two development boards in the Microchip AT91 family:
    SAMA5D3-EDS and lan966x-pcb8290.
 
  - Minor variants of existing boards using Amlogic, Broadcom, Marvell,
    Rockchips, Freescale Layerscape and Socionext Uniphier SoCs.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmM+jwsACgkQmmx57+YA
 GNnqJg//dgGHQ+dpmxvTHUAx/2WSojAyC7pXPuSoNzAiVDF+95ARM7as+5GtaeU7
 me8fIw/EXQiVeEbxRPVhmGLZy0uXOhyKIQO4o58dd5YSalngI6Q7t8YFaiLCaHoF
 cL7m17nk88sYOzTtSCjfnCPX8KSB7JmElsoWme3PzYhnildEmeBYfiqyqRsGP8KI
 pLOec8GXfwDcnaLvBYT6EO/pAO1lZgp531spVacv4brJtQGFRbm4VuvzyFqE2b7g
 0PxkRMXAE2ohrw6jAIeN2zp8BgFNPlMnuZF2cp330aX5urICk8nCo+GFAM1bK8e6
 0mnKFaXEsRIphxyja8rs9B/pz4Qal2OlC1lGoeQI+QuzYEM5vOroe0EQKw0OLIyQ
 YUslu4CnQgEeM9FVsm1cTYlPPf6geU8Y9vju4VwyDtgD270+5vOqMpTpiC1k4tJI
 JlaZdNhp5+Cdz3W+qssrQfOP9tkQmcWNZxJQJxpy41VR+BrGoCweGZa5NifPYO7m
 AwqisfppTodtF/m6XuHiQg+vDrJXPs/Ydv8vRfTeWA4/EuadewYwBhRpSKEZX7N8
 HuaasPMp9rSoDvuz+kKnKFZfHuTqruwt/qnCduAk5N91z1BJD5wXtvD3zUXEwy1d
 hPcDJl8M3xfgLF1t38r6srNDt/MupafaDifNAqG6QRZMr8PqvnE=
 =xPfV
 -----END PGP SIGNATURE-----

Merge tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
 "Most of the changes fall into one of three categories: adding support
  for additional devices on existing machines, cleaning up issues found
  by the ongoing conversion to machine-readable bindings, and addressing
  minor mistakes in the existing DT data.

  Across SoC vendors, Qualcomm and Freescale stick out as getting the
  most updates, which corresponds to their dominance in the mobile phone
  and embedded industrial markets, respectively.

  There are 636 non-merge changeset in this branch, which is a little
  lower than most times, but more importantly we only add 36 machine
  files, which is about half of what we had the past few releases.

  Eight new SoCs are added, but all of them are variations of already
  supported SoC families, and most of them come with one reference board
  design from the SoC vendor:

   - Mediatek MT8186 is a Chromebook/Tablet type SoC, similar to the
     MT65xx series of phone SoCs, with two Cortex-A76 and six Cortex-A55
     cores.

   - TI AM62A is another member of the K3 family with Cortex-A53 cores,
     this one is targetted at Video/Vision processing for industrial and
     automotive applications.

   - NXP i.MX8DXL is another chip for this market in the ever-growing
     i.MX8 family, this one again with two Cortex-A35 cores.

   - Renesas R-Car H3Ne-1.7G (R8A779MB) and R-Car V3H2 (R8A77980A) are
     minor updates of R8A77951 and R8A77980, respectively.

   - Qualcomm IPQ8064-v2.0, IPQ8062 and IPQ8065 are all variants of the
     IPQ8064 chip, with minimally different features.

  The AMD Pensando Elba and Apple M1 Ultra SoC support was getting close
  this time, but in the end did not make the cut.

  The new machines based on existing SoC support are fairly uneventful:

   - Sony Xperia 1 IV is a fairly recent phone based on Qualcomm
     Snapdragon 8 Gen 1.

   - Three Samsung phones based on Snapdragon 410: Galaxy E5, E7 and
     Grand Max. These are added for both 32-bit and 64-bit kernels, as
     they originally shipped running 32-bit code.

   - Two new servers using AST2600 BMCs: AMD DaytonaX and Ampere Mt.
     Mitchell

   - Three new machines based on Rockchips RK3399 and RK3566: Anberic
     RG353P and RG503, Pine64 Pinephone Pro, Open AI Lab

   - Multiple NXP i.MX6/i.MX8 based boards: Kontron SL/BL i.MX8MM OSM-S,
     i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board

   - Two development boards in the Microchip AT91 family: SAMA5D3-EDS
     and lan966x-pcb8290.

   - Minor variants of existing boards using Amlogic, Broadcom, Marvell,
     Rockchips, Freescale Layerscape and Socionext Uniphier SoCs"

* tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (617 commits)
  Revert "ARM: dts: BCM5301X: Add basic PCI controller properties"
  ARM: dts: s5pv210: correct double "pins" in pinmux node
  ARM: dts: exynos: fix polarity of VBUS GPIO of Origen
  arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2
  arm64: dts: uniphier: Add L2 cache node
  arm64: dts: uniphier: Remove compatible "snps,dw-pcie" from pcie node
  arm64: dts: uniphier: Fix opp-table node name for LD20
  arm64: dts: uniphier: Add USB-device support for PXs3 reference board
  arm64: dts: uniphier: Add ahci controller nodes for PXs3
  arm64: dts: uniphier: Use GIC interrupt definitions
  arm64: dts: uniphier: Rename gpio-hog nodes
  arm64: dts: uniphier: Rename usb-glue node for USB3 to usb-controller
  arm64: dts: uniphier: Rename usb-phy node for USB2 to usb-controller
  arm64: dts: uniphier: Rename pvtctl node to thermal-sensor
  ARM: dts: uniphier: Remove compatible "snps,dw-pcie-ep" from pcie-ep node
  ARM: dts: uniphier: Move interrupt-parent property to each child node in uniphier-support-card
  ARM: dts: uniphier: Add ahci controller nodes for PXs2
  ARM: dts: uniphier: Add ahci controller nodes for Pro4
  ARM: dts: uniphier: Use GIC interrupt definitions
  ARM: dts: uniphier: Rename gpio-hog node
  ...
2022-10-06 11:13:04 -07:00
Linus Torvalds
ff6862c23d ARM: driver updates for 6.1
The drivers branch for 6.1 is a bit larger than for most releases.  Most
 of the changes come from SoC maintainers for the drivers/soc subsystem:
 
  - A new driver for error handling on the NVIDIA Tegra
    'control backbone' bus.
 
  - A new driver for Qualcomm LLCC/DDR bandwidth measurement
 
  - New Rockchip rv1126 and rk3588 power domain drivers
 
  - DT binding updates for memory controllers, older Rockchip
    SoCs, various Mediatek devices, Qualcomm SCM firmware
 
  - Minor updates to Hisilicon LPC bus, the Allwinner SRAM
    driver, the Apple rtkit firmware driver, Tegra firmware
 
  - Minor updates for SoC drivers (Samsung, Mediatek, Renesas,
    Tegra, Qualcomm, Broadcom, NXP, ...)
 
 There are also some separate subsystem with downstream maintainers that
 merge updates this way:
 
  - Various updates and new drivers in the memory controller
    subsystem for Mediatek and Broadcom SoCs
 
  - Small set of changes in preparation to add support for FF-A
    v1.1 specification later, in the Arm FF-A firmware subsystem
 
  - debugfs support in the PSCI firmware subsystem
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmM+j54ACgkQmmx57+YA
 GNkK1Q//fSzCHUPNTrZKJi8mRtp/32Nrpav3eorMZWltKnYbYQyhqH/LCuSZJfe/
 rmGYFxsH6DHEgfHqqyzm6PNC0S4Hle6KiB5xnqXrTgqciPuSg4Fa9OMQgkbiQF6x
 uB2KR+TouQA3MssQh6NW4wy5XAkEqudZCSnEyOTJTmdpepZd/1Eu2Rhn8kx5AYQN
 pzYNGURRoirgYbO9vHMssCcpqyGNdR9SWXcOkROyd65L4LCHQ9JRh4etg7fSXP5j
 abWtTHSOwD8MTXOENOiNw/vyCfBX7wUoJkY2v8OUo3G/20qbOXKWPWi056gyDjVQ
 kJdlnnK4APtiluyBg2alEEZmJOd1iCaVP2j84EO1N4FEek2UGd/lMNOtAOJa+wbh
 eiE6KC5gswe+99//PdY4gB+7dRM3I0gU7FDMl9G5A4DPMEE/0bMKLKk1jR5vyYXl
 6QpN2N0OlU7d16MJiP9RvWf2/xJrcQrLQcy8FKvFVWClJ9wMvBXozKrvXgji9l3I
 ZTW+EViQiyWmj6KbFlDZkYT+Q6YosxaogJUNrZeIaAwmwJj1oTa+M6jYRnFU6uha
 XxG5TrybC9JQ/BpYCTYEqb16LOYALwEm7NWmylWASUCCZclC1u35qmmVEhDyBcS9
 98ePumkAwrcjmW0TZsiYXOCQWNOITuvU/Ku2t/+6Mhg+Xl44zX4=
 =WX9J
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Arnd Bergmann:
 "The drivers branch for 6.1 is a bit larger than for most releases.

  Most of the changes come from SoC maintainers for the drivers/soc
  subsystem:

   - A new driver for error handling on the NVIDIA Tegra 'control
     backbone' bus.

   - A new driver for Qualcomm LLCC/DDR bandwidth measurement

   - New Rockchip rv1126 and rk3588 power domain drivers

   - DT binding updates for memory controllers, older Rockchip SoCs,
     various Mediatek devices, Qualcomm SCM firmware

   - Minor updates to Hisilicon LPC bus, the Allwinner SRAM driver, the
     Apple rtkit firmware driver, Tegra firmware

   - Minor updates for SoC drivers (Samsung, Mediatek, Renesas, Tegra,
     Qualcomm, Broadcom, NXP, ...)

  There are also some separate subsystem with downstream maintainers
  that merge updates this way:

   - Various updates and new drivers in the memory controller subsystem
     for Mediatek and Broadcom SoCs

   - Small set of changes in preparation to add support for FF-A v1.1
     specification later, in the Arm FF-A firmware subsystem

   - debugfs support in the PSCI firmware subsystem"

* tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (149 commits)
  ARM: remove check for CONFIG_DEBUG_LL_SER3
  firmware/psci: Add debugfs support to ease debugging
  firmware/psci: Print a warning if PSCI doesn't accept PC mode
  dt-bindings: memory: snps,dw-umctl2-ddrc: Extend schema with IRQs/resets/clocks props
  dt-bindings: memory: snps,dw-umctl2-ddrc: Replace opencoded numbers with macros
  dt-bindings: memory: snps,dw-umctl2-ddrc: Use more descriptive device name
  dt-bindings: memory: synopsys,ddrc-ecc: Detach Zynq DDRC controller support
  soc: sunxi: sram: Add support for the D1 system control
  soc: sunxi: sram: Export the LDO control register
  soc: sunxi: sram: Save a pointer to the OF match data
  soc: sunxi: sram: Return void from the release function
  soc: apple: rtkit: Add apple_rtkit_poll
  soc: imx: add i.MX93 media blk ctrl driver
  soc: imx: add i.MX93 SRC power domain driver
  soc: imx: imx8m-blk-ctrl: Use genpd_xlate_onecell
  soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets
  soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl
  soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR
  soc: imx: add icc paths for i.MX8MP hsio/hdmi blk ctrl
  soc: imx: add icc paths for i.MX8MP media blk ctrl
  ...
2022-10-06 11:04:57 -07:00
Stephen Boyd
f9efefdba9 Merge branches 'clk-baikal', 'clk-broadcom', 'clk-vc5' and 'clk-versaclock' into clk-next
- Convert Baikal-T1 CCU driver to platform driver
 - Split reset support out of primary Baikal-T1 CCU driver
 - Add some missing clks required for RPiVid Video Decoder on RaspberryPi
 - Mark PLLC critical on bcm2835
 - Support for Renesas VersaClock7 clock generator family

* clk-baikal:
  clk: baikal-t1: Convert to platform device driver
  clk: baikal-t1: Add DDR/PCIe directly controlled resets support
  dt-bindings: clk: baikal-t1: Add DDR/PCIe reset IDs
  clk: baikal-t1: Move reset-controls code into a dedicated module
  clk: baikal-t1: Add SATA internal ref clock buffer
  clk: baikal-t1: Add shared xGMAC ref/ptp clocks internal parent
  clk: baikal-t1: Fix invalid xGMAC PTP clock divider
  clk: vc5: Fix 5P49V6901 outputs disabling when enabling FOD

* clk-broadcom:
  clk: bcm: rpi: Add support for VEC clock
  clk: bcm: rpi: Handle pixel clock in firmware
  clk: bcm: rpi: Add support HEVC clock
  clk: bcm2835: fix bcm2835_clock_rate_from_divisor declaration
  clk: bcm2835: Round UART input clock up
  clk: bcm2835: Make peripheral PLLC critical

* clk-vc5:
  clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975
  dt-bindings: clock: vc5: Add 5P49V6975
  clk: vc5: Use regmap_{set,clear}_bits() where appropriate
  clk: vc5: Check IO access results

* clk-versaclock:
  clk: Renesas versaclock7 ccf device driver
  dt-bindings: Renesas versaclock7 device tree bindings
2022-10-04 10:54:34 -07:00
Stephen Boyd
b7f257ceb3 Merge branches 'clk-fixed-rate', 'clk-spreadtrum', 'clk-pxa' and 'clk-ti' into clk-next
- More devm helpers for fixed rate registration
 - Add Spreadtrum UMS512 SoC clk support
 - Various PXA168 clk driver fixes

* clk-fixed-rate:
  clk: fixed-rate: add devm_clk_hw_register_fixed_rate
  clk: asm9260: use parent index to link the reference clock

* clk-spreadtrum:
  clk: sprd: Add clocks support for UMS512

* clk-pxa:
  clk: pxa: add a check for the return value of kzalloc()
  clk: mmp: pxa168: control shared SDH bits with separate clock
  dt-bindings: marvell,pxa168: add clock ids for SDH AXI clocks
  clk: mmp: pxa168: add clocks for SDH2 and SDH3
  dt-bindings: marvell,pxa168: add clock id for SDH3
  clk: mmp: pxa168: fix GPIO clock enable bits
  clk: mmp: pxa168: add muxes for more peripherals
  clk: mmp: pxa168: fix incorrect parent clocks
  clk: mmp: pxa168: fix const-correctness
  clk: mmp: pxa168: add new clocks for peripherals
  dt-bindings: marvell,pxa168: add clock ids for additional dividers
  clk: mmp: pxa168: fix incorrect dividers
  clk: mmp: pxa168: add additional register defines

* clk-ti:
  clk: davinci: cfgchip: Use dev_err_probe() helper
  clk: davinci: pll: fix spelling typo in comment
  MAINTAINERS: add header file to TI DAVINCI SERIES CLOCK DRIVER
2022-10-04 10:54:14 -07:00
Stephen Boyd
26bebbfed5 Merge branches 'clk-rockchip', 'clk-renesas', 'clk-microchip', 'clk-allwinner' and 'clk-imx' into clk-next
* clk-rockchip:
  dt-bindings: clock: rockchip: change SPDX-License-Identifier
  dt-bindings: clock: convert rockchip,rk3128-cru.txt to YAML
  clk: rockchip: Add clock controller support for RV1126 SoC
  dt-bindings: clock: rockchip: Document RV1126 CRU
  clk: rockchip: Add dt-binding header for RV1126
  clk: rockchip: Add MUXTBL variant

* clk-renesas:
  clk: renesas: r8a779g0: Add EtherAVB clocks
  clk: renesas: r8a779g0: Add PFC/GPIO clocks
  clk: renesas: r8a779g0: Add I2C clocks
  clk: renesas: r8a779g0: Add watchdog clock
  dt-bindings: clock: renesas,rzg2l: Document RZ/Five SoC
  clk: renesas: r8a779f0: Add MSIOF clocks
  clk: renesas: r9a09g011: Add IIC clock and reset entries
  clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info
  clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks
  clk: renesas: r8a779f0: Add CMT clocks
  clk: renesas: r8a779f0: Add SDH0 clock

* clk-microchip:
  clk: at91: sama5d2: Add Generic Clocks for UART/USART
  clk: microchip: add PolarFire SoC fabric clock support
  dt-bindings: clk: add PolarFire SoC fabric clock ids
  dt-bindings: clk: document PolarFire SoC fabric clocks
  dt-bindings: clk: rename mpfs-clkcfg binding
  clk: microchip: mpfs: update module authorship & licencing
  clk: microchip: mpfs: convert periph_clk to clk_gate
  clk: microchip: mpfs: convert cfg_clk to clk_divider
  clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo()
  clk: microchip: mpfs: simplify control reg access
  clk: microchip: mpfs: move id & offset out of clock structs
  clk: microchip: mpfs: add MSS pll's set & round rate
  MAINTAINERS: add polarfire soc reset controller
  reset: add polarfire soc reset support
  clk: microchip: mpfs: add reset controller
  dt-bindings: clk: microchip: mpfs: add reset controller support
  clk: microchip: mpfs: make the rtc's ahb clock critical
  clk: microchip: mpfs: fix clk_cfg array bounds violation

* clk-allwinner:
  clk: sunxi-ng: ccu-sun9i-a80-usb: Use dev_err_probe() helper
  clk: sunxi-ng: ccu-sun9i-a80-de: Use dev_err_probe() helper
  clk: sunxi-ng: sun8i-de2: Use dev_err_probe() helper
  clk: sunxi-ng: d1: Limit PLL rates to stable ranges

* clk-imx:
  clk: imx: scu: fix memleak on platform_device_add() fails
  clk: imx93: add SAI IPG clk
  clk: imx93: add MU1/2 clock
  clk: imx93: switch to use new clk gate API
  clk: imx: add i.MX93 clk gate
  clk: imx: clk-composite-93: check white_list
  clk: imx: clk-composite-93: check slice busy
  dt-bindings: clock: imx93-clock: add more MU/SAI clocks
  dt-bindings: clock: imx8mm: don't use multiple blank lines
  clk: imx8mp: tune the order of enet_qos_root_clk
2022-10-04 10:54:02 -07:00
Stephen Boyd
a64b79c01c Merge branches 'clk-samsung', 'clk-mtk', 'clk-rm', 'clk-ast' and 'clk-qcom' into clk-next
- Add resets for MediaTek MT8195 PCIe and USB
 - Remove DaVinci DM644x and DM646x clk driver support

* clk-samsung:
  clk: samsung: MAINTAINERS: add Krzysztof Kozlowski
  clk: samsung: exynos850: Implement CMU_MFCMSCL domain
  clk: samsung: exynos850: Implement CMU_IS domain
  clk: samsung: exynos850: Implement CMU_AUD domain
  clk: samsung: exynos850: Style fixes
  clk: samsung: exynosautov9: add fsys1 clock support
  clk: samsung: exynosautov9: add fsys0 clock support
  clk: samsung: exynosautov9: correct register offsets of peric0/c1
  clk: samsung: exynosautov9: add missing gate clks for peric0/c1
  dt-bindings: clock: exynos850: Add Exynos850 CMU_MFCMSCL
  dt-bindings: clock: exynos850: Add Exynos850 CMU_IS
  dt-bindings: clock: exynos850: Add Exynos850 CMU_AUD
  dt-bindings: clock: exynosautov9: add schema for cmu_fsys0/1
  dt-bindings: clock: exynosautov9: add fsys1 clock definitions
  dt-bindings: clock: exynosautov9: add fys0 clock definitions
  clk: samsung: exynos7885: Add TREX clocks
  clk: samsung: exynos7885: Implement CMU_FSYS domain
  dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1
  clk: samsung: exynos-clkout: Use of_device_get_match_data()

* clk-mtk: (42 commits)
  clk: mediatek: add driver for MT8365 SoC
  clk: mediatek: Export required common code symbols
  clk: mediatek: Provide mtk_devm_alloc_clk_data
  dt-bindings: clock: mediatek: add bindings for MT8365 SoC
  clk: mediatek: mt8192: deduplicate parent clock lists
  clk: mediatek: Migrate remaining clk_unregister_*() to clk_hw_unregister_*()
  clk: mediatek: fix unregister function in mtk_clk_register_dividers cleanup
  clk: mediatek: clk-mt8192: Add clock mux notifier for mfg_pll_sel
  clk: mediatek: clk-mt8192-mfg: Propagate rate changes to parent
  clk: mediatek: clk-mt8195-topckgen: Drop univplls from mfg mux parents
  clk: mediatek: clk-mt8195-topckgen: Add GPU clock mux notifier
  clk: mediatek: clk-mt8195-topckgen: Register mfg_ck_fast_ref as generic mux
  clk: mediatek: clk-mt8195-mfg: Reparent mfg_bg3d and propagate rate changes
  clk: mediatek: mt8183: Add clk mux notifier for MFG mux
  clk: mediatek: mux: add clk notifier functions
  clk: mediatek: mt8183: mfgcfg: Propagate rate changes to parent
  clk: mediatek: Use mtk_clk_register_gates_with_dev in simple probe
  clk: mediatek: gate: Export mtk_clk_register_gates_with_dev
  clk: mediatek: add VDOSYS1 clock
  dt-bindings: clk: mediatek: Add MT8195 DPI clocks
  ...

* clk-rm:
  clk: davinci: remove PLL and PSC clocks for DaVinci DM644x and DM646x

* clk-ast:
  clk: ast2600: BCLK comes from EPLL

* clk-qcom: (97 commits)
  clk: qcom: gcc-sm6375: Ensure unsigned long type
  clk: qcom: gcc-sm6375: Remove unused variables
  clk: qcom: kpss-xcc: convert to parent data API
  clk: introduce (devm_)hw_register_mux_parent_data_table API
  clk: qcom: gcc-msm8939: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-msm8939: use parent_hws where possible
  dt-bindings: clock: move qcom,gcc-msm8939 to qcom,gcc-msm8916.yaml
  clk: qcom: gcc-sm6350: Update the .pwrsts for usb gdscs
  clk: qcom: gcc-sc8280xp: use retention for USB power domains
  clk: qcom: gdsc: add missing error handling
  dt-bindings: clocks: qcom,gcc-sc8280xp: Fix typos
  clk: qcom: Add global clock controller driver for SM6375
  dt-bindings: clock: add SM6375 QCOM global clock bindings
  clk: qcom: alpha: Add support for programming the PLL_FSM_LEGACY_MODE bit
  clk: qcom: gcc-sc7280: Update the .pwrsts for usb gdscs
  clk: qcom: gcc-sc7180: Update the .pwrsts for usb gdsc
  clk: qcom: gdsc: Fix the handling of PWRSTS_RET support
  clk: qcom: Add SC8280XP GPU clock controller
  dt-bindings: clock: Add Qualcomm SC8280XP GPU binding
  clk: qcom: smd: Add SM6375 clocks
  ...
2022-10-04 10:53:41 -07:00
Jianlong Huang
ba99b756da pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100"
Add the SoC name to make it more clear. Also the next generation StarFive
SoCs will use "pinctrl-starfive" as the core of StarFive pinctrl driver.
No functional change.

Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@linux.starfivetech.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220930061404.5418-1-hal.feng@linux.starfivetech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-04 10:47:48 +02:00
Fabien Parent
c61978175a dt-bindings: clock: mediatek: add bindings for MT8365 SoC
Add the clock bindings for the MediaTek MT8365 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Link: https://lore.kernel.org/r/20220822152652.3499972-2-msp@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 15:07:43 -07:00
Serge Semin
c0cd3b1790 dt-bindings: clk: baikal-t1: Add DDR/PCIe reset IDs
Aside with a set of the trigger-like resets Baikal-T1 CCU provides
additional directly controlled reset signals for the DDR and PCIe
controllers. As a preparation before adding these resets support to the
kernel let's extent the Baikal-T1 CCU IDs list with the new IDs, which
will be used to access the corresponding reset controls.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220929225402.9696-7-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:19:37 -07:00
Doug Brown
238e73edce dt-bindings: marvell,pxa168: add clock ids for SDH AXI clocks
These are clocks shared by SDH0/1 and SDH2/3, respectively.

Signed-off-by: Doug Brown <doug@schmorgal.com>
Link: https://lore.kernel.org/r/20220612192937.162952-12-doug@schmorgal.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 13:34:07 -07:00
Doug Brown
ca41820b9d dt-bindings: marvell,pxa168: add clock id for SDH3
There are four SDHC peripherals on the PXA168, but only three of them
were present in the DT bindings. This commit adds the fourth.

Signed-off-by: Doug Brown <doug@schmorgal.com>
Link: https://lore.kernel.org/r/20220612192937.162952-10-doug@schmorgal.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 13:34:06 -07:00
Doug Brown
260d2f347b dt-bindings: marvell,pxa168: add clock ids for additional dividers
This adds a few new clocks divided from PLL1 and CLK32 that are
potentially used by a few peripherals with muxed clocks.

Signed-off-by: Doug Brown <doug@schmorgal.com>
Link: https://lore.kernel.org/r/20220612192937.162952-4-doug@schmorgal.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 13:34:06 -07:00
ChiYuan Huang
7f915eef50 dt-bindings: mfd: Add MediaTek MT6370
Add MediaTek MT6370 binding documentation.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: ChiYuan Huang <cy_huang@richtek.com>
Signed-off-by: ChiaEn Wu <chiaen_wu@richtek.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20220805070610.3516-7-peterwu.pub@gmail.com
2022-09-28 16:09:50 +01:00
Konrad Dybcio
43398afc0b dt-bindings: clock: add SM6375 QCOM global clock bindings
Add device tree bindings for global clock controller for SM6375 SoCs.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220921001303.56151-2-konrad.dybcio@somainline.org
2022-09-27 22:25:57 -05:00
Bjorn Andersson
9f60eb3ec0 dt-bindings: clock: Add Qualcomm SC8280XP GPU binding
Add compatible for the Qualcomm SC8280XP GPU.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220926173025.4747-2-quic_bjorande@quicinc.com
2022-09-27 12:07:30 -05:00
Konrad Dybcio
65cfaf4efa dt-bindings: clock: qcom: rpmcc: Add BIMC_FREQ_LOG
Add the missing definition for the aforementioned clock.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220921004458.151842-2-konrad.dybcio@somainline.org
2022-09-27 12:07:17 -05:00
Dmitry Baryshkov
a7edd29163 dt-bindings: clock: qcom: add bindings for dispcc on SM8450
Add device tree bindings for the display clock controller on Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220908222850.3552050-2-dmitry.baryshkov@linaro.org
2022-09-26 22:17:14 -05:00
Adam Skladowski
38557c6fc0 dt-bindings: clock: add QCOM SM6115 display clock bindings
Add device tree bindings for display clock controller for
Qualcomm Technology Inc's SM6115 SoC.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
[bjorn: Minor fix of binding description]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220911164635.182973-2-a39.skl@gmail.com
2022-09-26 22:17:13 -05:00
Christian Marangi
d7081998cc dt-bindings: clock: add pcm reset for ipq806x lcc
Add pcm reset define for ipq806x lcc.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220724182329.9891-1-ansuelsmth@gmail.com
2022-09-26 11:18:56 -05:00
AngeloGioacchino Del Regno
4e5f8465c6 dt-bindings: mediatek: Add bindings for MT6795 M4U
Add bindings for the MediaTek Helio X10 (MT6795) IOMMU/M4U.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20220913151148.412312-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-09-26 13:33:02 +02:00
Pablo Sun
879b752b97 dt-bindings: clk: mediatek: Add MT8195 DPI clocks
Expand dt-bindings slot for VDOSYS1 of MT8195.
This clock is required by the DPI1 hardware
and is a downstream of the HDMI pixel clock.

Signed-off-by: Pablo Sun <pablo.sun@mediatek.com>
Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220919-v1-1-4844816c9808@baylibre.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
2022-09-26 13:26:19 +08:00
AngeloGioacchino Del Regno
f098c088f9 dt-bindings: reset: Add bindings for MT6795 Helio X10 reset controllers
Add the reset controller bindings for MT6795.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220921091455.41327-4-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
2022-09-26 11:13:09 +08:00
AngeloGioacchino Del Regno
32ccd1ab09 dt-bindings: clock: Add MediaTek Helio X10 MT6795 clock bindings
Add the bindings for MT6795's clock controller.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220921091455.41327-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
2022-09-26 11:13:09 +08:00
Arnd Bergmann
37d49c249c Qualcomm driver updates for 6.1
The icc-bwmon driver is expected to support measuring LLCC/DDR bandwidth
 on SDM845 and SC7280.
 
 The LLCC driver is extended to provide per-platform register mappings to
 the LLCC EDAC driver. The QMI encoder/decoder is updated to allow the
 passed qmi_elem_info to be const.
 
 Support for SDM845 is added to the sleep stats driver. Power-domains for
 the SM6375 platform is added to RPMPD and the platform is added to
 socinfo, together with the PM6125 pmic id.
 
 A couple of of_node reference issues are corrected in the smem state and
 smsm drivers.
 
 The Qualcomm SCM driver binding is converted to YAML.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmMrMtQVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Foy8P/3xNqiQAVdWD/49rycmoNg02Jg6A
 L9WM0GI1TMKCJV+tr2QFFknFOzTxr4VhIefddUWWJYGnzN89sHqYbWjBbnPaHVv/
 Im7opHZ1Aq5hPct5TvlXrMjNDhe3+2y44qv4+H9q8Kk7nOVUQwOfE3J7VE71B1tO
 gLHEdlafSH+M62PJsiDQRIgtU2jfFBBpOC+J4OazvRsYQboI29U5Aro08Yqy/KFq
 opEMJlnetzPl1zI+7Tu56V8gVWnBIedQJJCT/EZEWMJ8Lf8XMbuTaTrW+ioSnjrT
 SyLgAzvLCI8yMOaLSssdpk6pgtsMleqRI/SHlvUX2+sUlxK3Gycw9rxsU6RJ80gk
 SRjYXEwr78w4QGcC/eY8Lg+d0xi/A1MOMGLYoQGyKzHtyi+q1x3yQQ5HW6YS0qlO
 J6a9zSL2PNfLyXv7DE1PblKUZtifV/8U+gYviwe09Rj7mkZWzlOC946uUp4B9VEE
 R96qoLZtyvgAzBCnpWIJ0IwYSRdqVNYpDKKb4CGQ9qAdyHZIg+DL9i6vozwWsyZk
 gRTXo4K9MuqHya+vZYOH4zyi8eIHgqdSNSbo/4893E3GcAtPBw1YRdCPWNPITdQg
 bcTfg/7bFymeHN3arbkXjclXp1O12JA+umsPnRnWtmmoCPNqh8wki4v32dqcpyQq
 FvkQpszZbeHQGxq4
 =R/5I
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMt02wACgkQmmx57+YA
 GNlEyw/+Je0NXWJdKYHw9+nkc5GJCrB7Sytz9xmavB/1JMTDyjMcRgbmXg0gl1ZF
 6gYACVcv1GgIFFrDrjEHm81qVunjr+z3oyqY/Tr4XDk2AvFJicX/kltSOxWozHrV
 TYGd3HtneGMA6jhT7T76b849N4p0S9gJu62+tQiD2wa31oFAnfhrf790QJZahHZf
 /VPGiNiOhINMJJk+rUal8R4A8CWXdx9GTTulhcSD3g9HPTWJuq+SJ6SSCuNmOLPO
 4KZeWytBmihSWIjWsyuKUwSmK1ceNH/Vt6QhenPUZynZ4ojuJOUeOTnkf+mR6M2A
 ysetlsi8GDiQSWW/hb/+b733YFOTVVFbigEjt6B40HKLAXlgiAqwCVzWFQ61Eg48
 UNnx26RUlT3PGw0oF1pSOvl8a/0DDKhzteyQSJQ/gR59SKLjhwEB27Ml1C2B+VVM
 FHn0WnhnAvC6qPBrRh6HUVtoqblRsaT6UJ+qwr6TDhmiDMTmQP49dMbA9Me+lphb
 ACbhqk+yUoaYhq6oK2pneqtgP0A4QuFSZAzGE6tXryILYeme+LOpL2ff2NNAsY5C
 6jX+6oyAZVSmJKs0itQyTyQqmJ/5bFp8ob5dpwNeFMLgRvohpDh/EChjkTV7N0EU
 NK12FkJIvDptBFMOClVx5PurCLPwG4cI2/qIZ8xHuEdzrpELYgI=
 =GSE8
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for 6.1

The icc-bwmon driver is expected to support measuring LLCC/DDR bandwidth
on SDM845 and SC7280.

The LLCC driver is extended to provide per-platform register mappings to
the LLCC EDAC driver. The QMI encoder/decoder is updated to allow the
passed qmi_elem_info to be const.

Support for SDM845 is added to the sleep stats driver. Power-domains for
the SM6375 platform is added to RPMPD and the platform is added to
socinfo, together with the PM6125 pmic id.

A couple of of_node reference issues are corrected in the smem state and
smsm drivers.

The Qualcomm SCM driver binding is converted to YAML.

* tag 'qcom-drivers-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (29 commits)
  soc: qcom: rpmpd: Add SM6375 support
  dt-bindings: power: rpmpd: Add SM6375 power domains
  firmware: qcom: scm: remove unused __qcom_scm_init declaration
  dt-bindings: power: qcom,rpmpd: drop non-working codeaurora.org emails
  soc: qcom: icc-bwmon: force clear counter/irq registers
  soc: qcom: icc-bwmon: add support for sc7280 LLCC BWMON
  dt-bindings: interconnect: qcom,msm8998-bwmon: Add support for sc7280 BWMONs
  soc: qcom: llcc: Pass LLCC version based register offsets to EDAC driver
  soc: qcom: llcc: Rename reg_offset structs to reflect LLCC version
  soc: qcom: qmi: use const for struct qmi_elem_info
  soc: qcom: icc-bwmon: remove redundant ret variable
  dt-bindings: soc: qcom: stats: Document SDM845 compatible
  soc: qcom: stats: Add SDM845 stats config and compatible
  dt-bindings: firmware: document Qualcomm SM6115 SCM
  soc: qcom: Make QCOM_RPMPD depend on OF
  dt-bindings: firmware: convert Qualcomm SCM binding to the yaml
  soc: qcom: socinfo: Add PM6125 ID
  soc: qcom: socinfo: Add an ID for SM6375
  soc: qcom: smem_state: Add refcounting for the 'state->of_node'
  soc: qcom: smsm: Fix refcount leak bugs in qcom_smsm_probe()
  ...

Link: https://lore.kernel.org/r/20220921155753.1316308-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-23 17:40:27 +02:00
Arnd Bergmann
b97e1e2faa i.MX drivers change for 6.1:
- Update i.MX8MP blk-ctrl driver to handle PCIe PHY reset bit.
 - Add interconnect support into i.MX8MP blk-ctrl driver, so that i.MX8MP
   NoC can be set up properly after related power domain is up.
 - Add blk-ctrl support for i.MX8MP HDMI HDCP/HRV and VPU block.
 - Add i.MX93 SRC power domain and MEDIA blk-ctrl driver.
 - Update imx8m-blk-ctrl driver to use genpd_xlate_onecell.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmMlib0UHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM4SPAf7BOfD4bViP+/hxhucfoEYTPShXiBz
 Qrk63cCQlZB72L90AKx+x7TJEdikfTGQwt5xWN1E3d3EepPn4sPuS4aKierHNQZs
 V29ooGSbUdfpYqF+NbyOcIS8qnPJPTlN+0sh6+6eYua8LpR/GQQXH4Zqyj7FiGRE
 p5wPewJVr7lxhWyhmx1f4HUzptEYaNPjYCk3kjslZeyp8gupoX6JdB8zKfJbL+Ho
 KRRuB+dI8bI7HdUJSoz4L6/eshgsUc2WCcYxxhlE2qMrIopX+QbuKvx0ah8bm+lL
 Hj5VrhP5PvywA4gKk/10ESs9YFtC6qQqAf0YEg4bzTzM0LO6CVLC9KpmBQ==
 =DLF5
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMt0fwACgkQmmx57+YA
 GNnWHQ//SdvIYsj1/U3bZVD9YzzaHablNDz8sKoOnURLRvX9DQcFDpQuLT5dlRAK
 0Z/Hc3ibGpSCTTPjtpGXvLzvjSmbkPf3F4eA0l+tlEc2mNrKpSXXCcktosqDKtRP
 IbEw82ImD+HPa0u6oz3nCR2fV0AZk+xYftEWLDNTLDShFSKUjIJTiQ9luykGXtUd
 980abC9fC4LvcI38pYhuOtS++YBbEwoIzY+GyQbZKXx/IcS1gSk+iANsO8ABvdDt
 6Hmx3ox+6lQrGwlTknd/TkuseWOl1CqkLSwltsAP+0Ijz7uR7PGGuCHReP9q4n1H
 A8QWZ55qskzSxwmytBsgBTlZUfy+OGqOQ387RiOh96jJFX+ANnmg4/c25PX7Vvlf
 i50b9BTLizkL+J82ryqf7tNLtvXg2XW89ajJ0471Vl4OFmsyg4IGjVBT5kNuBF+P
 7DcW6HB2ZtFve0CwIr8o8pHW3of1k6f04z2Tl+Ls73cGcD1S9izuXzBdBSOVixyR
 GxFVjRDbEyta+2yQxzHLIoXx8eYGCxZm1JCiEUaxD44smF82386HfO65pCS2jXZh
 qJg5uCYUNZY/Y6J3bXEZSobxO2jIM5rXpC5NScDf1hAOIMeB7BuPLIeZGfRbcC3l
 OUR3vMG0YNo/MM6VOHE8DFcH8tnEWn9ks4NsUJ1A0DhsKXl41yg=
 =vQBq
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers change for 6.1:

- Update i.MX8MP blk-ctrl driver to handle PCIe PHY reset bit.
- Add interconnect support into i.MX8MP blk-ctrl driver, so that i.MX8MP
  NoC can be set up properly after related power domain is up.
- Add blk-ctrl support for i.MX8MP HDMI HDCP/HRV and VPU block.
- Add i.MX93 SRC power domain and MEDIA blk-ctrl driver.
- Update imx8m-blk-ctrl driver to use genpd_xlate_onecell.

* tag 'imx-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (26 commits)
  soc: imx: add i.MX93 media blk ctrl driver
  soc: imx: add i.MX93 SRC power domain driver
  soc: imx: imx8m-blk-ctrl: Use genpd_xlate_onecell
  soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets
  soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl
  soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR
  soc: imx: add icc paths for i.MX8MP hsio/hdmi blk ctrl
  soc: imx: add icc paths for i.MX8MP media blk ctrl
  dt-bindings: arm: imx: update fsl.yaml for imx8dxl
  dt-bindings: firmware: add missing resource IDs for imx8dxl
  dt-bindings: arm: Add i.MX8M Mini Gateworks GW7904 board
  dt-bindings: soc: add i.MX93 mediamix blk ctrl
  dt-bindings: soc: add i.MX93 SRC
  dt-bindings: mfd: syscon: Add i.MX93 blk ctrl system registers
  dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier
  dt-bindings: arm: fsl: Add Kontron BL i.MX8MM OSM-S board
  dt-bindings: arm: fsl: Rename compatibles for Kontron i.MX8MM SoM/board
  dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl
  dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk ctrl
  dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrl
  ...

Link: https://lore.kernel.org/r/20220918092806.2152700-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-23 17:34:20 +02:00
Arnd Bergmann
6972b275fe Qualcomm ARM64 DTS updates for 6.1
Support for Samsung Galaxy E5, E7 and Grand Max is added, with support
 for both 32-bit and 64-bit variants. The Samsung Galaxy S4 Mini Value
 Edition gains magnetometer support.
 
 MSM8996-based Xiaomi devices gains descriptions of the LPG-based LEDs.
 
 On SA8295P ADP problems arising from regulators being switched into
 low-power mode is worked around by removing this ability, for now.
 
 The onboard USB Hub on SC7180 Trogdor is finally described and a few ADC
 related updates are introduced.
 
 On SC7280 support for the CPU and LLC bwmon instances are introduced.
 Soundwire, audio codecs and sound introduced for a variety of boards.
 Using required-opps the USB controllers votes for a minimum corner on
 VDD_CX.
 The onboard USB Hub Herobrine is described. A new board, the Google
 Evoker is added, as is another revision of Herobrine Villager.
 
 On SC8280XP the USB controllers are marked as wakeup-sources, to keep
 them powered during suspend. The CRD has HID devices marked as
 wakeup-sources to enable resuming the system. In addition to these
 changes the alternative touchpad is introduced on the Lenovo ThinkPad
 X13s.
 
 SDM845 gains RPMh stats support and the LLCC BWMON is added. For SM6350
 interconnect providers and GPI DMA is introduced. A description of the
 PM7280b PMIC is added to Fairphone FP4 on SM7225.
 
 With the multi-MSI support added in the PCIe controller, SM8250 gets all
 its MSI interrupts added.
 
 UFS ICE and the second SDHCI controller is introduced on SM8450. Support
 for the Sony Xperia 1 IV is introduced.
 
 Throughout a variety of platforms the TCSR mutex syscon is replaced with
 the MMIO-based binding. TCSR nodes gained proper compatibles and halt
 syscon nodes are split out from the mutex ranges.
 
 A range of fixes to align with DT bindings are introduced. Among these
 are the changes to the follow the TLMM binding and suffix pinctrl states
 with -state and subnodes thereof with -pins, another is a number of
 changes transitioning to use -gpios and introduction of proper parent
 clock references in various clock providers.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmMrosIVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FCkkP/iuTNOUwcpz03IijhJJILfUF1aSS
 o7UAadfYj4dKqvc9BGdq+A9OSDqaMmceXwbPWYZQONpHrSNVMIUxUevtrUAxOxYj
 fEf4VLRk2AJ2GqtRasqQL7WOESPS1bD7rRyNg5nFD3urTTqXjkgC9XoYQk9uufPx
 hLdFeEB672pi0HWiQIgk5iL36O6OEEeK6rl0/PF1y8N8GkYVln1XD7SKNs2tsDcM
 0unclymdckPbhxq1tuuRWXhCUZlOWRUP8+89L14M+HT3RrtudnJ8v2jtgygtziPS
 TZ+wJa2CMcIZCgQ7kBcORSiMquIHV4bGcq5UNAX0juU2CFIFIQu+VzStT80+6SsU
 ATkJSl4GKw/HuJS4W0JLk73mLIhtEhqIfR7qFfiDjhGphbgRkTEdMtqG5WIKzf7D
 3ourD0qs3IC+XmtkjnTykJZam9BYNFt99QBHdsjZq37rMvll7BKtEPdrKIKmzzzY
 hqOv27Bt4cp2xgZ6Hoot/oSfCOSQffcHPuDzkrfsinM0ZEeDLpMW7ynIQDvw08Fs
 2OMbhbP3c/onhoaEuLp9eLt+ghV58PkNvKPcWBma5oNCDvi84CRDU8HOGLbnmeDv
 4haXe/Ib3OoT4+raCLYrY5fI3lf2CG9cLQVHs02apilKUQ7HiMLeH3L6vNpH9v0g
 BXpu2rG+gbAgJzgH
 =XT9N
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtxHsACgkQmmx57+YA
 GNnDbw/7BIQIOXFkx6xb5dJbfxAs9EGlPngcgUGWHMUZ166Q+e+nGCUMiDtekLrC
 E07g05dPO2oaS2XtcHYVQmaR+Sq9SQYb1nFE6P1kvHmz0SxueR8fDpUheFn4IunP
 OCcyPoKGar72HcFh/v2r9SdJgVAEQ6bYvNzwJN2qqMQRW5fMHUBlJtcMumGNyg/0
 MNzoSvmx/s2sL6yf6xVt7kqerl/7szFF13PnbWlUEnDhbZUHoOh5VYt2Xxpp9rjX
 M09iM/mOkyms7ngcU9m+izYAg+aVeDBSynoyhqQUlrDwbFu83TQ+jFSp0MkJrSiQ
 RHJSBNnXx9wmJuox/A2ZBUmMcjqaizz4ciXXVu5t7xP8wFKQZRfblCX1+B2G0qSu
 1rqxBqGrVEzRanoZjpMCSrObSjD/t1wIpTN5hqvpEoR3nXWRFzLOIQjXyIkKVZ4p
 ePc8Et1yYlQqv7S3GS12jLy8s/sKxOk0sTAzWuTavT+QrgJVDZScaSU9t9hhk4tC
 HRlwHBag0nallJcz+gnmbG56f0zcVsvOHnMV+OBFA4wHInlVS+A+Rt0TouqjEiAo
 IlVCXlO24jgsZi/x6ZwVboIBYzPLsaOmsr5Tg9Dua494/U+Im23qCFBvRGHiEoBe
 tAyCAsYSLNsOhgjxC/tFVOQJOmlw+moerBpZNcu2XMG/aXLHwMA=
 =ZHbe
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DTS updates for 6.1

Support for Samsung Galaxy E5, E7 and Grand Max is added, with support
for both 32-bit and 64-bit variants. The Samsung Galaxy S4 Mini Value
Edition gains magnetometer support.

MSM8996-based Xiaomi devices gains descriptions of the LPG-based LEDs.

On SA8295P ADP problems arising from regulators being switched into
low-power mode is worked around by removing this ability, for now.

The onboard USB Hub on SC7180 Trogdor is finally described and a few ADC
related updates are introduced.

On SC7280 support for the CPU and LLC bwmon instances are introduced.
Soundwire, audio codecs and sound introduced for a variety of boards.
Using required-opps the USB controllers votes for a minimum corner on
VDD_CX.
The onboard USB Hub Herobrine is described. A new board, the Google
Evoker is added, as is another revision of Herobrine Villager.

On SC8280XP the USB controllers are marked as wakeup-sources, to keep
them powered during suspend. The CRD has HID devices marked as
wakeup-sources to enable resuming the system. In addition to these
changes the alternative touchpad is introduced on the Lenovo ThinkPad
X13s.

SDM845 gains RPMh stats support and the LLCC BWMON is added. For SM6350
interconnect providers and GPI DMA is introduced. A description of the
PM7280b PMIC is added to Fairphone FP4 on SM7225.

With the multi-MSI support added in the PCIe controller, SM8250 gets all
its MSI interrupts added.

UFS ICE and the second SDHCI controller is introduced on SM8450. Support
for the Sony Xperia 1 IV is introduced.

Throughout a variety of platforms the TCSR mutex syscon is replaced with
the MMIO-based binding. TCSR nodes gained proper compatibles and halt
syscon nodes are split out from the mutex ranges.

A range of fixes to align with DT bindings are introduced. Among these
are the changes to the follow the TLMM binding and suffix pinctrl states
with -state and subnodes thereof with -pins, another is a number of
changes transitioning to use -gpios and introduction of proper parent
clock references in various clock providers.

* tag 'qcom-arm64-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (136 commits)
  arm64: dts: qcom: sc7280: Add required-opps for USB
  arm64: dts: qcom: sm8450: fix UFS PHY serdes size
  arm64: dts: qcom: ipq8074: fix PCIe PHY serdes size
  arm64: dts: qcom: sa8295p-adp: add missing gpio-ranges in PMIC GPIOs
  arm64: dts: qcom: sa8295p-adp: add fallback compatible to PMIC GPIOs
  arm64: dts: qcom: msm8996-xiaomi: align PMIC GPIO pin configuration with DT schema
  arm64: dts: qcom: msm8994-msft-lumia-octagon: align resin node name with bindings
  arm64: dts: qcom: pmi8994: add missing MPP compatible fallback
  dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
  arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocks
  arm64: dts: qcom: sc7280-villager: Adjust LTE SKUs
  dt-bindings: arm: qcom: Adjust LTE SKUs for sc7280-villager
  arm64: dts: qcom: sc7280-herobrine: Add nodes for onboard USB hub
  arm64: dts: qcom: sc7180-trogdor: Add nodes for onboard USB hub
  arm64: dts: qcom: align SDHCI reg-names with DT schema
  arm64: dts: qcom: sm8250: provide additional MSI interrupts
  arm64: dts: qcom: msm8996: add #clock-cells and XO clock to the HDMI PHY node
  arm64: dts: qcom: Use WCD9335 DT bindings
  arm64: dts: qcom: msm8994: switch TCSR mutex to MMIO
  arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIO
  ...

Link: https://lore.kernel.org/r/20220921234854.1343238-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-23 16:36:43 +02:00
Arnd Bergmann
aa577af3de TI K3 device tree updates for v6.1
New Features:
 AM62A:
 * Basic support for AM62A SoC and SK Board
 AM62:
 * EPWM support
 AM64:
 * GPMC, LED, Crypto accelerator support
 
 Fixes:
 J7200 pinmux node update
 Fixes for Crypto and RNG accelerators on AM65, J721e, J7200
 
 Cleanups:
 Reorder SoC compatible and pinmux macros alphabetically
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEEyRC2zAhGcGjrhiNExEYeRXyRFuMFAmMq5n4QHHZpZ25lc2hy
 QHRpLmNvbQAKCRDERh5FfJEW44z/CACMrwIDvNby4wK1TGpv2jtjW2UD/6Bo23ZL
 HYRy2kkNBa5hMbhGZGh5+GznOXyoZJD07OmuYLq8wdxIvo19QHOjAK7YLuHGvpel
 u8o1IPXQEDylgbpcm06vCF/C73UGb8ozBcPP56v8wYhq/AeD7iAd9VtkxzBwdmpu
 hG/X5r1q0LJbxDLrNaI8jjsOjrc2ep5LIbnqzibKZR1+JX1E2LSezDVxjOEtG3aC
 Sl9kgA8mr96nB2WTcAV1oDuaiI9mlH6HEBaofTdFRU4gA9hu9Z7lWBBF3G+GKnTE
 bJIgSxQpzAr1TxqKqIRMzWa9/Xrg6O+M9MBs6RMb0oDMvmb4+wTg
 =fi01
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtw0EACgkQmmx57+YA
 GNnDCw/8DcqGvp/NJjhmYgfmBL94OHCL6NseST0QRdqBxhQbfskc2rfMf+lxbNR8
 o/Ic5YRwo5z54z34dpw3bi+N0dUYE6V80RJBPOSTlX/Dk3thb1/MyxZqTALhduRU
 BPu/fwZFE34uOi6xy6e8cfZqXtnDX6dHvtw+XCPPJ8Tb34SAmAvkQ/LCLrfS6wjw
 xIGIIVwCiIAHK4FLSd5rvnyeVA0CfKEeDJ405Wob7cKz/aUAwUiwbRPszP9+62JC
 XHvvxZoeFgoG4UhN57RN7E4tkmBkKNYMzNGLd6bKD45YJk4MwzyW560nMcrJ25IJ
 3GimiaFXKG8NRX2Ai0cWyuAp4vOFkygQ2xpMVMjfr0gBkSbV8vuGNUK5yXhkT2V3
 JBz5CA3lo3Di3zTk8qXRRXBDeYIcTPxSYiCpnhuMhdCn282y0VL3h1padgR7W8eg
 F9ikkrkh6T5IAq5yzXHO+FRBaZRmecrHbbsS2H7vnzGLWHCG5ynle/5BeOTVXOeF
 2X7IcPFgzBGFLe02THIooFkeBQ3X0fIn/uJ4VxqwUshuc8BLv5ys6JLFMoHY99Z/
 PI4SJ5tdAo3pacsW5RfvMHZ3jFJwRo2i/kmy95vyeEGm0By1js8eziKi1ehsD195
 tNQSd+giXRBtDGAr/KrRWfwH+MxNNj+g6aWt80HSk2uG3Pr8Qek=
 =XhYf
 -----END PGP SIGNATURE-----

Merge tag 'ti-k3-dt-for-v6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt

TI K3 device tree updates for v6.1

New Features:
AM62A:
* Basic support for AM62A SoC and SK Board
AM62:
* EPWM support
AM64:
* GPMC, LED, Crypto accelerator support

Fixes:
J7200 pinmux node update
Fixes for Crypto and RNG accelerators on AM65, J721e, J7200

Cleanups:
Reorder SoC compatible and pinmux macros alphabetically

* tag 'ti-k3-dt-for-v6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (22 commits)
  arm64: dts: ti: k3-j7200: fix main pinmux range
  arm64: dts: ti: Add support for AM62A7-SK
  arm64: dts: ti: Introduce AM62A7 family of SoCs
  dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62A
  dt-bindings: arm: ti: Add bindings for AM62A7 SoC
  dt-bindings: arm: ti: Rearrange IOPAD macros alphabetically
  arm64: dts: ti: k3-am625-sk: Add epwm nodes
  arm64: dts: ti: k3-am62-main: Add epwm nodes
  arm64: dts: ti: k3-am642-sk: Add DT entry for onboard LEDs
  arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node
  arm64: dts: ti: k3-am65-main: Do not exclusively claim SA2UL
  arm64: dts: ti: k3-am65-main: Move SA2UL to unused PSI-L thread ID
  arm64: dts: ti: k3-am65-main: Disable RNG node
  arm64: dts: ti: k3-j7200-main: Add main domain watchdog entries
  arm64: dts: ti: k3-am64-main: Add ELM (Error Location Module) node
  arm64: dts: ti: k3-am64-main: Add GPMC memory controller node
  arm64: dts: ti: k3-j721e-main: fix RNG node clock id
  arm64: dts: ti: k3-am64-main: Enable crypto accelerator
  arm64: dts: ti: k3-am64: Add SA2UL address space to Main CBASS ranges
  arm64: dts: ti: k3-am64-main: Add main_cpts label
  ...

Link: https://lore.kernel.org/r/44729b46-27f9-94a0-17ed-8868649a4a0a@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-23 16:31:29 +02:00
Arnd Bergmann
2b14d7da65 i.MX DT bindings for 6.1:
- Add compatible for new boards: Kontron BL i.MX8MM OSM-S, MSC
   SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier, i.MX8M Mini Gateworks
   GW7904 board, i.MX8DXL EVK Board.
 - Add add interconnect property for i.MX8MP various blk-ctrl devices.
 - Add i.MX8MP HDMI HDCP and HRV power domain DT IDs.
 - Add bindings for i.MX93 SRC and MEDIAMIX blk-ctrl.
 - A minor style fix on i.MX8MM clock binding header.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmMlhS4UHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM6RGgf9EYZWreK87zuUb3F0ARa6Ac1uYS9R
 mWBz6WaVm5SQV/bIr6oSql7iIyrojAVb7FqusZ/d/YbP3WlhcCT5l7VhjjSE0LNi
 IZsyfl0fWEg+ro8MtwY/VnEcWH01eAgbqo6Hbu3oGKJqU5lwmhKD5gT1ctbtGWOA
 v6BlfB5iT/D+IexTeYz/NS2h6MZgVfLLVki82qjyokrUagVOmoPLjZhAlqJKJrHT
 khD1rfdeq56vGprd6juSvFQcNh5SvoKj8TqMlRSOA4peSPLChRSmRyRAYiNN6v8d
 HhHAeRc3XhDQlVxt9zWar981JxDDXHWooo2NIeNKB0bYiKjBGJtEeJ27qw==
 =7xMQ
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtubAACgkQmmx57+YA
 GNk4IxAArqCHIy7vCDjx+SiQV8aiJNQzTlPIv6CRnnh/GpbAk0VwOFzd1q2zQPZl
 3RJQF/r9y76V/1Nqvam3Bldly9lHl0BLXCSdJjJN7gDJ2HZLJFjLZr9PPd8lrq/F
 1xCej6mDB1K/FgiQNVBhjjI+uw05PPF7eZgfpdgAYiWYXiSogk7IdR1LgiT5KzbB
 QSl19/BcrXc7G+wve5sFsJzCozQkn2aQo2phsYgbUZ5u1gTwLN3Y2Arq6iUjF0iR
 opnqEuWalBTUYvGZonrvBwg/BW2z9uiTJ1WUEIKSst4W7I2qYMSFG73KLR/KJela
 qflPNJ9y7Qy4TzQ7e3vWouXzIVZVfbp8IiIoWatFd907ii1omhnVkvSe/cVIpPvz
 eKlPVXQB7QKEH1ITmDIUy9dzYlZYbVKyx76E478yrRnzXDFIXvTbooqHZ2eiU2aY
 dSIttucqL/yeJZ28EZ9ZhMxLOYPjKkqwv+0DsmTwWSpEHEJAw0gGyOCPrmCdGdWr
 bK6CSKntPWiXgVMNstdgVdlyRJJr1udxUmYq5h2EBmE+bHBTkTf95ys4isxygXk7
 edK+oc7iUeyVwQm4o7hnVuWEpLP97BCDaFV7Sa9+RkqJ2iKdLaVPD/VARjl/ypgZ
 u/DWpPFNOzabCPj0SD5osT/arXisEfatGTIgwO23swiJfDJlpiU=
 =D4U3
 -----END PGP SIGNATURE-----

Merge tag 'imx-bindings-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX DT bindings for 6.1:

- Add compatible for new boards: Kontron BL i.MX8MM OSM-S, MSC
  SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier, i.MX8M Mini Gateworks
  GW7904 board, i.MX8DXL EVK Board.
- Add add interconnect property for i.MX8MP various blk-ctrl devices.
- Add i.MX8MP HDMI HDCP and HRV power domain DT IDs.
- Add bindings for i.MX93 SRC and MEDIAMIX blk-ctrl.
- A minor style fix on i.MX8MM clock binding header.

* tag 'imx-bindings-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: arm: imx: update fsl.yaml for imx8dxl
  dt-bindings: firmware: add missing resource IDs for imx8dxl
  dt-bindings: arm: Add i.MX8M Mini Gateworks GW7904 board
  dt-bindings: soc: add i.MX93 mediamix blk ctrl
  dt-bindings: soc: add i.MX93 SRC
  dt-bindings: mfd: syscon: Add i.MX93 blk ctrl system registers
  dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier
  dt-bindings: arm: fsl: Add Kontron BL i.MX8MM OSM-S board
  dt-bindings: arm: fsl: Rename compatibles for Kontron i.MX8MM SoM/board
  dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl
  dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk ctrl
  dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrl
  dt-bindings: power: imx8mp-power: add HDMI HDCP/HRV
  dt-bindings: arm: fsl: imx6ul-kontron: Update bindings
  dt-bindings: clk: imx8mm: don't use multiple blank lines
  dt-bindings: soc: imx: add interconnect property for i.MX8MP hsio blk ctrl
  dt-bindings: soc: imx: add interconnect property for i.MX8MP hdmi blk ctrl
  dt-bindings: soc: imx: add interconnect property for i.MX8MP media blk ctrl

Link: https://lore.kernel.org/r/20220918092806.2152700-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-23 15:50:40 +02:00
Arnd Bergmann
195571f342 dt-bindings: Changes for v6.1-rc1
Adds device tree bindings for the MGBE found on Tegra234 SoCs, as well
 as stream IDs for the shared host1x context devices.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmMkSw8THHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zocJTEACYpoTDx2T2lLMv8iGCL0wWDJrOU2/Y
 N0plnJi+kJKXwwGAjC95A5Lbm+7PQeAgeH/Ai1NxBu4LCL83QHN0Zzc25g9MdMFa
 HH4g030V14TEM8Yj0WCXAVtO+y6OsAX4ycwRA9OJEz+c+lKPIbAiXe6vibVFQz/f
 yTeumGT0iOI8efqzYpP0x7gSHUsrY0i+4+Td4aqSapE1/93FCEzvUAz/vj/2OGGe
 fXOXVnVVk9IWuhTw61Sum9dborq3g4SHAAldygffC6Ivx1/3AkrF5fvFYYopZrSf
 h2orSrDg4S3kqhF6mwPksBFLoWChoWQB/t620kuXuUYEVFV0mTqdgnMbv/w3CYPC
 JsiNfKrtWND53LMh2UOrJjRLnTtxZCOLXalyovJkkoccaKi2BxiRAHryj/sogoxW
 GRinz48bxnF58MQ1v4BBbUrntzf2SSF7d11zkQg1MQ1qljEZJV0piZDPDyLLyWME
 xOggT8DSfwJWG+nlA51+UCjr4Qvv4u6gkOXo7lbv3uOiVHHq/aMqeJKCkOpySqbk
 J0kxURvRmNRXvMf+jsDsyk3L6EhSElfwF9UKB4vdjI9O+wj/rs2C2C024lOWHI14
 ew09v6UnBzGfOoq7YmBl0RP6B6HcCWFfKaZSEJ+bS9pzPPT54iZq+e853ZANG9GO
 oaCO0XVSFYnzXQ==
 =fXO9
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtt9QACgkQmmx57+YA
 GNmUUg//U5Bdddza9xHN3uOoJJRTIuciMK1KC8EGlW7RUGkJV3lK+8Qmb/GzbZ8e
 xSwhNSgP9cyJ5c2khU+IT+dNQtvBpnAsezLWccdEbhx48OOV3D+4OxQDJKtX/z27
 FMXaryY7TLKfLR1utlCcZ8+l5fV/8fiO/Py18hM2TUv86v8IHSbpsyGiDcsywi3N
 Fa8Vlz+Vbr2N4kfe3FOUQZUw1lTEjh9negDKXMQJYE0I5IyHkEqIBNjJbP6mtWfg
 i9G0sEvC2LjVF1KnoflNmpFjXzLWoiEasY6GEv9FsVhYfTgvLwfnsHH3/l2Dv+da
 v5gGrqQGmtr7jZeKU2Zz4oKvg91e098JCaUUJjLirpA0uS16kbt5v9Uof27MXY8b
 /htgFQgjMPx+Jn1K9tYxBk+WnmtMI40O5MSj+QG2uL1x6Q/QYFSL346YmLDDJvL0
 6c3J1rlh/VlMI3EzycFl2CAFEBpYzBP6ERFw/2BtkEfhGUEhBaX4wG6uKevNDOo8
 HJsOcIJKNCgQk88nGB+ItqDbxfwaa2UQnXufWPdV8Rty1ysfvlU60CWR7SK8NAeX
 gcPdqH9Z1B8doYGmrtj9HKCdtpo0qyYI3Ruz/0pBQgFiVoO0FltN/d6fItf8aJKf
 yHUigmWiQ4FKM3sjl4H5rpWqDv3Q+oGPQmfMoE5jVQgp6tL0b+o=
 =PY4Y
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-6.1-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v6.1-rc1

Adds device tree bindings for the MGBE found on Tegra234 SoCs, as well
as stream IDs for the shared host1x context devices.

* tag 'tegra-for-6.1-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: Add Host1x context stream IDs on Tegra234
  dt-bindings: net: Add Tegra234 MGBE

Link: https://lore.kernel.org/r/20220916101957.1635854-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-23 15:42:44 +02:00
Peng Fan
90e58072b9 dt-bindings: clock: imx93-clock: add more MU/SAI clocks
Add MU[1,2]_[A,B] clock entries.
Add SAI IPG clock entries.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20220830033137.4149542-2-peng.fan@oss.nxp.com
2022-09-19 13:06:45 +03:00
Marcel Ziswiler
59dc69d7c3 dt-bindings: clock: imx8mm: don't use multiple blank lines
Avoid the following checkpatch warning:

include/dt-bindings/clock/imx8mm-clock.h:284: check: Please don't use
 multiple blank lines

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20220722215445.3548530-13-marcel@ziswiler.com
2022-09-19 13:05:12 +03:00
Jagan Teki
bc35a430df clk: rockchip: Add dt-binding header for RV1126
Add the dt-bindings header for the Rockchip RV1126, that gets shared
between the clock controller and the clock references in the dts.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20220915163947.1922183-3-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-17 16:27:59 +02:00
Shenwei Wang
c09cc6e528 dt-bindings: firmware: add missing resource IDs for imx8dxl
Add the missing resource IDs for imx8dxl.

Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:50 +08:00
Peng Fan
121494030c dt-bindings: soc: add i.MX93 mediamix blk ctrl
Add DT bindings for i.MX93 MEDIAMIX BLK CTRL.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:50 +08:00
Peng Fan
c7ebd54158 dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl
i.MX8MP VPU blk ctrl module has similar design as i.MX8MM, so reuse
the i.MX8MM VPU blk ctrl yaml file. And add description for the items.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:49 +08:00
Peng Fan
69e43d9e83 dt-bindings: power: imx8mp-power: add HDMI HDCP/HRV
Add i.MX8MP HDMI HDCP and HRV entries.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:48 +08:00
Marcel Ziswiler
402de4bfb3 dt-bindings: clk: imx8mm: don't use multiple blank lines
Avoid the following checkpatch warning:

include/dt-bindings/clock/imx8mm-clock.h:284: check: Please don't use
 multiple blank lines

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:05 +08:00
Serge Semin
03f1076fbe dt-bindings: ata: ahci: Add platform capability properties
In case if the platform doesn't have BIOS or a comprehensive firmware
installed then the HBA capability flags will be left uninitialized. As a
good alternative we suggest to define the DT-properties with the AHCI
platform capabilities describing all the HW-init flags of the
corresponding capability register. Luckily there aren't too many of them.
SSS - Staggered Spin-up support and MPS - Mechanical Presence Switch
support determine the corresponding feature availability for the whole HBA
by means of the "hba-cap" property. Each port can have the "hba-port-cap"
property initialized indicating that the port supports some of the next
functionalities: HPCP - HotPlug capable port, MPSP - Mechanical Presence
Switch attached to a port, CPD - Cold Plug detection, ESP - External SATA
Port (eSATA), FBSCP - FIS-based switching capable port.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17 01:39:38 +09:00
Mikko Perttunen
cc99f95d49 dt-bindings: Add Host1x context stream IDs on Tegra234
Add defines for stream IDs used for Host1x context isolation
on Tegra234. The same stream IDs are used for both NISO0 and
NISO1 SMMUs since Host1x's stream ID protection tables don't
make a distinction between the two.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15 14:05:42 +02:00
Linus Walleij
94bc967b8d Samsung pinctrl drivers changes for v6.1
1. Minor fix in order of initializing pinctrl driver - GPIOs should be
    configured before registering gpiolib.
 2. Final steps to deprecated bindings headers with register constants.
    The constants were moved to include files in DTS directories, because
    these are not suitable for bindings.  Remove final references and
    mark binding header as deprecated to warn any users.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmMbWHIQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD16J7EACBiMzTW1s6h2Z+/8yu3D8dhyy184Lykj/3
 tf4mR3fEEX7svUbcll08hquMCgeZ5dZeowgfBN0ylhPetT6E5y0EgBAAR5C6r8I1
 0ZbnaFbiSapo4Y3E0ZbhQxE+/Vq6/WCYw43KJEmU8EjFIhogyyOlt2HWKfHTKDlq
 5b+amkNOuZ6ERhvhpyH//bwdjSCdz2RsPlv+a63VJxfrU5P78opp9+25DJbIpLD3
 SdBDwRI/A0YN6zEpoX+NnqyevmSsTVu1BAh0fiFca0uqimwrkeOlqsKMXlS8/B7F
 3YP7RVFFHkWFt+dHp4hPHlREaAEfkCUoJgozKV/wCC+DRG1lvLQ2KZhJ8F+kjnSb
 fHJ9xqf0BFh7RQszOd/Odn1wqSESTAKADq/m5abwy+cdHhQwfLVyEzeFs7foLMHa
 K1QzP4Ta/AviRclVz3Y9Joxeo1LMgejMqrnE0biSc/d5vDVbr1xynurPzqym9wbh
 q2Mh1aP0pSMTjr5+umb3BAd3pQsDSzrhjFUeeLRb5RN5EgOsNRTGnvk7AGKMMo2J
 ZEQOrbjHHLZxHx+2E1SS11haXYv2EhBa+13xJv7jZFKtiW7bboBJs9/5MwdG71fP
 HegPLggmDa2MSHuAzE5mDPy7N8429Kq61XFWOGv4aA0kK4M55qyuoyIJSCbhFsfz
 qwueV7J3oQ==
 =YIgT
 -----END PGP SIGNATURE-----

Merge tag 'samsung-pinctrl-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel

Samsung pinctrl drivers changes for v6.1

1. Minor fix in order of initializing pinctrl driver - GPIOs should be
   configured before registering gpiolib.
2. Final steps to deprecated bindings headers with register constants.
   The constants were moved to include files in DTS directories, because
   these are not suitable for bindings.  Remove final references and
   mark binding header as deprecated to warn any users.
2022-09-14 14:28:47 +02:00
Conor Dooley
b4b025246c dt-bindings: clk: add PolarFire SoC fabric clock ids
Each Clock Conditioning Circuitry block contains 2 PLLs and 2 DLLs.
The PLLs have 4 outputs each and the DLLs 2. Add 16 new IDs covering
these clocks. For more information on the CCC hardware, see the
"PolarFire SoC FPGA Clocking Resources" document at the link below.

Link: https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220908143651.1252601-4-conor.dooley@microchip.com
2022-09-14 10:57:07 +03:00
Konrad Dybcio
2d48e6ea30 dt-bindings: power: rpmpd: Add SM6375 power domains
Add the bindings for SM6375 RPMPDs.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220716193201.455728-1-konrad.dybcio@somainline.org
2022-09-13 22:25:35 -05:00
Stephan Gerhold
c40668048f dt-bindings: clock: Add schema for MSM8909 GCC
The Global Clock Controller (GCC) in the MSM8909 SoC provides clocks,
resets and power domains for the various hardware blocks in the SoC.
Add a DT schema to describe it, similar to other Qualcomm SoCs.

Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220706134132.3623415-2-stephan.gerhold@kernkonzept.com
2022-09-13 22:07:25 -05:00
Richard Acayan
657e932665 dt-bindings: clock: gcc-sdm845: add sdm670 global clocks
The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most
of the new clocks, GDSCs, and resets already have reserved IDs but there
are some resources that don't. Add the new clock from Snapdragon 670 and
document the differences between the SoC parent clocks.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220914013922.198778-2-mailingradian@gmail.com
2022-09-13 21:20:33 -05:00
Taniya Das
c9a406b42f dt-bindings: clock: Add support for external MCLKs for LPASS on SC7280
Support external mclk to interface external MI2S clocks for SC7280.

Fixes: 4185b27b3b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-5-git-send-email-quic_c_skakit@quicinc.com
2022-09-13 09:57:24 -05:00
Taniya Das
42801e6185 dt-bindings: clock: Add resets for LPASS audio clock controller for SC7280
Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks
for SC7280. Update reg property min/max items in YAML schema.

Fixes: 4185b27b3b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-4-git-send-email-quic_c_skakit@quicinc.com
2022-09-13 09:57:23 -05:00
Taniya Das
1c3f9df77a dt-bindings: clock: Add support for external MCLKs for LPASS on SC7280
Support external mclk to interface external MI2S clocks for SC7280.

Fixes: 4185b27b3b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-5-git-send-email-quic_c_skakit@quicinc.com
2022-09-13 09:47:35 -05:00
Taniya Das
be9439df23 dt-bindings: clock: Add resets for LPASS audio clock controller for SC7280
Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks
for SC7280. Update reg property min/max items in YAML schema.

Fixes: 4185b27b3b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-4-git-send-email-quic_c_skakit@quicinc.com
2022-09-13 09:47:35 -05:00
Vignesh Raghavendra
1607e6f928 dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62A
Add pinctrl macros for AM62AX SoCs. These macro definitions are similar
to that of previous platforms, but adding new definitions to avoid any
naming confusions in the SoC dts files.

checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses

However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Devarsh Thakkar <devarsht@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220901141328.899100-4-vigneshr@ti.com
2022-09-13 15:58:16 +05:30
Vignesh Raghavendra
a3c5297741 dt-bindings: arm: ti: Rearrange IOPAD macros alphabetically
Rearrange SOC specific IOPAD macros alphabetically, so that its easier
to read. No functional change intended.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Devarsh Thakkar <devarsht@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220901141328.899100-2-vigneshr@ti.com
2022-09-13 15:58:05 +05:30
Arnd Bergmann
2c12f88cef Samsung DTS ARM64 changes for v6.0
1. Add binding headers for several Exynos850 and ExynosAutov9 clocks.
 2. ExynosAutov9: Add FSYS clock controller nodes.
 3. ExynosAutov9: Document serial compatible (used in DTS).
 4. Exynos850: Add Audio, IS, MFC clock controllers. Add IOMMU nodes.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmMbVoEQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1+oyD/wIScAnh7VVTa1OXhHx3PRMxij3bHA8bka8
 B+eTXuHDgomjyjOOysb8APouBAX9nVsi2HFTLOvL9cKLfOZ8mIJutQj70EEfRrg2
 sdVrDgDkJjFkDDNbYyxoLWN/GE1GlambxyTX2BKqJa3GoOg7tcMmXFpy3Lik0XKP
 nxZdIi63aEZc96rqtoLBn4Ni7kWllNNKnGZabrxK4cs3jTHO0Ay+ZGp57exXwEgf
 JdTPaVCw8uB2jjStZESwnldsBZxzJFpwUG+R3cLOejXq8xHuvxpJgD8rvBWS7A8u
 2zOA/qONL1J+B/3pLtlWJAAOXL9MPlxAxWzYOdcaV+vm8XCDhA1aDlJPP+STpcFy
 5zBwm44rqEelgYqPS0CwtCigC0tCmsekMANnRUeCSAmzjRYq18dLF8S36AUPR6UK
 sAtrJwgaGwg6xgsIX4ZqpGKEwNnv6FhViXHGp6Dq3Gw/Czin4Q8sHhRBIhFkUn19
 g4nerk+vzsILke4ZgVT0Hab6Yplrlestc7nxnkAAsPQMwSK9g29HionzNGgxW91m
 7MupJq9KcDGOY3UvSID/L4Bh7XJm/oIqskQX/UGvVACkuprpPs9zlGoO0vwfsQKA
 4HL27Bwvfb1msTFvpOVK4uU00S1sCBd7cnsvS1KoJaxOxSjlLlMwI+ZEUcl+PC5e
 vtkE60ZhfA==
 =bRQO
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMfTh0ACgkQmmx57+YA
 GNkRqxAAlhirqrhRyy2MKuHiI0jJPqXCjbI8CWq1Snb9/aWjkn2Jvg7GChbRnpaS
 bUBMRlwo5ejMJA53zyhx7UMBLzfhrPdAVWZ81sy+EsLMcXRFQ1yXAuocHCMM8Sry
 ttNrof8gi94QOHdkJOqWOF8+/s96bfATms583UlCw5nQR7FX9PeE72zT49YAP5zG
 gUrTmLhZ16fDQDnrAcUJXEbDcSkXO7xsxy1fun0LmykS6bvHK4M5nWsNcYz0JJYm
 L+lQeM/xe3cyIsaqGRkiH+tu1YxCePNSIq2BcfMi+s0dYX0UKnfLAcsxrfVF434/
 pfD/YlXdSnm9QhSowwTe9iDNObuXkxmYuTKJqS0kSmm0Ayc7KrAhZylF7POgYkwG
 KOWis+31f8vinpMKYmLbWKwmo8EgXTdIuANwwX5VyH42GtESpmxnSp6wQO5/i8S3
 TPiG/R4sq5e23qpCez5CBU7ImnDObHCYflW0HLWi1YAUS1oRgVeXXWC+Zt0yzXyS
 IAnz3vwSQqnIbXyzVIQOl9rV+UYLzFixk+3QnXn3RfTEVzJzlKkXp3Jr5ntarW3M
 apqxOwJh7k9QZsawEjNtBNlWgasmD1ThDw7+rp3idbjBJGXppy/mKHBoD3PrzyWw
 AVG3L8SjNrHHxFvKqzDkmVF72tGee+t/vZHzoVLVuPjddkSf4Eo=
 =xnEY
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt64-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v6.0

1. Add binding headers for several Exynos850 and ExynosAutov9 clocks.
2. ExynosAutov9: Add FSYS clock controller nodes.
3. ExynosAutov9: Document serial compatible (used in DTS).
4. Exynos850: Add Audio, IS, MFC clock controllers. Add IOMMU nodes.

* tag 'samsung-dt64-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  dt-bindings: serial: samsung: add exynosautov9-uart compatible
  arm64: dts: exynos: Add SysMMU nodes for Exynos850
  arm64: dts: exynos: Add CMU_AUD, CMU_IS and CMU_MFCMSCL for Exynos850
  arm64: dts: exynosautov9: add fsys0/1 clock DT nodes
  dt-bindings: clock: exynos850: Add Exynos850 CMU_MFCMSCL
  dt-bindings: clock: exynos850: Add Exynos850 CMU_IS
  dt-bindings: clock: exynos850: Add Exynos850 CMU_AUD
  dt-bindings: clock: exynosautov9: add schema for cmu_fsys0/1
  dt-bindings: clock: exynosautov9: add fsys1 clock definitions
  dt-bindings: clock: exynosautov9: add fys0 clock definitions
  dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1

Link: https://lore.kernel.org/r/20220909150849.820523-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-12 17:19:57 +02:00
Finley Xiao
67944950c2 dt-bindings: power: add power-domain header for rk3588
Add all the power domains listed in the RK3588 TRM.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220906143825.199089-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-09 19:01:44 +02:00
Olliver Schinagl
472d7b9e81 dt-bindings: leds: Expand LED_COLOR_ID definitions
In commit 853a78a7d6 (dt-bindings: leds: Add LED_COLOR_ID definitions,
Sun Jun 9 20:19:04 2019 +0200) the most basic color definitions where
added. However, there's a little more very common LED colors.

While the documentation states 'add what is missing', engineers tend to
be lazy and will just use what currently exists. So this patch will take
(a) list from online retailers [0], [1], [2] and use the common LED colors from
there, this being reasonable as this is what is currently available to purchase.

Note, that LIME seems to be the modern take to 'Yellow-green' or
'Yellowish-green' from some older datasheets.

[0]: https://www.digikey.com/en/products/filter/led-lighting-color/125
[1]: https://eu.mouser.com/c/optoelectronics/led-lighting/led-emitters/standard-leds-smd
[2]: https://nl.farnell.com/en-NL/c/optoelectronics-displays/led-products/standard-single-colour-leds-under-75ma

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Alexander Dahl <ada@thorsis.com>
Acked-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
Link: https://lore.kernel.org/r/20220830134613.1564059-1-oliver@schinagl.nl
Signed-off-by: Rob Herring <robh@kernel.org>
2022-09-08 13:16:10 -05:00
Jagan Teki
daf7dc8651 dt-bindings: power: Add power-domain header for RV1126
Add power-domain header for RV1126 SoC from description in TRM.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220818124132.125304-2-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-05 11:52:25 +02:00
AngeloGioacchino Del Regno
697b551e29 dt-bindings: reset: mt8195: Add resets for USB/PCIe t-phy port 1
Add the reset index for USBSIF P1 (T-PHY port 1), used as either USB
or PCI-Express PHY reset.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220720102817.237483-2-angelogioacchino.delregno@collabora.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-08-31 18:16:45 -07:00
AngeloGioacchino Del Regno
7e5073a74f dt-bindings: reset: mt8195: Add resets for PCIE controllers
Add the reset index for PCIe P0 and P1 (PCIe0, PCIe1) on MT8195.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220629105205.173471-2-angelogioacchino.delregno@collabora.com
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-08-31 18:13:53 -07:00
Swapnil Jakhade
288440de9e dt-bindings: phy: Add PHY_TYPE_USXGMII definition
Add definition for USXGMII phy type.

Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220628122255.24265-3-rogerq@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30 10:42:57 +05:30
Neal Liu
dffc3c566b dt-bindings: clock: Add AST2500/AST2600 HACE reset definition
Add HACE reset bit definition for AST2500/AST2600.

Signed-off-by: Neal Liu <neal_liu@aspeedtech.com>
Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-08-26 18:50:38 +08:00
Hui.Liu
9f1bdd7e82 dt-bindings: pinctrl: mediatek: add support for mt8188
Add the pinctrl header file on MediaTek mt8188.
Add the new binding document for pinctrl on MediaTek mt8188.

Signed-off-by: Hui.Liu <hui.liu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220818075012.20880-2-hui.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-08-25 14:50:44 +02:00
Sam Protsenko
8f3fc0ed70 dt-bindings: clock: exynos850: Add Exynos850 CMU_MFCMSCL
CMU_MFCMSCL generates MFC, M2M, MCSC and JPEG clocks for BLK_MFCMSCL.
Add clock indices and binding documentation for CMU_MFCMSCL.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-4-semen.protsenko@linaro.org
2022-08-23 09:12:01 +03:00
Sam Protsenko
f20f35f46f dt-bindings: clock: exynos850: Add Exynos850 CMU_IS
CMU_IS generates CSIS, IPP, ITP, VRA and GDC clocks for BLK_IS. Add
clock indices and bindings documentation for CMU_IS domain.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-3-semen.protsenko@linaro.org
2022-08-23 09:11:50 +03:00
Sam Protsenko
45bbf4d76a dt-bindings: clock: exynos850: Add Exynos850 CMU_AUD
CMU_AUD generates Cortex-A32 clock, bus clock and audio clocks for
BLK_AUD. Add clock indices and binding documentation for CMU_AUD.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-2-semen.protsenko@linaro.org
2022-08-23 09:11:36 +03:00
Chanho Park
3c073243c5 dt-bindings: clock: exynosautov9: add fsys1 clock definitions
Add fsys1(for usb and mmc) clock definitions.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/debb6335cb2bcc935f7572bed25d76a85e80cfaa.1659054220.git.chanho61.park@samsung.com
2022-08-23 09:07:17 +03:00
Chanho Park
153da489e5 dt-bindings: clock: exynosautov9: add fys0 clock definitions
Add fsys0(for PCIe) clock definitions.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/6f70a59164ad2c5ce5581047ca39a91afc1105d9.1659054220.git.chanho61.park@samsung.com
2022-08-23 09:07:12 +03:00
Chanho Park
b6740089b7 dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1
There are duplicated definitions of peric0 and peric1 cmu blocks. Thus,
they should be defined correctly as numerical order.

Fixes: 680e1c8370 ("dt-bindings: clock: add clock binding definitions for Exynos Auto v9")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220727021357.152421-2-chanho61.park@samsung.com
2022-08-23 09:03:49 +03:00
Lukas Bulwahn
ba6165bc83 dt-bindings: clock: Move versaclock.h to dt-bindings/clock
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.

This was discovered while investigating the state of ownership of the
files in include/dt-bindings/ according to the MAINTAINERS file.

This change here is similar to commit 8e28918a85 ("dt-bindings: clock:
Move ti-dra7-atl.h to dt-bindings/clock") and commit 35d35aae81
("dt-bindings: clock: Move at91.h to dt-bindigs/clock").

Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Link: https://lore.kernel.org/r/20220613081632.2159-3-lukas.bulwahn@gmail.com
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-08-22 16:04:01 -07:00
Lukas Bulwahn
0384759b3d dt-bindings: clock: Move lochnagar.h to dt-bindings/clock
Most of the clock-related dt-binding header files are located in
include/dt-bindings/clock. It would be good to keep all the similar
header files at a single location.

This was discovered while investigating the state of ownership of the files
in include/dt-bindings/ according to the MAINTAINERS file.

This change here is similar to commit 8e28918a85 ("dt-bindings: clock:
Move ti-dra7-atl.h to dt-bindings/clock") and commit 35d35aae81
("dt-bindings: clock: Move at91.h to dt-bindigs/clock").

Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Link: https://lore.kernel.org/r/20220613081632.2159-2-lukas.bulwahn@gmail.com
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-08-22 16:04:00 -07:00
Krzysztof Kozlowski
9d92925768 dt-bindings: pinctrl: samsung: deprecate header with register constants
For convenience (less code duplication, some meaning added to raw
number), the pin controller pin configuration register values
were defined in the bindings header.  These are not some IDs or other
abstraction layer but raw numbers used in the registers

These constants do not fit the purpose of bindings.  They do not provide
any abstraction, any hardware and driver independent ID.  With minor
exceptions, the Linux drivers actually do not use the bindings header at
all.

All of the constants were moved already to headers local to DTS
(residing in DTS directory) and to Samsung pinctrl driver (where
applicable), so remove any references to the bindings header and add a
warning tha tit is deprecated.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220816133016.77553-3-krzysztof.kozlowski@linaro.org
2022-08-19 16:54:10 +03:00
Srinivas Kandagatla
ea15d3bd3c
ASoC: qcom: qdsp6: q6prm: add new clocks
Add support to new clocks that are added in Q6DSP as part of newer version
of LPASS support on SM8450 and SC8280XP.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220816170118.13470-1-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-08-17 13:00:28 +01:00
Lad Prabhakar
80c4ece67b dt-bindings: interrupt-controller: Add macros for NMI and IRQ0-7 interrupts present on RZ/G2L SoC
Add macros for NMI and IRQ0-7 interrupts which map to SPI0-8 present on
RZ/G2L (and alike) SoC's so that these can be used in the first cell of
interrupt specifiers.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220722151155.21100-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-16 09:37:01 +02:00
Claudiu Beznea
cb6e097d93 dt-bindings: iio: adc: at91-sama5d2_adc: add id for temperature channel
Add ID for temperature channel of AT91 SAMA5D2 ADC.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220803102855.2191070-17-claudiu.beznea@microchip.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2022-08-15 22:29:58 +01:00
Linus Torvalds
f7cdaeeab8 power supply and reset changes for the v6.0 series
power-supply core:
  - none
 
 drivers:
  - pwr-mlxbf: new reset driver for Mellanox BlueField
  - at91-reset: SAMA7G5 support
  - ab8500: continue refurbishing
  - misc. minor fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE72YNB0Y/i3JqeVQT2O7X88g7+poFAmL1g+cACgkQ2O7X88g7
 +pqlSQ//bHOcpSskI+fVDkPNbInVdOW7eK+cVdkNyeeEgZMz86C7fcQQ3/LwLhpj
 Jw3PFhIKklNR6dk+hE3Q6Jw0gzMSBIeCILCPuHLOYc4rWgduUzTEO6gCxy+jtDt+
 cfUfP9RsfU47RYT6f5XL4K2Qlu0Plhpro+P7nECYubPRwYVnrpiMYDrOWNb68Yyb
 gcCjJN21nrQ4fJy/Qai1nUjlKAKJOmL6LBO/qe0EjVSllkGGGmAIDfolvXXmS1ku
 HZ5IEnpFp6usiXa52Q06QyWF6yp2WFsF1gACfWnimpj3lpPKcY4XSGR/rtAtu1ed
 qgxjmXoKCEy8z5WLjMlgNzOsVTMNSZyU4MWqrb4zQkR2GyaEqH2K1Hbp22Eu8qDC
 EHWel114aSHAooOhCXbl1mp7t+1aS+72buagmV2KuGMUMBf0jLKcTJahN0Czek3O
 EwrlN9INIMgcXZ2Ze7dEO6pJcdUov/fiOlB4rXE/cFIlSILT1dTuBPJCKrAqTePV
 7QMYMmTvlSEgdTxgc7c4FaP9+ILxkZ1EgKDvxETKLImevXyecngep8S+9uq2cVkA
 lYdt33MnOHMx0AktFjKS0EEU1zkYN0z+yT3/0uuqzfT5/5xdvIqedXqkncl3Mdqq
 Ckdnya9n5NGmQXDr+0iuKBe510+nZX3yf1exTBbogOf97uBYiR8=
 =ulQI
 -----END PGP SIGNATURE-----

Merge tag 'for-v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply

Pull power supply and reset updates from Sebastian Reichel:
 "No core patches, only driver updates:

   - pwr-mlxbf: new reset driver for Mellanox BlueField

   - at91-reset: SAMA7G5 support

   - ab8500: continue refurbishing

   - misc minor fixes"

* tag 'for-v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply: (29 commits)
  power: supply: olpc_battery: Hold the reference returned by of_find_compatible_node
  power: supply: ab8500: add missing destroy_workqueue in ab8500_charger_bind
  power: supply: ab8500: Remove flush_scheduled_work() call.
  power: supply: ab8500_fg: drop duplicated 'is' in comment
  power: supply: ab8500: Drop external charger leftovers
  power: supply: ab8500: Add MAINTAINERS entry
  dt-bindings: power: reset: qcom,pshold: convert to dtschema
  power: supply: Fix typo in power_supply_check_supplies
  power: reset: pwr-mlxbf: change rst_pwr_hid and low_pwr_hid from global to local variables
  power: reset: pwr-mlxbf: add missing include
  power: reset: at91-reset: add support for SAMA7G5
  power: reset: at91-reset: add reset_controller_dev support
  power: reset: at91-reset: add at91_reset_data
  power: reset: at91-reset: document structures and enums
  dt-bindings: reset: add sama7g5 definitions
  dt-bindings: reset: atmel,at91sam9260-reset: add sama7g5 bindings
  dt-bindings: reset: convert Atmel/Microchip reset controller to YAML
  power: reset: pwr-mlxbf: add BlueField SoC power control driver
  power: supply: ab8500: Exit maintenance if too low voltage
  power: supply: ab8500: Respect charge_restart_voltage_uv
  ...
2022-08-12 09:37:33 -07:00
Linus Torvalds
5e2e7383b5 Pin control bulk changes for v6.0:
Core changes:
 
 - Add PINCTRL_PINGROUP() helper macro (and use it in the AMD driver).
 
 New drivers:
 
 - Intel Meteor Lake support.
 
 - Reneasas RZ/V2M and r8a779g0 (R-Car V4H).
 
 - AXP209 variants AXP221, AXP223 and AXP809.
 
 - Qualcomm MSM8909, PM8226, PMP8074 and SM6375.
 
 - Allwinner D1.
 
 Improvements:
 
 - Proper pin multiplexing in the AMD driver.
 
 - Mediatek MT8192 can use generic drive strength and pin
   bias, then fixes on top plus some I2C pin group fixes.
 
 - Have the Allwinner Sunplus SP7021 use the generic DT schema and
   make interrupts optional.
 
 - Handle Qualcomm SC7280 ADSP.
 
 - Handle Qualcomm MSM8916 CAMSS GP clock muxing.
 
 - High impedance bias on ZynqMP.
 
 - Serialize StarFive access to MMIO.
 
 - Immutable gpiochip for BCM2835, Ingenic, Qualcomm SPMI GPIO.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmLy1PoACgkQQRCzN7AZ
 XXOavA/+O9lIcZqt/I3ZzA4+paEJsXM/win6NKGUHlAE76D5qOvMEXPYCszccGVl
 0ZV9s3A3xmlb0AQZONeiK5M6FTghnIHiPMI5Ewzw358hZQg68Mgaba5+/yTqc9ZT
 L5zs6whboB1Mlr05L3g5e5ImM1FdFklGHimI6G/evE5r1ZXAAdoyXbSzWgtgLwp9
 Gn3rstfqxwwPa9QWIjCXXIeZ/EFnX6BRFT5Pu47dRz/67UWB3xzJjRkZXBf8Nag9
 /H/TpmkXSFNaP8HK2kN8m5eNtfWLYM1AmjFPNICWtKLhH12ArD3j+MBYLcJoDnAI
 JZryrMSFi2P14Ov42zYeJaSjReTt/QBcRAlWBhSiuotJHl6wrFXzM6wA6JirfvsJ
 XQsNm7rKfkmfJ84VjqmCg6QF+39fwKw9MYY9IMXsey7864pBWSyl2xYXUjwXFLua
 EWh+6I1CX4db/S6I/uqvluDenT0NKAPZ3rwK5Al1m1DMI47kz0qoW5ZxAW10xeYB
 BNGN7IyRvYZhfA/DHcxMB5XgateIKTJqfcYnmHD29Ep4skEetOSac0wVytd3S+Hw
 v1zklpcGDLHNiCBXmTYniTlfgBkWJUmVCLA4K6TjSNUKfeoR+33wlpnPHveq8ckn
 PJLf79A+5Br3IsLnr6AzDrmtCd0sV46Gy8Vi5I1TD1i/LUUhnL0=
 =enmk
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Outside the pinctrl driver and DT bindings we hit some Arm DT files,
  patched by the maintainers.

  Other than that it is business as usual.

  Core changes:

   - Add PINCTRL_PINGROUP() helper macro (and use it in the AMD driver).

  New drivers:

   - Intel Meteor Lake support.

   - Reneasas RZ/V2M and r8a779g0 (R-Car V4H).

   - AXP209 variants AXP221, AXP223 and AXP809.

   - Qualcomm MSM8909, PM8226, PMP8074 and SM6375.

   - Allwinner D1.

  Improvements:

   - Proper pin multiplexing in the AMD driver.

   - Mediatek MT8192 can use generic drive strength and pin bias, then
     fixes on top plus some I2C pin group fixes.

   - Have the Allwinner Sunplus SP7021 use the generic DT schema and
     make interrupts optional.

   - Handle Qualcomm SC7280 ADSP.

   - Handle Qualcomm MSM8916 CAMSS GP clock muxing.

   - High impedance bias on ZynqMP.

   - Serialize StarFive access to MMIO.

   - Immutable gpiochip for BCM2835, Ingenic, Qualcomm SPMI GPIO"

* tag 'pinctrl-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (117 commits)
  dt-bindings: pinctrl: qcom,pmic-gpio: add PM8226 constraints
  pinctrl: qcom: Make PINCTRL_SM8450 depend on PINCTRL_MSM
  pinctrl: qcom: sm8250: Fix PDC map
  pinctrl: amd: Fix an unused variable
  dt-bindings: pinctrl: mt8186: Add and use drive-strength-microamp
  dt-bindings: pinctrl: mt8186: Add gpio-line-names property
  ARM: dts: imxrt1170-pinfunc: Add pinctrl binding header
  pinctrl: amd: Use unicode for debugfs output
  pinctrl: amd: Fix newline declaration in debugfs output
  pinctrl: at91: Fix typo 'the the' in comment
  dt-bindings: pinctrl: st,stm32: Correct 'resets' property name
  pinctrl: mvebu: Missing a blank line after declarations.
  pinctrl: qcom: Add SM6375 TLMM driver
  dt-bindings: pinctrl: Add DT schema for SM6375 TLMM
  dt-bindings: pinctrl: mt8195: Use drive-strength-microamp in examples
  Revert "pinctrl: qcom: spmi-gpio: make the irqchip immutable"
  pinctrl: imx93: Add MODULE_DEVICE_TABLE()
  pinctrl: sunxi: Add driver for Allwinner D1
  pinctrl: sunxi: Make some layout parameters dynamic
  pinctrl: sunxi: Refactor register/offset calculation
  ...
2022-08-10 11:01:44 -07:00
Linus Torvalds
668c3c237f sound updates for 6.0-rc1
As diffstat shows, we've had lots of developments in a wide range
 at this time; the majority of changes are about ASoC, including
 subsystem-wide cleanups, continued SOF / Intel updates and a
 bunch of new drivers (as usual), while there have been some
 significant (but almost invisible) improvements in ALSA core
 side, too.  Below are some highlights:
 
 Core:
 - Faster lookups of control elements with Xarray; normal user
   won't notice, but on the devices with tons of control elements,
   it can be visibly faster
 - Support for input validation for controls; this will harden
   for badly written drivers in general with a slight overhead
 - Deferred async signal handling for working around the potential
   deadlocks
 - Cleanup / refactoring raw MIDI locking code
 
 ASoC:
 - Restructing of the set_fmt() callbacks for making things clearer
   in situations like CODEC to CODEC links
 - Clean up and modernizing the DAI naming scheme setups
 - Merge of more of the Intel AVS driver stack, including some
   board integrations
 - New version 4 mechanism for communication with SOF DSPs
 - Suppoort for dynamically selecting the PLL to use at runtime on
   i.MX platforms
 - Improvements for CODEC to CODEC support in the generic cards
 - Support for AMD Jadeite and various machines, AMD RPL, Intel
   MetorLake DSPs, Mediatek MT8186 DSPs and MT6366, nVidia Tegra
   MDDRC, OPE and PEQ, NXP TFA9890, Qualcomm SDM845, WCD9335 and
   WAS883x, and Texas Instruments TAS2780
 
 HD- and USB-audio:
 - Continued improvement for CS35L41 (sub)codec support
 - More quirks for various devices (HP, Lenovo, Dell, Clevo)
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmLr5bcOHHRpd2FpQHN1
 c2UuZGUACgkQLtJE4w1nLE93IQ/+OleeiGv7C487QN5MrBCkdFnSAiXsXDArcMgo
 Gt6XLubH54et1tqi2ms4gRQOqr4HiBelERuqmaCLMZfEgVDc0VhJnf2jjhluYq9+
 o9+kcYKul6qTZeNZLPjEX8pBvDe7HzOl7yep++ZnKeH6DAKNQQLDjVuOcQU/BXdY
 kL8vYrLI3zfqj/pCePb5xpkBx4XdCrE3TfiCr3tAHVg9MyvSGOJyWs02mEBqQRnc
 rlLmkjQVQyln/AGK4RAPMmrrFytktAvBjmIDyFL7kAzhdxe0ouNzTvdxESeojNJv
 CVo/p3hl/+0LYjpD2x9v2pQuifOfpjwSCy6f8jsaF366sMwR1D45h051prILsxAF
 05D5AOwMCnnJdFQFxw3mIkoDva3/PRX8GFfHsXoz+efc5Ibp8ksNYVgAJ3D2TTtt
 7nAYMn0dimVDtw2LHiKantgWAs/rOqD3hDzGxFj2sR662ahsHr8pT8csnJAGoBvW
 7kgx7ZzFo/wSyZJqVqV7p4g6J79ScehRwhqoiwZau9Eo+PhuxZUKvm4RwGFh0Vvg
 GbiVRPfLV4xQd/pDin6qRX1M7cgPc62qGLkhQHAzrX6H5ipwIbQrpyDGLjwdSEp8
 XcQmzCG1zGOvb9A8BY1VBOQXxZRTqN58XujbZ6hsms7Uw8sqagxpYLA/e1bvt1E1
 RQoHQRw=
 =1n0/
 -----END PGP SIGNATURE-----

Merge tag 'sound-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "As the diffstat shows, we've had lots of developments in a wide range
  at this time; the majority of changes are about ASoC, including
  subsystem-wide cleanups, continued SOF / Intel updates and a bunch of
  new drivers (as usual), while there have been some significant (but
  almost invisible) improvements in ALSA core side, too.

  Below are some highlights:

  Core:

   - Faster lookups of control elements with Xarray; normal user won't
     notice, but on the devices with tons of control elements, it can be
     visibly faster

   - Support for input validation for controls; this will harden for
     badly written drivers in general with a slight overhead

   - Deferred async signal handling for working around the potential
     deadlocks

   - Cleanup / refactoring raw MIDI locking code

  ASoC:

   - Restructing of the set_fmt() callbacks for making things clearer in
     situations like CODEC to CODEC links

   - Clean up and modernizing the DAI naming scheme setups

   - Merge of more of the Intel AVS driver stack, including some board
     integrations

   - New version 4 mechanism for communication with SOF DSPs

   - Suppoort for dynamically selecting the PLL to use at runtime on
     i.MX platforms

   - Improvements for CODEC to CODEC support in the generic cards

   - Support for AMD Jadeite and various machines, AMD RPL, Intel
     MetorLake DSPs, Mediatek MT8186 DSPs and MT6366, nVidia Tegra
     MDDRC, OPE and PEQ, NXP TFA9890, Qualcomm SDM845, WCD9335 and
     WAS883x, and Texas Instruments TAS2780

  HD- and USB-audio:

   - Continued improvement for CS35L41 (sub)codec support

   - More quirks for various devices (HP, Lenovo, Dell, Clevo)"

* tag 'sound-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (778 commits)
  ALSA: hda/realtek: Add quirk for HP Spectre x360 15-eb0xxx
  ALSA: line6: Replace sprintf() with sysfs_emit()
  ALSA: hda: Replace sprintf() with sysfs_emit()
  ALSA: pcm: Replace sprintf() with sysfs_emit()
  ALSA: core: Replace scnprintf() with sysfs_emit()
  ALSA: control-led: Replace sprintf() with sysfs_emit()
  ALSA: aoa: Replace sprintf() with sysfs_emit()
  ALSA: ac97: Replace sprintf() with sysfs_emit()
  ALSA: hda/realtek: Add quirk for Clevo NV45PZ
  ALSA: hda/realtek: Add quirk for Lenovo Yoga9 14IAP7
  ALSA: control: Use deferred fasync helper
  ALSA: pcm: Use deferred fasync helper
  ALSA: timer: Use deferred fasync helper
  ALSA: core: Add async signal helpers
  ASoC: q6asm: use kcalloc() instead of kzalloc()
  ACPI: scan: Add CLSA0101 Laptop Support
  ALSA: hda: cs35l41: Support CLSA0101
  ALSA: hda: cs35l41: Use the CS35L41 HDA internal define
  ASoC: dt-bindings: use spi-peripheral-props.yaml
  ASoC: codecs: va-macro: use fsgen as clock
  ...
2022-08-06 10:19:51 -07:00
Linus Torvalds
36001a2fa6 The clk core gains a new set of APIs that allow drivers to both acquire clks
and prepare and enable them at the same time. This also comes with devm support
 so that drivers can make a single call to get and prepare and enable the clk
 and have that all undone when their driver is removed. Many folks have
 requested this feature over the years, but we've had disagreements about how to
 implement it and if it was worthwhile to encourage drivers to use such an API.
 Now it's here, so let's see how it goes. I hope that by introducing this API we
 can identify drivers that would benefit from further consolidation of clk API
 usage, possibly by moving such logic to the bus layer and out of drivers
 altogether.
 
 Outside of that major API update, we have the usual collection of driver
 updates. A few new SoCs are supported, mostly Qualcomm and Renesas this time
 around. Then we have the long tail of non-critical fixes and minor feature
 additions to various clk drivers. And finally more clk provider migration to
 struct clk_parent_data, reducing boot times in the process.
 
 Core:
  - devm helpers for clk_get() + clk_prepare() and clk_enable()
 
 New Drivers:
  - Support for the camera clock controller in Qualcomm SM8450 and
    the display and gpu clock controllers in Qualcomm SM8350
  - Add support for the Renesas RZ/Five SoC
 
 Updates:
  - Various fixes, new clocks and USB GDSCs are introduced for Qualcomm IPQ8074
  - Fixes to Qualcomm MSM8939 for issues introduced by inheriting the MSM8916
    GCC driver
  - Support for a new type of voteable GDSCs used by Qualcomm SC8280XP PCIe
    GDSCs
  - Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux implementation
  - Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994 GCC are
    migrated to use clk_parent_data
  - Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845 and
    SM8250
  - Qualcomm MSM8916 gains more possible frequencies for its GP clocks.
  - The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic the
    design in IPQ8074 to allow the GCC driver to probe earlier.
  - The regulator based mmcx supply for Qualcomm dispcc and videocc is dropped,
    as the only upstream target that adapted this interface was transitioned
    several kernel versions ago
  - Qualcomm GDSCs found to be enabled at boot will now reflect in the enable
    count of the supply, as was done with the regulator supplies previously
  - Correct adc1, nic_media and edma1's parents for NXP i.MX93
  - rdiv, mfd values, the return rate in recalc_rate and add more frequencies in
    the table for fracn-gppll on i.MX
  - Remove Allwinner workaround logic/compatible in fixed factor code
  - MediaTek clk driver cleanups
  - Add reset support to more MediaTek clk drivers
  - deduplicate Allwinner ccu_clks arrays
  - Allwinner H6 GPU DFS support
  - Adjust Allwinner Kconfig to limit choice
  - Fix initconst confusion on Renesas R-Car Gen4
  - Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L
  - Add PFC and WDT clocks and resets on Renesas RZ/V2M
  - Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on
    Renesas R-Car S4-8
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmLsVRsRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSVo7g//WK8+RORL+I48Pzu21Al+eT4Thz3OQJJj
 v3Jk4UY8/7Hnj5jpXI/FguOyah14Jpjp6dJdIvJ/llIHGQHiwIjXlrGQghtOMMHO
 6Tkgc4MTPrkQ7asF/D22afG1yMv/qPne2HAtu7gRVebn6AOaje2tnbbQA0e11geD
 9wPWhzhgCdShLxxjifN9t1ucklW9BCij1dhczEsf13uACwkUwihC26s3JTzvMxF+
 PAXQ1YFzooFFBop6eT0+jQ8JB5V1HPZ55q7K144aFIMhbue4VzyFtTxL16wdzygX
 qeMT9cHy1agLEk8djyh/ZIGU/iUD2byE3zTU6xIITfj+oEMTrYdoQIv/chk4h/4u
 gz2ihCY4Tj2nBRblDuaXRn46E5XlAVlllJ7bFrK3SlpefyPEc3B6qF8tm1wBJ5pL
 dfP2DZACrFEqHVYxZpj6VTLDoR7c1fuyQT0SbPagnqAiboS2wlB4zyyogrOXZ/JO
 FqMC+qEkxm25ByY0+RgiKnZ7GSAyt6etZcFGnA3yz7jgoXT4PRYk3uQ40wxE/ttx
 eoUoc3QbW5mjSNLlcb8FcxVRkPoh2g+vGlkhQx2xJ5RMbk07pqylaCs5p6cbh0uu
 8wn8yIq3bqYTFDR0zurwWGKVRcnH4ukzKScnUfpbrvzXJ9bhHXVC3kAHtXlpOzRe
 5IVQPxEVd+8=
 =jUh+
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The clk core gains a new set of APIs that allow drivers to both
  acquire clks and prepare and enable them at the same time. This also
  comes with devm support so that drivers can make a single call to get
  and prepare and enable the clk and have that all undone when their
  driver is removed.

  Many folks have requested this feature over the years, but we've had
  disagreements about how to implement it and if it was worthwhile to
  encourage drivers to use such an API.

  Now it's here, so let's see how it goes.

  I hope that by introducing this API we can identify drivers that would
  benefit from further consolidation of clk API usage, possibly by
  moving such logic to the bus layer and out of drivers altogether.

  Outside of that major API update, we have the usual collection of
  driver updates. A few new SoCs are supported, mostly Qualcomm and
  Renesas this time around. Then we have the long tail of non-critical
  fixes and minor feature additions to various clk drivers.

  And finally more clk provider migration to struct clk_parent_data,
  reducing boot times in the process.

  Summary:

  Core:

   - devm helpers for clk_get() + clk_prepare() and clk_enable()

  New Drivers:

   - Support for the camera clock controller in Qualcomm SM8450 and the
     display and gpu clock controllers in Qualcomm SM8350

   - Add support for the Renesas RZ/Five SoC

  Updates:

   - Various fixes, new clocks and USB GDSCs are introduced for Qualcomm
     IPQ8074

   - Fixes to Qualcomm MSM8939 for issues introduced by inheriting the
     MSM8916 GCC driver

   - Support for a new type of voteable GDSCs used by Qualcomm SC8280XP
     PCIe GDSCs

   - Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux
     implementation

   - Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994
     GCC are migrated to use clk_parent_data

   - Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845
     and SM8250

   - Qualcomm MSM8916 gains more possible frequencies for its GP clocks.

   - The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic
     the design in IPQ8074 to allow the GCC driver to probe earlier.

   - The regulator based mmcx supply for Qualcomm dispcc and videocc is
     dropped, as the only upstream target that adapted this interface
     was transitioned several kernel versions ago

   - Qualcomm GDSCs found to be enabled at boot will now reflect in the
     enable count of the supply, as was done with the regulator supplies
     previously

   - Correct adc1, nic_media and edma1's parents for NXP i.MX93

   - rdiv, mfd values, the return rate in recalc_rate and add more
     frequencies in the table for fracn-gppll on i.MX

   - Remove Allwinner workaround logic/compatible in fixed factor code

   - MediaTek clk driver cleanups

   - Add reset support to more MediaTek clk drivers

   - deduplicate Allwinner ccu_clks arrays

   - Allwinner H6 GPU DFS support

   - Adjust Allwinner Kconfig to limit choice

   - Fix initconst confusion on Renesas R-Car Gen4

   - Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L

   - Add PFC and WDT clocks and resets on Renesas RZ/V2M

   - Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on
     Renesas R-Car S4-8"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (124 commits)
  clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw()
  clk: mux: Introduce devm_clk_hw_register_mux_parent_hws()
  clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()
  clk: qcom: gcc-msm8994: use parent_hws for gpll0/4
  clk: qcom: clk-rpm: convert to parent_data API
  dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc
  clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies
  clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies
  clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies
  clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions
  clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock
  clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk
  clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled
  clk: qcom: Drop mmcx gdsc supply for dispcc and videocc
  clk: qcom: fix build error initializer element is not constant
  clk: sprd: Add dt-bindings include file for UMS512
  dt-bindings: clk: sprd: Add bindings for ums512 clock controller
  clk: sunxi-ng: sun50i: h6: Modify GPU clock configuration to support DFS
  dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
  clk: qcom: add support for SM8350 DISPCC
  ...
2022-08-04 18:40:08 -07:00
Linus Torvalds
37644cac6e gpio: updates for v6.0-rc1
- remove gpio-vr41xx driver as the only platform using it got dropped too
 - add support for suspend/resume to gpio-davinci
 - improvements to the GPIO character device code
 - add support for disabling bias for in-kernel users (up until now
   only user-space could set it)
 - drop unused devm_gpio_free()
 - fix a refcount issue in gpiolib OF
 - use device match helpers where applicable
 - add support for a new model to gpio-rockchip
 - non-functional improvements in gpio-adp5588
 - improve and simplify teardown in gpio-twl4030 and gpio-ucb1400
 - modernize the gpio-74xx-mmio and gpio-adnp drivers
 - coding style improvements in gpio-xilinx, gpio-104-idi-48
 - support new model (pca9571) in gpio-pca9570
 - convert the DT bindings to YAML for gpio-mvebu and update the document
 - don't return error codes from remove() in gpio-brcmstb
 - add a library for the intel 8255 PPI interface and use it in drivers
 - reduce using magic numbers and improve code readability in several drivers
 - convert DT bindings to YAML for gpio-tpic2810
 - add new models to DT bindings for gpio-frl-imx
 - Kconfig improvements
 - other minor tweaks and improvements
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAmLruBoACgkQEacuoBRx
 13LSqA//QMdrdsYOvSp3m6Dy1swj8a2VpeInDclx/JQ51hIsv03lW6sysrRBBKfy
 gslkj0KO+kelEQbcHZdXF6f434Y2QqSU/JRCPQlQ55Uo3vSbUulvVkUtSoegdNKG
 airr5KebZtLzjBgc23n38HiTJxa1J238+3UScxYHqL9jQ6AA6sPx7Kpy2zlTwojn
 iygJ1CKuyMyHOjU1uhAWYVzCAoguVvOb58emUt5HUsOjjW42d8T+iCHxrJnjC3ST
 YWwHnkSd3GO5CLI+5w7MmLk4kaOA8KU7PGRljglwpbsNGknUQ3PFFSlqFUziBzMU
 nOG1gZ9bvzOy5xjFcLkT3p/NHZiTnyq+ugDl2RAVQB2UF31KHk2sVGrzIsRpbBgt
 kDst5Wn21oymfEO6FM269h5ln+haXouJv2eQvnayBr3rfMxaZCm8veFxjQBDRADf
 D3muvi6u/EJPsPg08owcaVrINPVYVGQIzQp5hi+UCBkzXghn+MovNuI/i07Qf1kr
 fBELOXTy+MGK22p+rO+rXsp0Cp1zUIbwSz0m8ImbhLqcYLa+Vm5bJHk31/Igvbv3
 9FMR75RmfE98EvMhd6ECarZHF9rvCVN7R1U9P1aK8+85m7X5eIVehoQ125uAZf+N
 +W49bceSCI/mGqIg8MiQCM5NIW0AXvyjd7gTNN5kr7qsMGTJI3c=
 =rGNU
 -----END PGP SIGNATURE-----

Merge tag 'gpio-updates-for-v6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "Here are the updates for this merge window from the GPIO subsystem.

  We have more lines removed than added thanks to dropping of a driver
  for a platform that's no longer supported. Otherwise the changes are
  pretty straightforward: support for some new models, various
  improvements to existing drivers, some tweaks to the core library code
  and DT bindings updates.

  Summary:

   - remove gpio-vr41xx driver as the only platform using it got dropped
     too

   - add support for suspend/resume to gpio-davinci

   - improvements to the GPIO character device code

   - add support for disabling bias for in-kernel users (up until now
     only user-space could set it)

   - drop unused devm_gpio_free()

   - fix a refcount issue in gpiolib OF

   - use device match helpers where applicable

   - add support for a new model to gpio-rockchip

   - non-functional improvements in gpio-adp5588

   - improve and simplify teardown in gpio-twl4030 and gpio-ucb1400

   - modernize the gpio-74xx-mmio and gpio-adnp drivers

   - coding style improvements in gpio-xilinx, gpio-104-idi-48

   - support new model (pca9571) in gpio-pca9570

   - convert the DT bindings to YAML for gpio-mvebu and update the
     document

   - don't return error codes from remove() in gpio-brcmstb

   - add a library for the intel 8255 PPI interface and use it in
     drivers

   - reduce using magic numbers and improve code readability in several
     drivers

   - convert DT bindings to YAML for gpio-tpic2810

   - add new models to DT bindings for gpio-frl-imx

   - Kconfig improvements

   - other minor tweaks and improvements"

* tag 'gpio-updates-for-v6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (52 commits)
  dt-bindings: gpio: fsl-imx-gpio: Add i.MXRT compatibles
  gpio: 74xx-mmio: Use bits instead of plain numbers for flags
  gpio: xilinx: add missing blank line after declarations
  MAINTAINERS: Update Intel 8255 GPIO driver file list
  gpio: gpio-mm: Implement and utilize register structures
  gpio: 104-idi-48: Implement and utilize register structures
  gpio: 104-dio-48e: Implement and utilize register structures
  gpio: i8255: Introduce the Intel 8255 interface library module
  gpio: 104-idio-16: Implement and utilize register structures
  gpio: ws16c48: Implement and utilize register structures
  gpio: remove VR41XX related gpio driver
  dt-bindings: gpio: add pull-disable flag
  gpiolib: acpi: support bias pull disable
  gpiolib: of: support bias pull disable
  gpiolib: add support for bias pull disable
  gpio: 74xx-mmio: use bits.h macros for all masks
  gpio: 74xx-mmio: Check MMIO_74XX_DIR_IN flag in mmio_74xx_dir_in()
  gpio: 74xx-mmio: Make use of device properties
  gpiolib: cdev: compile out HTE unless CONFIG_HTE selected
  gpiolib: cdev: consolidate edge detector configuration flags
  ...
2022-08-04 18:34:05 -07:00
Linus Torvalds
da8d07af4b Devicetree updates for v6.0:
Bindings:
 - Add spi-peripheral-props.yaml references to various SPI device
   bindings
 
 - Convert qcom,pm8916-wdt, ds1307, Qualcomm BAM DMA, is31fl319x,
   skyworks,aat1290, Rockchip EMAC, gpio-ir-receiver, ahci-ceva, Arm CCN
   PMU, rda,8810pl-intc, sil,sii9022, ps2-gpio, and arm-firmware-suite
   bindings to DT schema format
 
 - New bindings for Arm virtual platforms display, Qualcomm IMEM memory
   region, Samsung S5PV210 ChipID, EM Microelectronic EM3027 RTC, and
   arm,cortex-a78ae
 
 - Add vendor prefixes for asrock, bytedance, hxt, ingrasys, inventec,
   quanta, and densitron
 
 - Add missing MSI and IOMMU properties to host-generic-pci
 
 - Remove bindings for removed EFM32 platform
 
 - Remove old chosen.txt binding (replaced by schema)
 
 - Treewide add missing type information for properties
 
 - Treewide fixing of typos and its vs. it's in bindings. Its all good
   now.
 
 - Drop unnecessary quoting in power related schemas
 
 - Several LED binding updates which didn't get picked up
 
 - Move various bindings to proper directories
 
 DT core code:
 - Convert unittest GPIO related tests to use fwnode
 
 - Check ima-kexec-buffer against memory bounds
 
 - Print reserved-memory allocation/reservation failures as errors
 
 - Cleanup early_init_dt_reserve_memory_arch()
 
 - Simplify of_overlay_fdt_apply() tail
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmLpmdUQHHJvYmhAa2Vy
 bmVsLm9yZwAKCRD6+121jbxhw8RKD/0dWJ6kDoM5IgS+gzklHA4cBgtHoqHa8Aun
 wDMP6bLxFtlGtAExkfO1ZvNgv1movEYwtSkNKKLuzK/Uv65ln693xWMKza0VEQCl
 1/C1+BQUGMrrMxheMvyWyoGTzOuP65Oh74xDutVlOMN5GxUNEtnU6OdX+F1TLNtD
 utL0arf44y8pAC+eouLTl0bDeMi3rnLT7Y/UEuhh59nVVy+Fi04jvV/UjNx0Vp6m
 /jViiCSxPl77zU2nL7kdOE91Peaqb4YgdXjSgvnhXcJ8zDZZgai64u3Kq0k5whM6
 U6HvIpjvzwDJG5qfW7rdM8dFMUECYNWMqlrqhpX1m/FQQejUBalPnklTtqwkrzsj
 8QXJB0y1BMf6lwIjFDHZoxk4sfd3fcSJegkZK+wip9FdpGe+78GBUp2RU+gfMgv9
 lUSLq0mrmjEuazqm+C95okzFbLeZk+WAgAmH2GYaTc1VYa6WrBYnTZIy8ngTe+VS
 ywklQbBUXMaV13A5gKQSNZx9rdyJVgqRcLuRxosxNt5ms411oiKjjj2m6adTUXmR
 jos67YYdSHiKmn7Omj8biOw2lDQe0PMZmhgqNTe7nAWho26v6uV/HgLz6xNPtEDx
 Lj6+xBz96RH0ANWS9O0GLk+GDe7svsXTmj+9GkCFlY3PioMvB3Fmph7p9Hjxkq2P
 8zQFxWGgAg==
 =8/kk
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "Bindings:

   - Add spi-peripheral-props.yaml references to various SPI device
     bindings

   - Convert qcom,pm8916-wdt, ds1307, Qualcomm BAM DMA, is31fl319x,
     skyworks,aat1290, Rockchip EMAC, gpio-ir-receiver, ahci-ceva, Arm
     CCN PMU, rda,8810pl-intc, sil,sii9022, ps2-gpio, and
     arm-firmware-suite bindings to DT schema format

   - New bindings for Arm virtual platforms display, Qualcomm IMEM
     memory region, Samsung S5PV210 ChipID, EM Microelectronic EM3027
     RTC, and arm,cortex-a78ae

   - Add vendor prefixes for asrock, bytedance, hxt, ingrasys, inventec,
     quanta, and densitron

   - Add missing MSI and IOMMU properties to host-generic-pci

   - Remove bindings for removed EFM32 platform

   - Remove old chosen.txt binding (replaced by schema)

   - Treewide add missing type information for properties

   - Treewide fixing of typos and its vs. it's in bindings. Its all good
     now.

   - Drop unnecessary quoting in power related schemas

   - Several LED binding updates which didn't get picked up

   - Move various bindings to proper directories

  DT core code:

   - Convert unittest GPIO related tests to use fwnode

   - Check ima-kexec-buffer against memory bounds

   - Print reserved-memory allocation/reservation failures as errors

   - Cleanup early_init_dt_reserve_memory_arch()

   - Simplify of_overlay_fdt_apply() tail"

* tag 'devicetree-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (65 commits)
  dt-bindings: mtd: microchip,mchp48l640: use spi-peripheral-props.yaml
  dt-bindings: power: supply: drop quotes when not needed
  dt-bindings: power: reset: drop quotes when not needed
  dt-bindings: power: drop quotes when not needed
  dt-bindings: PCI: host-generic-pci: Allow IOMMU and MSI properties
  of/fdt: declared return type does not match actual return type
  devicetree/bindings: correct possessive "its" typos
  dt-bindings: net: convert emac_rockchip.txt to YAML
  dt-bindings: eeprom: microchip,93lc46b: move to eeprom directory
  dt-bindings: eeprom: at25: use spi-peripheral-props.yaml
  dt-bindings: display: use spi-peripheral-props.yaml
  dt-bindings: watchdog: qcom,pm8916-wdt: convert to dtschema
  dt-bindings: power: reset: qcom,pon: use absolute path to other schema
  dt-bindings: iio/dac: adi,ad5766: Add missing type to 'output-range-microvolts'
  dt-bindings: power: supply: charger-manager: Add missing type for 'cm-battery-stat'
  dt-bindings: panel: raydium,rm67191: Add missing type to 'video-mode'
  of/fdt: Clean up early_init_dt_reserve_memory_arch()
  dt-bindings: PCI: fsl,imx6q-pcie: Add missing type for 'reset-gpio-active-high'
  dt-bindings: rtc: Add EM Microelectronic EM3027 bindings
  dt-bindings: rtc: ds1307: Convert to json-schema
  ...
2022-08-04 18:08:34 -07:00
Linus Torvalds
c1c76700a0 SPDX changes for 6.0-rc1
Here is the set of SPDX comment updates for 6.0-rc1.
 
 Nothing huge here, just a number of updated SPDX license tags and
 cleanups based on the review of a number of common patterns in GPLv2
 boilerplate text.  Also included in here are a few other minor updates,
 2 USB files, and one Documentation file update to get the SPDX lines
 correct.
 
 All of these have been in the linux-next tree for a very long time.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYupz3g8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ynPUgCgslaf2ssCgW5IeuXbhla+ZBRAzisAnjVgOvLN
 4AKdqbiBNlFbCroQwmeQ
 =v1sg
 -----END PGP SIGNATURE-----

Merge tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx

Pull SPDX updates from Greg KH:
 "Here is the set of SPDX comment updates for 6.0-rc1.

  Nothing huge here, just a number of updated SPDX license tags and
  cleanups based on the review of a number of common patterns in GPLv2
  boilerplate text.

  Also included in here are a few other minor updates, two USB files,
  and one Documentation file update to get the SPDX lines correct.

  All of these have been in the linux-next tree for a very long time"

* tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx: (28 commits)
  Documentation: samsung-s3c24xx: Add blank line after SPDX directive
  x86/crypto: Remove stray comment terminator
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_406.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_398.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_391.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_390.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_385.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_319.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_318.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_298.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_292.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_179.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 2)
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 1)
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_160.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_152.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_149.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_147.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_133.RULE
  ...
2022-08-04 12:12:54 -07:00
Linus Torvalds
228dfe98a3 Char / Misc driver changes for 6.0-rc1
Here is the large set of char and misc and other driver subsystem
 changes for 6.0-rc1.
 
 Highlights include:
 	- large set of IIO driver updates, additions, and cleanups
 	- new habanalabs device support added (loads of register maps
 	  much like GPUs have)
 	- soundwire driver updates
 	- phy driver updates
 	- slimbus driver updates
 	- tiny virt driver fixes and updates
 	- misc driver fixes and updates
 	- interconnect driver updates
 	- hwtracing driver updates
 	- fpga driver updates
 	- extcon driver updates
 	- firmware driver updates
 	- counter driver update
 	- mhi driver fixes and updates
 	- binder driver fixes and updates
 	- speakup driver fixes
 
 Full details are in the long shortlog contents.
 
 All of these have been in linux-next for a while without any reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYup9QQ8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ylBKQCfaSuzl9ZP9dTvAw2FPp14oRqXnpoAnicvWAoq
 1vU9Vtq2c73uBVLdZm4m
 =AwP3
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc driver updates from Greg KH:
 "Here is the large set of char and misc and other driver subsystem
  changes for 6.0-rc1.

  Highlights include:

   - large set of IIO driver updates, additions, and cleanups

   - new habanalabs device support added (loads of register maps much
     like GPUs have)

   - soundwire driver updates

   - phy driver updates

   - slimbus driver updates

   - tiny virt driver fixes and updates

   - misc driver fixes and updates

   - interconnect driver updates

   - hwtracing driver updates

   - fpga driver updates

   - extcon driver updates

   - firmware driver updates

   - counter driver update

   - mhi driver fixes and updates

   - binder driver fixes and updates

   - speakup driver fixes

  All of these have been in linux-next for a while without any reported
  problems"

* tag 'char-misc-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (634 commits)
  drivers: lkdtm: fix clang -Wformat warning
  char: remove VR41XX related char driver
  misc: Mark MICROCODE_MINOR unused
  spmi: trace: fix stack-out-of-bound access in SPMI tracing functions
  dt-bindings: iio: adc: Add compatible for MT8188
  iio: light: isl29028: Fix the warning in isl29028_remove()
  iio: accel: sca3300: Extend the trigger buffer from 16 to 32 bytes
  iio: fix iio_format_avail_range() printing for none IIO_VAL_INT
  iio: adc: max1027: unlock on error path in max1027_read_single_value()
  iio: proximity: sx9324: add empty line in front of bullet list
  iio: magnetometer: hmc5843: Remove duplicate 'the'
  iio: magn: yas530: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
  iio: magnetometer: ak8974: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
  iio: light: veml6030: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
  iio: light: vcnl4035: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
  iio: light: vcnl4000: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
  iio: light: tsl2591: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr()
  iio: light: tsl2583: Use DEFINE_RUNTIME_DEV_PM_OPS and pm_ptr()
  iio: light: isl29028: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr()
  iio: light: gp2ap002: Switch to DEFINE_RUNTIME_DEV_PM_OPS and pm_ptr()
  ...
2022-08-04 11:05:48 -07:00
Stephen Boyd
dfcbbd73dd Merge branches 'clk-renesas', 'clk-spreadtrum', 'clk-imx' and 'clk-qcom' into clk-next
* clk-renesas: (22 commits)
  clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_config
  clk: renesas: r9a07g043: Add support for RZ/Five SoC
  dt-bindings: clock: r9a07g043-cpg: Add Renesas RZ/Five CPG Clock and Reset Definitions
  clk: renesas: r8a779f0: Add HSCIF clocks
  clk: renesas: r8a779f0: Add PCIe clocks
  clk: renesas: r8a779f0: Add Z0 and Z1 clock support
  dt-bindings: clock: renesas,rzg2l: Simplify header file references
  clk: renesas: rza1: Remove struct rz_cpg
  clk: renesas: r8a7779: Remove struct r8a7779_cpg
  clk: renesas: r8a7778: Remove struct r8a7778_cpg
  clk: renesas: sh73a0: Remove sh73a0_cpg.reg
  clk: renesas: r8a7740: Remove r8a7740_cpg.reg
  clk: renesas: r8a73a4: Remove r8a73a4_cpg.reg
  clk: renesas: r8a779f0: Add SDHI0 clock
  clk: renesas: r8a779f0: Add thermal clock
  clk: renesas: rzg2l: Fix reset status function
  clk: renesas: r9a06g032: Fix UART clkgrp bitsel
  clk: renesas: r9a06g032: Drop some unused fields
  clk: renesas: r9a09g011: Add WDT clock and reset entries
  clk: renesas: r9a09g011: Add PFC clock and reset entries
  ...

* clk-spreadtrum:
  clk: sprd: Add dt-bindings include file for UMS512
  dt-bindings: clk: sprd: Add bindings for ums512 clock controller

* clk-imx:
  clk: imx: clk-fracn-gppll: Add more freq config for video pll
  clk: imx: clk-fracn-gppll: correct rdiv
  clk: imx: clk-fracn-gppll: Return rate in rate table properly in ->recalc_rate()
  clk: imx: clk-fracn-gppll: fix mfd value
  clk: imx93: Correct the edma1's parent clock
  clk: imx93: correct nic_media parent
  clk: imx93: use adc_root as the parent clock of adc1

* clk-qcom: (62 commits)
  clk: qcom: gcc-msm8994: use parent_hws for gpll0/4
  clk: qcom: clk-rpm: convert to parent_data API
  dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc
  clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies
  clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies
  clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies
  clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions
  clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock
  clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk
  clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled
  clk: qcom: Drop mmcx gdsc supply for dispcc and videocc
  clk: qcom: fix build error initializer element is not constant
  dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
  clk: qcom: add support for SM8350 DISPCC
  clk: qcom: add support for SM8350 GPUCC
  clk: qcom: add camera clock controller driver for SM8450 SoC
  clk: qcom: clk-alpha-pll: add Rivian EVO PLL configuration interfaces
  clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces
  clk: qcom: clk-alpha-pll: limit exported symbols to GPL licensed code
  clk: qcom: clk-alpha-pll: fix clk_trion_pll_configure description
  ...
2022-08-02 12:20:33 -07:00
Linus Torvalds
dd65b96492 ARM: new SoC support for 6.0
This adds initial support for two SoC families that have been under
 review for a while. In both cases, the origonal idea was to have a
 minimally functional version, but we ended up leaving out the clk drivers
 that are still under review and will be merged through the corresponding
 subsystem tree.
 
 The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and
 based on the 32-bit NPCM7xx family but is now getting added to
 arch/arm64 as well.
 
 Sunplus SP7021, also known as Plus1, is a general-purpose
 System-in-Package design based on the 32-bit Cortex-A7 SoC
 on the main chip, plus an I/O chip and memory in the same
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLo+24ACgkQmmx57+YA
 GNkPVw//XAC/uK7WR4oz1D1YaPPNhEvFa6hV1gjGB7Iif72SzyDJmC+36MATU/AY
 neQjCOLJMhxI0hpDGY9nLYe+aP1C6vD32zsjffjt/+s9em+YZZCUkRJuQ5xO3fID
 Uk8ZAnCIcOqX9sjXr9ChW8irlcWFbKzhgWXnPqwQmycIaE7QVz1wx32dbc64YuAK
 S+290U8wbj8bukr33TyZPMdYlfqNU3c1W+dCaeVsQlX1juoHEV3stmIjslRefd6X
 Jre22YJE41VlPufZej76nHXuVnjKf54Oi347TcbPOWNDtEAIESt3mzKy+zICBT2p
 v01rNBf0SogyOtSbWDPTFCAH9W9hujSOJIUOWpbOLaPdfElXxcoTBwj2e2LMoW0k
 ke7YR1m6FKDam5GFU9Oe98CWIiVm/GnTA5mnhhETU1QTXQ3KeZ+Z8X779YuSWPv9
 kJuOPRSk9NdcfRtxZz1vpCvhv/2hBbeBuz+GZi3bisMWdvVqS3lFqVbr6kziQbJZ
 kE6KJH48FdL0VLVvuy+aNSF2umLT42b+5+cmQFuP2zePQgo1DEMKEtFXpZjQJbha
 3iu3sHnieOFMLcbNzbqSz2im3yYNBjl1M5qoGEXaw3Rkzqiht0kMNvAa4LmAejbh
 E+5BIczwWNbaUKgToV1ij65O4a78Bw98m2SIS7awEZC5MW/nXYA=
 =7Id+
 -----END PGP SIGNATURE-----

Merge tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM new SoC support from Arnd Bergmann:
 "This adds initial support for two SoC families that have been under
  review for a while. In both cases, the origonal idea was to have a
  minimally functional version, but we ended up leaving out the clk
  drivers that are still under review and will be merged through the
  corresponding subsystem tree.

  The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and
  based on the 32-bit NPCM7xx family but is now getting added to
  arch/arm64 as well.

  Sunplus SP7021, also known as Plus1, is a general-purpose
  System-in-Package design based on the 32-bit Cortex-A7 SoC on the main
  chip, plus an I/O chip and memory in the same"

* tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits)
  MAINTAINERS: rectify entry for ARM/NUVOTON NPCM ARCHITECTURE
  arm64: defconfig: Add Nuvoton NPCM family support
  arm64: dts: nuvoton: Add initial NPCM845 EVB device tree
  arm64: dts: nuvoton: Add initial NPCM8XX device tree
  arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC
  dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string
  dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string
  dt-bindings: arm: npcm: Add maintainer
  reset: npcm: Add NPCM8XX support
  dt-bindings: reset: npcm: Add support for NPCM8XX
  reset: npcm: using syscon instead of device data
  ARM: dts: nuvoton: add reset syscon property
  dt-bindings: reset: npcm: add GCR syscon property
  dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock
  dt-bindings: watchdog: npcm: Add npcm845 compatible string
  dt-bindings: timer: npcm: Add npcm845 compatible string
  ARM: dts: Add Sunplus SP7021-Demo-V3 board device tree
  ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig
  ARM: sunplus: Add initial support for Sunplus SP7021 SoC
  irqchip: Add Sunplus SP7021 interrupt controller driver
  ...
2022-08-02 08:29:18 -07:00
Linus Torvalds
3976d758e0 ARM: DT changes for 6.0
As usual, the bulk of the changes for the SoC tree are devicetree file
 updates, and most of these changes are for 64-bit embedded machines.
 As before, there are a ton of style cleanups, and additional hardware
 support for existing machines.
 
 Looking only at the new SoC, the notable additions are:
 
  - A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit:
    BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146,
    BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813.
    Each SoC comes with a corresponding reference board.
 
  - The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and
    i.MX8 embedded SoCs, now using Cortex-A55 cores and the
    Ethos-U65 NPU.
 
  - Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end
    of Arm based Laptop SoCs, and its automotive cousin, the
    SA8540P. The SC8280XP is used in the Lenovo Thinkpad X13s
    laptop that also gets added here in addition to the reference
    boards.
 
  - Allwinner H616, a newer version of the H6 SoC, targeted at
    Set-top-box applications. It comes with dts files for the
    Orange Pi zero2 single-board computer and the X96 Mate
    set-top-box
 
  - Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip
    in the Armada SoC family based on the Cortex-A55 core.
 
 New machines based on previously supported SoCs include:
 
  - Several new machines on NXP i.MX platforms: multiple Toradex
    Colibri boards using the "Iris" and "Ixora" carriers,
    DH electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems
    TQMa8MPQL, and phytech phyBOARD-Polis-i.MX8MM.
 
  - Google Chameleon v3 FPGA board based on Intel Arria10 and
    Stratix 10 Software Virtual platform, both in the SoCFPGA
    platform.
 
  - Two new wireless devices based on Broadcom SoCs:
    The Asus GT-AX6000 Router and the Cisco Meraki MR26 access point
 
  - Improved Chromebook support for both the Mediatek and Qualcomm
    SoC families brought added machines: Acer Chromebook 514 (MT8192),
    Acer Chromebook Spin 513 (MT8195) and a couple of SC7180 based
    machines including the Lenovo IdeaPad Chromebook Duet 3.
 
  - Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on
    Qualcomm SDM845, while Mi 5s Plus is based on MSM8996.
 
  - Finally, there are a few development board on other chips:
    PCB8309 (Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308)
    DH DRC Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm
    SDM660)
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLo+7MACgkQmmx57+YA
 GNlTQQ//QnOoW3fl2l4TvuBuP1Vxp7KW3GxZEkWBEfy7lfgkfBzksJ2GT+c96fxk
 +XEvSJcDsSo8zNYXXu/q0jjVKW4lEkiBtaB53NbLayNTFtJccKPiL4hccUkwSg1K
 zOhfu6SEgkwuYNAhtcQOfIec+gdF2PvpZSWUfuGvM2Z3rNhhyfhgoRRZCpc62eeS
 VQ+bVJH/7hG4XAJEcwmNK+8GoCcLbOclCa14oa9/LuEVjfYwOblfPjSflmfALzbM
 BoTDdeMbZoOdy3LOmLpT26Wv7zWQxLhTpiSYiSV0CI4NHUfzJj8ncNh+w9OiN+KO
 Z7cblHhveW5WSEP/jDp9YTf2XXA5UgpFQQjuXS8zQVECw5YxrSBB96GroQhvpcmT
 oSS0BVvlmp5snBRx4Oev2ldJ0BuyYYljF0DmmTrQ6s2gvB4WBlRSqplCAkDy59Im
 +mc5BBTqZYoxzCpzXEZR7VPzk1jzAO5wnYYd1mLJSHVExlSw8CQijy1a4YXxsvmK
 4Sysrm8UbmPN/0anbiyPKeIkuNuufFUvUCR3Vm2HnMzNPza8YBJ0xm6zr8J7ecXe
 QcucpXyLi17GTLOm+pcyj2fQ19yVqO3xbutP4sy9StctEXLZe3rH2hY+GPK6N+Uj
 83MbABMCmpUAyPMzR0AwTKx/RwWbf1jjYvcKg2VW8NNV5kkQQzM=
 =X6mA
 -----END PGP SIGNATURE-----

Merge tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM DT updates from Arnd Bergmann:
 "As usual, the bulk of the changes for the SoC tree are devicetree file
  updates, and most of these changes are for 64-bit embedded machines.
  As before, there are a ton of style cleanups, and additional hardware
  support for existing machines.

  Looking only at the new SoC, the notable additions are:

   - A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit:
     BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146,
     BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813. Each SoC comes
     with a corresponding reference board.

   - The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and
     i.MX8 embedded SoCs, now using Cortex-A55 cores and the Ethos-U65
     NPU.

   - Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end of
     Arm based Laptop SoCs, and its automotive cousin, the SA8540P. The
     SC8280XP is used in the Lenovo Thinkpad X13s laptop that also gets
     added here in addition to the reference boards.

   - Allwinner H616, a newer version of the H6 SoC, targeted at
     Set-top-box applications. It comes with dts files for the Orange Pi
     zero2 single-board computer and the X96 Mate set-top-box

   - Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip in the
     Armada SoC family based on the Cortex-A55 core.

  New machines based on previously supported SoCs include:

   - Several new machines on NXP i.MX platforms: multiple Toradex
     Colibri boards using the "Iris" and "Ixora" carriers, DH
     electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems TQMa8MPQL, and
     phytech phyBOARD-Polis-i.MX8MM.

   - Google Chameleon v3 FPGA board based on Intel Arria10 and Stratix
     10 Software Virtual platform, both in the SoCFPGA platform.

   - Two new wireless devices based on Broadcom SoCs: The Asus GT-AX6000
     Router and the Cisco Meraki MR26 access point

   - Improved Chromebook support for both the Mediatek and Qualcomm SoC
     families brought added machines: Acer Chromebook 514 (MT8192), Acer
     Chromebook Spin 513 (MT8195) and a couple of SC7180 based machines
     including the Lenovo IdeaPad Chromebook Duet 3.

   - Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on
     Qualcomm SDM845, while Mi 5s Plus is based on MSM8996.

   - Finally, there are a few development board on other chips: PCB8309
     (Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308) DH DRC
     Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm SDM660)"

* tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (829 commits)
  dt-bindings: soc: bcm: use absolute path to other schema
  dt-bindings: soc: bcm: drop quotes when not needed
  dt-bindings: soc: microchip: use absolute path to other schema
  dt-bindings: soc: microchip: drop quotes when not needed
  ARM: dts: lan966x: keep lan966 entries alphabetically sorted
  ARM: dts: lan966x: add support for pcb8309
  dt-bindings: arm: at91: add lan966 pcb8309 board
  ARM: dts: lan966x: Enable network driver on pcb8291
  ARM: dts: lan966x: Disable can0 on pcb8291
  ARM: dts: lan966x: Add gpio-restart
  dt-bindings: arm: aspeed: add Aspeed Evaluation boards
  arm64: dts: qcom: Add support for Xiaomi Mi Mix2s
  dt-bindings: arm: qcom: Add Xiaomi Mi Mix2s bindings
  dt-bindings: arm: qcom: Document lg,judyln and lg,judyp devices
  dt-bindings: arm: qcom: add missing SM6350 board compatibles
  dt-bindings: arm: qcom: add missing SM6125 board compatibles
  dt-bindings: arm: qcom: add missing SDM845 board compatibles
  dt-bindings: arm: qcom: add missing SDM636 board compatibles
  dt-bindings: arm: qcom: add missing SDM630 board compatibles
  dt-bindings: arm: qcom: add missing QCS404 board compatibles
  ...
2022-08-02 08:15:25 -07:00
Arnd Bergmann
99978d2fd9 More Qualcomm driver changes for v5.20
This adds support for booting secondary cores, SPM, SMD-RPM and RPM
 power-domain support for the MSM8909 platform.
 
 It drops an unnecessary print in icc-bwmon, corrects SA8540P entries in
 socinfo and a Kconfig build dependency for QCOM_RPMPD.
 
 Lastly it continues to clean up up the Devicetree bindings for the
 Qualcomm drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLYinIbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FryMQANQKam+7lJrykwF3bt8t
 e/ZR1SWPcKTu5dudsnA2GACnycQ8XQr5M06HRVghwveleXbjHyE3beLEy/NwfbTL
 P4ufdDtg/UCwZXJ+p2ZDtbKIWQQU1qgItekYiN3lDEnb3Y5R7vI2h2mhdDOZh8yn
 HtzI5EeI5gMilZ7yYtqPR3DrXpfdYBaGANshyzmP07eDTz+UyaSSKoALsy7jeWB2
 9d4/inH35Tuqv/98oLaf+gK1vH89AVA13N6fVaQxgPOne3FN1bsqBFGc/RvW+phH
 CG+D86lrxq7iChdEcvcoPCkabYi4lNqhbKZOiAAimqrwFCIksVJSE7adDul0JcPF
 g0ml1jWIx+Jsj5TmuRH01CaxCuLtv9WKARi64vqA8dwSYuak8irP3WXbbtv/sNgW
 PokJovzDwwSs71Rh8PmlXC//XY8gbsVj/umI8lEsS5/PrvdCXYsRTjRzvZ5uNtiQ
 5s1fm6xMT2AMbp+Y6ZcnmPhuGntfiJZFj9GivfZuaYF44Ov6mRScHnRADC9oXpBf
 7qlaC1T05PBUHOMB19xpOOsqtBpfX9TCaCqhsVxhH4bjzzYoMuV+yYlI3CqPv3yL
 v9bKfMkbsOpZywCxyve2d6jqCeL8fA2iPw3MzFIlmESRA4MwdXswmxHCE3C7FOHA
 SZkdXKa4EeWQRBf9g5ri3EM/
 =gLQ3
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLZTeMACgkQmmx57+YA
 GNmWzg//eCc5hZXF1HumCX21ueWjwnAaZWZZECe+Plc0GB6nMnPVgCw2S29SCfYQ
 cpR1B0YME/AgK7GiwdxW7mh9wtRzAtR7aSn2Z3nsmF7lMTJI5mJTDVIApoCvgHDu
 5eyFIoiwtWYKFht5TLvC56fnOW73Jp6m5K4HElH2q6A387uurc8ClmuhnG7Dbhsp
 WCYB7aqfqYlMybf8EYo3BAng63v6wLDf93+HyGokRiRHeh/h7xF4liLVY9XCNxOH
 NSxBn8zZDRttEww+xSP+hDpTo316YG3SiNf3XW5ojVMrSUsbJM76DMTuPW70LJvK
 obL4SL7zPeo7yH0NiHK699k+jchozb6Uq9WNnWHc3b5ABXK1RV0BoUNPtTHjiYBs
 ojJnqjPmGJHaLmrvqEihyzRxXJtFMFU22t2EwdUmxQyYdgffS35W6lJtlNP/q7ph
 i+DFoyKsmH8T9zNibNXjoV5NAo73OyKKriWjQS/DYR2/T/kwooXo9h9RS8rppo4M
 kqumzGT2gdLoYI/1hBgXurQpMr231XvesLNSNJpQNz3UfYC0cuC7nAe6EQ5Jn2Da
 hLQrRSj+TMghSq8dw5yOx1fvWjyYT1uFKiSgOkWXvX6Pcui6UC5oJ3zivv7JOXuc
 Jjn+0B31KIBUyh8hq4cNrGaF8edVf8Y0vxp0mKsnnYjQxxuZHkc=
 =TP2T
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

More Qualcomm driver changes for v5.20

This adds support for booting secondary cores, SPM, SMD-RPM and RPM
power-domain support for the MSM8909 platform.

It drops an unnecessary print in icc-bwmon, corrects SA8540P entries in
socinfo and a Kconfig build dependency for QCOM_RPMPD.

Lastly it continues to clean up up the Devicetree bindings for the
Qualcomm drivers.

* tag 'qcom-drivers-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  dt-bindings: soc: qcom: qcom,smd-rpm: add power-controller
  dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmp
  dt-bindings: soc: qcom,rpmh-rsc: simplify qcom,tcs-config
  ARM: mach-qcom: Add support for MSM8909
  dt-bindings: arm: cpus: Document "qcom,msm8909-smp" enable-method
  soc: qcom: spm: Add CPU data for MSM8909
  dt-bindings: soc: qcom: spm: Add MSM8909 CPU compatible
  soc: qcom: rpmpd: Add compatible for MSM8909
  dt-bindings: power: qcom-rpmpd: Add MSM8909 power domains
  soc: qcom: smd-rpm: Add compatible for MSM8909
  dt-bindings: soc: qcom: smd-rpm: Add MSM8909
  soc: qcom: icc-bwmon: Remove unnecessary print function dev_err()
  soc: qcom: socinfo: Fix the id of SA8540P SoC
  soc: qcom: Make QCOM_RPMPD depend on PM

Link: https://lore.kernel.org/r/20220720230648.2113609-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-21 15:00:19 +02:00
Arnd Bergmann
2d0f3f13a9 Merge branch 'nuvoton/newsoc' into arm/newsoc
Merge the new SoC support from Tomer Maimon:
 "This patchset  adds initial support for the Nuvoton
  Arbel NPCM8XX Board Management controller (BMC) SoC family.

  The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC.
  The NPCM8XX computing subsystem comprises a quadcore ARM
  Cortex A35 ARM-V8 architecture.

  This patchset adds minimal architecture and drivers such as:
  Clocksource, Clock, Reset, and WD.

  Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX.

  This patchset was tested on the Arbel NPCM8XX evaluation board."

I'm leaving out the clk controller driver, which is still under
review.

* nuvoton/newsoc:
  arm64: defconfig: Add Nuvoton NPCM family support
  arm64: dts: nuvoton: Add initial NPCM845 EVB device tree
  arm64: dts: nuvoton: Add initial NPCM8XX device tree
  arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC
  dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string
  dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string
  dt-bindings: arm: npcm: Add maintainer
  reset: npcm: Add NPCM8XX support
  dt-bindings: reset: npcm: Add support for NPCM8XX
  reset: npcm: using syscon instead of device data
  ARM: dts: nuvoton: add reset syscon property
  dt-bindings: reset: npcm: add GCR syscon property
  dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock
  dt-bindings: watchdog: npcm: Add npcm845 compatible string
  dt-bindings: timer: npcm: Add npcm845 compatible string
2022-07-19 15:42:00 +02:00
Tomer Maimon
08e950449c dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock
Add binding for the Arbel BMC NPCM8XX Clock controller.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19 15:39:50 +02:00
Nuno Sá
d042656a21 dt-bindings: gpio: add pull-disable flag
This extends the flags that can be used in GPIO specifiers to indicate
that no bias is intended in the pin.

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19 10:24:17 +02:00
Stephan Gerhold
c61c6c6507 dt-bindings: power: qcom-rpmpd: Add MSM8909 power domains
MSM8909 has the same power domains as MSM8916 so just define them
as aliases for the existing definitions.

Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705143523.3390944-4-stephan.gerhold@kernkonzept.com
2022-07-18 18:05:07 -05:00
Greg Kroah-Hartman
6598a382bd interconnect changes for 5.20
Here are the interconnect changes for the 5.20-rc1 merge window consisting
 of two new drivers, misc driver improvements and new device managed API.
 
  Core change:
 - Add device managed bulk API
 
  Driver changes:
 - New driver for NXP i.MX8MP platforms
 - New driver for Qualcomm SM6350 platforms
 - Multiple bucket support for Qualcomm RPM-based drivers.
 
 Signed-off-by: Georgi Djakov <djakov@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJi0YXiAAoJEIDQzArG2BZjA1YP/02pishqRKRk6t4M18zKbwwK
 Preh54CDOrxvd2Fqno3Ft3JLGqd6EtpyDbFV9g/90o43WFHKmEn70Jbmi3N60aqj
 a4M5KU7b+fQyNqus1Z/XQFsfqZ1suAiQHYljIWsbWVkaYHti2geQThblmZ8bsr2m
 AZ0MtDMRvix0XEekDHgS6l52C8owLr3kGbuHGZuQNTGQPKCI5+sQ26+eh49khQUj
 ecxndxuQSj3gMtEBw5AaxY3djpV6DJs/qmkPBZaxpDDSc2RNnb+6ZNKMeaarvz0j
 TI3ZRwq+CGbBB/DQOmEx2Sbo2rlMXd0IQotBJDiN1xs/pXRSyoaWZUW/KK0erZcN
 D1XL33Yzxu67NIKl5K8GteP0OxGTzyE9y91Yh2mprCBdRxg77zyQd+NDtiJ+wMqW
 hp+JoOOINa1muGWGqVZxUt3ACU3Wn4TCzFQajzRDsdHNrx79nLaRQzfu0SsCXfBL
 DkkMaJIkt069yWzfhUBgAkq8X+En4SPcA662EqQbxXXQ5hF7Knlj25q70diu7lxq
 O63KPSkN8GIu5fyhyFBpJ9nRxT70k7PDxJW40cL0sSejiprPc4UzKUQD4wQjK2OC
 1gNRwKkWGq13SbfOmqy2G9CW5+tsTWqUoXRzYfHr4q8Cpwc9pZA8pXvYS5ujTFtq
 g1ZbGI2Aw906ZM3nqmUJ
 =VTig
 -----END PGP SIGNATURE-----

Merge tag 'icc-5.20-rc1-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next

Georgi writes:

interconnect changes for 5.20

Here are the interconnect changes for the 5.20-rc1 merge window consisting
of two new drivers, misc driver improvements and new device managed API.

 Core change:
- Add device managed bulk API

 Driver changes:
- New driver for NXP i.MX8MP platforms
- New driver for Qualcomm SM6350 platforms
- Multiple bucket support for Qualcomm RPM-based drivers.

Signed-off-by: Georgi Djakov <djakov@kernel.org>

* tag 'icc-5.20-rc1-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  PM / devfreq: imx: Register i.MX8MP interconnect device
  interconnect: imx: Add platform driver for imx8mp
  interconnect: imx: configure NoC mode/prioriry/ext_control
  interconnect: imx: introduce imx_icc_provider
  interconnect: imx: set src node
  interconnect: imx: fix max_node_id
  interconnect: qcom: icc-rpm: Set bandwidth and clock for bucket values
  interconnect: qcom: icc-rpm: Support multiple buckets
  interconnect: qcom: icc-rpm: Change to use qcom_icc_xlate_extended()
  interconnect: qcom: Move qcom_icc_xlate_extended() to a common file
  dt-bindings: interconnect: Update property for icc-rpm path tag
  interconnect: icc-rpm: Set destination bandwidth as well as source bandwidth
  interconnect: qcom: msm8939: Use icc_sync_state
  interconnect: add device managed bulk API
  dt-bindings: interconnect: add fsl,imx8mp.h
  dt-bindings: interconnect: imx8m: Add bindings for imx8mp noc
  interconnect: qcom: Add SM6350 driver support
  dt-bindings: interconnect: Add Qualcomm SM6350 NoC support
  dt-bindings: interconnect: qcom: Split out rpmh-common bindings
  interconnect: qcom: icc-rpmh: Support child NoC device probe
2022-07-16 07:22:21 +02:00
Georgi Djakov
33f033dc30 Merge branch 'icc-imx8mp' into icc-next
This patchset is to support i.MX8MP NoC settings, i.MX8MP NoC initial
value after power up is invalid, need set a valid value after related
power domain up.

This patchset also includes two patch[1,2] during my development to enable
the ICC feature for i.MX8MP.

I not include ddrc DVFS in this patchset, ths patchset is only to
support NoC value mode/priority/ext_control being set to a valid value
that suggested by i.MX Chip Design Team. The value is same as NXP
downstream one inside Arm Trusted Firmware:
https://source.codeaurora.org/external/imx/imx-atf/tree/plat/imx/imx8m/i/gpc.c?h=lf_v2.4#n97

Link: https://lore.kernel.org/r/20220703091132.1412063-1-peng.fan@oss.nxp.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-07-15 17:55:48 +03:00
Arnd Bergmann
e0a5925055 Qualcomm ARM64 DTS updates for v5.20
This introduces initial support for Lenovo ThinkPad X13s, Qualcomm 8cx
 Gen 3 Compute Reference Device, SA8295P Automotive Development Platform,
 Xiaomi Mi 5s Plus, five new SC7180 Chrome OS boards, Inforce IFC6560, LG
 G7 ThinQ and LG V35 ThinQ.
 
 With IPQ8074 gaining GDSC support, this was expressed in the gcc node
 and defined for the USB nodes. The SDHCI reset line was defined to get
 the storage devices into a known state.
 
 For MSM8996 interconnect providers, the second DSI interface, resets for
 SDHCI are introduced. Support for the Xiaomi Mi 5s Plus is introduced
 and the Dragonboard 820c gains definitions for its LEDs.
 
 The MSM8998 platform changes consists of a various cleanup patches, the
 FxTec Pro1 is split out from using the MTP dts and Sony Xperia devices
 on the "Yoshino" platform gains ToF sensor.
 
 On SC7180 five new Trogdor based boards are added and the description of
 keyboard and detachables is improved.
 
 On the SC7280-based Herobrine board DisplayPort is enabled, SPI flash
 clock rate is changed, WiFi is enabled and the modem firmware path is
 updated. The Villager boards gains touchscreen, and keyboard backlight.
 
 This introduces initial support for the SC8280XP (aka 8cx Gen 3) and
 related automotive platforms are introduced, with support for the
 Qualcomm reference board, the Lenovo Thinkpad X13s and the SA8295P
 Automotive Development Platform.
 
 In addition to a wide range of smaller fixes on the SDM630 and SDM660
 platforms, support for the secondary high speed USB controller is
 introduced and the Sony Xperia "Nile" platform gains support for the RGB
 status LED. Support for the Inforce IFC6560 board is introduced.
 
 On SDM845 the bandwidth monitor for the CPU subsystem is introduced, to
 scale LLCC clock rate based on profiling. CPU and cluster idle states
 are switched to OSI hierarchical states. DB845c and SHIFT 6mq gains LED
 support and new support for the LG G7 ThinQ and LG V35 ThinQ boards are
 added.
 
 DLL/DDR configuration for SDHCI nodes are defined for SM6125.
 
 On SM8250 the GPU per-process page tables is enabled and for RB5 the
 Light Pulse Generator-based LEDs are added.
 
 The display clock controller is introduced for SM8350.
 
 On SM8450 this introduces the camera clock controller and the UART
 typically used for Bluetooth. The interconnect path for the crypto
 engine is added to the SCM node, to ensure this is adequately clocked.
 
 The assigned-clock-rate for the display processor is dropped from
 several platforms, now that the driver derrives the min and max from the
 clock.
 
 In addition to this a wide range of fixes for stylistic issues and
 issues discovered through Devicetree binding validation across many
 platforms and boards are introduced.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLPLQkbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3Fe7gQAKK2W3OKC5uKllNc7ICE
 rTeQeVNoZPxtqgvTcpAViarDCZin1jo21vDusK3q1iLICSN3XPvfvEYnYIRit/AU
 lRK0O/OBfVzzf+6qsTZqAUybLF2heYA6woESbcIoZMcmZYPwNTmVQvMuPnd0uBro
 yasN7Nm/wcWBlbnyWWAwnU8sYlBx0OfiXq/3z60adDJFJr5DoEFeapkrV/wr9dpx
 YR6kLRM7h9zzqctjOmqM/ZPxI8z3dS83eMS/4k1CkeuTKxQ+pIaBDm5WqhoWuuHH
 CY5Ebc7PzsbEWsx9Qt+bxur5lbeT5brAlGFLNtpn55hz9JQyCrUTIRgPJI21vT7O
 swlGFfW3IYsp8sU3cV7cQ8W7TGrv/1syUbEA+vCEudd00+TEUM+QJmI7bzZVHPUx
 Ari4poAb0D8w2517dTHEiBVQ7a7eRGbMqvJEraWNtklcbNAocV53U6Sz7XAr4Bjm
 0FFbCc18C+DuvMd12B8Vp92Vy8Q62M0fcnaMiL5+QVzGx1fj1bq1aL7kUuUhgsP/
 3esJUw4dNVK3d4b2uy3DR3trobr8jjirMuXKa5V8WUvr3vP9z4hRLTM9l6fecGRW
 0qrzf5iehwJ8itiUYtm/AyGYq1TjkJYxbhtQW8oRiQAJBIyRPjtPITq54l0yLz7/
 w1faJprsybDMh+ESmaHYPbZK
 =89g4
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLQL/QACgkQmmx57+YA
 GNmMUxAAu7iL+YiuKDOxO9vD3INq5XukdZvbCOaiyWkwafsyf0YqhlIXUV0LD/q3
 dpDm2/od9KQGvMG9WE34Fdq2e9nj35NiRHkKM5wLVTuypgh62VmP1PH8q0z+L+hr
 A9IdxwzgXd+ZoDMSkPVHjZauBrALeqxuQshoEvBE11EncCIeQrsxHDIzGjIBlohc
 yZ5EGAYBRDt7dmRv2M3Vpk68gJc5F264zc/mljbrnf1iW/C1b3z6PXtRZXt6p+iq
 Dzfbh+LeWIo2ddrkXhcU3ZFiafMZ5zTLZWWtKystqU9lk3fVvvp1ZcoeEgg9j5tQ
 2TgddYBJTOHm9vlJIYD6zo/AL6adixYOPZOnSzWY17zC8Yq7e5lbc/A4NkoL3lUZ
 oTbEtjmR55hJG2C6JNLsCDuI2eo5zJ9KZB8rE9CBp+kWh2UExjKVbk1LDjUQcLQl
 0cYDbIDeLJFSwSMQ18GeoLbsp3rSlPUOMuoUCdKCsCp9xLzWIxBR7LbthO/R3OOE
 mXsxGQTwn2PbEZEqFddW3vvcBF+FL1IQ/YgC6F/1MKbvU60KjdWNYqeXSz9PZ/AR
 6HyszhnGyGUU0xCWx93XHgfSCKTr8zkjD1zloWy5ibX4rUUg+iC2TnQ3n7srQNCj
 S8bpFED4JXfFj+LfgR9vZr5sUM+C1oYiIVXccZ9QLwiNWLfAfFQ=
 =XnF9
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DTS updates for v5.20

This introduces initial support for Lenovo ThinkPad X13s, Qualcomm 8cx
Gen 3 Compute Reference Device, SA8295P Automotive Development Platform,
Xiaomi Mi 5s Plus, five new SC7180 Chrome OS boards, Inforce IFC6560, LG
G7 ThinQ and LG V35 ThinQ.

With IPQ8074 gaining GDSC support, this was expressed in the gcc node
and defined for the USB nodes. The SDHCI reset line was defined to get
the storage devices into a known state.

For MSM8996 interconnect providers, the second DSI interface, resets for
SDHCI are introduced. Support for the Xiaomi Mi 5s Plus is introduced
and the Dragonboard 820c gains definitions for its LEDs.

The MSM8998 platform changes consists of a various cleanup patches, the
FxTec Pro1 is split out from using the MTP dts and Sony Xperia devices
on the "Yoshino" platform gains ToF sensor.

On SC7180 five new Trogdor based boards are added and the description of
keyboard and detachables is improved.

On the SC7280-based Herobrine board DisplayPort is enabled, SPI flash
clock rate is changed, WiFi is enabled and the modem firmware path is
updated. The Villager boards gains touchscreen, and keyboard backlight.

This introduces initial support for the SC8280XP (aka 8cx Gen 3) and
related automotive platforms are introduced, with support for the
Qualcomm reference board, the Lenovo Thinkpad X13s and the SA8295P
Automotive Development Platform.

In addition to a wide range of smaller fixes on the SDM630 and SDM660
platforms, support for the secondary high speed USB controller is
introduced and the Sony Xperia "Nile" platform gains support for the RGB
status LED. Support for the Inforce IFC6560 board is introduced.

On SDM845 the bandwidth monitor for the CPU subsystem is introduced, to
scale LLCC clock rate based on profiling. CPU and cluster idle states
are switched to OSI hierarchical states. DB845c and SHIFT 6mq gains LED
support and new support for the LG G7 ThinQ and LG V35 ThinQ boards are
added.

DLL/DDR configuration for SDHCI nodes are defined for SM6125.

On SM8250 the GPU per-process page tables is enabled and for RB5 the
Light Pulse Generator-based LEDs are added.

The display clock controller is introduced for SM8350.

On SM8450 this introduces the camera clock controller and the UART
typically used for Bluetooth. The interconnect path for the crypto
engine is added to the SCM node, to ensure this is adequately clocked.

The assigned-clock-rate for the display processor is dropped from
several platforms, now that the driver derrives the min and max from the
clock.

In addition to this a wide range of fixes for stylistic issues and
issues discovered through Devicetree binding validation across many
platforms and boards are introduced.

* tag 'qcom-arm64-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (193 commits)
  arm64: dts: qcom: sc8280xp: fix DP PHY node unit addresses
  arm64: dts: qcom: sc8280xp: fix usb_0 HS PHY ref clock
  arm64: dts: qcom: sc7280: fix PCIe clock reference
  docs: arm: index.rst: add google/chromebook-boot-flow
  arm64: dts: qcom: msm8996: clean up PCIe PHY node
  arm64: dts: qcom: msm8996: use non-empty ranges for PCIe PHYs
  arm64: dts: qcom: sm8450: drop UFS PHY clock-cells
  arm64: dts: qcom: sm8250: drop UFS PHY clock-cells
  arm64: dts: qcom: sc8280xp: drop UFS PHY clock-cells
  arm64: dts: qcom: sm8450: drop USB PHY clock index
  arm64: dts: qcom: sm8350: drop USB PHY clock index
  arm64: dts: qcom: msm8998: drop USB PHY clock index
  arm64: dts: qcom: ipq8074: drop USB PHY clock index
  arm64: dts: qcom: ipq6018: drop USB PHY clock index
  arm64: dts: qcom: sm8250: add missing PCIe PHY clock-cells
  arm64: dts: qcom: sc7280: drop PCIe PHY clock index
  Revert "arm64: dts: qcom: Fix 'reg-names' for sdhci nodes"
  arm64: dts: qcom: sc7180-idp: add vdds supply to the DSI PHY
  arm64: dts: qcom: sc7280: use constants for gpucc clocks and power-domains
  arm64: dts: qcom: msm8996: add missing DSI clock assignments
  ...

Link: https://lore.kernel.org/r/20220713203939.1431054-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-14 17:02:12 +02:00
Arnd Bergmann
f10c00ae86 memory: tegra: Changes for v5.20-rc1
Add memory client definitions for the Multi-Gigabit Ethernet (MGBE)
 controllers found on Tegra234.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmLIexUTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoSjxEACmshdcN262kiaAYvB96jfG3kVBKnID
 q2HfIh0/6x54ZhlOo5v4ROpwD1AnHpo5p6nWZOWmIhSYL7tm9gIZNoGIgg7wF7HS
 M1vD3J6Yl89l1JlYASjpqWB+r0X9FRFVWE+Zj+xHi0NFxlyfYFxaqBnXAl4aMQ/9
 Bx9+YpEO+XYnsLfsMnn4AUx2QXjjrhavBNP4tqTgc/9DWE6Eg+PdEdqr+Q7ZshZJ
 5S534RxrenVJXi70pbNmfaYF2do8HzvbzACAU8l9bhGDTRLj5piMudSxWtOTgguw
 GFzbGZh7vaKq8D51Ko+LWs2RFG8jIlLoCBDjZPF8pmdOiMPLNxyaVD88ZzF7HM7S
 +MP1hWiQRifl/68XnNEDT7NC+1vMfK2kRrpqVayYuFWmWWWhb+TxiJVjSJS8wd0I
 UaEK8G5lPU/o2m2Z5SiR2Sip+uLSeHYZs5x+cyrYub8I/v41bieuNY1rkJYDaMif
 UOUiiYz90QizIdLg6+S6eZ5xxFAeNin9JTNH8lA3yTtedi3Qv8kfYvSubWBWDe2z
 XAlRr/lMwsuEwnZbIerzaIu/VYDYkryhO8Vo4Q76avDEJgdxu7X82QOmdZ4ozyo3
 vYc/3jrYOVX0W8zXUDuF/jdUKq/PVq8xkIqaZglRtWnMNgJX1Zod+UPQI0aAYlWz
 76ARO9cHKhJ1Gg==
 =iQ4G
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLN3zQACgkQmmx57+YA
 GNkNnxAAqKF9TCK/YCCIpcuawZBMPDSLVNiCPqjHdK0ZSLRsKjr6EoR4T77sFjrq
 PdiZThT7sMlZ/434d4dy+12mivzXmHrPDv8CoQRJtzcSoJ71E31SI6610pqMWZeF
 k6WHHd33obab60BRkBlmOq097UfX5FYG+FxyKl13UKltHGydWXU+4xOPR3xm6UqU
 ey7MOebSUesmW9f4CG5ynLtOmojp4D5fcYWGIMabawKQK0m9zRY5qMg7OVT4aeOr
 oSDAkKKoQcCM9sH2whoQzMpyznj2vZKPiHefgNKk2JSYlqyoJsHc6DP6ZHPoNo4o
 wDY/K1DJwLTH8QfJriEKQG8H5tXoSDGvAyOBI/YMhxhyip/bASV3AabNDn6u6ckg
 6VOmJ273DFbqqjahtI88B2mWhkO996CkV2fHXEZCi8RnNPDNVFijMaBSGQjG8dPn
 VbIJbtvb+dvGHKcaA1Oi1kYGNa0S5cGCTrv+gK4GOLhrThoIldmAONSV+CtEK1TA
 wB4+wR7f8QXgTqBm3+9IiJebT7eST5Eh66pIutBB3PyWfpvlHUsl3CldJu0apCWo
 +gJaIk/WjKgfgiY4l0wXHchFlwotA0ma/CCsfm64+9zgjvo+nlX/heC3QtCC5cCC
 tnIUXrvk/boh3cX9ItZZvnHs7S5eK9yfFZqkoVytGJdRRPM5e8w=
 =Ayiz
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.20-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

memory: tegra: Changes for v5.20-rc1

Add memory client definitions for the Multi-Gigabit Ethernet (MGBE)
controllers found on Tegra234.

* tag 'tegra-for-5.20-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra: Add MGBE memory clients for Tegra234
  dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB 2.0 binding
  dt-bindings: arm: tegra: Add NVIDIA Tegra194 AXI2APB binding
  dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB 1.0 binding
  dt-bindings: memory: Add Tegra234 MGBE memory clients
  dt-bindings: Add Tegra234 MGBE clocks and resets
  dt-bindings: power: Add Tegra234 MGBE power domains
  dt-bindings: Add headers for Tegra234 GPCDMA

Link: https://lore.kernel.org/r/20220708185608.676474-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-12 22:53:08 +02:00
Cixi Geng
8c18fece15 clk: sprd: Add dt-bindings include file for UMS512
This file defines all UMS512 clock indexes, it should be included in the
device tree in which there's device using the clocks.

Signed-off-by: Cixi Geng <cixi.geng1@unisoc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220505101433.1575096-4-gengcixi@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-07-11 12:59:19 -07:00
Arnd Bergmann
a41bf1aabd dt-bindings: Changes for v5.20-rc1
These changes add clock, reset, memory client and power domain
 definitions for various devices found on Tegra234 along with a few
 device tree bindings for new hardware.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmLIeLYTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zodtBEACW4bu7bO2/aAQNOX4R0qUOM64nj9cE
 sqxo1A7JxxGQWBsjiVCD62nCnRP1ehqF2anVEdCJvh2eXlWHdhTgs/lV2HK712Ny
 otkgok/1pVKfvwTuziyqyOHyKD0j2ZoDJlRgYDTF+WUrVrXXnQyc32lt+zmibtH1
 w3TIx6vx4FUnYJELNQPeqbbBP450eIGJ8fZBhIM68kqF/4HKVb4e2jofV3Gd1SBx
 wSBDW63nvqmvErmHfS9LVEX5GcRm0m4RvHWCMK61yc92BwlRKOlweTYczfZmw3oB
 feVtW59+yHYUWa9Dx7PATz7ns+YgpVI9ZU35NKT31/B0gLWh52kZuXFwA9g+02fE
 vq7qV3FhFZtyMBp8CaYopp1INCxU0xXTxvIRw+R00Y5Fab6XUGz+qKTDyHVfhkcD
 LtSHyWQ5h/PAUrcBaAALuvkU8ZCYvdOfTQMQBm5sUoTBMFQ7GsuvOmGy48HbWxLV
 n1SRZNNoXAKWK20Ko+ydLe5rAWpAKOb5onufPhm0JiGziVto/Q/qz9tsh+5lE0Gw
 v9W9poXoLlfwpAdLteAchKCgCGIuWims0XwRxVz8lvudEb6OUyMlr2eUNNYFMGsd
 SnPwHUO67fm6/hxA5NoHDuy0mdynJEcDXaJ+OORfezT/JILgIughAp51+/Whk88p
 ByXU/MOC+61yoA==
 =3/dX
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLMQ3IACgkQmmx57+YA
 GNldFQ//SrIZR5mCeRnLSZEdw5xah7TXwvIOvDw+4JQ3Fbrzq63L/ggm307q6WcC
 4ymOP0ImzAxbHp7Vc5qb6wELSSIiGBy/4y3g/rVinK1ZFRqHiiOkVwHABQp5GMhM
 h/Xm3QVym9UDA4a0hy6EUREb5QHo0l/yYgsXoRJLfh1HuARswevAu2GK+Q4rEH1b
 8aG8xm7fbhafhAJzzJkufOH6WHyhelP0zCVs9Ipa0oOcz1t0/cqYhLDQH/43r76z
 oN+NbEOuCxEShTAhEZ2K5F6lXtR1CB20BE4y5lfMebevSRIXjfN2XfQnJfcAcCY/
 CfT0RCi0w4uz5ZgnkWhI+SbXNT7oHSDvdEogOI1yKm1tm0F8PqUKsPv3tL/P7H0D
 BcOmPslYP10iRuwXDZzbE5FgCZwjIacwJF24BLqI8nEr1U6aC13rwlnsB7mWk1E5
 OXuo/1T0X8R34OrZQzkNpV2WAhT/jNMC5Pj01h0A2XAX0UGB2vP+P5wWurumMkwn
 V8VX82qN0FN6LOOnm+YgreLHv8uR6V95EzIDnvND3dyz0qvsajlIo1Q+PACsVUOA
 fBuxDd2/ABAMglqNNTZTg75PIosrbRqtaaZDq2ehlyWUjn4BGWaEv4W0zZBpyrZB
 CMUQ7ZBhJapvXoRxjOkkPU7WmfYo/CQtjxRkkBS03O+xNIZJxRo=
 =iDCl
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.20-rc1

These changes add clock, reset, memory client and power domain
definitions for various devices found on Tegra234 along with a few
device tree bindings for new hardware.

* tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: tegra-ccplex-cluster: Remove status from required properties
  dt-bindings: Add headers for Host1x and VIC on Tegra234
  dt-bindings: timer: Add Tegra186 & Tegra234 Timer
  dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB 2.0 binding
  dt-bindings: arm: tegra: Add NVIDIA Tegra194 AXI2APB binding
  dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB 1.0 binding
  dt-bindings: memory: Add Tegra234 MGBE memory clients
  dt-bindings: Add Tegra234 MGBE clocks and resets
  dt-bindings: power: Add Tegra234 MGBE power domains
  dt-bindings: Add headers for Tegra234 GPCDMA

Link: https://lore.kernel.org/r/20220708185608.676474-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-11 17:36:17 +02:00
Mikko Perttunen
63a6ef2360 dt-bindings: Add headers for Host1x and VIC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers
for Host1x and VIC on Tegra234.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 16:17:04 +02:00
Claudiu Beznea
4d5e3b06e1 dt-bindings: microchip-otpc: document Microchip OTPC
Document Microchip OTP controller.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220706100627.6534-2-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-07-08 15:45:04 +02:00
Qin Jian
5543604a05 dt-bindings: clock: Add bindings for SP7021 clock driver
Add documentation to describe Sunplus SP7021 clock driver bindings.

Signed-off-by: Qin Jian <qinjian@cqplus1.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 14:23:39 +02:00
Qin Jian
55bfc376b8 dt-bindings: reset: Add bindings for SP7021 reset driver
Add documentation to describe Sunplus SP7021 reset driver bindings.

Signed-off-by: Qin Jian <qinjian@cqplus1.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 14:23:39 +02:00
Arnd Bergmann
132582d210 Renesas ARM DT updates for v5.20 (take two)
- Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB
     development board,
   - AA1024XD12 panel overlay support for the Draak, Ebisu, and
     Salvator-X(S) development boards,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYsfxkAAKCRCKwlD9ZEnx
 cGKNAQC5Wl91yn3heD50V0vXjs6CqNm/bdrWOEmnwwlcnyClqQEAnQjTHs4iriar
 110WP2JSNUoZwawygZFq0jHBgMVFOQA=
 =LnAY
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLIF6MACgkQmmx57+YA
 GNkxQw//ZHD0LKpT4v1C1o1y4MNuVujljbC/uS9Wk+vhYuWebo0OKAu8CEyAwoVO
 SsnYuNpzjLiMlbDc+Id+9C9IbF2k97hUJWDJWMOLF2wtESRtAwkoYHiJToMH9216
 zUxrFpah4LAMKDwPxOqLvBl9/5Hzy4L7tfslmQijiupfGGF6gWiWrA+kgBXpX9+L
 Y1H9PdTd+XLuqmXXa3o+RA0n8d6ZlYxYAJ73OC6nXhr/fd2dpmS/nYtchM3AeLVp
 QAJSf9NnJQPm17G+6TvBHOIOBjyCSsLWemNEbXPkyW3X/H/LCz1RyEeU0fy0B4eu
 wzEwLd/YveEh8WX/l+r8g6gF8OjzzXoQvFIAe4lfXvkUhwFohiCQuBXI34TBzCzb
 fGUKJohs6GSrjKRskIJzaojuaHuKMIlX3+Ynx8XoJqczbWZpqdMs+xTFBnNk8HGH
 lYLsX+rlphZhPeTPQNT2Q7eEnH3skTzBG2Hmhy/2kpZMxtV/epdMt/+BRSRsa/Rp
 LKAL+npYkF9m8Xn0HyWCh2gEpWTHnBOGG/8O7XaPQpJxEfKgCncBjRWGlJlze4Gh
 zRJmfE4OyqhHnXmbpgRNglZjNtiq+z3L7vKLwFYYpvL3lcZtzr75vGpBCt+wyQMf
 b2ZXUPVG0h7bIOuf6RvYYKkNgEePuLyXlAWuhaTdskoDUrQy2EA=
 =wgc5
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.20 (take two)

  - Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB
    development board,
  - AA1024XD12 panel overlay support for the Draak, Ebisu, and
    Salvator-X(S) development boards,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: Add panel overlay for Draak and Ebisu boards
  arm64: dts: renesas: Add panel overlay for Salvator-X(S) boards
  arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay support
  arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort order
  ARM: dts: r9a06g032-rzn1d400-db: Add switch description
  dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter
  ARM: dts: r9a06g032: Describe switch
  ARM: dts: r9a06g032: Describe GMAC2
  ARM: dts: r9a06g032: Describe MII converter
  arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in comment
  ARM: dts: renesas: Fix DA9063 watchdog subnode names
  arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHz

Link: https://lore.kernel.org/r/cover.1657278845.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 13:40:19 +02:00
AngeloGioacchino Del Regno
2b48db01a0 dt-bindings: power: Add MediaTek Helio X10 MT6795 power domains
Add power domains dt-bindings for MediaTek Helio X10 (MT6795).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220503141441.125852-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-07-08 10:26:30 +02:00
Thierry Reding
833f5a7eb2 dt-bindings: memory: Add Tegra234 MGBE memory clients
Add the memory client and stream ID definitions for the MGBE hardware
found on Tegra234 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:20:59 +02:00
Thierry Reding
b0aedf342b dt-bindings: Add Tegra234 MGBE clocks and resets
Add the clocks and resets used by the MGBE Ethernet hardware found on
Tegra234 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:20:59 +02:00
Thierry Reding
5de7d31b50 dt-bindings: power: Add Tegra234 MGBE power domains
Add power domain IDs for the four MGBE power partitions found on
Tegra234.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:20:59 +02:00
Bjorn Andersson
1352b15288 Merge branch '20220706154337.2026269-1-robert.foss@linaro.org' into arm64-for-5.20 2022-07-06 15:23:07 -05:00
Bjorn Andersson
8273ea8994 Merge branch '20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into arm64-for-5.20 2022-07-06 15:22:54 -05:00
Bjorn Andersson
7e06c69221 Merge branch '20220706154337.2026269-1-robert.foss@linaro.org' into clk-for-5.20 2022-07-06 15:20:59 -05:00
Bjorn Andersson
fb162534b3 Merge branch '20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into clk-for-5.20 2022-07-06 15:20:51 -05:00
Vladimir Zapolskiy
494e984af5 dt-bindings: clock: add QCOM SM8450 camera clock bindings
The change adds device tree bindings for camera clock controller
found on SM8450 SoC.

Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062622.2757831-2-vladimir.zapolskiy@linaro.org
2022-07-06 15:18:32 -05:00
Jonathan Marek
909e5be2ca dt-bindings: clock: Add Qcom SM8350 DISPCC bindings
Add sm8350 DISPCC bindings, which are simply a symlink to the sm8250
bindings. Update the documentation with the new compatible.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-4-robert.foss@linaro.org
2022-07-06 15:15:15 -05:00
Robert Foss
e67a004482 dt-bindings: clock: Add Qcom SM8350 GPUCC bindings
Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SM8350 SoCs.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmityr.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-2-robert.foss@linaro.org
2022-07-06 15:15:15 -05:00
Geert Uytterhoeven
ce05f30dc3 Renesas RZ/Five DT Binding Definitions
Clock and reset definitions for the Renesas RZ/Five (R9A07G043) SoC,
 shared by driver and DT source files.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYsPl3QAKCRCKwlD9ZEnx
 cHpUAP0Ub6ksTqu3eQHjJZGdD1o8UpR+AK27Sjwm7h6JTZLuiAEAxuug14RU9gBC
 mJIv1qjFvEYKdeO/f8ASGJ/eKgFS1AY=
 =LTRY
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r9a07g043-dt-binding-defs-tag2' into HEAD

Renesas RZ/Five DT Binding Definitions

Clock and reset definitions for the Renesas RZ/Five (R9A07G043) SoC,
shared by driver and DT source files.
2022-07-05 09:20:22 +02:00
Lad Prabhakar
668d361c9d dt-bindings: clock: r9a07g043-cpg: Add Renesas RZ/Five CPG Clock and Reset Definitions
Renesas RZ/Five SoC has almost the same clock structure compared to the
Renesas RZ/G2UL SoC, re-use the r9a07g043-cpg.h header file and just
amend the RZ/Five CPG clock and reset definitions.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220622181723.13033-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05 09:15:52 +02:00
Peng Fan
e2a4a0eeb0 dt-bindings: interconnect: add fsl,imx8mp.h
Add fsl,imx8mp.h for i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220703091132.1412063-3-peng.fan@oss.nxp.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-07-04 16:14:22 +03:00
Bjorn Andersson
877460f6a4 Merge branch '20220515210048.483898-8-robimarko@gmail.com' into arm64-for-5.20 2022-07-02 22:17:02 -05:00
Phil Edworthy
34e3b69b1e dt-bindings: pinctrl: Add DT bindings for Renesas RZ/V2M pinctrl
Add device tree binding documentation and header file for Renesas
RZ/V2M pinctrl.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220624084833.22605-2-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-01 09:04:40 +02:00
Bjorn Andersson
c87969d218 Merge branch '20220515210048.483898-8-robimarko@gmail.com' into clk-for-5.20 2022-06-30 18:24:35 -05:00
Robert Marko
74622e401e dt-bindings: clock: qcom: ipq8074: add USB GDSCs
Add bindings for the USB GDSCs found in IPQ8074 GCC.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220515210048.483898-8-robimarko@gmail.com
2022-06-30 18:23:44 -05:00
Robert Marko
90e6d29060 dt-bindings: clock: qcom: ipq8074: add PPE crypto clock
Add binding for the PPE crypto clock in IPQ8074.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220515210048.483898-4-robimarko@gmail.com
2022-06-30 18:06:13 -05:00
Bjorn Andersson
36a7b63f06 dt-bindings: mailbox: qcom-ipcc: Add NSP1 client
Add a client for the NSP1 found in some recent Qualcomm platforms.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220629041438.1352536-3-bjorn.andersson@linaro.org
2022-06-30 08:50:00 -05:00
Bryan O'Donoghue
07e7fcf171 clk: qcom: gcc-msm8939: Add missing SYSTEM_MM_NOC_BFDCD_CLK_SRC
When adding in the indexes for this clock-controller we missed
SYSTEM_MM_NOC_BFDCD_CLK_SRC.

Add it in now.

Fixes: 4c71d6abc4 ("clk: qcom: Add DT bindings for MSM8939 GCC")
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220504163835.40130-2-bryan.odonoghue@linaro.org
2022-06-29 22:47:15 -05:00
Yassine Oudjana
57b8b2113e
ASoC: dt-bindings: Add bindings for WCD9335 DAIs
Add bindings for the DAIs available in WCD9335 to avoid
having to use unclear number indices in device trees.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220622161322.168017-2-y.oudjana@protonmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-06-29 18:11:27 +01:00
Clément Léger
45ed13d9b4 dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter
This MII converter can be found on the RZ/N1 processor family. The MII
converter ports are declared as subnodes which are then referenced by
users of the PCS driver such as the switch.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Link: https://lore.kernel.org/r/20220624144001.95518-5-clement.leger@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-29 16:08:06 +02:00
Geert Uytterhoeven
a71a62dd5e dt-bindings: pinctrl: renesas: Remove spaces before #define
Remove spaces at the beginning of lines with #defines.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/5188ef93a911ce3781b16530fdebbf0f0af462b6.1655301264.git.geert+renesas@glider.be
2022-06-29 15:21:58 +02:00
Krzysztof Kozlowski
1a4f20cab6 Merge branch 'for-v5.20/exynos7885-emmc-clk' into next/dt64 2022-06-24 09:12:47 +02:00
David Virag
e756e932a3 dt-bindings: clock: Add indices for Exynos7885 TREX clocks
TREX D Core and P core clocks seem to be related to the BTS (Bus Traffic
Shaper) inside the Exynos7885 SoC, and are needed for the SoC to
function correctly.

Add indices for these clocks.

Signed-off-by: David Virag <virag.david003@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220601233743.56317-3-virag.david003@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-20 13:57:20 +02:00
David Virag
cd268e309c dt-bindings: clock: Add bindings for Exynos7885 CMU_FSYS
CMU_FSYS clock domain provides clocks for MMC (MMC_CARD, MMC_EMBD,
MMC_SDIO), and USB30DRD.

Add clock indices and bindings documentation for CMU_FSYS domain.

Signed-off-by: David Virag <virag.david003@gmail.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220601233743.56317-2-virag.david003@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-20 13:57:03 +02:00
Luca Weiss
394fb16954 dt-bindings: interconnect: Add Qualcomm SM6350 NoC support
Add bindings for Qualcomm SM6350 Network-On-Chip interconnect devices.

As SM6350 has two pairs of NoCs sharing the same reg, allow this in the
binding documentation, as was done for qcm2290.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220525144404.200390-4-luca.weiss@fairphone.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-06-20 14:27:03 +03:00
Claudiu Beznea
5994f58977 dt-bindings: reset: add sama7g5 definitions
Add reset bindings for SAMA7G5. At the moment only USB PHYs are
included.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2022-06-17 17:20:00 +02:00
Wolfram Sang
ee774c40fa dt-bindings: efm32: remove bindings for deleted platform
Commit cc6111375c ("ARM: drop efm32 platform") removed the platform,
so no need to still carry the bindings.

Signed-off-by: Wolfram Sang <wsa@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220615210720.6363-1-wsa@kernel.org
2022-06-16 12:01:14 -06:00
Rex-BC Chen
5ea61b478f dt-bindings: reset: mediatek: Add infra_ao reset index for MT8186
To support reset of infra_ao, add the index of infra_ao reset of
thermal/svs for MT8186.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-18-rex-bc.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-06-15 17:24:25 -07:00
Rex-BC Chen
fb91526b5f dt-bindings: reset: mediatek: Add infra_ao reset index for MT8192/MT8195
To support reset of infra_ao, add the index of infra_ao reset of
thermal/svs/pcei for MT8192 and thermal/svs for MT8195.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
[Nícolas: Test for MT8192]
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-14-rex-bc.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-06-15 17:24:13 -07:00
Thomas Gleixner
5a729246e5 treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license version 2 as
    published by the free software foundation  this program is distributed
    as is without any warranty of any kind whether express or implied
    without even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-10 14:51:36 +02:00
Thomas Gleixner
94c0ded75c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_133.RULE
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license version 2 as
    published by the free software foundation  this program is distributed
    in the hope that it will be useful merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-10 14:51:35 +02:00
Thomas Gleixner
2aec85b26f treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 2)
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license as published by the
    free software foundation version 2  this program is distributed as is
    without any warranty of any kind whether express or implied without
    even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-10 14:51:35 +02:00
Akhil R
3ffb20f5c7 dt-bindings: Add headers for Tegra234 GPCDMA
Add reset and IOMMU header for Tegra234 GPCDMA

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-06-08 15:50:24 +02:00
Chanho Park
9509995155 dt-bindings: soc: add samsung,boot-mode definitions
Adds samsung,boot-mode.h header file which contains boot mode
definitions for bootloader. As for now, there are only boot mode
definitions for Exynos Auto v9 SoC.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220523121244.67341-2-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-06 10:33:25 +02:00
Linus Torvalds
6f9b5ed8ca Char / Misc / Other smaller driver subsystem updates for 5.19-rc1
Here is the large set of char, misc, and other driver subsystem updates
 for 5.19-rc1.  The merge request for this has been delayed as I wanted
 to get lots of linux-next testing due to some late arrivals of changes
 for the habannalabs driver.
 
 Highlights of this merge are:
 	- habanalabs driver updates for new hardware types and fixes and
 	  other updates
 	- IIO driver tree merge which includes loads of new IIO drivers
 	  and cleanups and additions
 	- PHY driver tree merge with new drivers and small updates to
 	  existing ones
 	- interconnect driver tree merge with fixes and updates
 	- soundwire driver tree merge with some small fixes
 	- coresight driver tree merge with small fixes and updates
 	- mhi bus driver tree merge with lots of updates and new device
 	  support
 	- firmware driver updates
 	- fpga driver updates
 	- lkdtm driver updates (with a merge conflict, more on that
 	  below)
 	- extcon driver tree merge with small updates
 	- lots of other tiny driver updates and fixes and cleanups, full
 	  details in the shortlog.
 
 All of these have been in linux-next for almost 2 weeks with no reported
 problems.
 
 Note, there are 3 merge conflicts when merging this with your tree:
 	- MAINTAINERS, should be easy to resolve
 	- drivers/slimbus/qcom-ctrl.c, should be straightforward
 	  resolution
 	- drivers/misc/lkdtm/stackleak.c, not an easy resolution.  This
 	  has been noted in the linux-next tree for a while, and
 	  resolved there, here's a link to the resolution that Stephen
 	  came up with and that Kees says is correct:
 	  	https://lore.kernel.org/r/20220509185344.3fe1a354@canb.auug.org.au
 
 I will be glad to provide a merge point that contains these resolutions
 if that makes things any easier for you.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYpnkbA8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ylOrgCggbbAFwESBY9o2YfpG+2VOLpc0GAAoJgY1XN8
 P/gumbLEpFvoBZ5xLIW8
 =KCgk
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc / other smaller driver subsystem updates from Greg KH:
 "Here is the large set of char, misc, and other driver subsystem
  updates for 5.19-rc1. The merge request for this has been delayed as I
  wanted to get lots of linux-next testing due to some late arrivals of
  changes for the habannalabs driver.

  Highlights of this merge are:

   - habanalabs driver updates for new hardware types and fixes and
     other updates

   - IIO driver tree merge which includes loads of new IIO drivers and
     cleanups and additions

   - PHY driver tree merge with new drivers and small updates to
     existing ones

   - interconnect driver tree merge with fixes and updates

   - soundwire driver tree merge with some small fixes

   - coresight driver tree merge with small fixes and updates

   - mhi bus driver tree merge with lots of updates and new device
     support

   - firmware driver updates

   - fpga driver updates

   - lkdtm driver updates (with a merge conflict, more on that below)

   - extcon driver tree merge with small updates

   - lots of other tiny driver updates and fixes and cleanups, full
     details in the shortlog.

  All of these have been in linux-next for almost 2 weeks with no
  reported problems"

* tag 'char-misc-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (387 commits)
  habanalabs: use separate structure info for each error collect data
  habanalabs: fix missing handle shift during mmap
  habanalabs: remove hdev from hl_ctx_get args
  habanalabs: do MMU prefetch as deferred work
  habanalabs: order memory manager messages
  habanalabs: return -EFAULT on copy_to_user error
  habanalabs: use NULL for eventfd
  habanalabs: update firmware header
  habanalabs: add support for notification via eventfd
  habanalabs: add topic to memory manager buffer
  habanalabs: handle race in driver fini
  habanalabs: add device memory scrub ability through debugfs
  habanalabs: use unified memory manager for CB flow
  habanalabs: unified memory manager new code for CB flow
  habanalabs/gaudi: set arbitration timeout to a high value
  habanalabs: add put by handle method to memory manager
  habanalabs: hide memory manager page shift
  habanalabs: Add separate poll interval value for protocol
  habanalabs: use get_task_pid() to take PID
  habanalabs: add prefetch flag to the MAP operation
  ...
2022-06-03 11:36:34 -07:00
Linus Torvalds
96752be4d7 linux-watchdog 5.19-rc1 tag
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.14 (GNU/Linux)
 
 iEYEABECAAYFAmKXhXYACgkQ+iyteGJfRsoTRQCgre6Jur9IDwegaxnbFpgZTde9
 wf4AnAo5l8Vyz7EQLG1YSPjzr5kmK263
 =Xdkg
 -----END PGP SIGNATURE-----

Merge tag 'linux-watchdog-5.19-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

 - Add MediaTek MT8186 support

 - Add Mediatek MT7986 reset-controller support

 - Add i.MX93 support

 - Add watchdog driver for Sunplus SP7021

 - Add SC8180X and SC8280XP compatibles

 - Add Renesas RZ/N1 Watchdog driver and support for RZ/N1

 - rzg2l_wdt improvements and fixes

 - Several other improvements and fixes

* tag 'linux-watchdog-5.19-rc1' of git://www.linux-watchdog.org/linux-watchdog: (38 commits)
  watchdog: ts4800_wdt: Fix refcount leak in ts4800_wdt_probe
  dt-bindings: watchdog: renesas,wdt: R-Car V3U is R-Car Gen4
  watchdog: Add Renesas RZ/N1 Watchdog driver
  dt-bindings: watchdog: renesas,wdt: Add support for RZ/N1
  watchdog: wdat_wdt: Stop watchdog when uninstalling module
  watchdog: wdat_wdt: Stop watchdog when rebooting the system
  watchdog: wdat_wdt: Using the existing function to check parameter timeout
  dt-bindings: watchdog: da9062: add watchdog timeout mode
  dt-bindings: watchdog: renesas,wdt: Document RZ/G2UL SoC
  watchdog: iTCO_wdt: Using existing macro define covers more scenarios
  watchdog: rti-wdt: Fix pm_runtime_get_sync() error checking
  dt-bindings: watchdog: Add SC8180X and SC8280XP compatibles
  watchdog: rti_wdt: Fix calculation and evaluation of preset heartbeat
  dt-bindings: watchdog: uniphier: Use unevaluatedProperties
  watchdog: sp805: disable watchdog on remove
  watchdog: da9063: optionally disable watchdog during suspend
  dt-bindings: mfd: da9063: watchdog: add suspend disable option
  dt-bindings: watchdog: sunxi: clarify clock support
  dt-bindings: watchdog: sunxi: fix F1C100s compatible
  watchdog: Add watchdog driver for Sunplus SP7021
  ...
2022-06-01 14:05:16 -07:00
Linus Torvalds
8eca6b0a64 pwm: Changes for v5.19-rc1
Quite a large number of conversions this time around, courtesy of Uwe
 who has been working tirelessly on these. No drivers of the legacy API
 are left at this point, so as a next step the old API can be removed.
 
 Support is added for a few new devices such as the Xilinx AXI timer-
 based PWMs and the PWM IP found on Sunplus SoCs.
 
 Other than that, there's a number of fixes, cleanups and optimizations.
 -----BEGIN PGP SIGNATURE-----
 
 iQJNBAABCAA3FiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmKXeUoZHHRoaWVycnku
 cmVkaW5nQGdtYWlsLmNvbQAKCRDdI6zXfz6zoQ44D/9ZtpQ30tKUQS4o55iiQZBy
 7cfeHK++6oCrcIp57j5TEJaMh+DRz23ga+5/Sp2YeqCCswifrM/Lxm/ys34045oa
 YVHF1Yz9NbyE7d5W+Jzoo3cFBcne6lFgwcN8qVfpc2O35PwmzWSbU3iBlIq0qxbC
 etWbDxBzFbsNsvH6TSNP7xYxfRVct+KYBIl4ySswqryHry2Bl9mTV2P9wS3CkZne
 4y6RWyYeaNBmqLxCOiw98pXr70uJKRAy1qoEUvFBZGzYsb9kwOG9J7RQJxgtwVFK
 YJ+l/c/cq1U3LtQQImcPhx8y+jdRpFK3RlcA6cRBHP3PWuTUsKPKYf2DFEee3bYv
 NhNxkuJhuXhvqpB3Bb5xrnOE34tjF4tLPz74UxaU/DlLqeveyvaqsVuGK7IVbxcU
 YVsceNJHdTJdkKaomB/OkmNrKEf8XNmCmF+x2FPAMKBnJ+E43jKuPk7TTUJrJLn0
 O57VjKmiA3ZsztgWudSOiOvTxmsfRnlHTcPvMO8MbYO9tXVFOBGuzV3RgxKvwpDT
 EWp5VAQp8JMoLvG3fdB4wbZ8isVooYdYYw/jiUG5MA3MGxW+4zmRR/+BglsKpMU7
 AujYBUeInXg1bwezBUW4EieslFVQ/8ctsXj84bbIg3gA5SRSgp/ccH/2ollnAsPU
 Dw6E+STJiQM95NqfUUb8IQ==
 =CwnJ
 -----END PGP SIGNATURE-----

Merge tag 'pwm/for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "Quite a large number of conversions this time around, courtesy of Uwe
  who has been working tirelessly on these. No drivers of the legacy API
  are left at this point, so as a next step the old API can be removed.

  Support is added for a few new devices such as the Xilinx AXI timer-
  based PWMs and the PWM IP found on Sunplus SoCs.

  Other than that, there's a number of fixes, cleanups and optimizations"

* tag 'pwm/for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (43 commits)
  pwm: pwm-cros-ec: Add channel type support
  dt-bindings: google,cros-ec-pwm: Add the new -type compatible
  dt-bindings: Add mfd/cros_ec definitions
  pwm: Document that the pinstate of a disabled PWM isn't reliable
  pwm: twl-led: Implement .apply() callback
  pwm: lpc18xx: Implement .apply() callback
  pwm: mediatek: Implement .apply() callback
  pwm: lpc32xx: Implement .apply() callback
  pwm: tegra: Implement .apply() callback
  pwm: stmpe: Implement .apply() callback
  pwm: sti: Implement .apply() callback
  pwm: pwm-mediatek: Add support for MediaTek Helio X10 MT6795
  dt-bindings: pwm: pwm-mediatek: Add documentation for MT6795 SoC
  pwm: tegra: Optimize period calculation
  pwm: renesas-tpu: Improve precision of period and duty_cycle calculation
  pwm: renesas-tpu: Improve maths to compute register settings
  pwm: renesas-tpu: Rename variables to match the usual naming
  pwm: renesas-tpu: Implement .apply() callback
  pwm: renesas-tpu: Make use of devm functions
  pwm: renesas-tpu: Make use of dev_err_probe()
  ...
2022-06-01 10:49:11 -07:00
Linus Torvalds
e1cbc3b96a IOMMU Updates for Linux v5.19
Including:
 
 	- Intel VT-d driver updates
 	  - Domain force snooping improvement.
 	  - Cleanups, no intentional functional changes.
 
 	- ARM SMMU driver updates
 	  - Add new Qualcomm device-tree compatible strings
 	  - Add new Nvidia device-tree compatible string for Tegra234
 	  - Fix UAF in SMMUv3 shared virtual addressing code
 	  - Force identity-mapped domains for users of ye olde SMMU
 	    legacy binding
 	  - Minor cleanups
 
 	- Patches to fix a BUG_ON in the vfio_iommu_group_notifier
 	  - Groundwork for upcoming iommufd framework
 	  - Introduction of DMA ownership so that an entire IOMMU group
 	    is either controlled by the kernel or by user-space
 
 	- MT8195 and MT8186 support in the Mediatek IOMMU driver
 
 	- Patches to make forcing of cache-coherent DMA more coherent
 	  between IOMMU drivers
 
 	- Fixes for thunderbolt device DMA protection
 
 	- Various smaller fixes and cleanups
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmKWCbUACgkQK/BELZcB
 GuPHmRAAuoH9iK/jrC3SgrqpBfH2iRN7ovIX8dFvgbQWX27lhXF4gvj2/nYdIvPK
 75j/LmdibuzV3Iez4kjbGKNG1AikwK3dKIH21a84f3ctnoamQyL6nMfCVBFaVD/D
 kvPpTHyjbGPNf6KZyWQdkJ5DXD1aoG1DKkBnslH5pTNPqGuNqbcnRTg0YxiJFLBv
 5w2B6jL06XRzunh+Sp1Dbj+po8ROjLRCEU+tdrndO8W/Dyp6+ZNNuxL9/3BM9zMj
 py0M4piFtGnhmJSdym1eeHm7r1YRjkZw+MN+e8NcrcSihmDutEWo7nRRxA5uVaa+
 3O2DNERqCvQUYxfNRUOKwzV8v51GYQHEPhvOe/MLgaEQDmDmlF2dHNGm93eCMdrv
 m1cT011oU7pa4qHomwLyTJxSsR7FzJ37igq/WeY++MBhl+frqfzEQPVxF+W7GLb8
 QvT/+woCPzLVpJbE7s0FUD4nbPd8c1dAz4+HO1DajxILIOTq1bnPIorSjgXODRjq
 yzsiP1rAg0L0PsL7pXn3cPMzNCE//xtOsRsAGmaVv6wBoMLyWVFCU/wjPEdjrSWA
 nXpAuCL84uxCEl/KLYMsg9UhjT6ko7CuKdsybIG9zNIiUau43uSqgTen0xCpYt0i
 m//O/X3tPyxmoLKRW+XVehGOrBZW+qrQny6hk/Zex+6UJQqVMTA=
 =W0hj
 -----END PGP SIGNATURE-----

Merge tag 'iommu-updates-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu updates from Joerg Roedel:

 - Intel VT-d driver updates:
     - Domain force snooping improvement.
     - Cleanups, no intentional functional changes.

 - ARM SMMU driver updates:
     - Add new Qualcomm device-tree compatible strings
     - Add new Nvidia device-tree compatible string for Tegra234
     - Fix UAF in SMMUv3 shared virtual addressing code
     - Force identity-mapped domains for users of ye olde SMMU legacy
       binding
     - Minor cleanups

 - Fix a BUG_ON in the vfio_iommu_group_notifier:
     - Groundwork for upcoming iommufd framework
     - Introduction of DMA ownership so that an entire IOMMU group is
       either controlled by the kernel or by user-space

 - MT8195 and MT8186 support in the Mediatek IOMMU driver

 - Make forcing of cache-coherent DMA more coherent between IOMMU
   drivers

 - Fixes for thunderbolt device DMA protection

 - Various smaller fixes and cleanups

* tag 'iommu-updates-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (88 commits)
  iommu/amd: Increase timeout waiting for GA log enablement
  iommu/s390: Tolerate repeat attach_dev calls
  iommu/vt-d: Remove hard coding PGSNP bit in PASID entries
  iommu/vt-d: Remove domain_update_iommu_snooping()
  iommu/vt-d: Check domain force_snooping against attached devices
  iommu/vt-d: Block force-snoop domain attaching if no SC support
  iommu/vt-d: Size Page Request Queue to avoid overflow condition
  iommu/vt-d: Fold dmar_insert_one_dev_info() into its caller
  iommu/vt-d: Change return type of dmar_insert_one_dev_info()
  iommu/vt-d: Remove unneeded validity check on dev
  iommu/dma: Explicitly sort PCI DMA windows
  iommu/dma: Fix iova map result check bug
  iommu/mediatek: Fix NULL pointer dereference when printing dev_name
  iommu: iommu_group_claim_dma_owner() must always assign a domain
  iommu/arm-smmu: Force identity domains for legacy binding
  iommu/arm-smmu: Support Tegra234 SMMU
  dt-bindings: arm-smmu: Add compatible for Tegra234 SOC
  dt-bindings: arm-smmu: Document nvidia,memory-controller property
  iommu/arm-smmu-qcom: Add SC8280XP support
  dt-bindings: arm-smmu: Add compatible for Qualcomm SC8280XP
  ...
2022-05-31 09:56:54 -07:00
Linus Torvalds
907bb57aa7 Pin control bulk changes for the v5.19 series:
Core changes:
 
 - New helpers from Andy such as for_each_gpiochip_node() affecting both
   GPIO and pin control, improving a bunch of drivers in the process.
 
 - Pulled in Marc Zyngiers work to make IRQ chips immutable, and started
   to apply fixups on top.
 
 New drivers:
 
 - New driver for Marvell MVEBU 98DX2530.
 
 - New driver for Mediatek MT8195.
 
 - Support Qualcomm PMX65 and PM6125.
 
 - New driver for Qualcomm SC7280 LPASS pin control.
 
 - New driver for Rockchip RK3588.
 
 - New driver for NXP Freescale i.MXRT1170.
 
 - New driver for Mediatek MT6795 Helio X10.
 
 Improvements:
 
 - Several Aspeed G6 cleanups and non-critical fixes.
 
 - Thorought refactoring of some of the ever improving Renesas drivers.
 
 - Clean up Mediatek MT8192 bindings a bit.
 
 - PWM output and clock monitoring in the Ocelot LAN966x driver.
 
 - Thorough refactoring and cleanup of the Ralink drivers such as
   RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into proper
   sub-drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmKR6skACgkQQRCzN7AZ
 XXMpAg/+JXKTooNIuxsfXO2SSQouGJP3xIa0iLdhEKahN8vM7Rp4ND3vuqOI7eqp
 pQrGVqY2BiRDhFTz6cku5dBK9tQUlHB9fqr0XHZ65W5pVjz2FCMIE5RemlyNhPMf
 OMv4BfJA3Mk71nqmcWjTAc+l7Iw1HAdGrQ4QJpfCHT/eGZCGZXS6q7/iNKyNlnpK
 iN7CuJn4YxB8EyAxySEFIi1R/CP1nA1Hmeq1ICxLbFrG/NFZoFjKX1a4xJi4ns7/
 3Sn3Vq9t5hJLbU3VZsQymNlCNqzKTtLcSugUlNzkXzvLKebbh27ZVrjWs7pye/s5
 Bqbg0e9oDJkAnw8+/tgXKh88hz6ZdUWRVWJElkfp+LyFBuIitGWcaHOEhhaEEHIZ
 Utrvba8hjq2r7ASw3gvMWFVHhrQYGBONDkAQGXLtKKFHoNfXf6O5BOmyc0gsYdBo
 Sx6X/lAahZkvV17dDop9AlOquf3+jExUHZNftLouazzxqJ1xoDVkbiRz3iKf29n0
 +F7hpt0M01jQxUS6whOv9jdR+jAplds35ess99Wput8R5X8ICZRhEtdj4ON10lM/
 pI9biaoNXtglCHc2J+nm9EXzD0DePjs/ULCs/0C6FLZ4I5BfZ8dkwe7QNW/cM2vA
 V1YTeLVujQASmJo+pfWACoE1nbOg/no1sY1foUKeYnjfhS+OuZg=
 =e5GM
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Pretty big this time. Mostly due to (nice) Renesas refactorings.

  Core changes:

   - New helpers from Andy such as for_each_gpiochip_node() affecting
     both GPIO and pin control, improving a bunch of drivers in the
     process.

   - Pulled in Marc Zyngiers work to make IRQ chips immutable, and
     started to apply fixups on top.

  New drivers:

   - New driver for Marvell MVEBU 98DX2530.

   - New driver for Mediatek MT8195.

   - Support Qualcomm PMX65 and PM6125.

   - New driver for Qualcomm SC7280 LPASS pin control.

   - New driver for Rockchip RK3588.

   - New driver for NXP Freescale i.MXRT1170.

   - New driver for Mediatek MT6795 Helio X10.

  Improvements:

   - Several Aspeed G6 cleanups and non-critical fixes.

   - Thorought refactoring of some of the ever improving Renesas
     drivers.

   - Clean up Mediatek MT8192 bindings a bit.

   - PWM output and clock monitoring in the Ocelot LAN966x driver.

   - Thorough refactoring and cleanup of the Ralink drivers such as
     RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into
     proper sub-drivers"

* tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (161 commits)
  pinctrl: apple: Use a raw spinlock for the regmap
  pinctrl: berlin: bg4ct: Use devm_platform_*ioremap_resource() APIs
  pinctrl: intel: Fix kernel doc format, i.e. add return sections
  dt-bindings: pinctrl: qcom: Drop 'maxItems' on 'wakeup-parent'
  pinctrl: starfive: Make the irqchip immutable
  pinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10
  dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings
  pinctrl: freescale: Add i.MXRT1170 pinctrl driver support
  dt-bindings: pinctrl: add i.MXRT1170 pinctrl Documentation
  dt-bindings: pinctrl: rockchip: increase max amount of device functions
  dt-bindings: pinctrl: qcom,pmic-gpio: add 'gpio-reserved-ranges'
  dt-bindings: pinctrl: qcom,pmic-gpio: add 'input-disable'
  dt-bindings: pinctrl: qcom,pmic-gpio: describe gpio-line-names
  dt-bindings: pinctrl: qcom,pmic-gpio: fix matching pin config
  dt-bindings: pinctrl: qcom,pmic-gpio: document PM8150L and PMM8155AU
  pinctrl: qcom: spmi-gpio: Add pm6125 compatible
  dt-bindings: pinctrl: qcom-pmic-gpio: Add pm6125 compatible
  pinctrl: intel: Drop unused irqchip member in struct intel_pinctrl
  pinctrl: intel: make irq_chip immutable
  pinctrl: cherryview: Use GPIO chip pointer in chv_gpio_irq_mask_unmask()
  ...
2022-05-28 11:15:54 -07:00
Linus Torvalds
6b0e34a030 Mainly driver updates this time around. There's a single patch to the core clk
framework that simplifies a runtime PM call. Otherwise the majority of the diff
 falls to a few SoC drivers: Qualcomm, STM32 and MediaTek. Those SoCs gain some
 new hardware support and what comes along with that is quite a few lines of
 data and some clk_ops code. Beyond the new hardware support we have the usual
 pile of driver updates that add missing clks on already supported SoCs or fix
 up problems like bad clk tree descriptions. It's nice to see that more drivers
 are moving to clk_hw based APIs too.
 
 New Drivers:
  - Add STM32MP13 RCC driver (Reset Clock Controller)
  - MediaTek MT8186 SoC clk support
  - Airoha EN7523 SoC system clocks
  - Clock driver for exynosautov9 SoC
  - Renesas R-Car V4H and RZ/V2M SoCs
  - Renesas RZ/G2UL SoC
  - LPASS clk driver for Qualcomm sc7280 SoC
  - GCC clk driver for Qualcomm SC8280XP SoC
 
 Updates:
  - SDCC uses floor clk ops on Qualcomm MSM8976
  - Add modem reset and fix RPM clks on Qualcomm MSM8976
  - Add the two missing CLKOUT clocks for U8500/DB8500 SoC
  - Mark some clks critical on Ingenic X1000
  - Convert ux500 to clk_hw
  - Move MediaTek driver to clk_hw provider APIs
  - Use i2c driver probe_new to avoid id scans
  - Convert a number of Rockchip dt bindings to YAML
  - Mark hclk_vo critical on Rockchip rk3568
  - Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage
  - Various cleanups like memory allocation error checks and plugged leaks
  - Allwinner H6 RTC clock support
  - Allwinner H616 32 kHz clock support
  - Add the Universal Flash Storage clock on Renesas R-Car S4-8
  - Add I2C, SSIF-2 (sound), USB, CANFD, OSTM (timer), WDT, SPI Multi
    I/O Bus, RSPI, TSU (thermal), and ADC clocks and resets on Renesas RZ/G2UL
  - Add display clock support on Renesas RZ/G2L
  - Add RPC (QSPI/HyperFlash) clocks on Renesas R-Car E3 and D3
  - Add 27 MHz phy PLL ref clock on i.MX
  - Add mcore_booted module parameter to tell kernel M core has already booted
    for i.MX
  - Remove snvs clock on i.MX because it was for secure world only
  - Add dt bindings for i.MX8MN GPT
  - Add DISP2 pixel clock for i.MX8MP
  - Add clkout1/2 for i.MX8MP
  - Fix parent clock of ubs_root_clk for i.MX8MP
  - Implement better RCG parking on Qualcomm SoCs using the shared RCG clk ops
  - Kerneldoc fixes
  - Switch Tegra BPMP to determine_rate clk op
  - Add a pointer to dt schema for generic clock bindings
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmKQCksRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSW6NxAA3HZBExSU8gb3XpLWDBcsjFLdR/3Pg2dW
 GC40IGjX8ZVZ4UOZxwOHXwtycuQcnbfU6bZgw2VHvH1G+xnM9Gyqrk2XfAKhxB8D
 cvKUhWoQYQBhpjLD8bDfKLb6tCYD/KmGMkkHl0WDUfeV3TlNLhp6mKXLK3buovJ8
 XC8BYUK5+8ks4pgGH42PIt33w5yE71AmFpYyyuuprhBvTcwUe8UfhZwI6YFPmwi8
 Zbzo0VTGMnCvFFK47zsvsBbwyaEBuNuM2hKcxt2URY2F08W/q5WzduMVUDcMMgWV
 /X8r+0m+YwQiUCd9qqAQYdIUWODcoaEJoRlv0pr0CKrz4ovzWLBO67G84bRVEHEn
 LNTfsjH9mJMZMZ89hBy2gbWXa/zKKPcqdtI82/i4LWHP72CcpTQmiyjUsUy+cZ+P
 usyILn/H3A1rCJ0NTmYeQo2Ja91KVvobuqnWC9euELRLKGeGgmRU6nkVBqIhN8Q+
 asJyKcD6yow+2wilYyWtrbV1WYmwZ0zIMEH3kEkitXrqjbSwfZqCcOfwc+1IC/FK
 /xT7wOBIN/6MB4+O7scWA7RZZyeCJxX7OndIMzxYG2mJLG6rLsWoGZhAqKrHJKV8
 D4fHB7FcCyp8Vj01oeKPUanPoqDYCpI3IfpcxnWkl1lU/+xi1WtPV510cTDBYTdY
 NY4pPKxfA2g=
 =7lBA
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Mainly driver updates this time around.

  There's a single patch to the core clk framework that simplifies a
  runtime PM call. Otherwise the majority of the diff falls to a few SoC
  drivers: Qualcomm, STM32 and MediaTek. Those SoCs gain some new
  hardware support and what comes along with that is quite a few lines
  of data and some clk_ops code.

  Beyond the new hardware support we have the usual pile of driver
  updates that add missing clks on already supported SoCs or fix up
  problems like bad clk tree descriptions. It's nice to see that more
  drivers are moving to clk_hw based APIs too.

  New Drivers:
   - Add STM32MP13 RCC driver (Reset Clock Controller)
   - MediaTek MT8186 SoC clk support
   - Airoha EN7523 SoC system clocks
   - Clock driver for exynosautov9 SoC
   - Renesas R-Car V4H and RZ/V2M SoCs
   - Renesas RZ/G2UL SoC
   - LPASS clk driver for Qualcomm sc7280 SoC
   - GCC clk driver for Qualcomm SC8280XP SoC

  Updates:
   - SDCC uses floor clk ops on Qualcomm MSM8976
   - Add modem reset and fix RPM clks on Qualcomm MSM8976
   - Add the two missing CLKOUT clocks for U8500/DB8500 SoC
   - Mark some clks critical on Ingenic X1000
   - Convert ux500 to clk_hw
   - Move MediaTek driver to clk_hw provider APIs
   - Use i2c driver probe_new to avoid id scans
   - Convert a number of Rockchip dt bindings to YAML
   - Mark hclk_vo critical on Rockchip rk3568
   - Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage
   - Various cleanups like memory allocation error checks and plugged
     leaks
   - Allwinner H6 RTC clock support
   - Allwinner H616 32 kHz clock support
   - Add the Universal Flash Storage clock on Renesas R-Car S4-8
   - Add I2C, SSIF-2 (sound), USB, CANFD, OSTM (timer), WDT, SPI Multi
     I/O Bus, RSPI, TSU (thermal), and ADC clocks and resets on Renesas
     RZ/G2UL
   - Add display clock support on Renesas RZ/G2L
   - Add RPC (QSPI/HyperFlash) clocks on Renesas R-Car E3 and D3
   - Add 27 MHz phy PLL ref clock on i.MX
   - Add mcore_booted module parameter to tell kernel M core has already
     booted for i.MX
   - Remove snvs clock on i.MX because it was for secure world only
   - Add dt bindings for i.MX8MN GPT
   - Add DISP2 pixel clock for i.MX8MP
   - Add clkout1/2 for i.MX8MP
   - Fix parent clock of ubs_root_clk for i.MX8MP
   - Implement better RCG parking on Qualcomm SoCs using the shared RCG
     clk ops
   - Kerneldoc fixes
   - Switch Tegra BPMP to determine_rate clk op
   - Add a pointer to dt schema for generic clock bindings"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (168 commits)
  Revert "clk: qcom: regmap-mux: add pipe clk implementation"
  Revert "clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe clocks"
  Revert "clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks"
  clk: bcm: rpi: Use correct order for the parameters of devm_kcalloc()
  clk: stm32mp13: add safe mux management
  clk: stm32mp13: add multi mux function
  clk: stm32mp13: add all STM32MP13 kernel clocks
  clk: stm32mp13: add all STM32MP13 peripheral clocks
  clk: stm32mp13: manage secured clocks
  clk: stm32mp13: add composite clock
  clk: stm32mp13: add stm32 divider clock
  clk: stm32mp13: add stm32_gate management
  clk: stm32mp13: add stm32_mux clock management
  clk: stm32: Introduce STM32MP13 RCC drivers (Reset Clock Controller)
  dt-bindings: rcc: stm32: add new compatible for STM32MP13 SoC
  clk: ti: clkctrl: replace usage of found with dedicated list iterator variable
  clk: ti: composite: Prefer kcalloc over open coded arithmetic
  dt-bindings: clock: exynosautov9: correct count of NR_CLK
  clk: mediatek: mt8173: Switch to clk_hw provider APIs
  clk: mediatek: Switch to clk_hw provider APIs
  ...
2022-05-27 15:33:24 -07:00
Linus Torvalds
cdeffe87f7 - api: hrtimer fix
- qcom: log pending irq during resume
 		minor cosmetic changes
 - omap: use pm_runtime_resume_and_get
 - imx: use pm_runtime_resume_and_get
 		remove redundant initializer
 - mtk: added GCE header for MT8186
 		enable support for MT8186
 - tegra: remove redundant NULL check
 		added hsp_sm_ops for send/recv api
 		support shared mailboxes
 - stm: remove unsupported "wakeup" irq
 - pcc: sanitize mbox allocated memory before use
 - misc: documentation fixes for arm_mhu and qcom-ipcc
 
 -
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmKO3ZYACgkQf9lkf8eY
 P5VYug/8DfK0Ang0Sgw7DkT0w1TVY5sAUvq9EgA5z65HL2Vf6hdCMN5JAAVOBuqg
 L8BcKegci3/aa5rxbRXpjAcNAFVG9RiaZ6i0qrXL2QGpNGoqXDFH4z7thREjgCYz
 LgwSILyNneOovEuNqCFas7zyJSzzaIUCOybJgHA8ZVpCOnCKNHW5mZhi8tlCIbJ9
 aY0rLD7Kc9ZLQ3N4JfvjtevaQ5EQR8EpMCQSIksdm5U9k8ej8dJPfDibUzM0PICU
 o1DAYG9WxsqibufkJjFYFKf3uxW6dlcWzhUB4QVP3gnmvSIicNfaHTNvOgYOeLYw
 d9yXz/ixxakVH2zGTCz6WELG8YQSzvzkjwOFAeDI7vNYgKE23v6l0Hj7dnc+akYW
 08wP4Nyo5HRUPk4KnIOiRpNMw7QQKfS7Lufp8L6uwHVlf0uLBvoT49Px9d5ZdIO9
 4pR8DLfuSfhU5swuhepipCs7z+NGfvMp2eeqqv1urfvlgjh9d2Y2A/g5qhC4/Zjt
 CK27rKIFTpL0Wn2r1pV6+1rLXc0x3o5CXJBFMNLYZEfMJ91ZvyS3InZqebIcUk7f
 0yUzLGCSY0a86Xriq8lvkYs+roQxl4Gqm2Jwn9RQisQQ2Q1OOW0g2ZqaG7mZGQf3
 v5/gq5w3x1rbHU5Cn8yuFMw8D9O0kJ6ExNdqHtfiNLkmcPMM8Vc=
 =f51u
 -----END PGP SIGNATURE-----

Merge tag 'mailbox-v5.19' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:
 "api:
   - hrtimer fix

  qcom:
   - log pending irq during resume
   - minor cosmetic changes

  omap:
   - use pm_runtime_resume_and_get

  imx:
   - use pm_runtime_resume_and_get
   - remove redundant initializer

  mtk:
   - added GCE header for MT8186
   - enable support for MT8186

  tegra:
   - remove redundant NULL check
   - added hsp_sm_ops for send/recv api
   - support shared mailboxes

  stm:
   - remove unsupported "wakeup" irq

  pcc:
   - sanitize mbox allocated memory before use

  misc:
   - documentation fixes for arm_mhu and qcom-ipcc"

* tag 'mailbox-v5.19' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: qcom-ipcc: Fix -Wunused-function with CONFIG_PM_SLEEP=n
  mailbox: forward the hrtimer if not queued and under a lock
  mailbox: qcom-ipcc: Log the pending interrupt during resume
  mailbox: pcc: Fix an invalid-load caught by the address sanitizer
  dt-bindings: mailbox: remove the IPCC "wakeup" IRQ
  mailbox: correct kerneldoc
  mailbox: omap: using pm_runtime_resume_and_get to simplify the code
  mailbox:imx: using pm_runtime_resume_and_get
  mailbox: mediatek: support mt8186 adsp mailbox
  dt-bindings: mailbox: mtk,adsp-mbox: add mt8186 compatible name
  mailbox: tegra-hsp: Add 128-bit shared mailbox support
  dt-bindings: tegra186-hsp: add type for shared mailboxes
  mailbox: tegra-hsp: Add tegra_hsp_sm_ops
  dt-bindings: gce: add the GCE header file for MT8186
  mailbox: remove an unneeded NULL check on list iterator
  mailbox: imx: remove redundant initializer
  dt-bindings: mailbox: qcom-ipcc: simplify the example
2022-05-26 14:57:25 -07:00
Linus Torvalds
cc3c470ae4 ARM: driver changes for 5.19
There are minor updates to SoC specific drivers for chips by Rockchip,
 Samsung, NVIDIA, TI, NXP, i.MX, Qualcomm, and Broadcom. Noteworthy
 driver changes include:
 
 - Several conversions of DT bindings to yaml format.
 
 - Renesas adds driver support for R-Car V4H, RZ/V2M and RZ/G2UL SoCs.
 
 - Qualcomm adds a bus driver for the SSC (Snapdragon Sensor Core),
   and support for more chips in the RPMh power domains and the soc-id.
 
 - NXP has a new driver for the HDMI blk-ctrl on i.MX8MP.
 
 - Apple M1 gains support for the on-chip NVMe controller, making it
   possible to finally use the internal disks. This also includes SoC
   drivers for their RTKit IPC and for the SART DMA address filter.
 
 For other subsystems that merge their drivers through the SoC tree,
 we have
 
 - Firmware drivers for the ARM firmware stack including TEE, OP-TEE,
   SCMI and FF-A get a number of smaller updates and cleanups. OP-TEE
   now has a cache for firmware argument structures as an optimization,
   and SCMI now supports the 3.1 version of the specification.
 
 - Reset controller updates to Amlogic, ASpeed, Renesas and ACPI drivers
 
 - Memory controller updates for Tegra, and a few updates for other
   platforms.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKOXOoACgkQmmx57+YA
 GNlpVQ//eQGfL0WktE5G/y0mCVuVHtXT5nSjHMgjTOdb9+QvaATCfxnLXvP7Gq7C
 7YzJd68G+2ZC4rUkkjTxyMICT7eIrJSAIAFn4PWee4EQ5DfbHgG+1tToTjxqb+QQ
 6wGB5MVaYUhjZE30kY2E8a+OKxHtEnkt9wcch6ei0vzsMZquQJF6byfHd5+I4Knd
 CyDmXX8ZGXK3FnhvuBLr3Rgwyhs0X4Ju7UaONLZxBYxdnh8WmymRszmMnv5qEkub
 KDe8fbhFamOT3Z55JdCA5xq7LvUzjsKpTGFxFcS0ptbkTmtAsuyYqqiWvAPx3D5u
 5TxVGSx9QKid6fpIsITZ2ptO6fgljh1W9b/3Y3/eltudXsM1qqSxyN2Hre+M9egf
 WEDADqbNR5Y5+bq1iZWI348jXkNHVPpsLHI9Ihqf4yyrKwFkmRmNLnws53XTAPH2
 FPXZvJjwFDBDHGfewSoLFePXUPNytVLXbr6Mq72ZyTDIBDU8Mxh666Wd8bu4tgbG
 1Y2pMjDIdXDOsljM6Of5D3XjM1kuDwEmFxWGy+cKLgoEbHLeE1xIbTjUir4687+d
 VNHdtsIRFPRZzz2lUSmI8vlA2aewMWrkOF/Ulz8xh6gG8uitMSfOxghg4IWOfRVM
 mlvgFP5eqTInmQcbWRxaRO9JzP+rPp1sAcEpsBmuEHw5Akflbc8=
 =XoLF
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Arnd Bergmann:
 "There are minor updates to SoC specific drivers for chips by Rockchip,
  Samsung, NVIDIA, TI, NXP, i.MX, Qualcomm, and Broadcom.

  Noteworthy driver changes include:

   - Several conversions of DT bindings to yaml format.

   - Renesas adds driver support for R-Car V4H, RZ/V2M and RZ/G2UL SoCs.

   - Qualcomm adds a bus driver for the SSC (Snapdragon Sensor Core),
     and support for more chips in the RPMh power domains and the
     soc-id.

   - NXP has a new driver for the HDMI blk-ctrl on i.MX8MP.

   - Apple M1 gains support for the on-chip NVMe controller, making it
     possible to finally use the internal disks. This also includes SoC
     drivers for their RTKit IPC and for the SART DMA address filter.

  For other subsystems that merge their drivers through the SoC tree, we
  have

   - Firmware drivers for the ARM firmware stack including TEE, OP-TEE,
     SCMI and FF-A get a number of smaller updates and cleanups. OP-TEE
     now has a cache for firmware argument structures as an
     optimization, and SCMI now supports the 3.1 version of the
     specification.

   - Reset controller updates to Amlogic, ASpeed, Renesas and ACPI
     drivers

   - Memory controller updates for Tegra, and a few updates for other
     platforms"

* tag 'arm-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (159 commits)
  memory: tegra: Add MC error logging on Tegra186 onward
  memory: tegra: Add memory controller channels support
  memory: tegra: Add APE memory clients for Tegra234
  memory: tegra: Add Tegra234 support
  nvme-apple: fix sparse endianess warnings
  soc/tegra: pmc: Document core domain fields
  soc: qcom: pdr: use static for servreg_* variables
  soc: imx: fix semicolon.cocci warnings
  soc: renesas: R-Car V3U is R-Car Gen4
  soc: imx: add i.MX8MP HDMI blk-ctrl
  soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl
  soc: imx: add i.MX8MP HSIO blk-ctrl
  soc: imx: imx8m-blk-ctrl: set power device name
  soc: qcom: llcc: Add sc8180x and sc8280xp configurations
  dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles
  soc/tegra: pmc: Select REGMAP
  dt-bindings: reset: st,sti-powerdown: Convert to yaml
  dt-bindings: reset: st,sti-picophyreset: Convert to yaml
  dt-bindings: reset: socfpga: Convert to yaml
  dt-bindings: reset: snps,axs10x-reset: Convert to yaml
  ...
2022-05-26 10:32:47 -07:00
Linus Torvalds
ae86218328 ARM: DT changes for 5.19, part 1
There are 40 branches this time, adding a lot of new hardware
 support, and cleanups. Krzysztof Kozlowski continues his treewide
 cleanups.
 
 There are a number of new SoCs, all of them as part of existing
 families, and typically added along with a reference board:
 
  - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L
    general-purpose MPU.
 
  - Renesas RZ/V2M (R9A09G011) is a smart camera SoC
 
  - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76
    cores and deep learning accerlation.
 
  - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7
    and dual Wifi-6.
 
  - Corstone1000 is a generic platform from Arm that is used for designing
    custom SoCs, the support for now is for the Fixed Virtual Platform
    emulation for it.
 
  - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used
    in upcoming Chromebooks.
 
  - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first
    MMU-less SoC to be added in a while
 
 New machines based on already supported SoCs this time are mainly
 for 32-bit platforms and include:
 
  - Two wireless routers based on Broadcom bcm4708
 
  - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly
    for the industrial embedded market, and on NXP LS1021A based
    IOT board.
 
  - Two ethernet switches based on Microchip LAN966
 
  - Eight Qualcomm Snapdragon based machines, including a smartwatch,
    a Chromebook board and some phones
 
  - Another phone based on the old ST-Ericsson Ux500 platform
 
  - Seven STM32MP1 based boards
 
  - Four single-board computers based on Rockchip RK3566/RK3568
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKOp8cACgkQmmx57+YA
 GNk33hAAn/mY+QDyj8sUwtY4AAVtut2QgyBm7NBWLgiYDQx52yBwP7rUxeKyDqZF
 q6LK5z3NA7NN5REpfn6WKBEFo6wkzTzg4Gev/h+9hwLyozch8vl4etBfZGak4A7m
 cLCONZdw4FMCQ10oLq+ib/WJeJv2W700307OkJ3dN73qdbWLRF1hoyG+uMTHuEqL
 If755IR+EYhxYz8CfJhCYb2BcqhRq047n3sEqolZpFtz5oHUW2dADASgWpV+3yNc
 ql8cH0f5OTKbFS1lM4k7cWbMW2vHWx7jZnXZDyMfy3EE5SOb4V/s9JFJSS1pAfPQ
 OWuq194LT+SIXTTT3DQ+lSNcMhlkyeXQ0JQE1wAAp0vov4V8vHGvEGk0MCku5QHp
 zKKONPfcn9aoWtsh4GaCvt0cP0m7lKyjxJvNSjBy2C9dVW8t4UlIVZr+V8hR2Ufp
 SpCCzMbttrcUK6rHzQmWsR563mhfszzuzDfZi4RK2aFLJKhFi5hEQF2tDxLq8Y09
 vIY/OkRpSwahgbiyj/zhKrJtnhFHh1m6wZJG+Sk9lTJikEhaRinriy0lgu08xssG
 krBHPOVhNY11rqlzosBU39JOya1/J2iTxjo7ccNmGfO4MDanE+Cl41a5wSNjciw1
 ihi2zAUBClGg0TnQ+HJylFPS3ZFyGEtbYH/d6td25DtwaaIsaxU=
 =LsM7
 -----END PGP SIGNATURE-----

Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM DT updates from Arnd Bergmann:
 "There are 40 branches this time, adding a lot of new hardware support,
  and cleanups. Krzysztof Kozlowski continues his treewide cleanups.

  There are a number of new SoCs, all of them as part of existing
  families, and typically added along with a reference board:

   - Renesas RZ/G2UL (R9A07G043) is the single-core version of the
     RZ/G2L general-purpose MPU.

   - Renesas RZ/V2M (R9A09G011) is a smart camera SoC

   - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76
     cores and deep learning accerlation.

   - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7
     and dual Wifi-6.

   - Corstone1000 is a generic platform from Arm that is used for
     designing custom SoCs, the support for now is for the Fixed Virtual
     Platform emulation for it.

   - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in
     upcoming Chromebooks.

   - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first
     MMU-less SoC to be added in a while

  New machines based on already supported SoCs this time are mainly for
  32-bit platforms and include:

   - Two wireless routers based on Broadcom bcm4708

   - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly
     for the industrial embedded market, and on NXP LS1021A based IOT
     board.

   - Two ethernet switches based on Microchip LAN966

   - Eight Qualcomm Snapdragon based machines, including a smartwatch, a
     Chromebook board and some phones

   - Another phone based on the old ST-Ericsson Ux500 platform

   - Seven STM32MP1 based boards

   - Four single-board computers based on Rockchip RK3566/RK3568"

* tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits)
  ARM: dts: kswitch-d10: enable networking
  ARM: dts: lan966x: add switch node
  ARM: dts: lan966x: add serdes node
  ARM: dts: lan966x: add reset switch reset node
  ARM: dts: lan966x: add MIIM nodes
  ARM: dts: lan966x: add hwmon node
  ARM: dts: lan966x: add basic Kontron KSwitch D10 support
  ARM: dts: lan966x: add flexcom I2C nodes
  ARM: dts: lan966x: add flexcom SPI nodes
  ARM: dts: lan966x: add all flexcom usart nodes
  ARM: dts: lan966x: add missing uart DMA channel
  ARM: dts: lan966x: add sgpio node
  ARM: dts: lan966x: swap dma channels for crypto node
  ARM: dts: lan966x: rename pinctrl nodes
  ARM: dts: at91: sama7g5: remove interrupt-parent from gic node
  ARM: dts: at91: use generic node name for dataflash
  ARM: dts: turris-omnia: Add atsha204a node
  arm64: dts: mt8192: Follow binding order for SCP registers
  arm64: dts: mediatek: add mtk-snfi for mt7622
  arm64: dts: mediatek: mt8195-demo: enable uart1
  ...
2022-05-26 10:28:12 -07:00
Linus Torvalds
d7227785e3 sound updates for 5.19-rc1
Not much dramatic changes at this time, but we've received quite
 a lot of changes for ASoC, while there are still a few fixes and
 quirks for usual HD- and USB-auido.  Here are some highlights.
 
 * ASoC:
 - Overhaul of endianness specification for data formats, avoiding
   needless restrictions due to CODECs
 - Initial stages of Intel AVS driver merge
 - Introduction of v4 IPC mechanism for SOF
 - TDM mode support for AK4613
 - Support for Analog Devices ADAU1361, Cirrus Logic CS35L45, Maxim
   MAX98396, MediaTek MT8186, NXP i.MX8 micfil and SAI interfaces,
   nVidia Tegra186 ASRC, and Texas Instruments TAS2764 and TAS2780
 
 * Others
 - A few regression fixes after the USB-audio endpoint management
   refactoring
 - More enhancements for Cirrus HD-audio codec support (still ongoing)
 - Addition of generic serial MIDI driver
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmKOEiAOHHRpd2FpQHN1
 c2UuZGUACgkQLtJE4w1nLE96FxAAnoVCecFK955fWInCULe15xYpi9kqngDSLAQk
 k6TkbP8AFyX+3PbIb9YVK9u+fLBaZzdK/ZIRqZNfb5T4q8tVTHphg2P+SNB36qaD
 nTTaEQ6dr6VUJO3fwwVBa3NJ+rGPr8KMKLlQGCg/I8HKdFeW2t/mV1YZI/ZxM7Or
 MXu3F5dt3yVXXMgUb33if+atYCXOwJ9YIqe1WHE4oPTtfOhbwiIdFeHgg88Kq7vJ
 ep7PCbyJ0rqfA9BIAnBfQuD9ZoaS7mKlo9xgyauNBzWnbRVd7dYyUnaxH++XLPPS
 GS0MEgftJfmUay6o++I7qrhoTyMKMHN/CU+6RlR1GD6WBpBhQ6T+poLkFDvKqbL8
 kvFEBFrEf0soeAKkUinzl1wCJnzWvpq2PF0EewQp03A3vOL5MOzGdId1wLKLmbCw
 Z0e0HAKTP4/AQeBluLo/SjiNoeSEU76xYYv8tFGv531ybIhvsF0nm/Suv4VZcy0V
 9tr2gLSORDLTBqSJqCf1JgN8oJht0QLirzgSekk8HUvx1JnIwwAaH1Dvy1DMrjyu
 TQ6oRyDS2giHKh7FItv3+U+HE1CkA89dzDvGrIbKrT6xkodHGzLNr0DxaDGuR11w
 H9f9oFEnGBpBxWmfLkGTa8+oBenTz8YRm4Ti8xhZkJkD1ys/4fjasAYoIKJqdnxH
 iG1DWic=
 =5qBk
 -----END PGP SIGNATURE-----

Merge tag 'sound-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "Not much dramatic changes at this time, but we've received quite a lot
  of changes for ASoC, while there are still a few fixes and quirks for
  usual HD- and USB-auido. Here are some highlights.

  ASoC:

   - Overhaul of endianness specification for data formats, avoiding
     needless restrictions due to CODECs

   - Initial stages of Intel AVS driver merge

   - Introduction of v4 IPC mechanism for SOF

   - TDM mode support for AK4613

   - Support for Analog Devices ADAU1361, Cirrus Logic CS35L45, Maxim
     MAX98396, MediaTek MT8186, NXP i.MX8 micfil and SAI interfaces,
     nVidia Tegra186 ASRC, and Texas Instruments TAS2764 and TAS2780

  Others:

   - A few regression fixes after the USB-audio endpoint management
     refactoring

   - More enhancements for Cirrus HD-audio codec support (still ongoing)

   - Addition of generic serial MIDI driver"

* tag 'sound-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (504 commits)
  ALSA: hda/realtek - Add new type for ALC245
  ALSA: usb-audio: Configure sync endpoints before data
  ALSA: ctxfi: fix typo in comment
  ALSA: cs5535audio: fix typo in comment
  ALSA: ctxfi: Add SB046x PCI ID
  ALSA: usb-audio: Add missing ep_idx in fixed EP quirks
  ALSA: usb-audio: Workaround for clock setup on TEAC devices
  ALSA: lola: Bounds check loop iterator against streams array size
  ASoC: max98090: Move check for invalid values before casting in max98090_put_enab_tlv()
  ASoC: rt1308-sdw: add the default value of register 0xc320
  ASoC: rt9120: Use pm_runtime and regcache to optimize 'pwdnn' logic
  ASoC: rt9120: Fix 3byte read, valule offset typo
  ASoC: amd: acp: Set Speaker enable/disable pin through rt1019 codec driver.
  ASoC: amd: acp: Set Speaker enable/disable pin through rt1019 codec driver
  ASoC: wm2000: fix missing clk_disable_unprepare() on error in wm2000_anc_transition()
  ASoC: codecs: lpass: Fix passing zero to 'PTR_ERR'
  ASoC: SOF: sof-client-ipc-flood-test: use pm_runtime_resume_and_get()
  ASoC: SOF: mediatek: remove duplicate include in mt8195.c
  ASoC: SOF: mediatek: Add mt8195 debug dump
  ASoC: SOF: mediatek: Add mediatek common debug dump
  ...
2022-05-25 16:55:16 -07:00
Stephen Boyd
71cc785d29 Merge branch 'clk-qcom' into clk-next
* clk-qcom:
  Revert "clk: qcom: regmap-mux: add pipe clk implementation"
  Revert "clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe clocks"
  Revert "clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks"
  clk: qcom: rcg2: Cache CFG register updates for parked RCGs
  clk: qcom: add sc8280xp GCC driver
  dt-bindings: clock: Add Qualcomm SC8280XP GCC bindings
  clk: qcom: gcc-msm8976: Add modem reset
  dt-bindings: clk: qcom: gcc-msm8976: Add modem reset
  clk: qcom: gcc-msm8976: Set floor ops for SDCC
  dt-bindings: clock: qcom,gcc-apq8064: Fix typo in compatible and split apq8084
  clk: qcom: smd: Update MSM8976 RPM clocks.
  clk: qcom: gcc-msm8998: add SSC-related clocks
  dt-bindings: clock: gcc-msm8998: Add definitions of SSC-related clocks
  dt-bindings: clock: qcom,rpmcc: add clocks property
  dt-bindings: clock: qcom,rpmcc: convert to dtschema
  clk: qcom: lpass: Add support for LPASS clock controller for SC7280
  dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280
  clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe clocks
  clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks
  clk: qcom: regmap-mux: add pipe clk implementation
2022-05-25 00:27:32 -07:00
Stephen Boyd
d75c26a926 Merge branches 'clk-rockchip', 'clk-ingenic', 'clk-bindings', 'clk-samsung' and 'clk-stm' into clk-next
- Mark some clks critical on Ingenic X1000
 - Add STM32MP13 RCC driver (Reset Clock Controller)

* clk-rockchip:
  dt-bindings: clock: convert rockchip,rk3368-cru.txt to YAML
  dt-bindings: clock: convert rockchip,rk3228-cru.txt to YAML
  dt-bindings: clock: convert rockchip,rk3036-cru.txt to YAML
  dt-bindings: clock: convert rockchip,rk3308-cru.txt to YAML
  dt-bindings: clock: convert rockchip,px30-cru.txt to YAML
  dt-bindings: clock: convert rockchip,rk3188-cru.txt to YAML
  dt-bindings: clock: convert rockchip,rk3288-cru.txt to YAML
  dt-bindings: clock: convert rockchip,rv1108-cru.txt to YAML
  dt-binding: clock: Add missing rk3568 cru bindings
  clk: rockchip: Mark hclk_vo as critical on rk3568
  dt-bindings: clock: fix rk3399 cru clock issues
  dt-bindings: clock: use generic node name for pmucru example in rockchip,rk3399-cru.yaml
  dt-bindings: clock: replace a maintainer for rockchip,rk3399-cru.yaml
  dt-bindings: clock: fix some conversion style issues for rockchip,rk3399-cru.yaml

* clk-ingenic:
  clk: ingenic-tcu: Fix missing TCU clock for X1000 SoCs
  mips: ingenic: Do not manually reference the CPU clock
  clk: ingenic: Mark critical clocks in Ingenic SoCs
  clk: ingenic: Allow specifying common clock flags

* clk-bindings:
  dt-bindings: clock: Replace common binding with link to schema

* clk-samsung:
  dt-bindings: clock: exynosautov9: correct count of NR_CLK
  clk: samsung: exynosautov9: add cmu_peric1 clock support
  clk: samsung: exynosautov9: add cmu_peric0 clock support
  clk: samsung: exynosautov9: add cmu_fsys2 clock support
  clk: samsung: exynosautov9: add cmu_busmc clock support
  clk: samsung: exynosautov9: add cmu_peris clock support
  clk: samsung: exynosautov9: add cmu_core clock support
  clk: samsung: add top clock support for Exynos Auto v9 SoC
  dt-bindings: clock: add Exynos Auto v9 SoC CMU bindings
  dt-bindings: clock: add clock binding definitions for Exynos Auto v9

* clk-stm:
  clk: stm32mp13: add safe mux management
  clk: stm32mp13: add multi mux function
  clk: stm32mp13: add all STM32MP13 kernel clocks
  clk: stm32mp13: add all STM32MP13 peripheral clocks
  clk: stm32mp13: manage secured clocks
  clk: stm32mp13: add composite clock
  clk: stm32mp13: add stm32 divider clock
  clk: stm32mp13: add stm32_gate management
  clk: stm32mp13: add stm32_mux clock management
  clk: stm32: Introduce STM32MP13 RCC drivers (Reset Clock Controller)
  dt-bindings: rcc: stm32: add new compatible for STM32MP13 SoC
2022-05-25 00:27:09 -07:00
Stephen Boyd
d3d88716a6 Merge branches 'clk-ux500', 'clk-mtk', 'clk-tegra', 'clk-allwinner' and 'clk-imx' into clk-next
- Convert ux500 to clk_hw
 - Add the two missing CLKOUT clocks for U8500/DB8500 SoC
 - MediaTek MT8186 SoC clk support
 - Move MediaTek driver to clk_hw provider APIs

* clk-ux500:
  clk: ux500: fix a possible off-by-one in u8500_prcc_reset_base()
  clk: ux500: Implement the missing CLKOUT clocks
  clk: ux500: Rewrite PRCMU clocks to use clk_hw_*
  clk: ux500: Drop .is_prepared state from PRCMU clocks
  clk: ux500: Drop .is_enabled state from PRCMU clocks
  dt-bindings: clock: u8500: Add clkout clock bindings

* clk-mtk: (22 commits)
  clk: mediatek: mt8173: Switch to clk_hw provider APIs
  clk: mediatek: Switch to clk_hw provider APIs
  clk: mediatek: Replace 'struct clk' with 'struct clk_hw'
  clk: mediatek: apmixed: Drop error message from clk_register() failure
  clk: mediatek: Make mtk_clk_register_composite() static
  clk: mediatek: use en_mask as a pure div_en_mask
  clk: mediatek: update compatible string for MT7986 ethsys
  clk: mediatek: Add MT8186 ipesys clock support
  clk: mediatek: Add MT8186 mdpsys clock support
  clk: mediatek: Add MT8186 camsys clock support
  clk: mediatek: Add MT8186 vencsys clock support
  clk: mediatek: Add MT8186 vdecsys clock support
  clk: mediatek: Add MT8186 imgsys clock support
  clk: mediatek: Add MT8186 wpesys clock support
  clk: mediatek: Add MT8186 mmsys clock support
  clk: mediatek: Add MT8186 mfgsys clock support
  clk: mediatek: Add MT8186 imp i2c wrapper clock support
  clk: mediatek: Add MT8186 apmixedsys clock support
  clk: mediatek: Add MT8186 infrastructure clock support
  clk: mediatek: Add MT8186 topckgen clock support
  ...

* clk-tegra:
  clk: tegra: Update kerneldoc to match prototypes
  clk: tegra: Replace .round_rate() with .determine_rate()
  clk: tegra: Register clocks from root to leaf
  clk: tegra: Add missing reset deassertion

* clk-allwinner:
  clk: sunxi-ng: h616: Add PLL derived 32KHz clock
  clk: sunxi-ng: h6-r: Add RTC gate clock

* clk-imx:
  clk: imx8mp: fix usb_root_clk parent
  clk: imx8mp: add clkout1/2 support
  clk: imx: scu: Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage
  clk: imx8mp: Add DISP2 pixel clock
  clk: imx: scu: fix a potential memory leak in __imx_clk_gpr_scu()
  clk: imx: Add check for kcalloc
  clk: imx8mn: add GPT support
  dt-bindings: imx: add clock bindings for i.MX8MN GPT
  clk: imx: Remove the snvs clock
  clk: imx8m: check mcore_booted before register clk
  clk: imx: add mcore_booted module paratemter
  clk: imx8mq: add 27m phy pll ref clock
2022-05-25 00:26:52 -07:00
Stephen Boyd
2c29798c5d Merge branches 'clk-ti', 'clk-cleanup', 'clk-airoha', 'clk-i2c-simple' and 'clk-renesas' into clk-next
- Airoha EN7523 SoC system clocks
 - Use i2c driver probe_new to avoid id scans

* clk-ti:
  clk: ti: clkctrl: replace usage of found with dedicated list iterator variable
  clk: ti: composite: Prefer kcalloc over open coded arithmetic
  clk: keystone: syscon-clk: Add support for AM62 epwm-tbclk
  dt-bindings: clock: ehrpwm: Add AM62 specific compatible

* clk-cleanup:
  clk: bcm: rpi: Use correct order for the parameters of devm_kcalloc()
  clk: fixed-rate: Remove redundant if statement
  clk: mux: remove redundant initialization of variable width
  clk: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
  clk: actions: remove redundant assignment after a mask operation

* clk-airoha:
  clk: en7523: fix wrong pointer check in en7523_clk_probe()
  clk: en7523: Add clock driver for Airoha EN7523 SoC
  dt-bindings: Add en7523-scu device tree binding documentation

* clk-i2c-simple:
  clk: renesas-pcie: use simple i2c probe function
  clk: si570: use i2c_match_id and simple i2c probe
  clk: si544: use i2c_match_id and simple i2c probe
  clk: si5351: use i2c_match_id and simple i2c probe
  clk: si5341: use simple i2c probe function
  clk: si514: use simple i2c probe function
  clk: max9485: use simple i2c probe function
  clk: cs2000-cp: use simple i2c probe function
  clk: cdce925: use i2c_match_id and simple i2c probe
  clk: cdce706: use simple i2c probe function

* clk-renesas: (48 commits)
  clk: renesas: r9a09g011: Add eth clock and reset entries
  clk: renesas: Add RZ/V2M support using the rzg2l driver
  clk: renesas: rzg2l: Add support for RZ/V2M reset monitor reg
  clk: renesas: rzg2l: Make use of CLK_MON registers optional
  clk: renesas: rzg2l: Set HIWORD mask for all mux and dividers
  clk: renesas: rzg2l: Add read only versions of the clk macros
  clk: renesas: rzg2l: Move the DEF_MUX array size calc into the macro
  dt-bindings: clock: renesas,rzg2l: Document RZ/V2M SoC
  clk: renesas: r9a07g044: Fix OSTM1 module clock name
  clk: renesas: r9a07g043: Add clock and reset entries for ADC
  clk: renesas: r9a07g043: Add TSU clock and reset entry
  clk: renesas: r9a07g043: Add RSPI clock and reset entries
  clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O Bus Controller
  clk: renesas: r9a07g044: Add DSI clock and reset entries
  clk: renesas: r9a07g044: Add LCDC clock and reset entries
  clk: renesas: r9a07g044: Add M4 Clock support
  clk: renesas: r9a07g044: Add M3 Clock support
  clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support
  clk: renesas: r9a07g044: Add M1 clock support
  clk: renesas: rzg2l: Add DSI divider clk support
  ...
2022-05-25 00:26:38 -07:00
Kartik
58919326e7 dt-bindings: tegra186-hsp: add type for shared mailboxes
Tegra234 supports sending/receiving 32-bit and 128-bit data over
a shared mailbox. Based on the data size to be used, clients need
to specify the type of shared mailbox in the device tree.

Add a macro for 128-bit shared mailbox. Mailbox clients can use this
macro as a flag in device tree to enable 128-bit data support for a
shared mailbox.

Signed-off-by: Kartik <kkartik@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21 11:41:30 -05:00
Yongqiang Niu
1b3418ac64 dt-bindings: gce: add the GCE header file for MT8186
Add the GCE header file to define GCE subsys ids, hardware event ids
and constants for MT8186.

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21 11:41:29 -05:00
Gabriel Fernandez
722dc8a1d5 dt-bindings: rcc: stm32: add new compatible for STM32MP13 SoC
New compatible to manage clock and reset of STM32MP13 SoC.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Link: https://lore.kernel.org/r/20220516070600.7692-2-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-05-20 21:07:48 -07:00
Chanho Park
538101dd7c dt-bindings: clock: exynosautov9: correct count of NR_CLK
_NR_CLKS which can be used to register clocks via nr_clk_ids. The clock
IDs are started from 1. So, _NR_CLKS should be defined to "the last
clock id + 1"

Fixes: 680e1c8370 ("dt-bindings: clock: add clock binding definitions for Exynos Auto v9")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220520030625.145324-1-chanho61.park@samsung.com
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-05-20 20:29:13 -07:00
Fabio Baltieri
84d0940454 dt-bindings: Add mfd/cros_ec definitions
Add a dt-bindings include file for cros_ec devicetree definition, define
a pair of special purpose PWM channels in it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2022-05-20 16:39:16 +02:00
Joerg Roedel
b0dacee202 Merge branches 'apple/dart', 'arm/mediatek', 'arm/msm', 'arm/smmu', 'ppc/pamu', 'x86/vt-d', 'x86/amd' and 'vfio-notifier-fix' into next 2022-05-20 12:27:17 +02:00
Bjorn Andersson
a66a82f2a5 dt-bindings: clock: Add Qualcomm SC8280XP GCC bindings
Add binding for the Qualcomm SC8280XP Global Clock controller.

The clock-names property is purposefully omitted, to clearly communicate
to the writer (and reader) of the DeviceTree source based on this
binding that the order of "clocks" is significant, in contrast to
previous GCC bindings.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220505025457.1693716-2-bjorn.andersson@linaro.org
2022-05-19 16:41:32 -05:00
AngeloGioacchino Del Regno
81557a7156 dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings
Add devicetree and pinfunc bindings for MediaTek Helio X10 MT6795.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220517083957.11816-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-19 15:11:15 +02:00
Georgi Djakov
314cf651fa Merge branch 'icc-sc8180x' into icc-next
This contains a few fixes for the sc8180x interconnect provider driver to make
it functional.

* icc-sc8180x
  dt-bindings: interconnect: Add SC8180X QUP0 virt provider
  interconnect: qcom: sc8180x: Modernize sc8180x probe
  interconnect: qcom: sc8180x: Fix QUP0 nodes
  interconnect: qcom: sc8180x: Mark some BCMs keepalive

Link: https://lore.kernel.org/r/20220503211925.1022169-1-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 03:02:55 +03:00
Bjorn Andersson
42c4e3f670 interconnect: qcom: sc8180x: Fix QUP0 nodes
The QUP0 BCM relates to some internal property of the QUPs, and should
be configured independently of the path to the QUP. In line with other
platforms expose QUP_CORE endpoints in order allow this configuration.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220503211925.1022169-4-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 02:51:34 +03:00
Georgi Djakov
828ff75c44 Merge branch 'icc-sdx65' into icc-next
This adds interconnect driver support for SDX65 platform for scaling the
bandwidth requirements over RPMh.

Link: https://lore.kernel.org/r/1649854415-11174-1-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 02:40:50 +03:00
Georgi Djakov
bb4b905b73 Merge branch 'icc-sc8280xp' into icc-next
Add interconnect driver support for Qualcomm SC8280XP platform.

* icc-sc8280xp
  dt-bindings: interconnect: qcom: Add sc8280xp binding
  interconnect: qcom: Add SC8280XP interconnect provider
  interconnect: qcom: sc8280xp: constify qcom_icc_desc
  interconnect: qcom: sc8280xp: constify icc_node pointers
  interconnect: qcom: sc8280xp: constify qcom_icc_bcm pointers

Link: https://lore.kernel.org/r/20220408214835.624494-1-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 02:40:00 +03:00
Arnd Bergmann
82706d6fb1 MT8195:
- add evaluation and demo board
 
 MT8192:
 - add new nodes: pwrap, PMIC, scp, USB, efuse, IOMMU, smi, DPI, PCIe,
   SPMI, audio system, MMC and video enconder
 - add evaluation board
 
 MT8183:
 - fix dtschema issues
 - update compatible for the display ambient light processor (disp-aal)
 - fix dtschema warning for the pumpki board
 
 MT8173:
 - add power domains to the video enconder nodes
 - add GCE support to the display mutex node
 
 MT7622:
 - specify number of DMA requests explicitely
 - specify level 2 cache topology
 - add SPI-NAND flash device
 - fix dtschema warnings for the System Companion Processor (SCP)
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmJ+QQQXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH6MUw//d15n/edr21mmD/km512t/JJ+
 u8ke9XGDnULk/bG2bFW+F+9wxsgR3Y6ULcoXIjYyRjOfrysBssFRPnz4hU1pIDEX
 YFQFhoTlV86DFJUw517bwuN59/V8UQB3kIv6FgxoYumec1QJ74x1kAdLYBi1MGGW
 Yi9DFSBMxbK6tFMAYRLut2r62NK25SqH55oPfJnzVcL7dUGN/nL3VW+3vUxrRdul
 SNbQAzIlHMj47IApdnWsllYL+SmYX7O71rrXYnLSGTyKU53iu9jEo6QNy+iytHLY
 qW32Y2bu0rA9pw5MtJjYOTFjLdlXe33h6xuS/3f3EvlKyS6L3MA3iUMBnGiORsKz
 USNdZN4Z1qtNVd7775NKQOpx6m2RAHaQUeXwwOvvf9wU9jgf5YI3cLDoG/0osVQb
 s/LCZDZD3/h36Exy1PTlFaHlqRR4iaIHD1UzTxS1ST2+OosokT3vIanfTA3G4QjN
 /gs0AMD9IrMDZtu79rUmDE26rHF+wmy2QsRDo1VxB0QWGQjFhCn0VsV2K+uFyG9j
 VKgK/n7ouwSN2+LjyLFJV2C55zRy/NQ6kIxvIohuLxWncIuqKEkvU22iLlNECsI3
 VT4xQV8AWLp38pXNSD29oj/FyojjJOJgFgSHDst5tPfaswdckMvodWUVIS8tgiAY
 THdQekFc5B+HwmTSjZE=
 =Ewdg
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ+zQAACgkQmmx57+YA
 GNlrAw/9G/X8jojghV0Uq1NOm+QtmPQ9pusNttjeviImZd2RAf4rqJnCHEwcWAsf
 tXiu2+YVTgUZdwJO73nvswfbQ3sLBGSkw0N+nDNMfqqSNytQSTSokDp8NNr9pi4t
 914shAoz0mMk6I932attImfaWOoWUR9zOGhGJi9M/NnOkBsHHhANr4vldEscxkuc
 ecOFknHp8ZfVuRfDJcR4opbVUvCmeRbnrQWgG2ud9YPsGB4MsRBvnzZDdyFVFz/q
 HlobUjpeW1+uH87lpxyz+NSex3V39falXjSDL51rIG2p7lCVb1wbi+lEDnc8uy28
 DuLN1N+LdMBOyoMb077TCtquWRKEbFOmJ/8SzD78a5BoyV0Hxhp3EGteAuZ2rx/E
 rPAyy+dNAVmwMaIiSYeb/Y5DuE9kjuxb5NpNvIaZEDdkPZfIZiMfKnOziGHQncPp
 p+JbuDW6z+XMcDa7S4vlCmGRF5xqHknSFs9Ivnm/p64Cd5fK/enzc5On/gsB/fKP
 mXVbESme88tev22JG0rHgFVKZB29wOJLv9mMJzpJQGkmqVy32nO7unUc6tq7G6A5
 idP76etCgx3FCttCuq2s6CZCwcVYlHee17JnIMl9Y3gZccAsT3rMtt0TK4R6OuFN
 oP3+8286Kc3TW0/V3zvowzT+h7sqxMFJyXWKyrcRvA2ConoO0y8=
 =kcWT
 -----END PGP SIGNATURE-----

Merge tag 'v5.18-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt

MT8195:
- add evaluation and demo board

MT8192:
- add new nodes: pwrap, PMIC, scp, USB, efuse, IOMMU, smi, DPI, PCIe,
  SPMI, audio system, MMC and video enconder
- add evaluation board

MT8183:
- fix dtschema issues
- update compatible for the display ambient light processor (disp-aal)
- fix dtschema warning for the pumpki board

MT8173:
- add power domains to the video enconder nodes
- add GCE support to the display mutex node

MT7622:
- specify number of DMA requests explicitely
- specify level 2 cache topology
- add SPI-NAND flash device
- fix dtschema warnings for the System Companion Processor (SCP)

* tag 'v5.18-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (37 commits)
  arm64: dts: mt8192: Follow binding order for SCP registers
  arm64: dts: mediatek: add mtk-snfi for mt7622
  arm64: dts: mediatek: mt8195-demo: enable uart1
  arm64: dts: mediatek: mt8195-demo: Remove input-name property
  arm64: dts: mediatek: mt8183-pumpkin: fix bad thermistor node name
  arm64: dts: mt7622: specify the L2 cache topology
  arm64: dts: mt7622: specify the number of DMA requests
  arm64: dts: mediatek: pumpkin: Remove input-name property
  arm64: dts: mediatek: mt8173: Add gce-client-reg handle to disp-mutex
  arm64: dts: mediatek: Add device-tree for MT8195 Demo board
  dt-bindings: arm64: dts: mediatek: Add mt8195-demo board
  arm64: dts: Add mediatek SoC mt8195 and evaluation board
  arm64: dts: mt8192: Add mmc device nodes
  arm64: dts: mt8183: Update disp_aal node compatible
  arm64: dts: mt8192: Add audio-related nodes
  arm64: dts: mt8192: Add spmi node
  dt-bindings: arm: Add compatible for Mediatek MT8192
  arm64: dts: mt6359: add PMIC MT6359 related nodes
  arm64: dts: mediatek: mt8173: Add power domain to encoder nodes
  arm64: dts: mediatek: Get rid of mediatek, larb for MM nodes
  ...

Link: https://lore.kernel.org/r/2cd90ca7-7541-d47a-fec6-b0c64cf74fa3@gmail.com

Like the 32-bit branch, this contains an incompatible binding change
by removing the mediatek,larb properties from the dts files, so these
no longer work with kernels prior to 5.18.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-13 23:26:21 +02:00
Arnd Bergmann
d4dcdc53c4 Qualcomm ARM64 DT updates for v5.19
This adds MDIO bus description on the IPQ6018 platform.
 
 On MSM8916 the BAM-DMUX WWAN network device is added and the Huawei
 Ascend G7 gains sound card definition and clarified installation
 instructions.
 
 MSM8992 and MSM8994 continues to be worked on, gaining multimedia clock
 controller, on-chip memory, watchdog and various cleanup changes. The
 Xiaomi Mi 4C gains CPU regulators and fixes to the framebuffer
 definition, while Huawei Nexus 6P gains eMMC support.
 
 On MSM8996 the modem and sensor remtoeprocs are added and enabled in the
 Dragonboard 820c and the Xiaomi devices.
 
 On MSM8998 a few newly added clocks related to the sensor subsystem bus
 are marked as protected by default and the OnePlus devices gains NFC.
 
 The SC7180 platform and devices thereon are further polished and
 limozeen moves to using edp-panel for EDID-based detection, over
 statically defined panels.
 
 On SC7280 GPI DMA, WiFi remoteproc and network device, LPASS audio
 clocks, resets for SDCC controllers and a new CRD revision are added. A
 supply glitch on the PCIe power and a current leak for Bluetooth during
 suspend are corrected. The Herobrine board gains eDP support and the IDP
 gains backlight. USB is marked wakeup capable.
 
 On SDM845 the IPA, WLED based backlight and second WiFi channel are
 enabled for Xiaomi Pocophone F1, the firmware name is modified to not
 conflict with other boards.  On RB3 the CAN bus controller is added and
 the WiFi calibration variant is defined to allow adding the board's
 calibration information into linux-firmware.
 
 SM6350 gains I2C busses, UFS and WiFi support, and the numbering of
 uart9 is corrected.
 
 On SM7225 and the Fairphone 4 UFS, WiFi and haptics are enabled.
 
 On SM8150 PCIe, Ethernet and uSD card support is added, and enabled for
 the SA8155p ADP board. The PDC interrupt controller is also added and
 described as wakup interrupt parent for TLMM.
 
 Camera subsystem and control interface are defined for SM8250. On the
 Sony Xperia 1 II the audio amplifiers are enabled.
 
 On SM8350 GPI DMA engines are added and linked to the I2C and SPI
 serial engines. Surface Duo 2 gains battery charger support.
 
 On SM8450 the two PCIe controller/PHYs are enabled, GPI DMA and QUP
 serial engine instances are added. Remoteproc instances are enabled on
 SM8450 HDK.
 
 Last, but not least, a number of DeviceTree validation errors across
 various boards are corrected.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmJ5fREbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FTdwP/icvr02w0vfY+Ae2NEI2
 gS836xXJWTXMxj2rW4WPQVGzbhNouMfl3yGVV0LxUrkD7pkcXAtCFul/DYJoZSTT
 ubnh4v/Axl7YVW5JwlL/+k3BEi39rSupa9HfEyLM5jVq39a0G9TqugVm9KmimIfL
 UEMN5pR0ZPLmMrQXzNSSw9uqHuBdr7G+25MMb2yyW8GoxMYE8xcVz0Syz5Xomv6V
 DHxl3jgvx7An7x1MbbbSyEOtkIjMtTSqzrRil7Y4g9Q1YTum74r4q/vKqfW+IMpz
 fNFz/sqpgy/9ixNtCIE3L1l/YakgHod8bm0DRBCVknEziYNhLIfbDqq3IksySitQ
 2ofoolp0Ip7eryHe47HBTzxnDKnfCG8iwaOPgbbtar6Ru32os8C9VbtNRBtZIzMN
 NpEqtlaJC+m4U92TlnCqsfKrWDYGdVWQeXU2/rU5QEFYtIGqP8fKLwEQbF/yls75
 j/57xtDVheoJbn79ELHCon3PumdpB5XhDLQgIji5jDl+D3rMOYxq86M1f2yF0zqF
 34EvwLoy2syY1dlelvECso3Zihszk1RQfEInuwN9RrLyXGXSqUDkODV49pR16URz
 ZRELs9SO99iRS5fjWzA0qoCWKS5hBu2GDnGr3Pv8gHBNGAJKKhTHSJLq+/q7aLTs
 9ApGB1PzsZiBv8LMF37El0L4
 =cBVa
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ5hwoACgkQmmx57+YA
 GNnJlA//R4pNO09VYGzZTOiVbhjsTPBCcuyBkv2OJlqiz/BSfG6R7pNt0sH3jlgG
 /3X8sLS5v/IdT/qXLS0DPAn6A1Qjj37VAFTVd8ZUNCbn7iXdE3Wphd0phLlgcGr5
 bxBV6gvnQydvOsALA+9Fsuug3KSBK3ZdFOAjuD5JaqVU5dHmXYsLizskS3Zrpofs
 jX05qDCguXPGFX5zd4TYMu+sWnLTjyBu0TvHCuZ3sIjERDY49QtPaNdSiNxtQJ3g
 fXDOuMP6GIB+PRSS0ajDAi+vmnzWNszlWhQEbcrtCyqCE9Qqrl4oSOtQbsFPhlUY
 wvqn84QIY9QUGNAebzGWrkBm6e7ehCHB4cm2Ac42uI6aSSC8YfON98EpM8f8e13x
 QWUMm9JfPV/QjAmAhD/hp5/Gc3lNJvawU2Bb/FSvu26HsHDSz+SJOuyMxXOBOV9k
 p6hjDQgo7Suwjkpe72Z3LSQq6zdD7r8MokmxFl8yWgxXr8V02zESOQYYhUjyA+Rj
 uda+2bRpnqIdoh3IObV5Dz9EGM1aEhbqGn1UMJJCtetGpVAF7PhGrKjDffQEzV+P
 OZAOBv0JpMWErks6WNReiN5M+bfm7zArHw3iWAB6grBQUEeF1MD5315m/+hOBxy1
 Aj9pv/fLJcIHatnVcAjYUMkpPhMkkPv9AUFwM+Q65zxmu+0wH2Q=
 =MmN1
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DT updates for v5.19

This adds MDIO bus description on the IPQ6018 platform.

On MSM8916 the BAM-DMUX WWAN network device is added and the Huawei
Ascend G7 gains sound card definition and clarified installation
instructions.

MSM8992 and MSM8994 continues to be worked on, gaining multimedia clock
controller, on-chip memory, watchdog and various cleanup changes. The
Xiaomi Mi 4C gains CPU regulators and fixes to the framebuffer
definition, while Huawei Nexus 6P gains eMMC support.

On MSM8996 the modem and sensor remtoeprocs are added and enabled in the
Dragonboard 820c and the Xiaomi devices.

On MSM8998 a few newly added clocks related to the sensor subsystem bus
are marked as protected by default and the OnePlus devices gains NFC.

The SC7180 platform and devices thereon are further polished and
limozeen moves to using edp-panel for EDID-based detection, over
statically defined panels.

On SC7280 GPI DMA, WiFi remoteproc and network device, LPASS audio
clocks, resets for SDCC controllers and a new CRD revision are added. A
supply glitch on the PCIe power and a current leak for Bluetooth during
suspend are corrected. The Herobrine board gains eDP support and the IDP
gains backlight. USB is marked wakeup capable.

On SDM845 the IPA, WLED based backlight and second WiFi channel are
enabled for Xiaomi Pocophone F1, the firmware name is modified to not
conflict with other boards.  On RB3 the CAN bus controller is added and
the WiFi calibration variant is defined to allow adding the board's
calibration information into linux-firmware.

SM6350 gains I2C busses, UFS and WiFi support, and the numbering of
uart9 is corrected.

On SM7225 and the Fairphone 4 UFS, WiFi and haptics are enabled.

On SM8150 PCIe, Ethernet and uSD card support is added, and enabled for
the SA8155p ADP board. The PDC interrupt controller is also added and
described as wakup interrupt parent for TLMM.

Camera subsystem and control interface are defined for SM8250. On the
Sony Xperia 1 II the audio amplifiers are enabled.

On SM8350 GPI DMA engines are added and linked to the I2C and SPI
serial engines. Surface Duo 2 gains battery charger support.

On SM8450 the two PCIe controller/PHYs are enabled, GPI DMA and QUP
serial engine instances are added. Remoteproc instances are enabled on
SM8450 HDK.

Last, but not least, a number of DeviceTree validation errors across
various boards are corrected.

* tag 'qcom-arm64-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (150 commits)
  arm64: dts: qcom: Only include sc7180.dtsi in sc7180-trogdor.dtsi
  arm64: dts: qcom: sc7180-trogdor: Simplify spi0/spi6 labeling
  arm64: dts: qcom: sc7180-trogdor: Simplify trackpad enabling
  arm64: dts: qcom: sc7280: eDP for herobrine boards
  arm64: dts: qcom: sa8155p-adp: Disable multiple Tx and Rx queues for ethernet IP
  arm64: dts: qcom: sm8150: Fix iommu sid value for SDC2 controller
  arm64: dts: qcom: sm8350-duo2: enable battery charger
  arm64: dts: qcom: Enable pm8350c pwm for sc7280-idp2
  arm64: dts: qcom: pm8350c: Add pwm support
  arm64: dts: qcom: sc7280-qcard: Configure CTS pin to bias-bus-hold for bluetooth
  arm64: dts: qcom: sc7280-idp: Configure CTS pin to bias-bus-hold for bluetooth
  arm64: dts: qcom: sc7180: Remove ipa interconnect node
  arm64: dts: qcom: sc7280-idp: Enable GPI DMAs
  arm64: dts: qcom: sc7280: Add GENI I2C/SPI DMA channels
  arm64: dts: qcom: sc7280: Add GPI DMAengines
  arm64: dts: qcom: sm8450: Fix qmp phy node (use phy@ instead of lanes@)
  arm64: dts: qcom: db845c: Add support for MCP2517FD
  arm64: dts: qcom: qrb5165-rb5: Fix can-clock node name
  arm64: dts: qcom: sc7280: Add SAR sensors to herobrine crd
  arm64: dts: qcom: sm8250: camss: Add CCI definitions
  ...

Link: https://lore.kernel.org/r/20220509204451.325675-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-09 23:26:34 +02:00
Arnd Bergmann
3f656f2618 Qualcomm driver updates for v5.19
This converts a wide range of Qualcomm-related DeviceTree bindings to
 YAML, in order to improve our ability to validate the DeviceTree source.
 
 The RPMh power-domain driver gains support for the modem platform SDX65,
 the compute platform SC8280XP and the automotive platform SA8540p. While
 LLCC gains support for SC8180X and SC8280XP and gains a
 MODULE_DEVICE_TABLE() to make it functional as a module.
 
 It adds a driver for configuring the SSC bus, providing Linux access to
 the hardware blocks in the sensor subsystem.
 
 The socinfo driver gets confusion related to MSM8974 Pro sorted out and
 adds new ids for SM8540 and SC7280.
 
 The SCM driver gains support for MSM8974.
 
 Add missing of_node_put() in smp2p and smsm drivers.
 Stop using iterator after list_for_each_entry() and define static
 definitions as such, in the PDR driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmJ5WsYbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FIo8P+wcc78TQQuG67nqPr2gb
 QFqVK8U2mz07XW0H1rnGZKsTSrZxFs/YWRBaw+dYC5OZVJHx/uoZM04Njsyy/DFh
 UaNQgTgsS4+D5+butveh4lBdmk4ja5sreLHw25/azw5VBzeHb9+4HeAd7QMMQ+BO
 /EvIlykPwsgGIZwabzDHkY8w/xt64CPiajps1qGlFDJedSLsdJ8bKHctvcFD03v3
 3utJku3jAc5SZMBQgDttpPwpn7UnHXjCvWxyz8oSFaWDQBROztH0FbiJsZnjMuFI
 9RfRqblgb2PkvaG23W7jv68aJf3yQ6siY8ezPPs3/1F6T6tMQaAKEhwrY93ZQiWc
 gDDx33TvX3YJiRRdC2Gvg1QpL4xMFUERR8o4ooQ0t+b8bG6TkGP44VVg3/n1wrMK
 Q5xdgDigfrNnVZV1b2flQHc4qke4hNoV23SQ7iFWvtSJO09xklVJhXFGQ6mthEkb
 PnBFurLyxglKw6afs1/2P8tplS52K0l19lgNJu6vtUzC6fMOg50cX0mmWP8+rkFb
 njhXlPqCDataECZazyxnn7KORAn3E7zQceJ/LJeV+XZ9i5DJLXup+JkuBCWem4Nd
 ucEeYtQVRel5FCWZZzkXviPCTlWgTB7ya7pJPCzvZpnNFHeSWSjr9YK6xtWwy9rP
 CBRXYrz2gJLV/MGkB1piAwkm
 =/Dqp
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ5hB4ACgkQmmx57+YA
 GNksBxAAj09+d2U1sFSJl3HiHTrXyg3MYoG0dA1QK2CRKucdwMf6KBGpEHTQyL6a
 Iqan6URrTqEM3WP4suBsZh8vbv1C8u7KGWwDAMqJ18BkigoGHEV1PyvmHYRvPoT2
 6DSHAkGbYfDglxXZ4JcxNaQk3+t6rZpe5LcRRgQ7JpoKfzlqKxfSJfPFLzYAvhSV
 qThiyd3GvfcgkVHL9noh4BrBrnNRj7wMzUwQnhW5aWebN+DqgG8zlzmmZEQx61uR
 sjMogRZNpGXVAR+4yvPZNoxTGM0plssxlkDQGS4b0XLP1t7ohr22eFPTrWqcsYCi
 h4fa3nXxUIoTDJXQ7nmU04VXp5xVUtQKKe+zXIvQBT98OkM1f6ep5i7rrEh5DZxJ
 TWVdRLuIVpHVsVARqq+qpEnwyDeiF3Hgmope3xPYhEIs1WcIOQzWBjHbNTNeiFdy
 fQMrmAQjirXJBV18ImRSMcAXW+Shc72vnj6fViQcrL5Pzj1HJFMjh/bpPzAhIUYJ
 w9to8mpNgHUpMwnkfMUqQDV6FANVbYPqancK/z4rEPd8mj6bq1z2GEQq2e9+cAfM
 imyD30+g7fm7e4mxp53mv/oxqf4NJExE0eIjXAQY53at0TCk+ngsxJd96Wz3aIpB
 eL9YN5x+y6vXkFC+hsnX2/QdUiVCmfpbrez2QqzoZncSkJ4mjdI=
 =rjVH
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.19

This converts a wide range of Qualcomm-related DeviceTree bindings to
YAML, in order to improve our ability to validate the DeviceTree source.

The RPMh power-domain driver gains support for the modem platform SDX65,
the compute platform SC8280XP and the automotive platform SA8540p. While
LLCC gains support for SC8180X and SC8280XP and gains a
MODULE_DEVICE_TABLE() to make it functional as a module.

It adds a driver for configuring the SSC bus, providing Linux access to
the hardware blocks in the sensor subsystem.

The socinfo driver gets confusion related to MSM8974 Pro sorted out and
adds new ids for SM8540 and SC7280.

The SCM driver gains support for MSM8974.

Add missing of_node_put() in smp2p and smsm drivers.
Stop using iterator after list_for_each_entry() and define static
definitions as such, in the PDR driver.

* tag 'qcom-drivers-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (33 commits)
  soc: qcom: pdr: use static for servreg_* variables
  soc: qcom: llcc: Add sc8180x and sc8280xp configurations
  dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles
  soc: qcom: rpmhpd: add sc8280xp & sa8540p rpmh power-domains
  soc: qcom: rpmhpd: Don't warn about sparse rpmhpd arrays
  dt-bindings: power: rpmpd: Add sc8280xp RPMh power-domains
  spi: dt-bindings: qcom,spi-geni-qcom: convert to dtschema
  soc: qcom: socinfo: Sort out 8974PRO names
  dt-bindings: soc: qcom,smp2p: convert to dtschema
  dt-bindings: qcom: geni-se: Update UART schema reference
  dt-bindings: qcom: geni-se: Update I2C schema reference
  dt-bindings: soc: qcom,rpmh-rsc: convert to dtschema
  bus: add driver for initializing the SSC bus on (some) qcom SoCs
  dt-bindings: bus: add device tree bindings for qcom,ssc-block-bus
  dt-bindings: qcom: qcom,geni-se: refer to dtschema for SPI
  dt-bindings: soc: qcom,smd: convert to dtschema
  firmware: qcom_scm: Add compatible for MSM8976 SoC
  dt-bindings: firmware: qcom-scm: Document msm8976 bindings
  soc: qcom: smem: validate fields of shared structures
  soc: qcom: smem: map only partitions used by local HOST
  ...

Link: https://lore.kernel.org/r/20220509181839.316655-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-09 23:14:06 +02:00
Arnd Bergmann
2b6866d70d i.MX drivers update for 5.19:
- A series from Lucas and Paul to update GPCv2 driver for i.MX8MP power
   domains, and add HSIO and HDMI block control support.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmJ3IvYUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM6lhwf7BpYDyiaYHBKQLXWWDZj1QanO6bjM
 fMlxvVdggfeLW6ijerCb+wf2jNQY75lWRRny4x4WWP+sSVZ4u9SUJlxLrwo/aWYr
 44KWWr4PkSMDm5j2bQyy8S9o01ZpxT/FOqqTC51PwgMx7yxB7+d1Z1txWwp5W0jB
 Ps92O4bKRfvCCF7Mgjw3/FDu5iek6+9pHx5dQxQ1CWPuvVJos6M9Ktkv27x3oOvI
 S4v6Y7v5m1WxSjUK2p09pIGP9AJrHhmRNJF3R/ZrXqUKAlpCQFK6DwZ9mY/rfcfj
 tPoqCwj9/UmzG+GlBo8z7I2GQmF7vmwH6bqjP/T6SHOoxE9/fiqT2Swc5A==
 =S4x7
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ5g1gACgkQmmx57+YA
 GNmd7A/7BR8AlCUX1H5SrWAiJbu0iR64vXRG+K6iqvEQV99K8zivQ7Sg6D+EwonR
 YiLFOGTkk3O2hfZWbamNGDxmYrcjC5Kg3Zo0ZMJ2Cg91oBNB5olK/9hKOyrIfPMH
 JTZJ/7n7nFi5xUFKBcof3VwNsqsHDp7XGl+jD7la8Dd9m4Yytofz3L4YxQLAkLhU
 fobCmW/Nb9QxoKJL1aa+ix0HzZc00cvnUD3CqxFmqamJVJiPPnLFh+VgvDc1vP2P
 q0bYvXuqL3lXVVbbi3jHqVldCwyzx7egcv72q33yGQPSaNEJ04jV/JUEz6sIj2XI
 HfoQ5iyqczLPZMvJQiXxBsAy9wxde+qoMUwq7OvkLBBF+xEbwrkvp3wTElySRA6Y
 YjP8nf39vuQ7qT9Lj4vNBJvQDoLbrKw+xEnFxjmCdJWgdqxVD0yVnPLjCFvmtFfl
 /b3g8CePnUwupaI4K8nmo9dvMG46oe7xA86M6KphYdIUg0NVB+/kmxMnwSLBZ3Qz
 HRIUyeqV6knzMo413GsQSe9zCiMRcsuDiQ8xHwe5Ko0P8Kr3kyPFX6ofv5D5I54W
 leog0kQU/eYXMEveCqIaxjUFRb9SE8UY9SK//mAqzreLNFT896yG5GeD0WzRxwQl
 oxtn+DdzpRHdjiDnS2OC4v22BvxVb3qLr0rVlCC1V3KFalxyRjU=
 =2GwC
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.19:

- A series from Lucas and Paul to update GPCv2 driver for i.MX8MP power
  domains, and add HSIO and HDMI block control support.

* tag 'imx-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: fix semicolon.cocci warnings
  soc: imx: add i.MX8MP HDMI blk-ctrl
  soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl
  soc: imx: add i.MX8MP HSIO blk-ctrl
  dt-bindings: power: imx8mp: add defines for HDMI blk-ctrl domains
  dt-bindings: soc: Add i.MX8MP media block control DT bindings
  soc: imx: imx8m-blk-ctrl: set power device name
  soc: imx: gpcv2: add support for i.MX8MP power domains
  soc: imx: gpcv2: add PGC control register indirection

Link: https://lore.kernel.org/r/20220508033843.2773685-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-09 23:10:48 +02:00
Arnd Bergmann
3d09c0dfd0 i.MX dt-bindings update for 5.19:
- Various board compatible additions to fsl.yaml.
 - Update fsl-imx-dma bindings to deprecate '#dma-channels' and
   '#dma-requests'.
 - Add bindings for i.MX8MP HDMI and media block control.
 - Add vendor prefix for Storopack.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmJ3IAcUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM5THgf+JCUpc9SFNqU2LbfFofRnMn6X0W6M
 /eFUX6gxSs6GfsZQkZyDRWHwF7gS3W/iBO8cLlDaXmnnggn8/7e5b5TI9z0UmlQ+
 56N0Hlt9AhpURwknz/CLHbgywFPCXoOHJhlrTYJAATpnJweoN/7yN1Yt2lSXfHcy
 OapUYJC33rZjQFFSA3VF+e+VTuSkS0fOfyAqrC1A3Ye0miUeuJN6BXpPttjrvRj3
 ehuv91MMCv8al9sEbo1HWNkrReWrBbxsgCXE0G/H5EaQRxpW7JluvfK21DUWIxHK
 aolcwPS3+ihW8B68PTWGGty9PC9KaeqAidCoJmOFakvtRsw/O9V6vIGb+g==
 =/kl/
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ5CfkACgkQmmx57+YA
 GNmvbRAAuTtAdltAxpvP+M+QDcWfEm4/g3W2JJmVMwpM/rG+J8EcKQZPYp7ihL7C
 DTiI/aFd6wLTWemLS6Al3obpqJtiWXtZcpziF03G0bHDuCrYlNYa3o8ygqX88I4K
 xadecY8c72GhfCWGRyensr/jYp/l8iZNQ9w/4B14veZeqhU1Dwu/w/y+JeVBNfGc
 6dIkZ7kdTKetM9rvsv+cajFCyWstKktHdJoAqk1+a/0mGUALk0Qk3+KKJCF8Y7to
 wgvbftq/Raq4fPqTiNBPfXc7Uq20ByL7xT568UbxVvr/1BG7RAtkuBpaU/hyDrMM
 Bnh/EtV15dub8u2/AN+1jgnBiC2aZmmpDI0kofBWE6F/XkDqJ2oB4eSDROorzCby
 RXCnwk+sUni3MOpRHNY2NlSaZkaGjqGVYkVqWtMaqYRpEt2eJGFUOGgwWPyD1q22
 6Tyy2QORhUtn8DdW7fcqgIcJ2QK7umLIVlc0OV1wuf30KksxRbNPmEQZTmaKXoyV
 1SnRdS3cXzLi7FvVloyY45HlSV1iHxFywpMUiwb7WlpNxIlVSsJpF2xEvQoeRRdZ
 dswWlNHMjKCB0Nb93OjFCbUzINRLm1j78bMs1l6ST15Yt7R35oyInWdavJXtvHmc
 ZePoSzDaWGRK2kF0XUZxE4hlBoHtAJezav+kc+daY3LshBPJws0=
 =//D3
 -----END PGP SIGNATURE-----

Merge tag 'imx-bindings-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX dt-bindings update for 5.19:

- Various board compatible additions to fsl.yaml.
- Update fsl-imx-dma bindings to deprecate '#dma-channels' and
  '#dma-requests'.
- Add bindings for i.MX8MP HDMI and media block control.
- Add vendor prefix for Storopack.

* tag 'imx-bindings-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: arm: Add bosch acc board
  dt-bindings: arm: fsl: Add Storopack i.MX7D SMEGW01 board
  dt-bindings: vendor-prefixes: Add prefix for Storopack
  dt-bindings: dmaengine: fsl-imx: deprecate '#dma-channels' and '#dma-requests'
  dt-bindings: arm: fsl: add toradex,colibri-imx6ull
  dt-bindings: arm: fsl: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit
  dt-bindings: arm: fsl: add ls1021a-iot board
  dt-bindings: arm: Add i.MX8M Mini Toradex Verdin based Menlo board
  dt-bindings: arm: Add i.MX8M Plus Gateworks GW74xx board
  dt-bindings: arm: fsl: add IMX8MN DDR3L eval board
  dt-bindings: arm: fsl: Add carriers for toradex,colibri-imx6dl
  dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindings
  dt-bindings: arm: fsl: add toradex,verdin-imx8mp et al.
  dt-bindings: arm: Add i.MX53 based Menlo board comment
  dt-bindings: arm: fsl: add PHYTEC phyGATE Tauri i.MX6 ULL
  dt-bindings: arm: fsl: add TQ Systems boards based on i.MX6UL(L)
  dt-bindings: arm: Add Data Modul i.MX8M Mini eDM SBC
  dt-bindings: soc: add binding for i.MX8MP HDMI blk-ctrl
  dt-bindings: power: imx8mp: add defines for HDMI blk-ctrl domains
  dt-bindings: soc: Add i.MX8MP media block control DT bindings

Link: https://lore.kernel.org/r/20220508033843.2773685-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-09 14:32:57 +02:00
Sam Shih
5794dda109 dt-bindings: reset: mt7986: Add reset-controller header file
Add infracfg, toprgu, and ethsys reset-controller header file
for MT7986 platform.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220105100456.7126-2-sam.shih@mediatek.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2022-05-08 10:34:04 +02:00
Runyang Chen
1d6866e8f1 dt-bindings: reset: mt8186: add reset-controller header file
1. Add toprgu reset-controller header file for MT8186.
2. Add DSI software reset bit which is controlled in MMSYS for MT8186.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220301054405.25021-3-rex-bc.chen@mediatek.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2022-05-08 10:33:58 +02:00
Arnd Bergmann
1bc44c1e79 arm64: tegra: Device tree changes for v5.19-rc1
This adds some improvements on Tegra234 (QSPI, CCPLEX), improves the
 SDMMC clock speed on Tegra194 and adds the ASRC audio block on various
 chip generations. Memory controller channels are also added on Tegra186
 and later and the missing DFLL reset is added for Tegra210.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmJ1LsgTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoZKcD/4rxLjWUWGLqTxg1ZtMpWgWpqQAOgn1
 lCQCcK75WFOSXWhzFVlvxvDff5RS80vDXHNS9mPT5S9uI2PiqiHKY6v/fOQkddI4
 Gk78BGbAtSzCUCoTKYf/iWdiNYhYU7SfgxdZplb8JLAsRCbgxirbnBD+QkMvD4T3
 ksTAgUUDespZzJ4NksNWMCWC2iehQu594sXWbMzMTxojC5i1QlanEfX8yg3C5O8C
 c+NpA9q/JHYg1MiSoDP7Co4Kgj8Bfu0Fxm8DGsaNKSMVh6Ai45TC/5ED7gCBkgLA
 ObaMQcb6gOnco5LdCAipDMyKml1qiK3YiOa+92CnWocMMWMbg1dlQ8IBoacycOgj
 hV6/egdcMtmzIK9rj4fGVFH3zbkqw2JeY0IWtZH+5zgJZjsCofIK0PsmgPIewEnj
 iglEuAWmV4qev/8KB2cbcpRiggLKBZ1o3lpOatKNugNy/T4Aie1C/2tfUEV0Ie07
 n/9EkgHHlSXZGwI7zvFwTeiI/IOIySg2BVZsQi//0QVRsj7w9cKv+mHoQ/bZZQFc
 nXhiMEHhKuWDhbRrlpshI1XUJ5knGz9lCJPrcRV8/9rL0A4zDH+IfH966Jpdepo5
 Qh8MdncxOlrflZTOLhbOjemyCU8ieahu8yTcpziyUHqKcxKXDnjJXC6Cg0TpeuX3
 QDuWvinVDDHoLw==
 =KBZh
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ1h4sACgkQmmx57+YA
 GNmbcBAAj+oXraktDfkgmiEg2vcBS92H/ik/09RdifgTomjEQMHNpB+Kp+c6xXuh
 rHZU/HMqNuuVImmZImTDGqYKXzJMsEckIzBWiXsIP3vNNooJbWyDC5YxPftZqCED
 tfXfra0U6hCumX03o9l6Tywf2pfawxsO28QFE+xGffKHa53GruIYkj62prXCJWqD
 GOcCoBkqulNPVoIsQAtCp3JNxnvR3JmYxNlCdbIrTp6zGnhYsMyLFeEdcamS1rCO
 ZyQ//byFjhTGWr5e3w3LD4ZPekAFN0elWXGLjyz+oitxIAm/jL/4JpZwkbL+qS35
 MDO57gQB/nc5wfM2Ojm3rIk2Vs0DeX3V92TcSKPVTqHPqciySb1ftDa5CLzRPyCQ
 fcLxZHWP1YTHvfcSG0MQLhixp3GW8OhJiSQElqjhWE4LpNmWreElnFAxZ9oiiDTb
 58xnU4vaYb7RzqZVmyXuBWaxXH5NQKjri+OFGjbqvH9CI+KVQeH2829otEhbHTad
 nfBeoZqp9CjzY9ejBWFduCeXLEDO52HGa33BDkJPeO/PENmgmDBZMxo+hJOL2ZZx
 htpHFlllj0eC/QomGp9zJfadZbslRGigWr9X868whDROhBlL/onFh6iEqPmREhTv
 M4waPbQynA9928AfYFSxXJmUdvbusxvppU1e4eISWWzC3DyHlHE=
 =wsbV
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.19-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.19-rc1

This adds some improvements on Tegra234 (QSPI, CCPLEX), improves the
SDMMC clock speed on Tegra194 and adds the ASRC audio block on various
chip generations. Memory controller channels are also added on Tegra186
and later and the missing DFLL reset is added for Tegra210.

* tag 'tegra-for-5.19-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add missing DFLL reset on Tegra210
  arm64: tegra: Add memory controller channels
  arm64: tegra: Enable ASRC on various platforms
  arm64: tegra: Add ASRC device on Tegra186 and later
  arm64: tegra: Update PWM fan node name
  arm64: tegra: Add node for Tegra234 CCPLEX cluster
  arm64: tegra: Add QSPI controllers on Tegra234
  arm64: tegra: Update SDMMC1/3 clock source for Tegra194

Link: https://lore.kernel.org/r/20220506143005.3916655-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06 22:39:39 +02:00
Arnd Bergmann
4a17dc417a Renesas ARM DT updates for v5.19 (take two)
- I2C, sound, USB, CANFD, timer, watchdog, (Q)SPI, cpufreq, and
     thermal support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK
     development board,
   - Initial support for the R-Car V4H SoC and the Renesas White Hawk
     development board stack,
   - DMA, RTC, and USB support for the RZ/N1D SoC,
   - Initial support for the RZ/V2M SoC an the RZ/V2M Evaluation Kit
     Board,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYnTmCAAKCRCKwlD9ZEnx
 cNXAAP4zWJnWNezZM//dRYwLHALSOE5x22y+MJyiDYDPO2Z0FgD+LcVO1AV+FEqN
 /vFkQRBThrdcARFqc44lSYGj2f2+kgg=
 =L6Mz
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ1hYMACgkQmmx57+YA
 GNkGMRAAxCV75SY+uFRw3LMWPW65C07dTxA7K7KNZxFJTL09I4YykZ1mA7yLfDie
 Awyaf51Xl7n6EaczqFBYOTmdHW6v3GRbaetbZMPLPVgqTBWfIHKcUfxDGQZ28h2W
 vcwtecEqmSQcKmiWohqpz0gYNA/FIIPa2jO1tp7AtnOLx/W7/Qzw8zYsWH8ozSYe
 xPq28aGoq1HCsqd56/X5i2O1oCWYWO6QPwL7yhe0ylkqww5rffyFb69+8CznwIvv
 GAW5qPG0EG1ORDTZGqe/n/AsZWhs8EsDC8IkKeDLkC6zHEj124Vqdl+YKfv/tdNk
 Z5Ng7EGFU88XGqBFaiFp58Olw3YkvsSswOKJFXUkgA+Zql3O1Pz/LpLhteqIPczZ
 xJsfBCBvrZhAlqVHIZQpge2mWLhyaHBqc7aytIhzdMCOLjylGeHyCS9J0tCI3S1H
 FyEM0hpFojaZh8dAAzFVGAEJi2KxwKVjJey82epRtMkNeUbOGlLAXRSlLT149Fqi
 NdbL7py/rsibmtQJg/pNXvxwzf56zmAkJg3OVc7Kzw/uO9X5Iwrt9VsLN4L2rb13
 0eAKr8/72za82u4dpEHiHbCQgl3E2g+zyhYTaEskB68p/fxw7P87R/cZg+ws2c/S
 7kyfJAlndj7FZ/RajblY+EDAaa5J7bchXRkpeMcm7Yx+Eg2KKSU=
 =3n4A
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm-dt-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.19 (take two)

  - I2C, sound, USB, CANFD, timer, watchdog, (Q)SPI, cpufreq, and
    thermal support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK
    development board,
  - Initial support for the R-Car V4H SoC and the Renesas White Hawk
    development board stack,
  - DMA, RTC, and USB support for the RZ/N1D SoC,
  - Initial support for the RZ/V2M SoC an the RZ/V2M Evaluation Kit
    Board,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (40 commits)
  arm64: dts: renesas: Add initial device tree for RZ/V2M EVK
  arm64: dts: renesas: Add initial DTSI for RZ/V2M SoC
  arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
  ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY
  ARM: dts: r9a06g032: Add USB PHY DT support
  ARM: dts: r9a06g032: Add internal PCI bridge node
  ARM: dts: r9a06g032: Describe the RTC
  arm64: dts: renesas: Add interrupt-names to CANFD nodes
  arm64: dts: renesas: r9a07g043: Add SPI Multi I/O Bus controller node
  arm64: dts: renesas: r9a07g043: Create thermal zone to support IPA
  arm64: dts: renesas: r9a07g043: Add TSU node
  arm64: dts: renesas: r9a07g043: Add OPP table
  arm64: dts: renesas: r9a07g043: Add RSPI{0,1,2} nodes
  arm64: dts: renesas: r9a07g054: Fix external clk node names
  arm64: dts: renesas: r9a07g044: Fix external clk node names
  ARM: dts: r9a06g032: Fix the NAND controller node
  ARM: dts: r9a06g032: Fill the UART DMA properties
  ARM: dts: r9a06g032: Describe the DMA router
  ARM: dts: r9a06g032: Add the two DMA nodes
  arm64: dts: renesas: Remove empty rgb output endpoints
  ...

Link: https://lore.kernel.org/r/cover.1651828603.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06 22:30:59 +02:00
Arnd Bergmann
2367ee1ab9 Samsung DTS ARM64 changes for v5.19, part two
1. Cleanups: unused and undocumented dma-channels and dma-requests.
 2. Add clock controllers to ExynosAutov9.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmJ01mIQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD19wrD/0TEcs2zVyKKwtBdzH9UoAcBzAHsFrs/B+8
 x/PbErDa1QWr0N+ChCcuPJF/QoWMYDoXIPkfA3QOJNI4CZXIoQTFUnrO3dINYsUm
 /HoVKP8tXjCd9bMTcKT1uryBqv+/Iyqekb+XapP+NRySWCSaJ/D7+RQbtr24Pl9X
 6YPBlUgpbqtBsOfxjMD63Ryj67BsrH7MzKsZWcmp1294x5pXu1qc8EQCnJoFY9A/
 XfrZEnZmsV7niNO60ohM/o7JDPorLdUXW93VRdaU4RM6Za6GSes/S/0fyTtN3jQs
 bn+w3QZh2OyEPVia1rEDBuRUUECLgvjc+kfEFEf+MgiQ8AxIRMac8mvPIf9W3LLi
 E5piweN+ZvijIkvuC8wpOFdlgzbEq6nhEkrckO9CNhx1NltgtDHIPEwXZamgR+30
 vuBry1JxKagFSGpqju78D5s5Jd1o+r1ByEg7oL1HSLJdcCKd6YEklGakPeXbMyR2
 QQSbbMK2NiODpQcjmEo4FxpGta6rlKZibnKbKTpRm/QSyzRITSQvc8l7yZnHD47S
 Ato0qXbwlRmuReXX+P1+yP8wSl6aSPurWbOrobwL/ziTWXXDJjlp6Qr9rhvhreNs
 VZ3ERh8JIUYgOuFT7O9GS325a5JSNtX6uL2ZtH6QKn/d3s/8x962QiaU84ULDCSG
 RAL8jS3gbQ==
 =LPf7
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ1hHUACgkQmmx57+YA
 GNkg2A/5AZtnjtY2TXwA4bCulEmSkrb6CD5jjJwvGLJU3bDokK4X8bkxHFlqirxM
 RhPrGPCDMvATNVNVkerGJoDtOvCxh5b9zx7s6YtJiQ7D2kn0exeL9sviQow8W4oz
 H9uL+zyFSJr9QC8evN7yMcQz1A7+o3BhXqHH9raeeZb0X2o89Q+fvrUWqRmtTLul
 jfmbx5Gmakfj7RFV52abwqOvW7CO5gLmhCev9Namq8GbHplCe6kABrxULwZSp5Jo
 WcMeCNo7MaNuesSq/wwTiRaFc5FNkB/WJC8SHIq/wpGzr5u/sUIqhVr+Brm/E1+G
 MoGcOE55gYNCdyKOjDAEA7tGWPH+MQYJKo2g32ahNw2jsKCRxknxvvAy+uLrSpPV
 Jm0fd9dWDn9zqrLymAnlEo7ljHFcdQLFDZmTSYRUQ8Fm+BWxQNANL8kt7kv3D0BQ
 GUPD0JLrMVCOKtg5r16pMWEu4UOQT+VR1j7tXc1UKKpQ0RsIMIDl2Z9iWrjLYIme
 GjFRAzaqNxe27A3uVZaenPphL9fXqgVxOSMKhIRMJK6k8MdxeUU8xsuF0Se+A7Zu
 62Dv6+qiBckciVUFdSzGRXCxXX6m/ZIIkiBh4q7W6jRBs1S3DyiTysNyBiZxVXkE
 p4XSYgyk+T2ps9Y17gRa3Plv9xl+L8MwGmrXqT/WLpo1YgkPMSQ=
 =TVub
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt64-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.19, part two

1. Cleanups: unused and undocumented dma-channels and dma-requests.
2. Add clock controllers to ExynosAutov9.

* tag 'samsung-dt64-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: switch UFS clock node in ExynosAutov9
  arm64: dts: exynos: switch USI clocks in ExynosAutov9
  arm64: dts: exynos: add initial CMU clock nodes in ExynosAutov9
  dt-bindings: clock: add Exynos Auto v9 SoC CMU bindings
  dt-bindings: clock: add clock binding definitions for Exynos Auto v9
  arm64: dts: fsd: drop useless 'dma-channels/requests' properties
  arm64: dts: exynos: drop useless 'dma-channels/requests' properties
  arm64: dts: exynos: move XTCXO clock frequency to board in Exynos Auto v9

Link: https://lore.kernel.org/r/20220506081438.149192-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06 22:26:29 +02:00
Arnd Bergmann
819ed6f07d Renesas driver updates for v5.19 (take two)
- Initial support for the R-Car V4H and RZ/V2M SoCs,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYnThKAAKCRCKwlD9ZEnx
 cDtZAQDveNky2MIYx0nNb88JzK5PS1zo85KcU5g6ybf/QEnMdQEA7GYKKKi9q3rF
 5Q1h6kUvIW6e8c7lcva2DI4D7ZUIoAk=
 =M1iB
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ1gDcACgkQmmx57+YA
 GNl8LhAAjqsrH2O/ufjr/7SK1hHpqGdPo08RwHOvHNLOX35si9l4sSswf5xpI0M5
 NtpS1DaDH5X7z/VteRC2CYqRR5L2pKogmjpEVxPCQxgVGfeicg4ntw59O6vuBmml
 w1bZ5a9Ipd/8AU5mEOXCZlb+96I16T9wfetlerSYyYsmt8pCLYwQrXijoIwUhrS0
 i8YxzfUD5MZ7RZd8mzxxGs8vKDmgMZMuoxzdRxpoLIfgaRNyqCboLoP1lvQhXLFY
 XHLJZOW1pHd41sx5f1cJv3wKwsBHBVxzXFNGGz2i60BaVjrBSbSpixM+C/LUddIl
 h+QhR9PLKk2iIbDuiD6x9G6fv20LA0Gz5BI57XiJcuPK/SIB8R4hISYpQ6GVAh1L
 ve2NPE6o4hJC7UhJRH6JFNyfaF6pmPK9VVvG9BOPvd8L6SKyyeWHiVgaOzCBgJKm
 5ZPKPZ8KCC9Rky7secioIFb2eyGg73CKWVi+cZzSb9wVkPC7rZsTTbErWTAI4FEn
 slyJrA36bfQXk2kDaWIXdN55xXD+oZhkHtwVVX61Srp6DEnaUABocGJ+TtrrfdkE
 9OlsQE9fivl6WPtTZJ11RivT3qnpiUFl/owaG+l3q01Ryvtm9GJAJuBDhl1qN9AM
 /5endo466iMqS9zlNol+2MjPplGek43XSBE//24/+7BSmzPwcNs=
 =P6fe
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.19 (take two)

  - Initial support for the R-Car V4H and RZ/V2M SoCs,
  - Miscellaneous fixes and improvements.

* tag 'renesas-drivers-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: R-Car V3U is R-Car Gen4
  soc: renesas: rzn1: Select PM and PM_GENERIC_DOMAINS configs
  soc: renesas: Add RZ/V2M (R9A09G011) config option
  soc: renesas: rcar-rst: Add support for R-Car V4H
  soc: renesas: Identify R-Car V4H
  soc: renesas: r8a779g0-sysc: Add r8a779g0 support
  dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions
  dt-bindings: power: Add r8a779g0 SYSC power domain definitions

Link: https://lore.kernel.org/r/cover.1651828613.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06 22:08:23 +02:00
Andre Przywara
31ab516980 clk: sunxi-ng: h616: Add PLL derived 32KHz clock
The RTC section of the H616 manual mentions in a half-sentence the
existence of a clock "32K divided by PLL_PERI(2X)". This is used as
one of the possible inputs for the mux that selects the clock for the
32 KHz fanout pad. On the H616 this is routed to pin PG10, and some
boards use that clock output to compensate for a missing 32KHz crystal.
On the OrangePi Zero2 this is for instance connected to the LPO pin of
the WiFi/BT chip.
The new RTC clock binding requires this clock to be named as one input
clock, so we need to expose this to the DT. In contrast to the D1 SoC
there does not seem to be a gate for this clock, so just use a fixed
divider clock, using a newly assigned clock number.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220428230933.15262-3-andre.przywara@arm.com
2022-05-06 18:03:52 +02:00
Andre Przywara
38d321b61b clk: sunxi-ng: h6-r: Add RTC gate clock
The H6 and H616 feature an (undocumented) bus clock gate for accessing
the RTC registers. This seems to be enabled at reset (or by the BootROM),
so we got away without it so far, but exists regardless.
Since the new RTC clock binding for the H616 requires this "bus" clock
to be specified in the DT, add this to R_CCU clock driver and expose it
on the DT side with a new number.
We do this for both the H6 and H616, but mark it as IGNORE_UNUSED, as we
cannot reference it in any H6 DTs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220428230933.15262-2-andre.przywara@arm.com
2022-05-06 18:02:40 +02:00
Geert Uytterhoeven
d7f49cb451 Renesas RZ/V2M DT Binding Definitions
Clock definitions for the Renesas RZ/V2M (R9A09G011) SoC, shared by
 driver and DT source files.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYnOhkgAKCRCKwlD9ZEnx
 cCbbAQCUh1AapeMlmEvhNIPN7NH5tE6EdpHJcTRrHXOhU1uT5QD/RLavj37xoyU0
 W519FwTA0oYGsXCq2yXjQ08DwlrkUg0=
 =nWXL
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r9a09g011-dt-binding-defs-tag' into renesas-arm-dt-for-v5.19

Renesas RZ/V2M DT Binding Definitions

Clock definitions for the Renesas RZ/V2M (R9A09G011) SoC, shared by
driver and DT source files.
2022-05-06 11:09:45 +02:00
Adam Skladowski
7e555e9975 dt-bindings: clk: qcom: gcc-msm8976: Add modem reset
Add modem reset for MSM8976.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220426073048.11509-3-a39.skl@gmail.com
2022-05-05 22:22:27 -05:00
Arnd Bergmann
0fd8954b9e STM32 DT for v5.19, round 1
Highlights:
 ----------
 
 -MCU:
  -Fix pinctrl node names to match with pinctrl yaml.
 
 - MPU:
  -General:
   - Fix pinctrl node names to match with pinctrl yaml.
   - Add Protonics boards support based on STM32MP151A SoC:
     - PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with
                TI and Micrel 10BaseT Phys and wifi support.
     - PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity
                and CO2 sensors.
     - PRTT1A - 10BaseT1L multi functional controller.
 
  - ST boards:
   - Add RTC support on stm32mp13.
   - Add button and heartbit support on stm32mp13 DK board.
   - Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based
     on OP-TEE OS and SCMI protocol.
 
  - DH boards:
   - Use MCO2 to generate PHY clock and ETHRX clock in order to release
     internal PLL for a better SD card usage.
   - Add 1ms PHY post-reset on Avenger96 board to match with PHY
     requirements.
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmJyVdEdHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIX04BAAiNspmlnFNXz9+PXr
 W1blnkVWudUAK6OR8gDCaKJF9VGgas+qEUFrH29xdIsCsCD4GjoVKVSDRBUtxUHQ
 V/UtyYgaM+B/Bp628E1R+Xq5HBzjZqiUkMt08TitsvOd6Ep1mZ1MgwsLCD31XGWN
 cOmNhSeNdRZGmnIU1EVEEZyQg2k45b570JPN6lOm9C8Jo09qTRn17Z9Fzzs+1rqq
 OD9RNiiSb8zHDhOGl9j19yhTmgPqZgjRNuuKHQ0s1v2ZHKNYZipkWLu2031JNsOY
 hIgs3tKfGWErVhjcKz5KH8x8pWtxnrbDloS3RCqh2AlHpOkbrb1XpAy7ssW3sqI8
 F+v/riNXtAoGedTrursKrtwr0D3H67VNvwXXKcjnnCV1BiX/CuCHkUpIVt0kNBhr
 MYhVlZJyZHtN1qMbhhCc65TEkup2eopIPdQYt7aNpE/VNKGtqEJly3RvW2wNGFOT
 JWHSXFdDGiSEVXRKY4/fYaxd4JqwVeZ/qQJgeMeJIq+ZrUFuCbqpsV9ipgtS1fUL
 7Tj/UfQr8BYDBAmCmSoItsQWYHXIFDLsmhtFRQSoaUQQSfg7Iywdckr4HnjYWsqV
 DwT4AkZScUSPuQuuUsHl5JMQLDOh5EnR+R27KKz4Q60VMVtiM21QZTogBNZxyG/7
 Wvor5EuQ2lvfdesxpQCwug2f/gU=
 =F34o
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJz4sMACgkQmmx57+YA
 GNmLihAAo1FbtHGXHU3yqY6pYSKiK2noO7slG3jAIMoNCtcbAW78/4jFMqqByeUJ
 Wa76sRbONd8+NWV/zXqXFXpPwK/R2dIk+PcvkAC6LYq2N0IJ2ot+TBk2y5BDC/YF
 F7X3obHpkGJuMhXKJHVf6aQirnhpEdYWEB1FybKAYcSjAR1hQ/eQG8dtpp10a2Ij
 gjocRb99XvTdU+ZoMuExdno0YZ4A+DSn8Q+L+rSknXMDhjlY+t+PF2bWYxBRImPk
 mODtM+G6Qsn7kkDN17NsPjC7E9hQA4eNSVgxw39Atsb0Ery5rBKqr7GjOfzHQJpq
 n1StMx7lbhnDaeFaXdkKYiAdWPtR5qdrRUsth3/Rv7z8XiJ+o4NuJEd4sI4vrgWd
 Or6ebHBMfDWMYK+BYHsqwZU+duuJNB6B0KI8lT8nDZEya34sS9y8al5jKtLfZR0c
 PjjV+Uc204UNLGPMF90vVFte/dAGJCMBio99mBUKWcRnZlaaYXy1AsnnU8gWD9Fq
 nkwXwrjcJJ+lfB/r7lf2ZkRiW8dpPxNQ/jVmdtQ2UYG+ZUBu5LIIRf7F5V56gdqg
 xZstBGgBHtHXGsOhv3DM7cc0JzwUjlv11g45P2Vb5cE3C6Vglq6KI7Kro8WP7mT6
 R5aPER0EwfxvyJTUK6J70TozjQsFNoN20dYE49daxwyrV8RfaEM=
 =gddr
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT for v5.19, round 1

Highlights:
----------

-MCU:
 -Fix pinctrl node names to match with pinctrl yaml.

- MPU:
 -General:
  - Fix pinctrl node names to match with pinctrl yaml.
  - Add Protonics boards support based on STM32MP151A SoC:
    - PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with
               TI and Micrel 10BaseT Phys and wifi support.
    - PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity
               and CO2 sensors.
    - PRTT1A - 10BaseT1L multi functional controller.

 - ST boards:
  - Add RTC support on stm32mp13.
  - Add button and heartbit support on stm32mp13 DK board.
  - Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based
    on OP-TEE OS and SCMI protocol.

 - DH boards:
  - Use MCO2 to generate PHY clock and ETHRX clock in order to release
    internal PLL for a better SD card usage.
  - Add 1ms PHY post-reset on Avenger96 board to match with PHY
    requirements.

* tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (24 commits)
  ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
  dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
  ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
  dt-bindings: reset: stm32mp15: rename RST_SCMI define
  dt-bindings: clock: stm32mp15: rename CK_SCMI define
  dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure"
  dt-bindings: rcc: Add optional external ethernet RX clock properties
  ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk
  ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk
  ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131
  ARM: dts: stm32: add support for Protonic PRTT1x boards
  ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
  dt-bindings: net: silabs,wfx: add prt,prtt1c-wfm200 antenna variant
  dt-bindings: arm: stm32: Add compatible strings for Protonic T1L boards
  dt-bindings: arm: stm32: correct blank lines
  dt-bindings: arm: stm32: narrow DH STM32MP1 SoM boards
  ARM: dts: stm32: enable RTC support on stm32mp135f-dk
  ARM: dts: stm32: add RTC node on stm32mp131
  ARM: dts: stm32: Fix PHY post-reset delay on Avenger96
  ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
  ...

Link: https://lore.kernel.org/r/5818c943-882d-7e50-430d-ae3299a108ee@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05 16:44:19 +02:00
Geert Uytterhoeven
049bddcb89 Renesas RZ/V2M DT Binding Definitions
Clock definitions for the Renesas RZ/V2M (R9A09G011) SoC, shared by
 driver and DT source files.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYnOhkgAKCRCKwlD9ZEnx
 cCbbAQCUh1AapeMlmEvhNIPN7NH5tE6EdpHJcTRrHXOhU1uT5QD/RLavj37xoyU0
 W519FwTA0oYGsXCq2yXjQ08DwlrkUg0=
 =nWXL
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r9a09g011-dt-binding-defs-tag' into renesas-clk-for-v5.19

Renesas RZ/V2M DT Binding Definitions

Clock definitions for the Renesas RZ/V2M (R9A09G011) SoC, shared by
driver and DT source files.
2022-05-05 12:10:49 +02:00
Phil Edworthy
96055bf71a dt-bindings: clock: Add r9a09g011 CPG Clock Definitions
Define RZ/V2M (R9A09G011) Clock Pulse Generator module clock outputs
(CPG_CLK_ON* registers), and reset definitions (CPG_RST_* registers)
in Section 48.5 ("Register Description") of the RZ/V2M Hardware User's
Manual (Rev. 1.10, Sep. 2021).

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220503115557.53370-3-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-05 12:04:58 +02:00
Chanho Park
680e1c8370 dt-bindings: clock: add clock binding definitions for Exynos Auto v9
Add device tree clock binding definitions for below CMU blocks.

- CMU_TOP
- CMU_BUSMC
- CMU_CORE
- CMU_FYS2
- CMU_PERIC0 / C1
- CMU_PERIS

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20220504075154.58819-2-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05 08:57:45 +02:00
Lucas Stach
f11cf9e35e dt-bindings: power: imx8mp: add defines for HDMI blk-ctrl domains
This adds the defines for the power domains provided by the HDMI
blk-ctrl on the i.MX8MP.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05 09:24:41 +08:00
Paul Elder
8b3dd27bfe dt-bindings: soc: Add i.MX8MP media block control DT bindings
The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level
peripheral providing access to the NoC and ensuring proper power
sequencing of the peripherals within the MEDIAMIX domain. Add DT
bindings for it.

There is already a driver for block controls of other SoCs in the i.MX8M
family, so these bindings will expand upon that.

Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05 09:24:41 +08:00
Andy Yan
604be85547 drm/rockchip: Add VOP2 driver
The VOP2 unit is found on Rockchip SoCs beginning with rk3566/rk3568.
It replaces the VOP unit found in the older Rockchip SoCs.

This driver has been derived from the downstream Rockchip Kernel and
heavily modified:

- All nonstandard DRM properties have been removed
- dropped struct vop2_plane_state and pass around less data between
  functions
- Dropped all DRM_FORMAT_* not known on upstream
- rework register access to get rid of excessively used macros
- Drop all waiting for framesyncs

The driver is tested with HDMI and MIPI-DSI display on a RK3568-EVB
board. Overlay support is tested with the modetest utility. AFBC support
on the cluster windows is tested with weston-simple-dmabuf-egl on
weston using the (yet to be upstreamed) panfrost driver support.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Co-Developed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
[dt-binding-header:]
Acked-by: Rob Herring <robh@kernel.org>
[moved dt-binding header from dt-nodes patch to here
 and made checkpatch --strict happier]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-23-s.hauer@pengutronix.de
2022-05-04 14:05:47 +02:00
Alexandre Torgue
5f5d7decf0 dt-bindings: reset: stm32mp15: rename RST_SCMI define
As we only have one SCMI instance, it's not necessary to add an index to
the name.

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
2022-05-04 11:00:56 +02:00
Alexandre Torgue
9b0df59252 dt-bindings: clock: stm32mp15: rename CK_SCMI define
As we only have one SCMI instance, it's not necessary to add an index to
the name.

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
2022-05-04 11:00:53 +02:00
Yong Wu
2d555a3844 dt-bindings: mediatek: mt8186: Add binding for MM iommu
Add mt8186 iommu binding. "-mm" means the iommu is for Multimedia.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220503071427.2285-4-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-05-04 10:39:38 +02:00
Yong Wu
dc1d99342d dt-bindings: mediatek: mt8195: Add binding for infra IOMMU
In mt8195, we have a new IOMMU that is for INFRA IOMMU. its masters
mainly are PCIe and USB. Different with MM IOMMU, all these masters
connect with IOMMU directly, there is no mediatek,larbs property for
infra IOMMU.

Another thing is about PCIe ports. currently the function
"of_iommu_configure_dev_id" only support the id number is 1, But our
PCIe have two ports, one is for reading and the other is for writing.
see more about the PCIe patch in this patchset. Thus, I only list
the reading id here and add the other id in our driver.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20220503071427.2285-3-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-05-04 10:39:38 +02:00
Yong Wu
6625ffb90f dt-bindings: mediatek: mt8195: Add binding for MM IOMMU
This patch adds descriptions for mt8195 IOMMU which also use ARM
Short-Descriptor translation table format.

In mt8195, there are two smi-common HW and IOMMU, one is for vdo(video
output), the other is for vpp(video processing pipe). They connects
with different smi-larbs, then some setting(larbid_remap) is different.
Differentiate them with the compatible string.

Something like this:

    IOMMU(VDO)          IOMMU(VPP)
       |                   |
  SMI_COMMON_VDO      SMI_COMMON_VPP
  ---------------     ----------------
  |      |   ...      |      |     ...
larb0 larb2  ...    larb1 larb3    ...

Another change is that we have a new IOMMU that is for infra master like
PCIe and USB. The infra master don't have the larb and ports, thus we
rename the port header file to mt8195-memory-port.h rather than
mt8195-larb-port.h.

Also, the IOMMU is not only for MM, thus, we don't call it "m4u" which
means "MultiMedia Memory Management UNIT". thus, use the "iommu" as the
compatiable string.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20220503071427.2285-2-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-05-04 10:39:38 +02:00
Zelong Dong
52f988d757 dt-bindings: reset: add bindings for the Meson-S4 SoC Reset Controller
Add DT bindings for the Meson-S4 SoC Reset Controller include file.

Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20220107023931.13251-3-zelong.dong@amlogic.com
2022-05-03 17:40:51 +02:00
Lucas Stach
43896f56b5 clk: imx8mp: add clkout1/2 support
clkout1 and clkout2 allow to supply clocks from the SoC to the board,
which is used by some board designs to provide reference clocks.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220427162131.3127303-1-l.stach@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2022-05-02 12:38:10 +03:00
Geert Uytterhoeven
d1fcd661ba Renesas R-Car V4H DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car V4H (R8A779G0)
 SoC, shared by driver and DT source files.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYmZeygAKCRCKwlD9ZEnx
 cPnfAQDX43S1p/rL4PVxtumI9NHgZe8O3M1wwoJCW8ZdnM2fRwEA0mT7QDr4MpJr
 f9kF/Zh24WgK17cN+tCb3+hWDLCdewE=
 =oJ8Z
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r8a779g0-dt-binding-defs-tag' into renesas-clk-for-v5.19

Renesas R-Car V4H DT Binding Definitions

Clock and Power Domain definitions for the Renesas R-Car V4H (R8A779G0)
SoC, shared by driver and DT source files.
2022-04-29 12:23:34 +02:00
Geert Uytterhoeven
a4744a1de6 Renesas R-Car V4H DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car V4H (R8A779G0)
 SoC, shared by driver and DT source files.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYmZeygAKCRCKwlD9ZEnx
 cPnfAQDX43S1p/rL4PVxtumI9NHgZe8O3M1wwoJCW8ZdnM2fRwEA0mT7QDr4MpJr
 f9kF/Zh24WgK17cN+tCb3+hWDLCdewE=
 =oJ8Z
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r8a779g0-dt-binding-defs-tag' into renesas-arm-dt-for-v5.19

Renesas R-Car V4H DT Binding Definitions

Clock and Power Domain definitions for the Renesas R-Car V4H (R8A779G0)
SoC, shared by driver and DT source files.
2022-04-29 12:22:36 +02:00
Bjorn Andersson
dbfb5f94e0 dt-bindings: power: rpmpd: Add sc8280xp RPMh power-domains
The sc8280xp has 13 power-domains controlled through the RPMh, document
the compatible and provide definitions for the power-domains - and their
active-only variants where applicable.

The SA8540p differs slightly in the power domains exposed, so add a
separate compatible for this, but reuse the constants to allow sharing
the DeviceTree source.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220426233508.1762345-2-bjorn.andersson@linaro.org
2022-04-28 14:19:57 -05:00
Rohit Agarwal
d405ac52ab dt-bindings: interconnect: Add Qualcomm SDX65 DT bindings
Add interconnect IDs for Qualcomm SDX65 platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1649854415-11174-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-04-26 14:11:26 +03:00
Chun-Jie Chen
f113a51aa2 dt-bindings: ARM: MediaTek: Add new document bindings of MT8186 clock
This patch adds the new binding documentation for system clock
and functional clock on MediaTek MT8186.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220409132251.31725-2-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25 16:59:38 -07:00
Linus Walleij
7335631fcd dt-bindings: clock: u8500: Add clkout clock bindings
This adds device tree bindings for the externally routed clocks
CLKOUT1 and CLKOUT2 clocks found in the DB8500.

Cc: devicetree@vger.kernel.org
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220414221751.323525-2-linus.walleij@linaro.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25 16:17:24 -07:00
Yoshihiro Shimoda
f2afa78d5a dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas
R-Car V4H (R8A779G0) SoC.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220425064201.459633-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-25 10:34:19 +02:00
Yoshihiro Shimoda
90715507cb dt-bindings: power: Add r8a779g0 SYSC power domain definitions
Add power domain indices for R-Car V4H (r8a779g0).

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220425064201.459633-2-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-25 10:34:19 +02:00
John Crispin
038010bb30 dt-bindings: Add en7523-scu device tree binding documentation
Adds device tree binding documentation for clocks in the EN7523 SOC.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Link: https://lore.kernel.org/r/20220314084409.84394-2-nbd@nbd.name
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-22 19:16:48 -07:00
Conor Dooley
8be99c7b8b dt-bindings: clk: mpfs: add defines for two new clocks
The RTC reference and MSSPLL were previously not documented or defined,
as they were unused. Add their defines to the PolarFire SoC header.

Fixes: 2145bb687e ("dt-bindings: clk: microchip: Add Microchip PolarFire host binding")
Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220413075835.3354193-6-conor.dooley@microchip.com
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-22 18:40:15 -07:00
Bjorn Andersson
ea3364db90 dt-bindings: interconnect: qcom: Add sc8280xp binding
The Qualcomm SC8280XP platform has the usual set of busses, add a
binding for these interconnect providers and port definitions to allow
interconnect paths to be expressed in the sc8280xp DeviceTree.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220408214835.624494-1-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-04-22 11:04:34 +03:00
Bjorn Andersson
0fb9ddbc63 Merge branch '20220411072156.24451-2-michael.srba@seznam.cz' into arm64-for-5.19 2022-04-19 12:05:00 -05:00
Bjorn Andersson
ec5a164e08 Merge branch '20220411072156.24451-2-michael.srba@seznam.cz' into clk-for-5.19 2022-04-19 12:04:50 -05:00
Michael Srba
368cfcbaa3 dt-bindings: clock: gcc-msm8998: Add definitions of SSC-related clocks
Add definitions of four clocks which need to be manipulated in order to
initialize the AHB bus which exposes the SCC block in the global address
space.

Signed-off-by: Michael Srba <Michael.Srba@seznam.cz>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411072156.24451-2-michael.srba@seznam.cz
2022-04-19 12:04:02 -05:00
Marek Vasut
39772efd98 clk: imx8mp: Add DISP2 pixel clock
Add pixel clock for second LCDIFv3 interface. Both LCDIFv3 interfaces use
the same set of parent clock, so deduplicate imx8mp_media_disp1_pix_sels
into common imx8mp_media_disp_pix_sels and use it for both.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Abel Vesa <abel.vesa@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220313123949.207284-1-marex@denx.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2022-04-18 12:51:04 +03:00
Biju Das
eb27897854 dt-bindings: clock: Add R9A07G043 CPG Clock and Reset Definitions
Define RZ/G2UL (R9A07G043U) Clock Pulse Generator Core Clock and module
clock outputs, as listed in Table 7.1.4.2 ("Clock List r0.51") and also
add Reset definitions referring to registers CPG_RST_* in Section 7.2.3
("Register configuration") of the RZ/G2UL Hardware User's Manual (Rev.
0.51, Nov. 2021).

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220402073037.23947-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 12:21:04 +02:00
Taniya Das
4185b27b3b dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
properties that are needed in a device tree. Also add clock ids for
LPASS core clocks and audio clock IDs for LPASS client to request for
the clocks.

Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220223172248.18877-1-tdas@codeaurora.org
2022-04-12 21:16:48 -05:00
Alvin Šipraga
9b30501949 dt-bindings: imx: add clock bindings for i.MX8MN GPT
The i.MX8MN has a General Purpose Timer (GPT) just like the i.MX8MM,
which already has such bindings. Add the relevant bindings for the Nano
SoC too.

Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220317223600.175894-1-alvin@pqrs.dk
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2022-04-12 13:55:36 +03:00
Rohit Agarwal
ccc706353d dt-bindings: power: Add rpm power domain bindings for SDX65
Add RPM power domain bindings for the SDX65 SoC.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647410837-22537-4-git-send-email-quic_rohiagar@quicinc.com
2022-04-07 22:18:00 -05:00
Ashish Singhal
71f69ffa01 arm64: tegra: Add QSPI controllers on Tegra234
This adds the QSPI controllers on the Tegra234 SoC and populates the
SPI NOR flash device for the Jetson AGX Orin platform.

Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-06 15:27:17 +02:00
Richard Fitzgerald
72661ff766
ASoC: dt-bindings: cs35l45: Cirrus Logic CS35L45 Smart Amp
This adds the schema binding for the Cirrus Logic CS35L45 Smart Amp
and associated header file.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220405135419.1230088-5-rf@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-05 18:27:58 +01:00
Allen-KH Cheng
19c66219e4 arm64: dts: mt8192: Add the mmsys reset bit to reset the dsi0
Reset the DSI hardware is needed to prevent different settings between
the bootloader and the kernel.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220318144534.17996-20-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:09:37 +02:00
Linus Torvalds
6a34fdcca4 RTC for 5.18
Subsystem:
  - remove uie_unsupported, all users have been converted to clear
    RTC_FEATURE_UPDATE_INTERRUPT and provide a reason
  - RTCs with an alarm with a resolution of a minute are now letting the core
    handle rounding down the alarm time
  - fix use-after-free on device removal
 
 New driver:
  - OP-TEE RTC PTA
 
 Drivers:
  - sun6i: Add H616 support
  - cmos: Fix the AltCentury for AMD platforms
  - spear: set range
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEBqsFVZXh8s/0O5JiY6TcMGxwOjIFAmJGJ0wACgkQY6TcMGxw
 OjKAXQ/9EId70uY/kUQv2Ay2+NysfSFYpDoerf1V55vGyN+n/pxX14bUxTx0Ivse
 47ROcWSP94MSw9cExNvujkpY/V6xaQI3/jxWC60f5ngHzAwIArmmDdWMSLDmRJYi
 mg07Hp9bSTIgXVzBdlAJc6vSRDmznKB44TTrz6GvulLJROAy9jNJwefuxwsV9Ftl
 I6PcRtYGn5poPpp7yLi1IZ1m0gWJJVze9IsJWJjTRSzh9xAYnjOsMR5H8fyMLjh9
 1KjiHwV1c5En4HtrMrYPXOdeLTgNfCdfHaLRRhZRSE+dTK4551TbYbeG2GtKWkdR
 Xvybwik2kghde8+/sh6hhg59NGkfMkzLByc41P0VWfDEscyi3z+YXot2OOV+FfkI
 XpDPab+a2IQaGFYEa4sGVloFP4e9er5uRHRPkT6bX07plACMwV1wLSRqCK/RriV6
 HYImdP7/aA4t/OlmVdliyiyOZfO+oHX/z8hhkNbTJc5HpvgViDEKKEsOEef6OcRh
 j+p8ej6iaVt1wjYpfghHYanFzVPi98zGH0QMS9GmHbS+VetGYxzUVyKgzAsOMwYA
 RwTunNkQQqgiz+C4n2s/PDD4ZuNDFDFaEE+3RReaw/9LGkR007TCxwcNBEGde+B6
 1W4B9tNMGLI/hHulv7WYNrP/5Y/QPEuPiu+FxhwpNm5tDg1Ur70=
 =7E0a
 -----END PGP SIGNATURE-----

Merge tag 'rtc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux

Pull RTC updates from Alexandre Belloni:
 "The bulk of the patches are about replacing the uie_unsupported struct
  rtc_device member by a feature bit.

  Subsystem:

   - remove uie_unsupported, all users have been converted to clear
     RTC_FEATURE_UPDATE_INTERRUPT and provide a reason

   - RTCs with an alarm with a resolution of a minute are now letting
     the core handle rounding down the alarm time

   - fix use-after-free on device removal

  New driver:

   - OP-TEE RTC PTA

  Drivers:

   - sun6i: Add H616 support

   - cmos: Fix the AltCentury for AMD platforms

   - spear: set range"

* tag 'rtc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (56 commits)
  rtc: check if __rtc_read_time was successful
  rtc: gamecube: Fix refcount leak in gamecube_rtc_read_offset_from_sram
  rtc: mc146818-lib: Fix the AltCentury for AMD platforms
  rtc: optee: add RTC driver for OP-TEE RTC PTA
  rtc: pm8xxx: Return -ENODEV if set_time disallowed
  rtc: pm8xxx: Attach wake irq to device
  clk: sunxi-ng: sun6i-rtc: include clk/sunxi-ng.h
  rtc: remove uie_unsupported
  rtc: xgene: stop using uie_unsupported
  rtc: hym8563: switch to RTC_FEATURE_UPDATE_INTERRUPT
  rtc: hym8563: let the core handle the alarm resolution
  rtc: hym8563: switch to devm_rtc_allocate_device
  rtc: efi: switch to RTC_FEATURE_UPDATE_INTERRUPT
  rtc: efi: switch to devm_rtc_allocate_device
  rtc: add new RTC_FEATURE_ALARM_WAKEUP_ONLY feature
  rtc: spear: fix spear_rtc_read_time
  rtc: spear: drop uie_unsupported
  rtc: spear: set range
  rtc: spear: switch to devm_rtc_allocate_device
  rtc: pcf8563: switch to RTC_FEATURE_UPDATE_INTERRUPT
  ...
2022-04-01 09:37:18 -07:00
Linus Torvalds
9512433987 There's one large change in the core clk framework here. We change how
clk_set_rate_range() works so that the frequency is re-evaulated each time the
 rate is changed. Previously we wouldn't let clk providers see a rate that was
 different if it was still within the range, which could be bad for power if the
 clk could run slower when a range expands. Now the clk provider can decide to
 do something differently when the constraints change. This broke Nvidia's clk
 driver so we had to wait for the fix for that to bake a little more in -next.
 
 The rate range patch series also introduced a kunit suite for the clk framework
 that we're going to extend in the next release. It already made it easy to find
 corner cases in the rate range patches so I'm excited to see it cover more clk
 code and increase our confidence in core framework patches in the future. I
 also added a kunit test for the basic clk gate code and that work will continue
 to cover more basic clk types: muxes, dividers, etc.
 
 Beyond the core code we have the usual set of clk driver updates and additions.
 Qualcomm again dominates the diffstat here with lots more SoCs being supported
 and i.MX follows afer that with a similar number of SoCs gaining clk drivers.
 Beyond those large additions there's drivers being modernized to use
 clk_parent_data so we can move away from global string names for all the clks
 in an SoC. Finally there's lots of little fixes all over the clk drivers for
 typos, warnings, and missing clks that aren't critical and get batched up
 waiting for the next merge window to open. Nothing super big stands out in the
 driver pile. Full details are below.
 
 Core:
  - Make clk_set_rate_range() re-evaluate the limits each time
  - Introduce various clk_set_rate_range() tests
  - Add clk_drop_range() to drop a previously set range
 
 New Drivers:
  - i.MXRT1050 clock driver and bindings
  - i.MX8DXL clock driver and bindings
  - i.MX93 clock driver and bindings
  - NCO blocks on Apple SoCs
  - Audio clks on StarFive JH7100 RISC-V SoC
  - Add support for the new Renesas RZ/V2L SoC
  - Qualcomm SDX65 A7 PLL
  - Qualcomm SM6350 GPU clks
  - Qualcomm SM6125, SM6350, QCS2290 display clks
  - Qualcomm MSM8226 multimedia clks
 
 Updates:
  - Kunit tests for clk-gate implementation
  - Terminate arrays with sentinels and make that clearer
  - Cleanup SPDX tags
  - Fix typos in comments
  - Mark mux table as const in clk-mux
  - Make the all_lists array const
  - Convert Cirrus Logic CS2000P driver to regmap, yamlify DT binding and add
    support for dynamic mode
  - Clock configuration on Microchip PolarFire SoCs
  - Free allocations on probe error in Mediatek clk driver
  - Modernize Mediatek clk driver by consolidating code
  - Add watchdog (WDT), I2C, and pin function controller (PFC) clocks on
    Renesas R-Car S4-8
  - Improve the clocks for the Rockchip rk3568 display outputs (parenting, pll-rates)
  - Use of_device_get_match_data() instead of open-coding on Rockchip rk3568
  - Reintroduce the expected fractional-divider behaviour that disappeared
    with the addition of CLK_FRAC_DIVIDER_POWER_OF_TWO_PS
  - Remove SYS PLL 1/2 clock gates for i.MX8M*
  - Remove AUDIO MCLK ROOT from i.MX7D
  - Add fracn gppll clock type used by i.MX93
  - Add new composite clock for i.MX93
  - Add missing media mipi phy ref clock for i.MX8MP
  - Fix off by one in imx_lpcg_parse_clks_from_dt()
  - Rework for the imx pll14xx
  - sama7g5: One low priority fix for GCLK of PDMC
  - Add DMA engine (SYS-DMAC) clocks on Renesas R-Car S4-8
  - Add MOST (MediaLB I/F) clocks on Renesas R-Car E3 and D3
  - Add CAN-FD clocks on Renesas R-Car V3U
  - Qualcomm SC8280XP RPMCC
  - Add some missing clks on Qualcomm MSM8992/MSM8994/MSM8998 SoCs
  - Rework Qualcomm GCC bindings and convert SDM845 camera bindig to YAML
  - Convert various Qualcomm drivers to use clk_parent_data
  - Remove test clocks from various Qualcomm drivers
  - Crypto engine clks on Qualcomm IPQ806x + more freqs for SDCC/NSS
  - Qualcomm SM8150 EMAC, PCIe, UFS GDSCs
  - Better pixel clk frequency support on Qualcomm RCG2 clks
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmJDd+gRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSVB4A//QWPv7tssTuHvVDOPz2q9rJFbjG6/fsuY
 d8i30y4uTSCWO2eErVUNKxRmrR5/DFJZ20cqv5aTXbiUk5BrmCiD0hyb8RZIU4jD
 Kw+1pEvnbBWR6s5TK0spMS9Nz9Uq8DBwoeczHAVQrRZu0I8AkOvWlVH7GncejYOP
 KJJSiuByXHRLxudrLWTwwkz3xoDTZBeBcqNbBnatgXnPgSzBh0Uz+0q8r9V9Hugw
 +TwXoTVt+XDrX2ihPzZlfm9xoOTOP6GoP+FYCo8gCfW4N0VjUDr3+D95rJoI2gp/
 O9UyAx1+tMLlkVxuHcX1npHDPX6Nrqan68DBV4LQRdhSO3dfVD95AE16GzMrD+2t
 nuIzT+rst42UUzipCK/8pHLd/YCcPmIsH4C25ZnaF/I59kI/seF3zbekMTY7hS8D
 q9sTZYj1X32aHGTtN6QK6QJIscGHYfnSG3M8VLOnhmWDKmW+6AWJ2MVZdcCqDgnS
 AXnx1p7gwd/lHV8P+e1YoiUyh5a3tJ2CFFdQCu0tPwL0xLehHyfjKqtjYZjL2+hl
 6pF8KxEy6BiMEZWqXmIUJK6xWFO9VpQ2uPxtV8pCTIAXmOOPenWhH7lkeTtIDRc0
 hzJURj9HEcpEDakC4/16yfr+YnEn/vjhhZ8a4Vymsnl2IsI71C17vDmRer875Bp/
 KPMBn6I1naQ=
 =fP8L
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "There's one large change in the core clk framework here. We change how
  clk_set_rate_range() works so that the frequency is re-evaulated each
  time the rate is changed. Previously we wouldn't let clk providers see
  a rate that was different if it was still within the range, which
  could be bad for power if the clk could run slower when a range
  expands. Now the clk provider can decide to do something differently
  when the constraints change. This broke Nvidia's clk driver so we had
  to wait for the fix for that to bake a little more in -next.

  The rate range patch series also introduced a kunit suite for the clk
  framework that we're going to extend in the next release. It already
  made it easy to find corner cases in the rate range patches so I'm
  excited to see it cover more clk code and increase our confidence in
  core framework patches in the future. I also added a kunit test for
  the basic clk gate code and that work will continue to cover more
  basic clk types: muxes, dividers, etc.

  Beyond the core code we have the usual set of clk driver updates and
  additions. Qualcomm again dominates the diffstat here with lots more
  SoCs being supported and i.MX follows afer that with a similar number
  of SoCs gaining clk drivers. Beyond those large additions there's
  drivers being modernized to use clk_parent_data so we can move away
  from global string names for all the clks in an SoC. Finally there's
  lots of little fixes all over the clk drivers for typos, warnings, and
  missing clks that aren't critical and get batched up waiting for the
  next merge window to open. Nothing super big stands out in the driver
  pile. Full details are below.

  Core:
   - Make clk_set_rate_range() re-evaluate the limits each time
   - Introduce various clk_set_rate_range() tests
   - Add clk_drop_range() to drop a previously set range

  New Drivers:
   - i.MXRT1050 clock driver and bindings
   - i.MX8DXL clock driver and bindings
   - i.MX93 clock driver and bindings
   - NCO blocks on Apple SoCs
   - Audio clks on StarFive JH7100 RISC-V SoC
   - Add support for the new Renesas RZ/V2L SoC
   - Qualcomm SDX65 A7 PLL
   - Qualcomm SM6350 GPU clks
   - Qualcomm SM6125, SM6350, QCS2290 display clks
   - Qualcomm MSM8226 multimedia clks

  Updates:
   - Kunit tests for clk-gate implementation
   - Terminate arrays with sentinels and make that clearer
   - Cleanup SPDX tags
   - Fix typos in comments
   - Mark mux table as const in clk-mux
   - Make the all_lists array const
   - Convert Cirrus Logic CS2000P driver to regmap, yamlify DT binding
     and add support for dynamic mode
   - Clock configuration on Microchip PolarFire SoCs
   - Free allocations on probe error in Mediatek clk driver
   - Modernize Mediatek clk driver by consolidating code
   - Add watchdog (WDT), I2C, and pin function controller (PFC) clocks
     on Renesas R-Car S4-8
   - Improve the clocks for the Rockchip rk3568 display outputs
     (parenting, pll-rates)
   - Use of_device_get_match_data() instead of open-coding on Rockchip
     rk3568
   - Reintroduce the expected fractional-divider behaviour that
     disappeared with the addition of CLK_FRAC_DIVIDER_POWER_OF_TWO_PS
   - Remove SYS PLL 1/2 clock gates for i.MX8M*
   - Remove AUDIO MCLK ROOT from i.MX7D
   - Add fracn gppll clock type used by i.MX93
   - Add new composite clock for i.MX93
   - Add missing media mipi phy ref clock for i.MX8MP
   - Fix off by one in imx_lpcg_parse_clks_from_dt()
   - Rework for the imx pll14xx
   - sama7g5: One low priority fix for GCLK of PDMC
   - Add DMA engine (SYS-DMAC) clocks on Renesas R-Car S4-8
   - Add MOST (MediaLB I/F) clocks on Renesas R-Car E3 and D3
   - Add CAN-FD clocks on Renesas R-Car V3U
   - Qualcomm SC8280XP RPMCC
   - Add some missing clks on Qualcomm MSM8992/MSM8994/MSM8998 SoCs
   - Rework Qualcomm GCC bindings and convert SDM845 camera bindig to
     YAML
   - Convert various Qualcomm drivers to use clk_parent_data
   - Remove test clocks from various Qualcomm drivers
   - Crypto engine clks on Qualcomm IPQ806x + more freqs for SDCC/NSS
   - Qualcomm SM8150 EMAC, PCIe, UFS GDSCs
   - Better pixel clk frequency support on Qualcomm RCG2 clks"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (227 commits)
  clk: zynq: Update the parameters to zynq_clk_register_periph_clk
  clk: zynq: trivial warning fix
  clk: Drop the rate range on clk_put()
  clk: test: Test clk_set_rate_range on orphan mux
  clk: Initialize orphan req_rate
  dt-bindings: clock: drop useless consumer example
  dt-bindings: clock: renesas: Make example 'clocks' parsable
  clk: qcom: gcc-msm8994: Fix gpll4 width
  dt-bindings: clock: fix dt_binding_check error for qcom,gcc-other.yaml
  clk: rs9: Add Renesas 9-series PCIe clock generator driver
  clk: fixed-factor: Introduce devm_clk_hw_register_fixed_factor_index()
  clk: visconti: prevent array overflow in visconti_clk_register_gates()
  dt-bindings: clk: rs9: Add Renesas 9-series I2C PCIe clock generator
  clk: sifive: Move all stuff into SoCs header files from C files
  clk: sifive: Add SoCs prefix in each SoCs-dependent data
  riscv: dts: Change the macro name of prci in each device node
  dt-bindings: change the macro name of prci in header files and example
  clk: sifive: duplicate the macro definitions for the time being
  clk: qcom: sm6125-gcc: fix typos in comments
  clk: ti: clkctrl: fix typos in comments
  ...
2022-03-30 10:11:04 -07:00
Stephen Boyd
cf683abd39 Merge branches 'clk-sifive' and 'clk-visconti' into clk-next
* clk-sifive:
  clk: sifive: Move all stuff into SoCs header files from C files
  clk: sifive: Add SoCs prefix in each SoCs-dependent data
  riscv: dts: Change the macro name of prci in each device node
  dt-bindings: change the macro name of prci in header files and example
  clk: sifive: duplicate the macro definitions for the time being

* clk-visconti:
  clk: visconti: prevent array overflow in visconti_clk_register_gates()
2022-03-29 10:19:52 -07:00
Stephen Boyd
c64dd8ea8e Merge branches 'clk-range', 'clk-uniphier', 'clk-apple' and 'clk-qcom' into clk-next
- Make clk_set_rate_range() re-evaluate the limits each time
 - Introduce various clk_set_rate_range() tests
 - Add clk_drop_range() to drop a previously set range
 - Support for NCO blocks on Apple SoCs

* clk-range:
  clk: Drop the rate range on clk_put()
  clk: test: Test clk_set_rate_range on orphan mux
  clk: Initialize orphan req_rate
  clk: bcm: rpi: Run some clocks at the minimum rate allowed
  clk: bcm: rpi: Set a default minimum rate
  clk: bcm: rpi: Add variant structure
  clk: Add clk_drop_range
  clk: Always set the rate on clk_set_range_rate
  clk: Use clamp instead of open-coding our own
  clk: Always clamp the rounded rate
  clk: Enforce that disjoints limits are invalid
  clk: Introduce Kunit Tests for the framework
  clk: Fix clk_hw_get_clk() when dev is NULL

* clk-uniphier:
  clk: uniphier: Fix fixed-rate initialization

* clk-apple:
  clk: clk-apple-nco: Allow and fix module building
  MAINTAINERS: Add clk-apple-nco under ARM/APPLE MACHINE
  clk: clk-apple-nco: Add driver for Apple NCO
  dt-bindings: clock: Add Apple NCO

* clk-qcom: (61 commits)
  clk: qcom: gcc-msm8994: Fix gpll4 width
  dt-bindings: clock: fix dt_binding_check error for qcom,gcc-other.yaml
  clk: qcom: Add display clock controller driver for SM6125
  dt-bindings: clock: add QCOM SM6125 display clock bindings
  clk: qcom: Fix sorting of SDX_GCC_65 in Makefile and Kconfig
  clk: qcom: gcc: Add emac GDSC support for SM8150
  clk: qcom: gcc: sm8150: Fix some identation issues
  clk: qcom: gcc: Add UFS_CARD and UFS_PHY GDSCs for SM8150
  clk: qcom: gcc: Add PCIe0 and PCIe1 GDSC for SM8150
  clk: qcom: clk-rcg2: Update the frac table for pixel clock
  clk: qcom: clk-rcg2: Update logic to calculate D value for RCG
  clk: qcom: smd: Add missing MSM8998 RPM clocks
  clk: qcom: smd: Add missing RPM clocks for msm8992/4
  dt-bindings: clock: qcom: rpmcc: Add RPM Modem SubSystem (MSS) clocks
  clk: qcom: gcc-ipq806x: add CryptoEngine resets
  dt-bindings: reset: add ipq8064 ce5 resets
  clk: qcom: gcc-ipq806x: add CryptoEngine clocks
  dt-bindings: clock: add ipq8064 ce5 clk define
  clk: qcom: gcc-ipq806x: add additional freq for sdc table
  clk: qcom: clk-rcg: add clk_rcg_floor_ops ops
  ...
2022-03-29 10:19:36 -07:00
Stephen Boyd
4222744d40 Merge branches 'clk-starfive', 'clk-ti', 'clk-terminate' and 'clk-cleanup' into clk-next
- Audio clks on StarFive JH7100 RISC-V SoC
 - Terminate arrays with sentinels and make that clearer
 - Cleanup SPDX tags
 - Fix typos in comments

* clk-starfive:
  clk: starfive: Add JH7100 audio clock driver
  clk: starfive: jh7100: Support more clock types
  clk: starfive: jh7100: Make hw clock implementation reusable
  dt-bindings: clock: Add starfive,jh7100-audclk bindings
  dt-bindings: clock: Add JH7100 audio clock definitions
  clk: starfive: jh7100: Handle audio_div clock properly
  clk: starfive: jh7100: Don't round divisor up twice

* clk-ti:
  clk: ti: Drop legacy compatibility clocks for dra7
  clk: ti: Drop legacy compatibility clocks for am4
  clk: ti: Drop legacy compatibility clocks for am3
  clk: ti: Update component clocks to use ti_dt_clk_name()
  clk: ti: Update pll and clockdomain clocks to use ti_dt_clk_name()
  clk: ti: Add ti_dt_clk_name() helper to use clock-output-names
  clk: ti: Use clock-output-names for clkctrl
  clk: ti: Add ti_find_clock_provider() to use clock-output-names
  clk: ti: Optionally parse IO address from parent clock node
  clk: ti: Preserve node in ti_dt_clocks_register()
  clk: ti: Constify clkctrl_name

* clk-terminate:
  clk: actions: Make sentinel elements more obvious
  clk: clps711x: Terminate clk_div_table with sentinel element
  clk: hisilicon: Terminate clk_div_table with sentinel element
  clk: loongson1: Terminate clk_div_table with sentinel element
  clk: actions: Terminate clk_div_table with sentinel element

* clk-cleanup:
  clk: zynq: Update the parameters to zynq_clk_register_periph_clk
  clk: zynq: trivial warning fix
  clk: qcom: sm6125-gcc: fix typos in comments
  clk: ti: clkctrl: fix typos in comments
  clk: COMMON_CLK_LAN966X should depend on SOC_LAN966
  clk: Use of_device_get_match_data()
  clk: bcm2835: Remove unused variable
  clk: tegra: tegra124-emc: Fix missing put_device() call in emc_ensure_emc_driver
  clk: cleanup comments
  clk: socfpga: cleanup spdx tags
2022-03-29 10:19:10 -07:00
Stephen Boyd
9babf95203 Merge branches 'clk-mvebu', 'clk-const', 'clk-imx' and 'clk-rockchip' into clk-next
- Mark mux table as const in clk-mux
 - Make the all_lists array const

* clk-mvebu:
  clk: mvebu: use time_is_before_eq_jiffies() instead of open coding it

* clk-const:
  clk: Mark clk_core_evict_parent_cache_subtree() 'target' const
  clk: Mark 'all_lists' as const
  clk: pistachio: Declare mux table as const u32[]
  clk: qcom: Declare mux table as const u32[]
  clk: mmp: Declare mux tables as const u32[]
  clk: hisilicon: Remove unnecessary cast of mux table to u32 *
  clk: mux: Declare u32 *table parameter as const
  clk: nxp: Declare mux table parameter as const u32 *
  clk: nxp: Remove unused variable

* clk-imx: (28 commits)
  dt-bindings: clock: drop useless consumer example
  clk: imx: Select MXC_CLK for i.MX93 clock driver
  clk: imx: remove redundant re-assignment of pll->base
  MAINTAINERS: clk: imx: add git tree and dt-bindings files
  clk: imx: pll14xx: Support dynamic rates
  clk: imx: pll14xx: Add pr_fmt
  clk: imx: pll14xx: explicitly return lowest rate
  clk: imx: pll14xx: name variables after usage
  clk: imx: pll14xx: consolidate rate calculation
  clk: imx: pll14xx: Use FIELD_GET/FIELD_PREP
  clk: imx: pll14xx: Drop wrong shifting
  clk: imx: pll14xx: Use register defines consistently
  clk: imx8mp: remove SYS PLL 1/2 clock gates
  clk: imx8mn: remove SYS PLL 1/2 clock gates
  clk: imx8mm: remove SYS PLL 1/2 clock gates
  clk: imx: add i.MX93 clk
  clk: imx: support fracn gppll
  clk: imx: add i.MX93 composite clk
  dt-bindings: clock: add i.MX93 clock definition
  dt-bindings: clock: Add imx93 clock support
  ...

* clk-rockchip:
  clk: rockchip: re-add rational best approximation algorithm to the fractional divider
  clk/rockchip: Use of_device_get_match_data()
  clk: rockchip: Add CLK_SET_RATE_PARENT to the HDMI reference clock on rk3568
  clk: rockchip: drop CLK_SET_RATE_PARENT from dclk_vop* on rk3568
  clk: rockchip: Add more PLL rates for rk3568
2022-03-29 10:18:56 -07:00
Stephen Boyd
f9fca892af Merge branches 'clk-xilinx', 'clk-kunit', 'clk-cs2000' and 'clk-renesas' into clk-next
- Kunit tests for clk-gate implementation
 - Convert Cirrus Logic CS2000P driver to regmap, yamlify DT binding and add
   support for dynamic mode

* clk-xilinx:
  clk: zynqmp: replace warn_once with pr_debug for failed clock ops

* clk-kunit:
  clk: gate: Add some kunit test suites

* clk-cs2000:
  clk: cs2000-cp: convert driver to regmap
  clk: cs2000-cp: freeze config during register fiddling
  clk: cs2000-cp: make clock skip setting configurable
  clk: cs2000-cp: add support for dynamic mode
  clk: cs2000-cp: Make aux output function controllable
  dt-bindings: clock: cs2000-cp: document cirrus,dynamic-mode
  dt-bindings: clock: cs2000-cp: document cirrus,clock-skip flag
  dt-bindings: clock: cs2000-cp: document aux-output-source
  dt-bindings: clock: convert cs2000-cp bindings to yaml

* clk-renesas:
  dt-bindings: clock: renesas: Make example 'clocks' parsable
  clk: rs9: Add Renesas 9-series PCIe clock generator driver
  clk: fixed-factor: Introduce devm_clk_hw_register_fixed_factor_index()
  dt-bindings: clk: rs9: Add Renesas 9-series I2C PCIe clock generator
  clk: renesas: r8a779f0: Add PFC clock
  clk: renesas: r8a779f0: Add I2C clocks
  clk: renesas: r8a779f0: Add WDT clock
  clk: renesas: r8a779f0: Fix RSW2 clock divider
  clk: renesas: rzg2l-cpg: Add support for RZ/V2L SoC
  dt-bindings: clock: renesas: Document RZ/V2L SoC
  dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
  clk: renesas: r8a779a0: Add CANFD module clock
  clk: renesas: r9a07g044: Update multiplier and divider values for PLL2/3
  clk: renesas: r8a7799[05]: Add MLP clocks
  clk: renesas: r8a779f0: Add SYS-DMAC clocks
2022-03-29 10:18:37 -07:00
Stephen Boyd
407c04d6ad Merge branches 'clk-microchip', 'clk-si', 'clk-mtk', 'clk-at91' and 'clk-st' into clk-next
- Clock configuration on Microchip PolarFire SoCs
 - Free allocations on probe error in Mediatek clk driver
 - Modernize Mediatek clk driver by consolidating code

* clk-microchip:
  clk: microchip: Add driver for Microchip PolarFire SoC
  dt-bindings: clk: microchip: Add Microchip PolarFire host binding

* clk-si:
  clk-si5341: replace snprintf in show functions with sysfs_emit
  clk: si5341: fix reported clk_rate when output divider is 2

* clk-mtk: (32 commits)
  clk: mediatek: Warn if clk IDs are duplicated
  clk: mediatek: mt8195: Implement remove functions
  clk: mediatek: mt8195: Implement error handling in probe functions
  clk: mediatek: mt8195: Hook up mtk_clk_simple_remove()
  clk: mediatek: Unregister clks in mtk_clk_simple_probe() error path
  clk: mediatek: mtk: Implement error handling in register APIs
  clk: mediatek: pll: Implement error handling in register API
  clk: mediatek: mux: Implement error handling in register API
  clk: mediatek: mux: Reverse check for existing clk to reduce nesting level
  clk: mediatek: gate: Implement error handling in register API
  clk: mediatek: cpumux: Implement error handling in register API
  clk: mediatek: mtk: Clean up included headers
  clk: mediatek: Add mtk_clk_simple_remove()
  clk: mediatek: Implement mtk_clk_unregister_composites() API
  clk: mediatek: Implement mtk_clk_unregister_divider_clks() API
  clk: mediatek: Implement mtk_clk_unregister_factors() API
  clk: mediatek: Implement mtk_clk_unregister_fixed_clks() API
  clk: mediatek: pll: Clean up included headers
  clk: mediatek: pll: Implement unregister API
  clk: mediatek: pll: Split definitions into separate header file
  ...

* clk-at91:
  clk: at91: clk-master: remove dead code
  clk: at91: sama7g5: fix parents of PDMCs' GCLK
  clk: at91: sama7g5: Allow MCK1 to be exported and referenced in DT
  clk: at91: allow setting PMC_AUDIOPINCK clock parents via DT

* clk-st:
  clk: stm32mp1: Add parent_data to ETHRX clock
  clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock
2022-03-29 10:18:21 -07:00
Linus Torvalds
dfdc1de642 Staging driver update for 5.18-rc1
Here is the big set of staging driver updates for 5.18-rc1.
 
 Loads of tiny cleanups for almost all staging drivers in here, nothing
 major at all.  Highlights include:
 	- remove the ashmem Android driver.  It is long-dead and if
 	  there are any legacy userspace applications still using it,
 	  the Android kernel images will maintain it, the community
 	  shouldn't care about it anymore
 	- wfx wifi driver major cleanups.  Should be ready to merge out
 	  of staging soon, and will coordinate with the wifi maintainers
 	  after -rc1 is out
 	- major cleanups and unwinding of the layers of the r8188eu
 	  driver.  It's amazing just how many unneeded layers of
 	  abstraction is in there, just when we think it's done, another
 	  is found...
 	- lots of tiny coding style cleanups in many other staging
 	  drivers.
 
 There will be merge conflict with a fbtft change and the spi driver
 changes in your tree, but it's pretty obvious what to do (the function
 shouldn't return anything.)
 
 All have been in linux-next for a while with no reported problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYkG1cA8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ylndwCfVhxKnbTYKtOs6UEr5pgPCoQCioUAn0Y2i0TG
 4aFeeKUyL8VGdAitL+tp
 =E6v7
 -----END PGP SIGNATURE-----

Merge tag 'staging-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging driver updates from Greg KH:
 "Here is the big set of staging driver updates for 5.18-rc1.

  Loads of tiny cleanups for almost all staging drivers in here, nothing
  major at all. Highlights include:

   - remove the ashmem Android driver. It is long-dead and if there are
     any legacy userspace applications still using it, the Android
     kernel images will maintain it, the community shouldn't care about
     it anymore

   - wfx wifi driver major cleanups. Should be ready to merge out of
     staging soon, and will coordinate with the wifi maintainers after
     -rc1 is out

   - major cleanups and unwinding of the layers of the r8188eu driver.
     It's amazing just how many unneeded layers of abstraction is in
     there, just when we think it's done, another is found...

   - lots of tiny coding style cleanups in many other staging drivers.

  All have been in linux-next for a while with no reported problems"

* tag 'staging-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (455 commits)
  staging: r8188eu: remove unnecessary memset in r8188eu
  staging: greybus: introduce pwm_ops::apply
  staging: rts5208: Resolve checkpatch.pl issues.
  staging: sm750fb: fix naming style
  staging: fbtft: Consider type of init sequence values in fbtft_init_display()
  staging: fbtft: Constify buf parameter in fbtft_dbg_hex()
  staging: mmal-vchiq: clear redundant item named bulk_scratch
  mips: dts: ralink: add MT7621 SoC
  staging: r8188eu: remove some unused local ieee80211 macros
  staging: r8188eu: make rtl8188e_process_phy_info static
  staging: r8188eu: remove unused function prototype
  staging: r8188eu: remove three unused receive defines
  staging: r8188eu: remove unnecessary initializations
  staging: rtl8192e: Fix spelling mistake "RESQUEST" -> "REQUEST"
  MAINTAINERS: remove the obsolete file entry for staging in ANDROID DRIVERS
  staging: r8188eu: proper error handling in rtw_init_drv_sw
  staging: r8188eu: call _cancel_timer_ex from _rtw_free_recv_priv
  staging: vt6656: Removed unused variable vt3342_vnt_threshold
  staging: vt6656: Removed unused variable bb_vga_0
  staging: remove ashmem
  ...
2022-03-28 12:50:50 -07:00
Linus Torvalds
02e2af20f4 Char/Misc and other driver updates for 5.18-rc1
Here is the big set of char/misc and other small driver subsystem
 updates for 5.18-rc1.
 
 Included in here are merges from driver subsystems which contain:
 	- iio driver updates and new drivers
 	- fsi driver updates
 	- fpga driver updates
 	- habanalabs driver updates and support for new hardware
 	- soundwire driver updates and new drivers
 	- phy driver updates and new drivers
 	- coresight driver updates
 	- icc driver updates
 
 Individual changes include:
 	- mei driver updates
 	- interconnect driver updates
 	- new PECI driver subsystem added
 	- vmci driver updates
 	- lots of tiny misc/char driver updates
 
 There will be two merge conflicts with your tree, one in MAINTAINERS
 which is obvious to fix up, and one in drivers/phy/freescale/Kconfig
 which also should be easy to resolve.
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYkG3fQ8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ykNEgCfaRG8CRxewDXOO4+GSeA3NGK+AIoAnR89donC
 R4bgCjfg8BWIBcVVXg3/
 =WWXC
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver updates from Greg KH:
 "Here is the big set of char/misc and other small driver subsystem
  updates for 5.18-rc1.

  Included in here are merges from driver subsystems which contain:

   - iio driver updates and new drivers

   - fsi driver updates

   - fpga driver updates

   - habanalabs driver updates and support for new hardware

   - soundwire driver updates and new drivers

   - phy driver updates and new drivers

   - coresight driver updates

   - icc driver updates

  Individual changes include:

   - mei driver updates

   - interconnect driver updates

   - new PECI driver subsystem added

   - vmci driver updates

   - lots of tiny misc/char driver updates

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (556 commits)
  firmware: google: Properly state IOMEM dependency
  kgdbts: fix return value of __setup handler
  firmware: sysfb: fix platform-device leak in error path
  firmware: stratix10-svc: add missing callback parameter on RSU
  arm64: dts: qcom: add non-secure domain property to fastrpc nodes
  misc: fastrpc: Add dma handle implementation
  misc: fastrpc: Add fdlist implementation
  misc: fastrpc: Add helper function to get list and page
  misc: fastrpc: Add support to secure memory map
  dt-bindings: misc: add fastrpc domain vmid property
  misc: fastrpc: check before loading process to the DSP
  misc: fastrpc: add secure domain support
  dt-bindings: misc: add property to support non-secure DSP
  misc: fastrpc: Add support to get DSP capabilities
  misc: fastrpc: add support for FASTRPC_IOCTL_MEM_MAP/UNMAP
  misc: fastrpc: separate fastrpc device from channel context
  dt-bindings: nvmem: brcm,nvram: add basic NVMEM cells
  dt-bindings: nvmem: make "reg" property optional
  nvmem: brcm_nvram: parse NVRAM content into NVMEM cells
  nvmem: dt-bindings: Fix the error of dt-bindings check
  ...
2022-03-28 12:27:35 -07:00
Linus Torvalds
ff61bc81b3 Pin control bulk changes for the v5.18 kernel cycle
No core changes this time. Just new driver code and improvements!
 
 New drivers:
 
 - New driver for the Broadcom BCM4908 SoC.
 
 - New subdriver for Tesla FSD (Full Self Driving) SoC, a
   derivative of the Samsung Exynos pin control driver.
 
 - New driver for the Amlogic Meson S4 SoC.
 
 - New driver for the Sunplus SP7021 SoC.
 
 - New driver for the Microsemi Ocelot family ServalT SoC.
 
 - New subdriver for Intel Alder Lake-M SoC.
 
 - New subdriver for Intel Ice Lake-N SoC, including PCH support.
 
 - New subdriver for Renesas R8A779F0 SoC.
 
 - New subdriver for Mediatek MT8186 SoC.
 
 - New subdriver for NXP Freescale i.MX93 SoC.
 
 - New driver for Nuvoton WPCM450 SoC.
 
 - New driver for Qualcomm SC8280XP SoC.
 
 Improvements:
 
 - Wakeup support on Samsung Exynos850 and ExynosAutov9.
 
 - Serious and voluminous maintenance cleanup and refactoring in
   the Renesas drivers. Mainly sharing similar data between the
   different SoC subdrivers.
 
 - Qualcomm SM8450 EGPIO support.
 
 - Drive strength support on the Mediatek MT8195.
 
 - Add some missing groups and functions to the Ralink RT2880.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmJBsSwACgkQQRCzN7AZ
 XXOoVhAAhHW2FSXB8ud1mdyuN3CswMSiWrZqC8nveznHMcddzsDvZsGsAP8x6fKi
 1CgTXDQblA/plpxqORvBDA8Ji9+z9NAilIMds1ZcMbPjpY1l63uD5VhWq7tpPN1H
 ALnJAhc4rl1fkJ01U5sTtHJ8xibjpN690ZCrfzNwdLOQAUvXJ22zuyuIcSBFiSMv
 ij4E2fejOj0ZN7rzb8xTxcaSWUrj5Kci5Eaq6yi/clKHaOrrV5r/tX9yo7uWF3mi
 6UX/1IioougtMF2bhsoodQE5E5XN8Hjm2+VWULxBCsKjI1gKY/NR2GXeaHHJve8B
 do3Y45cU+zZSWVo4mmlf/Z3+4npIQlMFe8LvDmBvb3ZopcbapuGiOSzYxT6aZA/z
 WtGDDIaECcNF/dJCHwRugAsG5OhT0AYyNblMxsmW+ARoTocMlYPG8Jq4KEmIoIEz
 m+UArJEe8asQlk4ebK/e0x2hbywgfN02ILO8OygpXpwsHAyx7pjDk7SABkzrAQLg
 vTpI1i7q1hsYyeTm9RXJJd2VTe9fpYLTgjTa5bnqBQNcsyEd5o9QtH/IwARS/NP7
 nNlZLUIUsOa782O6N4oT5JGb96a3cMxHv+hAIKcwhxK/54IYrGh+/BAORnfoe0Vo
 h6pwKoUVE+L70t0RfmVqYK0EX6zsWSnb1NNNJFM+uLLpfFnx+1U=
 =TY4V
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "No core changes this time. Just new driver code and improvements!

  New drivers:

   - New driver for the Broadcom BCM4908 SoC.

   - New subdriver for Tesla FSD (Full Self Driving) SoC, a derivative
     of the Samsung Exynos pin control driver.

   - New driver for the Amlogic Meson S4 SoC.

   - New driver for the Sunplus SP7021 SoC.

   - New driver for the Microsemi Ocelot family ServalT SoC.

   - New subdriver for Intel Alder Lake-M SoC.

   - New subdriver for Intel Ice Lake-N SoC, including PCH support.

   - New subdriver for Renesas R8A779F0 SoC.

   - New subdriver for Mediatek MT8186 SoC.

   - New subdriver for NXP Freescale i.MX93 SoC.

   - New driver for Nuvoton WPCM450 SoC.

   - New driver for Qualcomm SC8280XP SoC.

  Improvements:

   - Wakeup support on Samsung Exynos850 and ExynosAutov9.

   - Serious and voluminous maintenance cleanup and refactoring in the
     Renesas drivers. Mainly sharing similar data between the different
     SoC subdrivers.

   - Qualcomm SM8450 EGPIO support.

   - Drive strength support on the Mediatek MT8195.

   - Add some missing groups and functions to the Ralink RT2880"

* tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (188 commits)
  pinctrl: mediatek: common-v1: fix semicolon.cocci warnings
  pinctrl: nuvoton: wpcm450: Fix build error without OF
  pinctrl: qcom-pmic-gpio: Add support for pm8450
  dt-bindings: pinctrl: aspeed: Update gfx node in example
  dt-bindings: pinctrl: rt2880: add missing pin groups and functions
  pinctrl: ingenic: Fix regmap on X series SoCs
  pinctrl: nuvoton: Fix return value check in wpcm450_gpio_register()
  pinctrl: nuvoton: wpcm450: off by one in wpcm450_gpio_register()
  pinctrl: nuvoton: wpcm450: select GENERIC_PINCTRL_GROUPS
  pinctrl: nuvoton: Fix sparse warning
  pinctrl: mediatek: mt8186: Account for probe refactoring
  pinctrl: mediatek: common-v1: Commonize spec_ies_smt_set callback
  pinctrl: mediatek: common-v1: Commonize spec_pupd callback
  pinctrl: mediatek: common-v1: Use common probe function
  pinctrl: mediatek: common-v1: Add common probe function
  pinctrl: mediatek: paris: Unify probe function by using OF match data
  pinctrl/rockchip: Add missing of_node_put() in rockchip_pinctrl_probe
  pinctrl: nomadik: Add missing of_node_put() in nmk_pinctrl_probe
  pinctrl: berlin: fix error return code of berlin_pinctrl_build_state()
  pinctrl: qcom: Introduce sc8280xp TLMM driver
  ...
2022-03-28 11:52:53 -07:00
Linus Torvalds
9bf3fc5007 Devicetree updates for v5.18:
- Add Krzysztof Kozlowski as co-maintainer for DT bindings providing
   much needed help.
 
 - DT schema validation now takes DTB files as input rather than
   intermediate YAML files. This decouples the validation from the source
   level syntax information. There's a bunch of schema fixes as a result
   of switching to DTB based validation which exposed some errors
   and incomplete schemas and examples.
 
 - Kbuild improvements to explicitly warn users running 'make
   dt_binding_check' on missing yamllint
 
 - Expand DT_SCHEMA_FILES kbuild variable to take just a partial filename
   or path instead of the full path to 1 file.
 
 - Convert various bindings to schema format: mscc,vsc7514-switch,
   multiple GNSS bindings, ahci-platform, i2c-at91, multiple UFS
   bindings, cortina,gemini-sata-bridge, cortina,gemini-ethernet, Atmel
   SHA, Atmel TDES, Atmel AES, armv7m-systick, Samsung Exynos display
   subsystem, nuvoton,npcm7xx-timer, samsung,s3c2410-i2c, zynqmp_dma,
   msm/mdp4, rda,8810pl-uart
 
 - New schemas for u-boot environment variable partition, TI clksel
 
 - New compatible strings for Renesas RZ/V2L SoC
 
 - Vendor prefixes for Xen, HPE, deprecated Synopsys, deprecated HiSilicon
 
 - Add/fix schemas for QEMU Arm 'virt' machine
 
 - Drop unused of_alias_get_alias_list() function
 
 - Add a script to check DT unittest EXPECT message output. Pass messages
   also now print by default at PR_INFO level to help test automation.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmI8s64QHHJvYmhAa2Vy
 bmVsLm9yZwAKCRD6+121jbxhwx3tD/4j56NE+aLkL636+I8tGFm3r+r6uLLT4SWh
 zDuiX3MP9OKfhJw43TjjURLwX5adBnG3nn505IXcAeiMRgEiciOpSa12w0mXyjMX
 QgVOcoaI3H2GBMEddJRo1PLTM/K5sYzZxAKLB827xoOk4mGNA0ZBAHvlB3W+yLE5
 CE5yTaFoL4EMXuhWMtMrMlG1PQrbO3FpQ2DHBKrpxHPJmnHLk3c0YtMSTHGQnWbN
 AxT3S6RSsOLwLzZAXi2AlswqY82n5KtUf/RBrYi8rdr/xnIsCfMeXxafkP2Hyxkq
 L9RfKVn05c0LRtO1Eh8kYr+lmYmcWz/SIdJZXzpviIgE9MJapCAk0blBZ4S/FH0B
 EVGB1JkwCZFck6DBmkNJxAwR0iQOGWkJIkn6iBPNF0dHp58eE6adaXjhFH3uBEHk
 dXFaxPlvZ3P/Q2I/vmQ//m5tZMyjeCY2BlVYpkUJMOFfN26MIGHUmUlLnovLDqu4
 lYgZG4V244uYzALLbURpbp+5dlPH/PL2gxvJJNqTS+/hXktQx1XnML4wD+xfJ4nT
 OY5DD7Z+KGBrdsMtxkFtIFvKD63E2gtAR5RZO0J/txlzhW7Wg6fJbhJZeRFhZKmN
 GAfud2s6rliyygByBL4ea50DSLLQpc/9HZtFmZ3NTILM6NbUR74sHt+1EZ1hee+M
 LaNsSscHuQ==
 =g1li
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:

 - Add Krzysztof Kozlowski as co-maintainer for DT bindings providing
   much needed help.

 - DT schema validation now takes DTB files as input rather than
   intermediate YAML files. This decouples the validation from the
   source level syntax information. There's a bunch of schema fixes as a
   result of switching to DTB based validation which exposed some errors
   and incomplete schemas and examples.

 - Kbuild improvements to explicitly warn users running 'make
   dt_binding_check' on missing yamllint

 - Expand DT_SCHEMA_FILES kbuild variable to take just a partial
   filename or path instead of the full path to 1 file.

 - Convert various bindings to schema format: mscc,vsc7514-switch,
   multiple GNSS bindings, ahci-platform, i2c-at91, multiple UFS
   bindings, cortina,gemini-sata-bridge, cortina,gemini-ethernet, Atmel
   SHA, Atmel TDES, Atmel AES, armv7m-systick, Samsung Exynos display
   subsystem, nuvoton,npcm7xx-timer, samsung,s3c2410-i2c, zynqmp_dma,
   msm/mdp4, rda,8810pl-uart

 - New schemas for u-boot environment variable partition, TI clksel

 - New compatible strings for Renesas RZ/V2L SoC

 - Vendor prefixes for Xen, HPE, deprecated Synopsys, deprecated
   HiSilicon

 - Add/fix schemas for QEMU Arm 'virt' machine

 - Drop unused of_alias_get_alias_list() function

 - Add a script to check DT unittest EXPECT message output. Pass
   messages also now print by default at PR_INFO level to help test
   automation.

* tag 'devicetree-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (96 commits)
  dt-bindings: kbuild: Make DT_SCHEMA_LINT a recursive variable
  dt-bindings: nvmem: add U-Boot environment variables binding
  dt-bindings: ufs: qcom: Add SM6350 compatible string
  dt-bindings: dmaengine: sifive,fu540-c000: include generic schema
  dt-bindings: gpio: pca95xx: drop useless consumer example
  Revert "of: base: Introduce of_alias_get_alias_list() to check alias IDs"
  dt-bindings: virtio,mmio: Allow setting devices 'dma-coherent'
  dt-bindings: gnss: Add two more chips
  dt-bindings: gnss: Rewrite sirfstar binding in YAML
  dt-bindings: gnss: Modify u-blox to use common bindings
  dt-bindings: gnss: Rewrite common bindings in YAML
  dt-bindings: ata: ahci-platform: Add rk3568-dwc-ahci compatible
  dt-bindings: ata: ahci-platform: Add power-domains property
  dt-bindings: ata: ahci-platform: Convert DT bindings to yaml
  dt-bindings: kbuild: Use DTB files for validation
  dt-bindings: kbuild: Pass DT_SCHEMA_FILES to dt-validate
  dt-bindings: Add QEMU virt machine compatible
  dt-bindings: arm: Convert QEMU fw-cfg to DT schema
  dt-bindings: i2c: at91: Add SAMA7G5 compatible strings list
  dt-bindings: i2c: convert i2c-at91 to json-schema
  ...
2022-03-26 11:41:53 -07:00
Linus Torvalds
aa5b537b0e RISC-V Patches for the 5.18 Merge Window, Part 1
* Support for Sv57-based virtual memory.
 * Various improvements for the MicroChip PolarFire SOC and the
   associated Icicle dev board, which should allow upstream kernels to
   boot without any additional modifications.
 * An improved memmove() implementation.
 * Support for the new Ssconfpmf and SBI PMU extensions, which allows for
   a much more useful perf implementation on RISC-V systems.
 * Support for restartable sequences.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmI96FcTHHBhbG1lckBk
 YWJiZWx0LmNvbQAKCRAuExnzX7sYiQBFD/425+6xmoOru6Wiki3Ja0fqQToNrQyW
 IbmE/8AxUP7UxMvJSNzvQm8deXgklzvmegXCtnjwZZins971vMzzDSI83k/zn8I7
 m5thVC9z01BjodV+pvIp/44hS6FesolOLzkVHksX0Zh6h0iidrc34Qf5HrqvvNfN
 CZ/4K1+E9ig5r9qZp4WdvocCXj+FzwF/30GjKoW9vwA599CEG/dCo+TNN9GKD6XS
 k+xiUGwlIRA+kCLSPFCi7ev9XPr1tCmQB7uB8Igcvr7Y3mWl8HKfajQVXBnXNRC3
 ifbDxpx1elJiLPyf7Rza8jIDwDhLQdxBiwPgDgP9h9R4x0uF4efq8PzLzFlFmaE+
 9Z9thfykBb5dXYDFDje9bAOXvKnGk7Iqxdsz0qWo/ChEQawX1+11bJb0TNN8QTT9
 YvlQfUXgb1dmEcj5yG2uVE1Y8L7YNLRMsZU3W3FbmPJZoavSOuU4x0yCGeLyv597
 76af3nuBJ5v80Db97gu6St+HIACeevKflsZUf/8GS/p7d1DlvmrWzQUMEycxPTG9
 UZpZak58jh7AqQ9JbLnavhwmeacY50vpZOw6QHGAHSN+8daCPlOHDG7Ver7Z+kNj
 +srJ7iKMvLnnaEjGNgavfxdqTOme1gv4LWs/JdHYMkpphqVN92xBDJnhXTPRVZiQ
 0x39vK86qtB46A==
 =Omc6
 -----END PGP SIGNATURE-----

Merge tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:

 - Support for Sv57-based virtual memory.

 - Various improvements for the MicroChip PolarFire SOC and the
   associated Icicle dev board, which should allow upstream kernels to
   boot without any additional modifications.

 - An improved memmove() implementation.

 - Support for the new Ssconfpmf and SBI PMU extensions, which allows
   for a much more useful perf implementation on RISC-V systems.

 - Support for restartable sequences.

* tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (36 commits)
  rseq/selftests: Add support for RISC-V
  RISC-V: Add support for restartable sequence
  MAINTAINERS: Add entry for RISC-V PMU drivers
  Documentation: riscv: Remove the old documentation
  RISC-V: Add sscofpmf extension support
  RISC-V: Add perf platform driver based on SBI PMU extension
  RISC-V: Add RISC-V SBI PMU extension definitions
  RISC-V: Add a simple platform driver for RISC-V legacy perf
  RISC-V: Add a perf core library for pmu drivers
  RISC-V: Add CSR encodings for all HPMCOUNTERS
  RISC-V: Remove the current perf implementation
  RISC-V: Improve /proc/cpuinfo output for ISA extensions
  RISC-V: Do no continue isa string parsing without correct XLEN
  RISC-V: Implement multi-letter ISA extension probing framework
  RISC-V: Extract multi-letter extension names from "riscv, isa"
  RISC-V: Minimal parser for "riscv, isa" strings
  RISC-V: Correctly print supported extensions
  riscv: Fixed misaligned memory access. Fixed pointer comparison.
  MAINTAINERS: update riscv/microchip entry
  riscv: dts: microchip: add new peripherals to icicle kit device tree
  ...
2022-03-25 10:11:38 -07:00
Linus Torvalds
ed4643521e ARM: DT updates for 5.18
After a somewhat quiet 5.17 release, the size of the DT changes
 is a bit larger again. There are nine new SoC that get added,
 all of them related to existing platforms:
 
  - Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB
 
  - Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G tablet
 
  - Microchip Lan966 networking SoC and it evaluation board
 
  - Qualcomm Snapdragon 625/632 midrange phone SoCs, with the
    LG Nexus 5X and Fairphone FP3 phones
 
  - Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs,
    along with their evaluation boards
 
  - Samsung Exynos 850 phone SoC and reference board
 
  - Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone
 
  - Tesla FSD (Fully Self-Driving), an automotive SoC losely derived
    from the Samsung Exynos family.
 
  - TI K3/AM62 SoC and reference board
 
 Support for additional functionality in existing dts files is added all
 over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91, Allwinner,
 i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and Broadcom.
 
 Samsung has a rework for its pinctrl schema that is a bit tricky and
 requires driver changes to be included here.
 
 A few more platforms only have smaller cleanups and DT Schema fixes,
 this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.
 
 The new machines are really too many to list, but I'll do it anyway:
 
  Allwinner:
    - A20-Marsboard development board
 
  Amlogic
   - Amediatek X96-AIR (Amlogic S905X3)
   - CYX A95XF3-AIR (Amlogic S905X3)
   - Haochuangy H96-Max (Amlogic S905X3)
   - Amlogic AQ222 (Amlogic S4)
   - OSMC Vero 4K+ (Amlogic S905D)
 
  Arm Juno
   - Separate DT depending on SCMI firmware version
 
  Aspeed:
   - Quanta S6Q BMC (AST2600)
   - ASRock ROMED8HM3 (AST2500)
 
  Broadcom:
   - Raspberry Pi Zero 2 W
 
  Marvell MVEBU/Armada:
   - Ctera C200 V1 NAS (kirkwood)
   - Ctera C200 V2 NAS (armada-370)
 
  Mstar
   - DongShanPiOne, a low-end embedded board
   - Miyoo Mini handheld game console
 
  NXP i.MX:
   - Numerous i.MX8M Mini based boards in even more variations, but
     none based on other SoCs this time:
     Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
     Gateworks GW7903
 
  Qualcomm:
   - Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
   - SHIFT6mq phone (Snapdragon 845)
   - Samsung Galaxy Book2 (Snapdragon 850)
   - Snapdragon 8 Gen 1 Hardware Development Kit
 
  TI OMAP:
   - SanCloud BeagleBone Enhanced WiFi
 
  Rockchip:
   - Pine64 PineNote ereader tablet (rk356x)
   - Bananapi-R2-Pro (rk356x)
 
  STM32:
   - emtrion emSBS-Argon embedded board (stm32mp157c)
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmI7SvoACgkQmmx57+YA
 GNkVrBAAkOb03vIWYdUwflcqjEXsV+Wop2innJE2KGuhXdwleTM9skRghBt2Ojpg
 5doTbIUJZuUwPsJDRXe7tTt6ZJclr6XvO8/Us8iQ6OIS5V+EHVJEKWVGrgoZu/eU
 LqZqbAZK43csnOid1Q/lDqh9eEGy5Xs8U7ivL+EIOuklYcE2110C0SVC9bsfWRES
 u9Xx0b+LeIrp0lsyZFAbQTFGbx/pdvxwDZUjcC7coJRfJedKt6Z1NnnCSj9c0hAX
 v9ZtRnPkgnOAzVINwsci2dtrcxBUPqYN9JxX4aW47BMftiASBv8y8xmeE7KVvAyq
 9KOl/UtCUPTngH9oXCJm1MXe5rTN4YLs5fcBW6qz4/DwT1g8oSykCf0hs7t9vpKg
 dH0iRjt55Nw3GbvvzKvUtfHikSmGiP5iLMZ+t9U7R2b/KYc6Mt74ystKY7sgElFc
 3Pc1mus+RkBXZYnl4YKgSmkZkbMoauStuBG13lY6Fa3PHTExv3TnNSmin77KHbyX
 257uN7hee0yxmLSiL7FzoJ3DIlmYMsc0oM9T2PArO+tRY/Unh45QSq6LObm06J53
 9kPJhZOdYqvdEZNwrvSnFsDqg1B/KtJYupg59gI9O/+I0mRWuk7KD9EJzKerF1cq
 SU+E3UciQeisixRb1HJVga/bfhLEDUZnOUw8RcLJx3O3Qz9neRk=
 =v98T
 -----END PGP SIGNATURE-----

Merge tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
 "After a somewhat quiet 5.17 release, the size of the DT changes is a
  bit larger again. There are nine new SoC that get added, all of them
  related to existing platforms:

   - Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB

   - Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G
     tablet

   - Microchip Lan966 networking SoC and it evaluation board

   - Qualcomm Snapdragon 625/632 midrange phone SoCs, with the LG Nexus
     5X and Fairphone FP3 phones

   - Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs, along
     with their evaluation boards

   - Samsung Exynos 850 phone SoC and reference board

   - Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone

   - Tesla FSD (Fully Self-Driving), an automotive SoC loosely derived
     from the Samsung Exynos family.

   - TI K3/AM62 SoC and reference board

  Support for additional functionality in existing dts files is added
  all over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91,
  Allwinner, i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and
  Broadcom.

  Samsung has a rework for its pinctrl schema that is a bit tricky and
  requires driver changes to be included here.

  A few more platforms only have smaller cleanups and DT Schema fixes,
  this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.

  The new machines are really too many to list, but I'll do it anyway:

  Allwinner:
   - A20-Marsboard development board

  Amlogic:
   - Amediatek X96-AIR (Amlogic S905X3)
   - CYX A95XF3-AIR (Amlogic S905X3)
   - Haochuangy H96-Max (Amlogic S905X3)
   - Amlogic AQ222 (Amlogic S4)
   - OSMC Vero 4K+ (Amlogic S905D)

  Arm Juno:
   - Separate DT depending on SCMI firmware version

  Aspeed:
   - Quanta S6Q BMC (AST2600)
   - ASRock ROMED8HM3 (AST2500)

  Broadcom:
   - Raspberry Pi Zero 2 W

  Marvell MVEBU/Armada:
   - Ctera C200 V1 NAS (kirkwood)
   - Ctera C200 V2 NAS (armada-370)

  Mstar:
   - DongShanPiOne, a low-end embedded board
   - Miyoo Mini handheld game console

  NXP i.MX:
   - Numerous i.MX8M Mini based boards in even more variations, but
    none based on other SoCs this time:
    Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
    Gateworks GW7903

  Qualcomm:
   - Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
   - SHIFT6mq phone (Snapdragon 845)
   - Samsung Galaxy Book2 (Snapdragon 850)
   - Snapdragon 8 Gen 1 Hardware Development Kit

  TI OMAP:
   - SanCloud BeagleBone Enhanced WiFi

  Rockchip:
   - Pine64 PineNote ereader tablet (rk356x)
   - Bananapi-R2-Pro (rk356x)

  STM32:
   - emtrion emSBS-Argon embedded board (stm32mp157c)"

* tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (627 commits)
  arm64: dts: n5x: drop invalid property and fix edac node name
  arm64: dts: fsd: Add the MCT support
  arm64: dts: stingray: Fix spi clock name
  arm64: dts: ns2: Fix spi clock name
  ARM: dts: rockchip: Update regulator name for PX3
  ARM: dts: rockchip: Add #clock-cells value for rk805
  arm64: dts: rockchip: Add #clock-cells value for rk805
  arm64: dts: rockchip: Remove vcc13 and vcc14 for rk808
  arm64: dts: rockchip: Fix SDIO regulator supply properties on rk3399-firefly
  ARM: dts: at91: sama7g5: Add NAND support
  ARM: dts: at91: sama7g5: add eic node
  ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes
  ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15
  arm64: dts: lg: align pl330 node name with dtschema
  arm64: dts: lg: add dma-cells to pl330 node
  arm64: dts: juno: align pl330 node name with dtschema
  arm64: dts: broadcom: Fix sata nodename
  arm64: dts: n5x: add sdr edac support
  arm64: dts: agilex/stratix10: add clock-names to USB DWC2 node
  dt-bindings: usb: dwc2: add disable-over-current
  ...
2022-03-23 18:37:22 -07:00
Linus Torvalds
b4bc93bd76 ARM driver updates for 5.18
There are a few separately maintained driver subsystems that we merge through
 the SoC tree, notable changes are:
 
  - Memory controller updates, mainly for Tegra and Mediatek SoCs,
    and clarifications for the memory controller DT bindings
 
  - SCMI firmware interface updates, in particular a new transport based
    on OPTEE and support for atomic operations.
 
  - Cleanups to the TEE subsystem, refactoring its memory management
 
 For SoC specific drivers without a separate subsystem, changes include
 
  - Smaller updates and fixes for TI, AT91/SAMA5, Qualcomm and NXP
    Layerscape SoCs.
 
  - Driver support for Microchip SAMA5D29, Tesla FSD, Renesas RZ/G2L,
    and Qualcomm SM8450.
 
  - Better power management on Mediatek MT81xx, NXP i.MX8MQ
    and older NVIDIA Tegra chips
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmI4nOUACgkQmmx57+YA
 GNlNNhAApPQw+FKQ6yVj2EZYcaAgik8PJAJoNQWYED52iQfm5uXgjt3aQewvrPNW
 nkKx5Mx+fPUfaKx5mkVOFMhME5Bw9tYbXHm2/RpRp+n8jOdUlQpAhzIPOyWPHOJS
 QX6qu4t+agrQzjbOCGouAJXgyxhTJFUMviM2EgVHbQHXPtdF8i2kyanfCP7Rw8cx
 sVtLwpvhbLm849+deYRXuv2Xw9I3M1Np7018s5QciimI2eLLEb+lJ/C5XWz5pMYn
 M1nZ7uwCLKPCewpMETTuhKOv0ioOXyY9C1ghyiGZFhHQfoCYTu94Hrx9t8x5gQmL
 qWDinXWXVk8LBegyrs8Bp4wcjtmvMMLnfWtsGSfT5uq24JOGg22OmtUNhNJbS9+p
 VjEvBgkXYD7UEl5npI9v9/KQWr3/UDir0zvkuV40gJyeBWNEZ/PB8olXAxgL7wZv
 cXRYSaUYYt3DKQf1k5I4GUyQtkP/4RaBy6AqvH5Sx0lCwuY6G6ISK+kCPaaSRKnX
 WR+nFw84dKCu7miehmW9qSzMQ4kiSCKIDqk7ilHcwv0J2oXDrlqVPKGGGTzZjUc8
 +feqM/eSoYvDDEDemuXNSnl3hc1Zlvm7Apd5AN6kdTaNgoACDYdyvGuJ3CvzcA+K
 1gBHUBvGS/ODA25KnYabr7wCMgxYqf7dXfkyKIBwFHwxOnRHtgs=
 =Cfbk
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Arnd Bergmann:
 "There are a few separately maintained driver subsystems that we merge
  through the SoC tree, notable changes are:

   - Memory controller updates, mainly for Tegra and Mediatek SoCs, and
     clarifications for the memory controller DT bindings

   - SCMI firmware interface updates, in particular a new transport
     based on OPTEE and support for atomic operations.

   - Cleanups to the TEE subsystem, refactoring its memory management

  For SoC specific drivers without a separate subsystem, changes include

   - Smaller updates and fixes for TI, AT91/SAMA5, Qualcomm and NXP
     Layerscape SoCs.

   - Driver support for Microchip SAMA5D29, Tesla FSD, Renesas RZ/G2L,
     and Qualcomm SM8450.

   - Better power management on Mediatek MT81xx, NXP i.MX8MQ and older
     NVIDIA Tegra chips"

* tag 'arm-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (154 commits)
  ARM: spear: fix typos in comments
  soc/microchip: fix invalid free in mpfs_sys_controller_delete
  soc: s4: Add support for power domains controller
  dt-bindings: power: add Amlogic s4 power domains bindings
  ARM: at91: add support in soc driver for new SAMA5D29
  soc: mediatek: mmsys: add sw0_rst_offset in mmsys driver data
  dt-bindings: memory: renesas,rpc-if: Document RZ/V2L SoC
  memory: emif: check the pointer temp in get_device_details()
  memory: emif: Add check for setup_interrupts
  dt-bindings: arm: mediatek: mmsys: add support for MT8186
  dt-bindings: mediatek: add compatible for MT8186 pwrap
  soc: mediatek: pwrap: add pwrap driver for MT8186 SoC
  soc: mediatek: mmsys: add mmsys reset control for MT8186
  soc: mediatek: mtk-infracfg: Disable ACP on MT8192
  soc: ti: k3-socinfo: Add AM62x JTAG ID
  soc: mediatek: add MTK mutex support for MT8186
  soc: mediatek: mmsys: add mt8186 mmsys routing table
  soc: mediatek: pm-domains: Add support for mt8186
  dt-bindings: power: Add MT8186 power domains
  soc: mediatek: pm-domains: Add support for mt8195
  ...
2022-03-23 18:23:13 -07:00
Linus Torvalds
40037e4f8b sound updates for 5.18
It's been a fairly calm development cycle.  There are a few
 last-minute ALSA core fixes, most notably for covering PCM ioctl
 races, but the most of rest are device-specific changes.
 
 Below are some highlights:
 
 * ALSA core:
 - Fixes for PCM ioctl races that may lead to UAF
 - Fix for oversized allocations in PCM OSS layer
 
 * ASoC:
 - Start of moving SoF to support multiple IPC mechanisms
 - Use of NHLT ACPI table to reduce the amount of quirking required for
   Intel systems
 - Preliminary works forthcoming Intel AVS driver for legacy Intel DSP
   firmwares
 - Support for AMD PDM, Atmel PDMC, Awinic AW8738, i.MX cards with
   TLV320AIC31xx, Intel machines with CS35L41 and ESSX8336, Mediatek
   MT8181 wideband bluetooth, nVidia Tegra234, Qualcomm SC7280, Renesas
   RZ/V2L, Texas Instruments TAS585M
 
 * HD-audio:
 - Driver re-binding fix for HD-audio
 - Updates for Intel ADL and Tegra234, various platform quirks for
   Dell, HP, Lenovo, ASUS, Samsung and Clevo machines
 
 * USB-audio:
 - Quirk updates for Scarlett2, RODE, Corsair devices
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmI7AkUOHHRpd2FpQHN1
 c2UuZGUACgkQLtJE4w1nLE/faBAAvPFODmyJlt16UG7bSlqwoSafWho+Bp4GSH4O
 +pEm47+kULgkKOm9k2NK7sci6nOsNIabQsVhMeryCLgDlNlFqR4FQjIswbgtRWsO
 lmu3TMw26I0vS2joNE+tpqCOyJuEGI/ekQru3aKAZx6JyBlXmrzuf7L4BNomVORr
 fgBgpMg/tRcE9ceWjc1qHMggueAfkcjnI4ioFYxaWYXp4wyVX1mx3mVHEf6WQnff
 ZXsgQLhupUKLvyBr2D1vkN6JcRyTahkBprbLEtZhKszR8hl6tFlnyILkzsiZ/B+K
 oJAvtEoC6z2PW+suPSPPl2qnbyOJyX32m43iCXW8uSG1KG/K2JshZIJshMbVw3pV
 rLK3XYr2zoE3VzzNUL+QyGYhLpdDPSNF+E19z7jfWU/wKwCUu8qWuejhf9uAlQgx
 XtlrZuyCpnsNVyILqLM2Sgzvc1U8vJd68uYwhecchTmP0Aurld5NM2PiAagcvVpW
 RtEMbTJbIBYbou3UPhxDjEdQOeT+KZUYrClEjb61pJQ9sHAbC4l0LoRyS4NEWCZH
 J7Z5DNPqPf6CFU1AVpfktL4Dh+VtM7nb4DVyyyLWWZgG3NcXSVLLbUA8Uo9qoDV5
 7tHnV+1MURBwEq1CUvZtb3sRC5tyNVkzXMMAJfcVWlv7JkoXs8pzwK9w685aP2zl
 YDOfau8=
 =5cCU
 -----END PGP SIGNATURE-----

Merge tag 'sound-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "It's been a fairly calm development cycle. There are a few last-minute
  ALSA core fixes, most notably for covering PCM ioctl races, but the
  most of rest are device-specific changes.

  Below are some highlights:

  ALSA core:

   - Fixes for PCM ioctl races that may lead to UAF

   - Fix for oversized allocations in PCM OSS layer

  ASoC:

   - Start of moving SoF to support multiple IPC mechanisms

   - Use of NHLT ACPI table to reduce the amount of quirking required
     for Intel systems

   - Preliminary works forthcoming Intel AVS driver for legacy Intel DSP
     firmwares

   - Support for AMD PDM, Atmel PDMC, Awinic AW8738, i.MX cards with
     TLV320AIC31xx, Intel machines with CS35L41 and ESSX8336, Mediatek
     MT8181 wideband bluetooth, nVidia Tegra234, Qualcomm SC7280,
     Renesas RZ/V2L, Texas Instruments TAS585M

  HD-audio:

   - Driver re-binding fix for HD-audio

   - Updates for Intel ADL and Tegra234, various platform quirks for
     Dell, HP, Lenovo, ASUS, Samsung and Clevo machines

  USB-audio:

   - Quirk updates for Scarlett2, RODE, Corsair devices"

* tag 'sound-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (486 commits)
  ALSA: hda/realtek: Add alc256-samsung-headphone fixup
  ALSA: pci: fix reading of swapped values from pcmreg in AC97 codec
  ALSA: pcm: Add stream lock during PCM reset ioctl operations
  ALSA: pcm: Fix races among concurrent prealloc proc writes
  ALSA: pcm: Fix races among concurrent prepare and hw_params/hw_free calls
  ALSA: pcm: Fix races among concurrent read/write and buffer changes
  ALSA: pcm: Fix races among concurrent hw_params and hw_free calls
  ASoC: atmel: mchp-pdmc: print the correct property name
  MAINTAINERS: Add Shengjiu to maintainer list of sound/soc/fsl
  ASoC: SOF: Add a new dai_get_clk topology IPC op
  ASoC: SOF: topology: Add ops for setting up and tearing down pipelines
  ASoC: SOF: expose sof_route_setup()
  ASoC: SOF: Add dai_link_fixup PCM op for IPC3
  ASoC: SOF: Add trigger PCM op for IPC3
  ASoC: SOF: Define hw_params PCM op for IPC3
  ASoC: SOF: Introduce IPC3 PCM hw_free op
  ASoC: SOF: pcm: expose the sof_pcm_setup_connected_widgets() function
  ASoC: SOF: Introduce IPC-specific PCM ops
  ASoC: SOF: Add bytes_ext control IPC ops for IPC3
  ASoC: SOF: Add bytes_get/put control IPC ops for IPC3
  ...
2022-03-23 15:11:12 -07:00
Linus Torvalds
d6ccf45113 regulator: Updates for v5.18
Quite a quiet release for the regulator API, mainly a few new drivers
 plus a lot of fixes for the Raspberry Pi panel driver.  There's also a
 SPI commit in here which I managed to apply to the wrong tree and then
 didn't notice until there were too many commits on top of it, sorry
 about that.
 
  - Make it easier to use the virtual consumer test driver with DT
    systems.
  - Substantial overhaul providing various fixes and robustness
    improvements for the Raspberry Pi panel driver.
  - Support for Qualcomm PMX65 and SDX65, Richtek RT5190A, and Texas
    Instruments TPS62864x
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmI4bYcACgkQJNaLcl1U
 h9B0sQf+NvpOeni3N2z1vRS+b2k7r/qX0GU2X2Bs3FnulYRsLqGp9eg4dZvNCc1Z
 XhVVqSWZUvI9TEpG5RRuGmTkb/3cwYzURkL1P4EXMrSNCmImRgZ9aTfF7Dc3wNg8
 UcomWtsVEHMGNmfvU7Kazk4fVGtb+I1/lYf1i/jjB21108Qzk59CDdhEjQl0DMuZ
 3ZNu7YC5MQN6QbjmEMdn3mSNilVyn67WBsCVePi4ebSK/GFZXUtxOtRWAQYTtej8
 t0XOd5Z5iGpszohmKi78CdZvA4NtugPoavLbvpd1pRA/9A0PgMZq5vkmJdwW5Nwe
 oMMMvJP1yBVLknl0pl7gTibdizoHzQ==
 =U2e/
 -----END PGP SIGNATURE-----

Merge tag 'regulator-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator

Pull regulator updates from Mark Brown:
 "Quite a quiet release for the regulator API, mainly a few new drivers
  plus a lot of fixes for the Raspberry Pi panel driver.

  There's also a SPI commit in here which I managed to apply to the
  wrong tree and then didn't notice until there were too many commits on
  top of it, sorry about that.

   - Make it easier to use the virtual consumer test driver with DT
     systems.

   - Substantial overhaul providing various fixes and robustness
     improvements for the Raspberry Pi panel driver.

   - Support for Qualcomm PMX65 and SDX65, Richtek RT5190A, and Texas
     Instruments TPS62864x"

* tag 'regulator-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (26 commits)
  regulator: qcom-rpmh: Add support for SDX65
  regulator: dt-bindings: Add PMX65 compatibles
  regulator: vctrl: Use min() instead of doing it manually
  regulator: rt5190a: Add support for Richtek RT5190A PMIC
  regulator: Add bindings for Richtek RT5190A PMIC
  regulator: Convert TPS62360 binding to json-schema
  regulator: cleanup comments
  regulator: virtual: add devicetree support
  regulator: virtual: warn against production use
  regulator: virtual: use dev_err_probe()
  regulator: tps62864: Fix bindings for SW property
  regulator: Add support for TPS6286x
  regulator: Add bindings for TPS62864x
  regulator/rpi-panel-attiny: Use two transactions for I2C read
  regulator/rpi-panel-attiny: Use the regmap cache
  regulator: rpi-panel: Remove get_brightness hook
  regulator: rpi-panel: Add GPIO control for panel and touch resets
  regulator: rpi-panel: Convert to drive lines directly
  regulator: rpi-panel: Ensure the backlight is off during probe.
  regulator: rpi-panel: Serialise operations.
  ...
2022-03-21 18:27:05 -07:00
Linus Torvalds
356a1adca8 arm64 updates for 5.18
- Support for including MTE tags in ELF coredumps
 
 - Instruction encoder updates, including fixes to 64-bit immediate
   generation and support for the LSE atomic instructions
 
 - Improvements to kselftests for MTE and fpsimd
 
 - Symbol aliasing and linker script cleanups
 
 - Reduce instruction cache maintenance performed for user mappings
   created using contiguous PTEs
 
 - Support for the new "asymmetric" MTE mode, where stores are checked
   asynchronously but loads are checked synchronously
 
 - Support for the latest pointer authentication algorithm ("QARMA3")
 
 - Support for the DDR PMU present in the Marvell CN10K platform
 
 - Support for the CPU PMU present in the Apple M1 platform
 
 - Use the RNDR instruction for arch_get_random_{int,long}()
 
 - Update our copy of the Arm optimised string routines for str{n}cmp()
 
 - Fix signal frame generation for CPUs which have foolishly elected to
   avoid building in support for the fpsimd instructions
 
 - Workaround for Marvell GICv3 erratum #38545
 
 - Clarification to our Documentation (booting reqs. and MTE prctl())
 
 - Miscellanous cleanups and minor fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCgAuFiEEPxTL6PPUbjXGY88ct6xw3ITBYzQFAmIvta8QHHdpbGxAa2Vy
 bmVsLm9yZwAKCRC3rHDchMFjNAIhB/oDSva5FryAFExVuIB+mqRkbZO9kj6fy/5J
 ctN9LEVO2GI/U1TVAUWop1lXmP8Kbq5UCZOAuY8sz7dAZs7NRUWkwTrXVhaTpi6L
 oxCfu5Afu76d/TGgivNz+G7/ewIJRFj5zCPmHezLF9iiWPUkcAsP0XCp4a0iOjU4
 04O4d7TL/ap9ujEes+U0oEXHnyDTPrVB2OVE316FKD1fgztcjVJ2U+TxX5O4xitT
 PPIfeQCjQBq1B2OC1cptE3wpP+YEr9OZJbx+Ieweidy1CSInEy0nZ13tLoUnGPGU
 KPhsvO9daUCbhbd5IDRBuXmTi/sHU4NIB8LNEVzT1mUPnU8pCizv
 =ziGg
 -----END PGP SIGNATURE-----

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 updates from Will Deacon:

 - Support for including MTE tags in ELF coredumps

 - Instruction encoder updates, including fixes to 64-bit immediate
   generation and support for the LSE atomic instructions

 - Improvements to kselftests for MTE and fpsimd

 - Symbol aliasing and linker script cleanups

 - Reduce instruction cache maintenance performed for user mappings
   created using contiguous PTEs

 - Support for the new "asymmetric" MTE mode, where stores are checked
   asynchronously but loads are checked synchronously

 - Support for the latest pointer authentication algorithm ("QARMA3")

 - Support for the DDR PMU present in the Marvell CN10K platform

 - Support for the CPU PMU present in the Apple M1 platform

 - Use the RNDR instruction for arch_get_random_{int,long}()

 - Update our copy of the Arm optimised string routines for str{n}cmp()

 - Fix signal frame generation for CPUs which have foolishly elected to
   avoid building in support for the fpsimd instructions

 - Workaround for Marvell GICv3 erratum #38545

 - Clarification to our Documentation (booting reqs. and MTE prctl())

 - Miscellanous cleanups and minor fixes

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (90 commits)
  docs: sysfs-devices-system-cpu: document "asymm" value for mte_tcf_preferred
  arm64/mte: Remove asymmetric mode from the prctl() interface
  arm64: Add cavium_erratum_23154_cpus missing sentinel
  perf/marvell: Fix !CONFIG_OF build for CN10K DDR PMU driver
  arm64: mm: Drop 'const' from conditional arm64_dma_phys_limit definition
  Documentation: vmcoreinfo: Fix htmldocs warning
  kasan: fix a missing header include of static_keys.h
  drivers/perf: Add Apple icestorm/firestorm CPU PMU driver
  drivers/perf: arm_pmu: Handle 47 bit counters
  arm64: perf: Consistently make all event numbers as 16-bits
  arm64: perf: Expose some Armv9 common events under sysfs
  perf/marvell: cn10k DDR perf event core ownership
  perf/marvell: cn10k DDR perfmon event overflow handling
  perf/marvell: CN10k DDR performance monitor support
  dt-bindings: perf: marvell: cn10k ddr performance monitor
  arm64: clean up tools Makefile
  perf/arm-cmn: Update watchpoint format
  perf/arm-cmn: Hide XP PUB events for CMN-600
  arm64: drop unused includes of <linux/personality.h>
  arm64: Do not defer reserve_crashkernel() for platforms with no DMA memory zones
  ...
2022-03-21 10:46:39 -07:00
Zong Li
0493692b40 dt-bindings: change the macro name of prci in header files and example
We currently change the macro name for fu540 and fu740 by adding the
prefix respectively, the dt-bindings should be modified as well.

Signed-off-by: Zong Li <zong.li@sifive.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/f9284873c2993a9952d9fe4f8dd5e89f20daab75.1646388139.git.zong.li@sifive.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-15 15:56:28 -07:00
Tony Lindgren
579cdf58b7 clk: ti: Drop legacy compatibility clocks for dra7
We no longer have users for the compatibility clocks and we can drop them.
These are old duplicate clocks for what we using.

Depends-on: 31aa7056bb ("ARM: dts: Don't use legacy clock defines for dra7 clkctrl")
Depends-on: 9206a3af4f ("clk: ti: Move dra7 clock devices out of the legacy section")
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20220203085618.16043-4-tony@atomide.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-15 14:07:27 -07:00
Tony Lindgren
e65eb2efc6 clk: ti: Drop legacy compatibility clocks for am4
We no longer have users for the compatibility clocks and we can drop them.
These are old duplicate clocks for what we using.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20220203085618.16043-3-tony@atomide.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-15 14:07:27 -07:00
Tony Lindgren
8850c3eae2 clk: ti: Drop legacy compatibility clocks for am3
We no longer have users for the compatibility clocks and we can drop them.
These are old duplicate clocks for what we using.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20220203085618.16043-2-tony@atomide.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-15 14:07:27 -07:00
Guodong Liu
338e953f1b dt-bindings: pinctrl: mt8186: add pinctrl file and binding document
1. This patch adds pinctrl file for mt8186.
2. This patch adds mt8186 compatible node in binding document.

Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220216032124.28067-2-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:00:03 +01:00
Emil Renner Berthing
458dad7cac dt-bindings: clock: Add JH7100 audio clock definitions
Add all clock outputs for the StarFive JH7100 audio clock generator.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20220126173953.1016706-4-kernel@esmil.dk
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10 18:17:32 -08:00
Tom Rix
6853fece62 dt-bindings: clk: cleanup comments
For spdx, first line /* */ for *.h, change tab to space

Replacements
devider to divider
Comunications to Communications
periphrals to peripherals
supportted to supported
wich to which
Documentatoin to Documentation

Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220309222302.1114561-1-trix@redhat.com
2022-03-10 17:22:25 -06:00
Martin Botka
8397c9c0c2 dt-bindings: clock: add QCOM SM6125 display clock bindings
Add device tree bindings for display clock controller for
Qualcomm Technology Inc's SM6125 SoC.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220303131812.302302-3-marijn.suijten@somainline.org
2022-03-09 08:53:29 -06:00
Bhupesh Sharma
d1a16e3455 clk: qcom: gcc: Add emac GDSC support for SM8150
Add the EMAC GDSC defines and driver structures for SM8150.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220303084824.284946-4-bhupesh.sharma@linaro.org
2022-03-09 08:53:29 -06:00
Bhupesh Sharma
2fb605a1a5 clk: qcom: gcc: Add UFS_CARD and UFS_PHY GDSCs for SM8150
Add the UFS_CARD and UFS_PHY GDSC defines & driver structures
for SM8150.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220303082140.240745-2-bhupesh.sharma@linaro.org
2022-03-09 08:53:29 -06:00
Bhupesh Sharma
2dc63e768c clk: qcom: gcc: Add PCIe0 and PCIe1 GDSC for SM8150
Add the PCIe0 and PCIe1 GDSC defines & driver structures for SM8150.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302203045.184500-4-bhupesh.sharma@linaro.org
2022-03-09 08:53:29 -06:00
ChiYuan Huang
b77e70f6b8
regulator: Add bindings for Richtek RT5190A PMIC
Add bindings for Richtek RT5190A PMIC.

Signed-off-by: ChiYuan Huang <cy_huang@richtek.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/1646812903-32496-2-git-send-email-u0084500@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-03-09 13:32:21 +00:00
Konrad Dybcio
5b2fa289c0 dt-bindings: clock: qcom: rpmcc: Add RPM Modem SubSystem (MSS) clocks
Add the missing clock definitions.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226214126.21209-1-konrad.dybcio@somainline.org
2022-03-08 16:21:30 -06:00
Ansuel Smith
887646c47d dt-bindings: reset: add ipq8064 ce5 resets
Add ipq8064 ce5 resets needed for CryptoEngine gcc driver.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226135235.10051-14-ansuelsmth@gmail.com
2022-03-08 16:19:31 -06:00
Ansuel Smith
b565d66403 dt-bindings: clock: add ipq8064 ce5 clk define
Add ipq8064 ce5 clk define needed for CryptoEngine in gcc driver.
Define CE5_SRC is not used so it's OK to change and we align it to
the QSDK naming.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226135235.10051-12-ansuelsmth@gmail.com
2022-03-08 16:19:31 -06:00
Konrad Dybcio
7b91b9d8cc dt-bindings: clock: add SM6350 QCOM Graphics clock bindings
Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SM6350 SoCs.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220222011534.3502-3-konrad.dybcio@somainline.org
2022-03-08 16:16:47 -06:00
Konrad Dybcio
6914b82f37 dt-bindings: clock: add QCOM SM6350 display clock bindings
Add device tree bindings for display clock controller for
Qualcomm Technology Inc's SM6350 SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220222011534.3502-1-konrad.dybcio@somainline.org
2022-03-08 16:16:47 -06:00
Arnd Bergmann
c76edea0e5 Amlogic Drivers updates for v5.18:
- Add support for Amlogic S4 in meson-secure-pwrc power domain driver
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmIlxcAACgkQd9zb2sjI
 SdG04Q/+OTU7F/FWaNzpdpFVnwlGbYA66TCH9TYV79m7L2j/FZ0D6rbZNhFtXW7J
 skclZS9Rkdllq90OpgkHgmPRNvygDw0m0OqOdjYhgCQbSn3f1lgXNYrxnFyVyoFT
 kXEDCw6lUFpJZ/wFlO01zSJRALgIJMLvWpkX/bsMs3n02hQOYkfdfNdRuVqOEx/e
 YblCM3RvfsII0etXh3pj/cAStdc5BcZ0pQStXqhRKQORtZ4zd1VIW7H3ouWdrQfi
 qIHZD85SlK9tPM9+PGgj0bfUXiiT5pBbr6kaVhseGJ5J58FdSvUkjfz+CffJRmgT
 2e61rVyMbaYKMy3NBG3/OSVFuFCv7w65/z0FXW9cGxdtOoxNm65RKzPff3rdA/rT
 XOPSbHBrVqF22kMjgh7aMUbce8ve0Cqf4r8QK8Opqghyq+b8ndMp/qwehI5NENf2
 xxvBPP6vEYgaIHgXKN+ZzKzLoYdaiEQFf3T4gSuIKnMqNfuUbbjBi2WUstJ4X2IC
 vtXLZ15XGvfe0oj+/EFwtqPEyHwpumCAYOlq+9iT34G5pllcAbnhNWMwlj4frBxG
 k8HBfyaJ9alIn6qe9qMAwjD4eBEgzuFgqJc5HDnb8YOcT4UmzxrzPVtdbXUHTgSX
 a2mj0ZMCDMXARKrGpmMpngdp9P6DmK4OHbWEGqo97APZCmExBg0=
 =I56h
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmInfxUACgkQmmx57+YA
 GNlE5g//W8rmP7MMQgJrSeoOaCHCcri2sByL5+lyz6E4PQx2paUfcgG0+hosW57g
 6BcmAo5YrlG/SQBkmXuHS4vvWzWlac4f4tDDldXmdQYOzywlqdUVsHy6KyJaj7r/
 cJGimvMzI7Lfhkub1zeSya3GGTtXGPx6Rj+JssSUSFW/yM7L0irp6K1iAEobHdNj
 5ljHdhZQ8GRfHasj5ToPoigBk4fQbAg0iOhYnA28CP2NMv1dEoGCSh1i0xQvtiP3
 3lGeL/6kHAg2j99lEkQqRaKD9kQHpiDxtMtzf1M8lmnOAMX5N6WlPffYCWA/J9tO
 C7E7Yo6cInos4USpjmhYFY+E6TTgaitVc4xU+wltpILidULaxLBRo4OcVtFdoOPn
 hnCZB65Q5DCqn2cuwkVZ5KPXC6yax9YfkiOH7BHBtAo+sKbtJyuaV0sH4ZPbrSmW
 NZafDpDsEhbO2vtsB9tki3eMeSu5/HAhJI/1aba+Lpdf9MvAOjelEH62N+mtwnWC
 EJMaYXWi4d8sNaEgJ2gj5H97/qzBMnG2COiL7KQuaYocGwJsRrkbXyoaBsnN58/K
 arhrzS7/4KPXtQ6UFx7i2Ri25vvoi9YkrjFz02ivl57zn8QFw5pc/ruKhJxfh24Y
 SsHbOs3gwWBhEPR6yLbeM/MU+kOwYzDu504gK9EQCWvcHGWMxJU=
 =zPvd
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/drivers

Amlogic Drivers updates for v5.18:
- Add support for Amlogic S4 in meson-secure-pwrc power domain driver

* tag 'amlogic-drivers-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  soc: s4: Add support for power domains controller
  dt-bindings: power: add Amlogic s4 power domains bindings

Link: https://lore.kernel.org/r/c7471989-d929-c744-c0c3-c8e86eaaa225@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-08 17:06:45 +01:00
Arnd Bergmann
1a38f961c4 AT91 DT #2 for 5.18:
- Align one sam9x60ek regulator with reality at vdd_1v15
 - Clean sama7g5 i2c nodes
 - Add EIC and NAND nodes to sama7g5
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ5TRCVIBiyi/S+BG4fOrpwrNPNDAUCYiIzawAKCRAfOrpwrNPN
 DCk9AQCT+C8zZhkLzAxocmVpCFof63J9Rqu56ZGcK2AhSkGj3gD/UmNizVT9KRdT
 gKLHL3mxiU8Hw0sZZvyfKlYPaJwxFQ4=
 =m0+u
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIndLQACgkQmmx57+YA
 GNm3nA/+NhFxbecEs8Lv2WMsMKNrJ+tG4I0o993nP1AjMKhl8WYeYe81JHjkLIeo
 zKaIXvNdSeZ2f7hDIWgKOr34jwjLtuyEJVe/GFvg1T25UG1rsfMbD+lpS28/jUwY
 BoZv3fwKijjXML1lSRGQxfYVrJypQXExdS0XkJL3WMBdeiICvZUcVuJVcjOUWrLk
 jEUjUDyzulpwxowI0DOKFZBydO2GvT6YTGaCe6MbaLErRGc3wF6PjyzZTHz4Kfmw
 4/OAuikvRF8nL0WU3fnlZAj/iMW35258WdbkF1JhjeDvSQ6uvQm7GaT/AKyWvDBu
 Jh/wsgRNt5GSdbSKJs3EOMpm+oGt/FBuZLVRoQB2HI0thwUWvpK2WJg7iCyzH5zF
 TD286uC6ZYqICIcexghnPJ8EBNAgptaetfQwRMh6J7fK83lW3lDENg80BJ19/tGC
 EVeC5wdz05QIPnW7tYcPzqWTKKP/fVeNf8LAoMlpXnGCGdahtkzWIM6OamECiGYC
 Cbf5cBbswlJkv/qVJuAeDoKZeDEKU1LjW1OchS7yW4UBZD/nyrMJBTSktfMf1U3+
 13Mm9vSlaNgBrA+sLTTwH+ShACKvN+w3K4MS933DLnTmN/stqzrf2DxKRQrpPs1t
 PwaEP50X6vKlaZzcf7Bd0Q643YaKr3De4UazwNig0Kr9wXMXSuw=
 =SwNp
 -----END PGP SIGNATURE-----

Merge tag 'at91-dt-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt

AT91 DT #2 for 5.18:

- Align one sam9x60ek regulator with reality at vdd_1v15
- Clean sama7g5 i2c nodes
- Add EIC and NAND nodes to sama7g5

* tag 'at91-dt-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama7g5: Add NAND support
  ARM: dts: at91: sama7g5: add eic node
  ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes
  ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15

Link: https://lore.kernel.org/r/20220304160036.27392-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-08 16:22:28 +01:00
Codrin Ciubotariu
015044e961
ASoC: dt-bindings: Document Microchip's PDMC
Add DT bindings for the new Microchip PDMC embedded in sama7g5 SoCs.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220307122202.2251639-3-codrin.ciubotariu@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-03-08 13:38:58 +00:00
Shunzhou Jiang
40b358f615 dt-bindings: power: add Amlogic s4 power domains bindings
Add the bindings for the Amlogic Secure power domains, controlling the
secure power domains.

The bindings targets the Amlogic s4, in which the power domains registers
are in secure world.

Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220307025357.1368673-2-shunzhou.jiang@amlogic.com
2022-03-07 09:40:39 +01:00
Peng Fan
9a45081bb1 dt-bindings: clock: add i.MX93 clock definition
Add i.MX93 clock definition

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220228020908.2810346-3-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2022-03-04 17:06:29 +02:00
Tudor Ambarus
92499dec3a ARM: dts: at91: sama7g5: Add NAND support
Add NAND support. The sama7g5's SMC IP is the same as sama5d2's with
a slightly change: it provides a synchronous clock output (SMC clock)
that is dedicated to FPGA usage. Since this doesn't interfere with the SMC
NAND configuration, thus code will not be added in the current nand driver
to address the FPGA usage, use the sama5d2's compatible and choose not to
introduce dedicated compatibles for sama7g5.
Tested with Micron MT29F4G08ABAEAWP NAND flash.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
[nicolas.ferre@microchip.com: add the definition of PMC_MCK1 in
	include/dt-bindings/clock/at91.h from another patch]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220111130556.905978-1-tudor.ambarus@microchip.com
2022-03-04 15:03:53 +01:00
Arnd Bergmann
4d558d4d88 Qualcomm driver updates for v5.18
This refactors the Qualcomm mdt file loader, to partially decouple it
 from the SCM peripheral-authentication-service. This is needed as newer
 platforms, such as the Qualcomm SM8450, require the metadata to remain
 accessible to TrustZone during a longer time. This is followed by the
 introduction of remoteproc drivers for SM8450 (Snapdragon 8 Gen 1).
 
 It changes the way hardware version differences are handled in the LLCC
 driver and introduces support for Qualcomm SM8450. While updating the dt
 binding for LLCC it also introduces the missing SM8350 compatible.
 
 The ocmem and aoss drivers gains missing put_device() calls and rpmpd
 gains a missing check for kcalloc() failure.
 
 The SPM driver is updated to avoid instantiating the SPM cpuidle devices
 if the CPUs aren't controlled by SPM, such as when Snapdragon 8916
 operates in 32-bit mode without PSCI.
 
 The RPM power-domain driver gains MSM8226 support.
 
 Lastly the socinfo driver gains knowledge about a few new SoCs and
 PMICs.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmIdnvAbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FFMIQAL8yVzMuonz7yiuxZaC6
 nvCGWVIbsfjloLWjpE79orSoEx77DlhYaUDHdYqHMEV9ytdryaSaU5A5LGfzVugC
 D6TSvJh1SDV6hJ79xRZIDO72fJn/Xo62JCtTC4u+iBgoehhMrOQHm7HlBhLXJ2lq
 RiHDjzCHMaRTrPf1GCY8a1VK0nIa8KfaAbk+GzZ5Y+0I4oh7ea43DwUSYAIvZAKi
 N5CRXRFeoGpEnY9FzYYfkTPXu28hvj3NtGaEX8SIyzmgLBxCqLpFfxVj3xUsDGbX
 TFqr5YWO31/5oQN4Ex0IrD4NOyOtVyPCtd6iSmlW3t+LxcQsgfW4cCfzT9vQp8dV
 LLkhvKQCAMyIIzZtoHQRN2J0L4tQ8kW1lxW01XMbEjm0lOoALGisE8KouSPlAFn8
 zgX6bPWUmsuictfG8gmqgqKsloV6E5IU37Htcm+sdw89ZVks6UJG40D3DiOcpAXX
 eEKRMW8UHhR/u2AQRlaBcSTQVI/zfXWFk408zHxfD6fphrfnSPRBl+CEZmqrySWi
 eqsL1PJblZg1Uhg5Q8XRokAzB59RYVbs6jSiLKGTUvwTrBMUy+SK1UOG9V3pXsOv
 TSW92RXKZFS8smNcKm/2k1bhopW+2h2BB0z1OYBynl+VUOtCadf7DHciGmAn/Hxd
 eyL2HBVqS4LtdLHSL2TAj3oM
 =okza
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIeZNUACgkQmmx57+YA
 GNmKBBAAwpweTveDkEmeT6nTckDaRYBo0LthJr6TmgndjKq5QChknEOFSMvs6JzP
 Ftheb+J7NcrQ20vN+wv8ic2k6hP8UCRrxyt7IJSJ3iDsqjODxW0K/qoetpFL1BoY
 zCdo0+C7R9iK4QbEA7HjbG5SCVMe8eOLGJLWXkbAO/DInU/WZfSmbbieDSNIjHIp
 nBoX5iBPKHMxj8Cbi12ezK+NHgwXkPdc+H0YNnwbBX6cr470bq5AarJCuWS4W0XP
 xUTC86mR9NUDMu4MkIjbtTZUgKOSXuQoioH4uJKNTDObD+i1GDUNWTm1nvxrQMe1
 DZctGN2ISHKjzcS2okcYwZ4CX8SEB3QK07YydyBknsNINxvwm1fB23VtCikP4k2r
 Zqo6ewT1Y1imrb2MmjWyTesXO1u+JDz5d0A3O9O93Yvfn6Zz/wiGQV6HSmbU6RpQ
 JyJWUOokCydqKXMLlb79Ln2Sx8q84aoZGekEQGfTqvIObntuYx0VWdMJuisP0z4+
 CqZTnIc60IaG8WkB/xx/vzzKa8XmKTfalSxZV5ThTruVmiHAqd1rW8N/mR4ZE2bM
 YQ0AxQcaZHyUawPuaqOY/u9lADE0ROW/3loC5CWU8LLTSR3OM610YgQOKNC8yi2n
 FlEYdhupJEGcx4fLY+SPWGgYFhIZgqxlL7WNtzg7uEFiBpayLxA=
 =vkG6
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.18

This refactors the Qualcomm mdt file loader, to partially decouple it
from the SCM peripheral-authentication-service. This is needed as newer
platforms, such as the Qualcomm SM8450, require the metadata to remain
accessible to TrustZone during a longer time. This is followed by the
introduction of remoteproc drivers for SM8450 (Snapdragon 8 Gen 1).

It changes the way hardware version differences are handled in the LLCC
driver and introduces support for Qualcomm SM8450. While updating the dt
binding for LLCC it also introduces the missing SM8350 compatible.

The ocmem and aoss drivers gains missing put_device() calls and rpmpd
gains a missing check for kcalloc() failure.

The SPM driver is updated to avoid instantiating the SPM cpuidle devices
if the CPUs aren't controlled by SPM, such as when Snapdragon 8916
operates in 32-bit mode without PSCI.

The RPM power-domain driver gains MSM8226 support.

Lastly the socinfo driver gains knowledge about a few new SoCs and
PMICs.

* tag 'qcom-drivers-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (37 commits)
  soc: qcom: rpmpd: Add MSM8226 support
  dt-bindings: power: rpmpd: Add MSM8226 to rpmpd binding
  soc: qcom: mdt_loader: Fix split-firmware condition
  dt-bindings: arm: msm: Add LLCC compatible for SM8450
  dt-bindings: arm: msm: Add LLCC compatible for SM8350
  soc: qcom: llcc: Add configuration data for SM8450 SoC
  soc: qcom: llcc: Update register offsets for newer LLCC HW
  soc: qcom: llcc: Add missing llcc configuration data
  soc: qcom: llcc: Add write-cache cacheable support
  soc: qcom: llcc: Update the logic for version info extraction
  soc: qcom: llcc: Add support for 16 ways of allocation
  soc: qcom: socinfo: Add some more PMICs and SoCs
  firmware: qcom: scm: Add support for MC boot address API
  firmware: qcom: scm: Drop cpumask parameter from set_boot_addr()
  firmware: qcom: scm: Simplify set_cold/warm_boot_addr()
  cpuidle: qcom-spm: Check if any CPU is managed by SPM
  remoteproc: qcom: pas: Add SM8450 remoteproc support
  dt-bindings: remoteproc: qcom: pas: Add SM8450 PAS compatibles
  remoteproc: qcom: pas: Carry PAS metadata context
  soc: qcom: mdt_loader: Extract PAS operations
  ...

Link: https://lore.kernel.org/r/20220301042055.1804859-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-01 19:24:21 +01:00
Arnd Bergmann
16e769e2ae - add power domains support for mt8195
- disable ACP on mt8192
 
 mt8186:
 - add support for power domains
 - add mmsys and mutex support needed for DRM
 - add reset control based on mmsys subsystem
 - add pmic wrapper
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmId5EgXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH4gEg/+LL7XjcWZlD8GwTfJEeZjgk3c
 06rne1kKh0mm9+VEIHOp0RsMf4IdbHwCbAt3xMMcdOqAxh4oaKchCE0fPS2d+mdA
 2qZaysEBxG6RTs/wY9fS1/diGge3OroW3CuS0cv6mKh7acY9tLW5/VRvvgcOzSrT
 eJYGQqpXg4VfUJ41e7otIhj32Npltby9lBlo8Z5kF3Vy7yYAUEZvNrGrp0pmwkvM
 UJRlCZFoSGAfoijJfpH38vixi+qWYOiAhulweT01VhtIVYHjh+BmoQc4jZ8A7fhW
 ttzlrbYPELRD0eu6/zfdokXWVwZjkqB5HoumN7IaYW+ZUEY6iYhy9J+Ir9qpG82D
 Z4cbk4JMc6uEAjTdu6njdzlBukw80oXOo6nCyPa+xvniNWPoYTHN5JZaNWig4taC
 5i9diVBuwkOdYARKSFqxk1FuvvSDh+8QP9hNiomXZrPUjZgilXDQ2CncKFr70CNM
 iCQqCiHNpzaVEMxBkve2aU9kKc5qVixrLAqh/VOwpUln66aE1Ug51zzdAAkalyQv
 di6iZMRFy+pL3oNPFWAKv0Z0yowBj/QDFBZiOc/SqXrrNpHNDfMVPcSdZVtjSBXD
 DqPxPFRHaqV/+eFHc9xyvgKMMbg2xYsZXVrleyQWiXck0x2mshw3hIcghGpkPGDB
 w+b5BPpeewE49tamKJs=
 =KUFa
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmId8OYACgkQmmx57+YA
 GNlaoA//cdGz81n8HG8zy1DpprypmbUCJv6SruIF1XE2ewOgZ486IiA0H1yYdSD5
 kDmok9SDjFM+WmqxoGUQl5hcNH67ThD/5rxgKgrIpi4kpfhgjbhYLJ9PGjZSAc4v
 9zW+l48WDYxHmq7xhsCgsC6BoimM3MHwJTA3crMzXqtG3PecrLtnMS6EAaX/Uoub
 Vw7HW8v7PAeO9xx4tBV+c65jYDmmcBm21iv9EptEUOgK06OhjyH6KoQjFwGpg/tb
 uEDehYDK5pULc9U2322sfRJ0b0LpD/+yJMREITe9XYuHX+4akqVEscEVvnwh/j+1
 PXwwtGOnVMk/5TLaLUQy181x4soXG+8uBVbitHpZVCfmRvel6fAbnfgAxyf7sYy/
 Kdbp1apVnQ7nDeW/rhR7glNrJSUN+R2uBbfmXPyU+MOoPG+1Ckz6YR4VrjKx0M/N
 K7qkqwJxp7TkuFJXzqWi58apyHqBdM9LzsyroRjk8FqeDC60T6RQDhJXuXDpDp58
 na4WDaS5expzgWpGiJwrm2MfT0rbI9X7pyGRcCPY6kVwtnLX84npVal6ZbS8jCwp
 KRO13i/ZzZj9ZNlOhANgYodedW4dO/tyW39xMIzYrQ+5QjQ8IvD+DFnv50F1DzON
 5IbTBTDS1B07dIikIb9FFLrGZL/bqEtafg9kGsYfypmXfVPf3FY=
 =G//M
 -----END PGP SIGNATURE-----

Merge tag 'v5.17-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

- add power domains support for mt8195
- disable ACP on mt8192

mt8186:
- add support for power domains
- add mmsys and mutex support needed for DRM
- add reset control based on mmsys subsystem
- add pmic wrapper

* tag 'v5.17-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  dt-bindings: arm: mediatek: mmsys: add support for MT8186
  dt-bindings: mediatek: add compatible for MT8186 pwrap
  soc: mediatek: pwrap: add pwrap driver for MT8186 SoC
  soc: mediatek: mmsys: add mmsys reset control for MT8186
  soc: mediatek: mtk-infracfg: Disable ACP on MT8192
  soc: mediatek: add MTK mutex support for MT8186
  soc: mediatek: mmsys: add mt8186 mmsys routing table
  soc: mediatek: pm-domains: Add support for mt8186
  dt-bindings: power: Add MT8186 power domains
  soc: mediatek: pm-domains: Add support for mt8195
  soc: mediatek: pm-domains: Move power status offset to power domain data
  soc: mediatek: pm-domains: Remove unused macro
  soc: mediatek: pm-domains: Add wakeup capacity support in power domain
  dt-bindings: power: Add MT8195 power domains

Link: https://lore.kernel.org/r/16a53482-5a8c-e95e-8cd4-b8304f110987@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-01 11:09:42 +01:00
Arnd Bergmann
d271758452 TI K3 device tree updates for v5.18
Since (ti-k3-dt-fixes-for-v5.17):
 Fixes:
 * Cleanups for flash nodes across K3.
 * gic-v3 backward compatible registers
 * j721s2 interrupt parent fixup for wakeup GPIO
 
 New:
 * AM62 SoC and AM62-SK board
 * wdt support for am64
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmIct6oACgkQ3bWEnRc2
 JJ0IphAAlXcsR2Eu7QrVn3yD+kQmVGuiiwpSZ4byQ1ZqfzmqCLsmTEAnQuNcEv00
 wRiQf//JrdKb81Uho0Ag0a5V9Hwm66aFx80wxhCdZ1oYGq/MbdKOm76GYwJCqQqZ
 n3TSnRmXYSIdV0T3TfmdmOie+OHosQ+DpICXKC5g5ZMkrQK7t6oS7M/8FJx+UfsE
 2FgNzepdPrY241x02CnAPirdL2ptAiCO7qIeLyxCk1yQjXyCsmSLyGDScHnM+6PA
 E9kO0XA0AeTlrp3U7SzqHAL2rmxXnFP92f1gLC2z3aQ5pwg5kglL/Ll3VwTRBUx9
 FfX3sRE1SHLfTTVascgLr8oab/xJ8KR6228Gu/FAOR74i4s0h3kgHppvU3h3HgAe
 PFm6oWLjQREosb7vmkhMursd3kqkrlg8Kq6dqxAKzcB36QbpkAWlXfpts8g58U2R
 M3EiYTK81mOVP1V1eUAXu5LdGsTpOFcS7FlYk6l1PbzJPQAkbmSwIgd911kAQsUy
 Qjj000H3Rv7tH1LluyBR/vm8B3MVrl2PMTAHhi9wV8zaNiqTJWsQO3NgmaPHzYb1
 VFGxf+75pdDnq2+DdbyGmvgQSZ1n3fRa/QFvqO62in13R7uwdUpLzWCouLXkdHPu
 hs2vVo1bzJMVMkihjRKrlkLBjsO6HTKUL2AC9Du8BgAkRwh+aPY=
 =mVxU
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIc2nEACgkQmmx57+YA
 GNlIvA/9HiZZ4C42kZ4MgmwysvF1Dx+j5nwhDyFBFmLdlesiy/0LcdanyZhY1vAp
 kwAmMC4xOnq5o5QAH0F5GuMXYptYk3grJ7rMb4LpQaSeog/74VhRBAzmYafobAqu
 uongkSBk+ZUXDFwYQ80JZthOKTJcgBKDA0uYj1NQ8GVDKTwFsBoN29XWo5fkVbi7
 NBu9vyAjcvhZXW7lUFz9qeoZ1shuQlUBjTfPfL2Fgt8ravNsBttqk382Kg3fd/vN
 EMsjWfL06iBXayzNfoShrZ2y3ngbxIl9t8QiV8y1Mwzz0KoFZimWjnHvUCR3H55b
 GVj4Xy6qXAFUZchzd1JeypnT+jHMeJhCSkZkYvDUePFvJxd7i21sdOIjAA8fLERL
 cR32Nx24Z+4I2Mjq1FGV6RaybUd/zsKITfRoGJj2+iymw7tDnmZnkO8XlQAcvxgq
 ByBang7hwHYf/5XWm6t+SypBv3Oc7mrj8w34LUVOHz92UXWS0B0LVoVB6j28L5yf
 NaC3pV0VmH1LT6zobkJP7Ykz0EggjQEmUrWogsEN35B7SNZeAlehGis0qdx+di00
 S/Q9eb4a9Wu7dS8q16DaxEf/JNAL0nbpMiRQdwAhyENaN3nAIRaJcLEWOpr6/d7a
 MxW6wZ578XFqnUppVCm6fbtXUOYBK4A2Y4/2WqX2Zvk8rqRraCQ=
 =uMlU
 -----END PGP SIGNATURE-----

Merge tag 'ti-k3-dt-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt

TI K3 device tree updates for v5.18

Since (ti-k3-dt-fixes-for-v5.17):
Fixes:
* Cleanups for flash nodes across K3.
* gic-v3 backward compatible registers
* j721s2 interrupt parent fixup for wakeup GPIO

New:
* AM62 SoC and AM62-SK board
* wdt support for am64

* tag 'ti-k3-dt-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
  arm64: dts: ti: Add support for AM62-SK
  arm64: dts: ti: Introduce base support for AM62x SoC
  dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62
  dt-bindings: arm: ti: Add bindings for AM625 SoC
  arm64: dts: ti: k3-*: Drop address and size cells from flash nodes
  arm64: dts: ti: k3-*: Fix whitespace around flash@0 nodes
  arm64: dts: ti: k3-j721s2: Fix gic-v3 compatible regs
  arm64: dts: ti: k3-am64: Fix gic-v3 compatible regs
  arm64: dts: ti: k3-j7200: Fix gic-v3 compatible regs
  arm64: dts: ti: k3-j721e: Fix gic-v3 compatible regs
  arm64: dts: ti: k3-am65: Fix gic-v3 compatible regs
  arm64: dts: ti: k3-j721s2-mcu-wakeup: Fix the interrupt-parent for wkup_gpioX instances
  arm64: dts: ti: k3-am64: Add ESM0 to device memory map
  arm64: dts: ti: k3-am65*: Remove #address-cells/#size-cells from flash nodes
  arm64: dts: ti: k3-am64-main: Add RTI watchdog nodes
  arm64: dts: ti: k3-j721s2-common-proc-board: Alias console uart to serial2
  arm64: dts: ti: k3-j721s2: Move aliases to board dts

Link: https://lore.kernel.org/r/20220228120711.xdburehxs5gnwxko@capacity
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-28 15:21:37 +01:00
Arnd Bergmann
cba4cdeb35 dt-bindings: Changes for v5.18-rc1
This contains additions to various DT bindings includes (such as clocks,
 resets, power domains, memory controller clients and SMMU stream IDs)
 for Tegra234.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmIZBZETHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoUclEACDN9W0ehB9rPOAGcgMQHrG6Eglf/sE
 l6faEST5sP5IWhFHCdm97NeIQAVOO7alQv2UurjT7MIdabH4fBk2ck6xdnP5eztW
 wDjvVy6YQc7vuQKJOdqbox1AvYRXwAYckIc3y6A9j9pR3K0AUCWMR5JeIMC7m0Um
 Iz67d0Bx4WTqaSNuw0zaCqbJEdeKA8pcCpkedAeWW2DL4NpctcJCzJL0QFXKOypy
 NuL13euaIxET//tu3Jec6acVEQrzr0ymrRPuQV4v6+rnaZy8AO/PbMUJb0XOtpwp
 C0j5YUkvdhq26NY52M1Z7duHADF7UHgxDuSnU9mbq71IhFtEEukhWvcJ+fLEbwSP
 ijsPuTJxc7pYYTdrOC+gzj+NNtqq4abiDJfowQPe/0DPqGrVbCn6GjAGzi8tf7SY
 6ScI9pRQGDvrTW021/Z6y7hlH4hq38Ypir7FdmppVnFbTnjN9r35vqR3LGDTiJq3
 Q3hGXeAuIg7rQowry/a+1+iy8KUOpStRAxtx9TpgYiW/4ru/ubzp8thKx1l6X9su
 DKoOe/Atq2QAqjO+4D+7s8LPUGYSu2OLYgAjQ6e9ZnlVDTdOHirr2OwxI5k6zOLR
 +m65qmRdccyUqcNvvh576l7mTf3SbGFd4C3L5RAIaFP3ltAzYrqphBtgZjT27lqj
 uv47eQBlPdyH9g==
 =IFUM
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIc19wACgkQmmx57+YA
 GNlrHQ//Wiax3wrw0kxbD7DnYakfbHrZLnMb6C5ffQVn3ANBt4A1xaEgpzjxikCt
 T5HqQrk1lP1Bo0wFIOdo2gDNR+CmtaJLv3YXn8H9CuYTdqLiSwiR0Dx3JdawWoh+
 +vpBWJyIf/hqKH9Uq98iPAJQAOUSOgs5n4whw6aUMDU4GlqYK8QfXICad9KG8ug5
 YY/oKXUh9czATUnnknY8eKtsna1zSbutgegVv1F4J57nYZ19NB/5+svyjMddm6IQ
 q45GXoxJ8Y1Sk6oO2AMcOXjoUbjdWq9ToC1NV2bVM9az28d0RHlHJRSyI5o9XkXy
 ImrNVCU5Lpjkchrcod6YkhAoDz6xn5jLIuH0ni0wNSKKW5aWO7IC0t1dXloj4Of5
 9ibeofOoXnIbP5VC3iotQQFhLMBdn2kpbW2A/nfnyTXm/USrXwkWcMkA/xPaA1A/
 wXG3qNyJDtP+0cStRy7V9b2SCFxuCnIHYqhxFEtuULnqNrlA6j1aPIeo5kIZ93Gy
 /ifJ9NTFId3BwSXW7vl0tLrjzlFHmo0MsN4feC/kgHc+X8URjBqWrYSqse/Yv1Zw
 x26Dj6bRIJj91VeKpH6DIBI9TNOgEqIY489wscyjMgkTgUWBTzKbGYxU2/X2OtGs
 IcGOonWuJ+3BHpmK9ImjQ2K0YUMARRm5kYf9reYhRFFi+L4icEw=
 =1fay
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.18-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.18-rc1

This contains additions to various DT bindings includes (such as clocks,
resets, power domains, memory controller clients and SMMU stream IDs)
for Tegra234.

* tag 'tegra-for-5.18-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: memory: Add Tegra234 PCIe memory
  dt-bindings: power: Add Tegra234 PCIe power domains
  dt-bindings: Add Tegra234 PCIe clocks and resets
  dt-bindings: Document Tegra234 HDA support
  dt-bindings: Add HDA support for Tegra234
  dt-bindings: Add Tegra234 APE support
  dt-bindings: Add headers for Tegra234 PWM
  dt-bindings: Add headers for Tegra234 I2C

Link: https://lore.kernel.org/r/20220225164741.1064416-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-28 15:10:36 +01:00
Suman Anna
e096242e1e dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62
Add pinctrl macros for AM62x SoCs. These macro definitions are similar
to that of previous platforms, but adding new definitions to avoid any
naming confusions in the SoC dts files.

checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses

However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220225120239.1303821-4-vigneshr@ti.com
2022-02-28 05:34:43 -06:00
Chun-Jie Chen
c8a006896f dt-bindings: power: Add MT8186 power domains
Add power domains dt-bindings for MT8186.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220215104917.5726-2-chun-jie.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28 12:02:11 +01:00
Chun-Jie Chen
73c022e129 dt-bindings: power: Add MT8195 power domains
Add power domains dt-bindings for MT8195.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220130012104.5292-2-chun-jie.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28 12:02:03 +01:00
Arnd Bergmann
ab930ecfce Samsung clock controller changes for v5.18
Add support for Tesla FSD SoC clock controller within Samsung Exynos SoC
 clock controller drivers.  The Tesla FSD's clock controller is similar
 to Samsung Exynos one, so entire driver structure can be re-used.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmH9RtIQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD10PbD/0crt0yMU7CG/AzPci7HnlFWtSv8o2E3SIr
 p1i78nyN4JxXkJ6+mNFtgHKnZThdqh5MbKN8pTOnaBD0LBeNYYcHRMc4AKNdoIdL
 OggqqpfA5+5OhVdirTOKUWGaqqO7/jKWkSpAb8jDC0QBp4k7VKoUDnSdegwEb6hf
 oAC4JRVNEKpbyTXHoHwmMAoZOIpLvEpv+ZRV0JPRBx80FABiRCA6ee9zKpOVF1LC
 i8ioioqbzZmRdKOtUmKi6nP0eLhJFFjSk49PSgBXF9RJKu+A+EortAtgOVWd/x9O
 V0Qmaa/LRL/EbzQyYF6zU2xcoAEK6kRcOZ4PX8Yh/M4jz9VxDRlNhvHYwNzKfXuz
 P2ZNz5EnVDOYwEFzMdsHQV5mm1xK08zrA9O+BZwkVV3LqNNk1ANcEIP2/DIHOTjr
 ksf1xhflYbM2weI4ugAChqx+cijM/2X1xZVgVh7gDm9qiLvMGmyUVLfxdIrZZAoZ
 N/vWfG104qrBT5vuiYYKgCYVwoS9eY/y2ng3gYAYEvNlGT51dQWTS5hPRSQ1xMSh
 L6Dv/vm/AJoCK5ttefQ3+GKqJmaFJ7LVBa7BMbtQdtCzoIwnd8vvaajSGi8k7B/2
 d7a7bGvjVixflzz0bfgMKdee8GqT2WdUjIxHq3nANE8hs4dCfek3z3+cjFCh/WpB
 YxFWrH0oXg==
 =zUbA
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIZAFgACgkQmmx57+YA
 GNm4vw/+MGF9aJlAxZcghNsQJ7oUQ6yTYGPeXqLEKF+03oJlk6xrJV+5DFH3UUj5
 fmE1x/PdSX1WzyjMBrw5zjyuW2zoT2TWEU6mLeYI7F5FNWDI0+u5k2rqKe/J0WE3
 g8grTXqMiriHVjRtgRGjrzKRHzw8UPFlCtuT3CV6Bfx+20sUg9l1qr/jULavPTeS
 tYIdVjp1H7wu6TG1rGze1cC3EtaOV4DGoVbE7vLa7pG/MCHE9z+4Y4TuC7Hx/877
 JuypfpJWm12J92bpinIZjshTLDl0ei1n/mv2J+t7R8plTY2DuKJOeFvfNL6ubZ2A
 a/oBgXQ42XeK/hnUPcvrweKwjFPG2UQLJC96w+INnrKqopWxPULTOHhMkj2grqjK
 q5Hl7EfLja4R5fXS9+//lZisTyaAQKNacRGDZEQntuyNZKS9aZhFJqUsvt5dyZF1
 s8CLjEgs63Bg5ehgwjEsJRx0jce6jqh2kcTp9/T1CN6lTUHWJ9sCto1oYEvs+nRi
 rM1r+Q1gtW3vphckcdtczOwxO4qxohK90sqZJBCULQUOJ6Y2Fj+0zLU5nHgJPzxK
 F7IyJ81wwg+JT2kBbM2QARAKxpymSR2da0nFqUvRkgBuT8C8TTVrTlQwljAkx4wg
 tnRYyDR05j61SIOZxj3NJ1HOe0ot3AB1OAojw/zULsQxjV/tLUw=
 =82Kp
 -----END PGP SIGNATURE-----

Merge tag 'samsung-clk-fsd-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers

Samsung clock controller changes for v5.18

Add support for Tesla FSD SoC clock controller within Samsung Exynos SoC
clock controller drivers.  The Tesla FSD's clock controller is similar
to Samsung Exynos one, so entire driver structure can be re-used.

* tag 'samsung-clk-fsd-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  clk: samsung: fix missing Tesla FSD dependency on Exynos
  clk: samsung: fsd: Add cam_csi block clock information
  clk: samsung: fsd: Add cmu_mfc block clock information
  clk: samsung: fsd: Add cmu_imem block clock information
  clk: samsung: fsd: Add cmu_fsys1 clock information
  clk: samsung: fsd: Add cmu_fsys0 clock information
  clk: samsung: fsd: Add cmu_peric block clock information
  clk: samsung: fsd: Add initial clock support
  dt-bindings: clock: Document FSD CMU bindings
  dt-bindings: clock: Add bindings definitions for FSD CMU blocks

Link: https://lore.kernel.org/r/20220204154112.133723-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:14:16 +01:00
Arnd Bergmann
b10e270dc9 Renesas ARM DT updates for v5.18 (take two)
- Document the use of the renesas-soc IRC channel,
   - Watchdog support for the R-Car S4-8, RZ/N1D, and RZ/G2LC SoCs on the
     Spider, RZN1D-DB, and RZ/G2LC SMARC EVK development boards,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYhiomwAKCRCKwlD9ZEnx
 cHPXAQDNxh5Fr/t8POQlZRhXr/qw9vSkP/bslbLBXIxQmtTuiAD/QOwd02UBun5Q
 ei27RcXBOmzpxJBD281LL2fF560h9Ak=
 =gcXB
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY8lYACgkQmmx57+YA
 GNnvkQ/+KA3wN4WIuWG1DfkRh3wOL06EtIlbMTomH7IGvPkPVI6s5lYgPN85pWOb
 Sq50/TRTX+Lo3wU7bHWm6D4uik2i7haeFLXLnMm4p020OggqZlFlIStIg2AcZ4Mb
 Xu4NFHKlBEelNW4r5lgWpVwpfX37NJb5dY/ZX/oW8fNzTGufGGN/QHLKXzyIpw09
 gWTL6d9EIiY6up79mX48RHQ/lLjNLs/8Ae0nnmtHRp3268vGUaUhI1ybzKdAWfsg
 0pgAk2bF5oPxpkMDe4/0cilB/BDHF2TRgt8/yXXJZ34EQTXciKu/Zi3n4CmViAHr
 aPm9pF9SFFuiTS0PyeY9fyj3gjb3/vj0h6Slyr/U7b4YchdVJ+wLduued3hr0tJt
 3LBKtAtxgc0EqOxf772UtWcd8ZPfDH0nJnAbEotZV7y03VRWK/eKgwIQ/j5kc9go
 rSZ6Gc/2YeexK5nPSxir0XDelQjVDSRo/yDQmoSPvduUJrga1N4p1MVLSGvmWimB
 o/oISmNVvl868/kMTmv9RwZlmULMAgjIqQ2yrwE1kCc2x0p04aWFRoYv7e++GG3M
 tK/TvodD4BvjTDVPUMrG7Az5QPjMs8QbLIIGjulGcxwPlRW6tn09Eha+qTcA4X5o
 tpyk5zPZDkw+MdixdjuBCkrD8Y6yFG7foRf6Rmnhqh9oClQmplk=
 =WR66
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm-dt-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.18 (take two)

  - Document the use of the renesas-soc IRC channel,
  - Watchdog support for the R-Car S4-8, RZ/N1D, and RZ/G2LC SoCs on the
    Spider, RZN1D-DB, and RZ/G2LC SMARC EVK development boards,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: dts: renesas: Align GPIO hog names with dtschema
  arm64: dts: renesas: Align GPIO hog names with dtschema
  arm64: dts: renesas: rzg2lc-smarc-som: Enable watchdog
  ARM: dts: r9a06g032-rzn1d400-db: Enable watchdog0 with a 60s timeout
  ARM: dts: r9a06g032: Add the watchdog nodes
  dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock
  arm64: dts: renesas: spider-cpu: Enable watchdog timer
  arm64: dts: renesas: r8a779f0: Add RWDT node
  MAINTAINERS: Specify IRC channel for Renesas ARM64 port
  MAINTAINERS: Specify IRC channel for Renesas ARM32 port
  arm64: dts: renesas: ulcb-kf: fix wrong comment

Link: https://lore.kernel.org/r/cover.1645784466.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 16:14:30 +01:00
Arnd Bergmann
fd9eff2ebc i.MX dt-bindings change for 5.18:
- New board compatible for Protonic PRT8MM, Toradex Verdin-imx8mm,
   emCON-MX8M Mini, i.MX8MM GW7903.
 - A series of patches from Lucas Stach adding support for i.MX8M VPU
   and HSIO blk-ctrl power domains.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmIUWAAUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM5SVgf/drYYmyw2CEYS6wkzqENuIIWHuWvh
 OX3qBj5AC5ZXBLcbxXr1A/F428uCw4/qnnAWjv2LjCzeP0WGCh/mgpFMneiBAvBW
 M9N2yaadKIFL+dUXMtzOTD9SuNgxEqFKaarhcyzVSpZqVC3kdVJp6M2LBccKxyPM
 F0WB1mpzTEVEGFheHwSa+aibSkNRluoJfb+WSHubawMhuj0nP+3gDQAgcYP1g6fm
 eo6Ltar0s/gw3oE+fsSAlMUv2z7cRVclYaCA65HLnCjS0PgLRlVylvT33XC1l5co
 JGdccxSKy3o9BGf+SzGITqDNamgTne2pJhFBttdW5f5RkRjQNVHlBBm92A==
 =LamO
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY7+wACgkQmmx57+YA
 GNky+xAAwha6cNKM/oGvyJRN4A+s7MsFhT3YFupt6eMUko7xWDtVTzxTHjZOS3/W
 KEU6n8t8qGCTH2osMWKOhcojOz9p8L+bK6o9x8ljAlQVHVP/HIigqerN8eQ9LfEc
 dwFQLazX0lkRZA3M2SvfkfhFEuYkl9vxJflb91hlMRuoLK5RR0lop0MYPvXzHUpH
 7JVYyNivvwkAcrFTDtAViO4f1DpNMXBWfltxXqLTsE7OUZycJUefVTvKV99kaYta
 0qaWZ69cEW0CWuYC2wpUzsnIxAofaYNAibRz1oKJFtvv6N8MycH7V8xUyTC8iQ4N
 gOdq2fh8FKC9w3JfipmL+DZ+0CzFd4r5CY7lvOivfnxNr64uegh4gBEw4k9SM7Iu
 qi8YmX6VgF2MEkEBM8vVBSr6BnCCD2SV4KWMbPMVJYOARioTxLIfSV50XM8mCPug
 RdHYX6EHE0UwLotnresbK71k1wJjhympw6Qj/qIVr1Le3IQjXggGJDqlD8dDprDY
 +td9cambVE8CgewEj9AK6SSQoDXguBWbbV6KY5acwAwH37k/I/X1/KGATNoiZG8/
 Ral5OMctJ1X9WgraNvSpfadJ61wUpfsHSJ7N/DzHn7Q+Co4fcJAgOvH56fQnolG4
 uNTpzNjXWhmOdqEvFSKbfpxIjuSp08PFbv2N43eYyuUDdVD6iJ0=
 =/t9F
 -----END PGP SIGNATURE-----

Merge tag 'imx-bindings-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX dt-bindings change for 5.18:

- New board compatible for Protonic PRT8MM, Toradex Verdin-imx8mm,
  emCON-MX8M Mini, i.MX8MM GW7903.
- A series of patches from Lucas Stach adding support for i.MX8M VPU
  and HSIO blk-ctrl power domains.

* tag 'imx-bindings-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: arm: imx: add imx8mm gw7903 support
  dt-bindings: soc: add binding for i.MX8MP HSIO blk-ctrl
  dt-bindings: power: imx8mp: add defines for HSIO blk-ctrl domains
  dt-bindings: power: add defines for i.MX8MP power domain
  dt-bindings: arm: fsl: add toradex,verdin-imx8mm et al.
  dt-bindings: arm: Add emtrion hardware emCON-MX8M Mini
  dt-bindings: arm: imx: add Protonic PRT8MM board compatible
  dt-bindings: soc: add binding for i.MX8MQ VPU blk-ctrl
  dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains

Link: https://lore.kernel.org/r/20220222075226.160187-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 16:04:12 +01:00
Arnd Bergmann
3b34d3a919 Renesas ARM DT updates for v5.18
- External interrupt (INTC-EX) support for the R-Car V3U SoC,
   - Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
     RZ/V2L SMARC EVK development boards,
   - Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
     and Condor development boards,
   - NAND support for the RZ/N1D SoC,
   - DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
   - LVDS support for the R-Car M3-W+ SoC,
   - HDMI output and 9-axis sensor support for the Kingfisher (ULCB
     extension) board,
   - MAX96712 GMSL serializer support for the Falcon development board,
   - MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
     SoCs,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYgZjowAKCRCKwlD9ZEnx
 cIq5AP4gwBDY8UmVVcKj9CWl+feTrHYxjFCrs/ALVcjS1EphmQEAwpK4TaqElJwb
 pO2PuhfgYlCl0QwkkzYygxKFAlutjQg=
 =24DK
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY5lAACgkQmmx57+YA
 GNnYOg/7BXiOalLktvKGNDMKREiJ9zJXMc55NNeQzw3ne2AN6M4nuOcBiGkQiHHP
 NkvQwGruOXctTJtCnk4fCTd4cu1EhSIWBUyyk4t9sBLTLm+rG9a+tGyeFKj+opjF
 MvdK+EqCAeZfF/zrwvIFBSz0rbhNKje6OT8iDU1Xha2YmabXJy5T0QXerDguF1P0
 jJxrENPlhEVGFyh+9ObqgGCsMdRAnNeHyIgrg+nqdys7k4+PKtwopdyC6sb8cH6t
 ok2zPAJuStGsW8USA5afhLU4qrL9kCEMH0tDWq2RdN27EYVJGAnp0O2Yxa20cxLh
 pMNZ70KfvkbQkv2nf+ZyMEB5z27JR6hk9GJcKit3y4VCa6gIQfBxlVFBHqJD1q4f
 ugQDV/pRH/KSktd/9XHcPf6yD8njpfqpZtBLFY5AlG6xns6oImHmwM+3Dp4Glsh5
 5oAh8fp6BOKiqZt7lc24h1HJZB6G8FyWhhuRaTNYfLdX66GTrAkq5BvclKvLzbsj
 SbW7o8zKNLeYPbNyC4jYt6/e5MWGhg2SFHv3Aa8N919n1MjfRumn1KbjrAeMU1zu
 fYh3EzMclBKKL+cOwVfb14tbE0OnpB8XJ6ipPWiCIQ9E8WeGhEsyDoFUivNt0IPN
 t3dGAuTUqKC0PRF2kJ1ct5pni03G2B0iiQopTQxB8Ca5dMUQ0S8=
 =YRMA
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.18

  - External interrupt (INTC-EX) support for the R-Car V3U SoC,
  - Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
    RZ/V2L SMARC EVK development boards,
  - Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
    and Condor development boards,
  - NAND support for the RZ/N1D SoC,
  - DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
  - LVDS support for the R-Car M3-W+ SoC,
  - HDMI output and 9-axis sensor support for the Kingfisher (ULCB
    extension) board,
  - MAX96712 GMSL serializer support for the Falcon development board,
  - MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
    SoCs,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (27 commits)
  arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection
  arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
  arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
  arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings
  arm64: dts: renesas: rzg2l-smarc: Add common dtsi file
  arm64: dts: renesas: rzg2lc-smarc: Enable microSD on SMARC platform
  arm64: dts: renesas: rzg2lc-smarc-som: Enable eMMC on SMARC platform
  arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK
  arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC
  dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
  arm64: dts: renesas: ulcb/ulcb-kf: switch to use audio-graph-card2 for sound
  arm64: dts: renesas: rcar-gen3: Add MOST devices
  arm64: dts: renesas: Miscellaneous whitespace fixes
  arm64: dts: renesas: falcon-csi-dsi: Add and connect MAX96712
  arm64: dts: renesas: ulcb-kf: Add 9-asix sensor device
  arm64: dts: renesas: ulcb-kf: Add KF HDMI output
  arm64: dts: renesas: r8a77961: Add lvds0 device node
  arm64: dts: renesas: r8a779f0: Add sys-dmac nodes
  ARM: dts: r9a06g032: Describe the NAND controller
  arm64: dts: renesas: Add GMSL cameras .dtsi
  ...

Link: https://lore.kernel.org/r/cover.1644587200.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 15:23:12 +01:00
Robert Marko
440c7317e4 dt-bindings: reset: Add Delta TN48M
Add header for the Delta TN48M CPLD provided
resets.

Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Link: https://lore.kernel.org/r/20220131133049.77780-4-robert.marko@sartura.hr
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25 09:59:35 +01:00
Luca Weiss
d148363684 dt-bindings: power: rpmpd: Add MSM8226 to rpmpd binding
Add compatible and constants for the power domains exposed by the
MSM8226 RPM.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220220223004.507739-1-luca@z3ntu.xyz
2022-02-24 14:12:34 -06:00
Vidya Sagar
a4ad66da3f dt-bindings: memory: Add Tegra234 PCIe memory
Add the memory client and stream ID definitions for the PCIe hardware
found on Tegra234 SoCs.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24 20:00:25 +01:00
Vidya Sagar
6460278f6f dt-bindings: power: Add Tegra234 PCIe power domains
Add power domain IDs for the four PCIe power partitions found on
Tegra234.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24 19:57:17 +01:00
Vidya Sagar
d06a171e07 dt-bindings: Add Tegra234 PCIe clocks and resets
Add the clocks and resets used by the PCIe hardware found on
Tegra234 SoCs.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24 19:56:16 +01:00
Mohan Kumar
07d743902a dt-bindings: Add HDA support for Tegra234
Add hda clocks, memory ,power and reset binding entries
for Tegra234.

Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24 18:34:33 +01:00
Jean-Jacques Hiblot
a3a59919ab dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock
This clock is actually the REF_SYNC_D8 clock.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220221095032.95054-2-jjhiblot@traphandler.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-24 13:48:08 +01:00
Sameer Pujar
40efe139ff dt-bindings: Add Tegra234 APE support
Add clocks, power-domain and memory bindings to support APE subsystem
on Tegra234.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-17 15:21:43 +01:00
Samuel Holland
8487614a8a dt-bindings: rtc: sun6i: Add H616, R329, and D1 support
These new RTC variants all have a single alarm, like the R40 variant.

For the new SoCs, start requiring a complete list of input clocks. The
H616 has three required clocks. The R329 also has three required clocks
(but one is different), plus an optional crystal oscillator input. The
D1 RTC is identical to the one in the R329.

And since these new SoCs will have a well-defined output clock order as
well, they do not need the clock-output-names property.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20220203021736.13434-3-samuel@sholland.org
2022-02-15 23:14:59 +01:00
Greg Kroah-Hartman
1e7f32f776 Linux 5.17-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAmIJZmoeHHRvcnZhbGRz
 QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGZdoH/04d8zUhM3Fd3ACB
 V/ONtOXmkfP2mEJSjb7cXTN1EM2SlOBdSnSsEw09FtGhjHABjOnLho4J5ixk9TH8
 zNMNI3EMksM2T9KadHwxv8Vvp1LTrWRzMbws8tOCPA0RkOpikJfClC8CzRAyidJ3
 cAbbDH/Jl1GnVZ8bpKmv2auYt+kNVGb0cwJ2W8phCwwkL7sLky5tgYeaGiJEXbJf
 Tfi/3qtFdmYjD8wtYnCfzjnB7suG5nF7rGEnxCIxNi+IA4DieUv2c1KchuoaBfT9
 df364VjKaGT3j+GB07ksQ/8mkwWiRXsCzOXAyMZSZaWjdMD4aAhCTJak5j7/TvGC
 wtgHPww=
 =/CMW
 -----END PGP SIGNATURE-----

Merge 5.17-rc4 into staging-testing

We need the staging driver fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-14 09:02:51 +01:00
Lucas Stach
38294f6158 dt-bindings: power: imx8mp: add defines for HSIO blk-ctrl domains
This adds the defines for the power domains provided by the HSIO
blk-ctrl on the i.MX8MP.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-02-13 10:01:51 +08:00
Lucas Stach
39d01d9c45 dt-bindings: power: add defines for i.MX8MP power domain
This adds the DT defines for the GPC power domains found on the
i.MX8MP SoC.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-02-13 10:01:34 +08:00
Lucas Stach
7a7b1414ea dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains
This adds the defines for the power domains provided by the VPU
blk-ctrl on the i.MX8MQ.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-02-11 10:49:26 +08:00
Loic Poulain
85cedb4e0c dt-bindings: clock: Add qualcomm QCM2290 DISPCC bindings
Add device tree bindings for display clock controller on QCM2290 SoCs.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1644432308-21099-1-git-send-email-loic.poulain@linaro.org
2022-02-10 17:56:10 -06:00
Vincent Whitchurch
2f04aa69ab
regulator: Add bindings for TPS62864x
Add bindings for the TPS62864/TPS6286/TPS62868/TPS62869 voltage
regulators.

Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Link: https://lore.kernel.org/r/20220204155241.576342-2-vincent.whitchurch@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-08 13:38:08 +00:00
Arnd Bergmann
486343d372 Fixes for omaps
A series of fixes for omap variants for minor issues, and a fix for a timer
 regression for some omap3 beagleboard versions.
 
 The timer fix needs to patch both the dts and the timer code because
 otherwise the timer quirk handling for old dtbs will prevent the dts fix
 from working.
 
 The other changes are for issues found by automated analysis, a macasp
 typo fix, and two cosmetic fixes for clocks.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmHb5fkRHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXOcDg//QnxhGDK1d7QSB83LxLmy1hIi5AZiOSAM
 o4z9inNotFNdAN52pxYL1ywh/OtF2+mRtbDlnprEqJ5DCl0UC6J9FGc2fmA+wO+J
 KUvEmlQ/kZ9YKPAN8pY2C/sfls4UcMrcW2NNwsrM+YKLHlZp2xqvzLUSkhpssADu
 fSTIwB+cCuPQKCWe7vKTb85ZY0lL/TKtr8rUkIMpjV3xbzhp9lxOjn/yBPqmVyWy
 Vf/BxJJMlo0JVI6QnpXFfodCg7JZvz/tytfX+UWSsbSga27phB1LlZqafFudzT3m
 PQCS+SJW2Nsa7ol2niDENFaw5ufUEj/YPedTzteuZua80F/ZHmc4YWW6tNnZRAlr
 eLc1NbB0S/IQ+FhEIgmxcwc9K8s5xqoCNuxdvcMi3RZVyS1GfOnRkuI0FaoR3B9F
 RrREO/ts1JUTSB4/Tb8oDJRbP99IA7lpWzFNiKka0MIv7yZsz0EXAh3JXl20KkT3
 izTTNie8ISMDRfZOEdkAaJEszRTbQbUTrZjMvF9I8igRH7Dg+Ea4CQHHX8Rf2bDw
 ltj7L9eTgnYHVU8bwUBqPSzfCi6fcAQLlfJpK1VOcNnN8ZJzYnosi7pH+OFTDn+V
 rd6Pfs4opo4wofue/oWot8xtEXuQD27RHRCF7oRrhxBbn0t0n3zT5fJk8ErMJfYj
 gy4+xsMVNoo=
 =hMu7
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIBTAUACgkQmmx57+YA
 GNlaVQ//ZbsAo+lxUQbMl7XZ8k9ATrYnY99c3KY0c6Nl3vaf9gR6VFJ3Wy+Z1EeY
 55lIwVXQ0XriUjw+O5DulWg97aHBvMhgsMRwHShdVHTFekDzod3wtixObfPdXEa9
 oesKiYEjyPEHnjqrRJf7bOP+Ah6jc3BUtqVUIQ6Ks33q+rCGEy16vLIa4q10keqH
 qq/CNCZrkBUmpCtVD9wjFuVzsXcdbFVWuWfF9/cdj6M5IZ2J1ZOE6K2fbTd7Aidn
 CsT5KWQU7jp9WrSGDlyVgYcKWrav0vVHCDRszjXbDdhauCTBl7wVUmmsy9yhhwIl
 ro91Q5yJR6bBuzeVlab2Y5S5Y3M7garHSzquZIHGr0/B3SevAmWczwwfEOHj5qZ8
 2tEN5KmHxBNmez8m6L50rUeLamfcLwQgWGgUatyEyudLOYlqTuFA4u0ck/AFefvE
 +QNhohngSxifXzIERW45E2V6NkGH2O877M/TbUPxcjBBYu6QhSgIfwvx1IlWGjTb
 kH4Ucod6m34PNVbGQbaxAQrN3CrYkHzRdZ6CRFYpEufRdxSQso9hv0FaAxf0YukP
 Zlf76V58fjpoORd8dWwQMZrNA7eVPI46rud0gLWNHw7f1LdascHzaQIdAY1fEUyt
 Wldd/uOzRPNYcN+9uDDDPciUi5Ws3cOG533WoYjHu0CmbxfQN/Q=
 =iogZ
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.17/fixes-for-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps

A series of fixes for omap variants for minor issues, and a fix for a timer
regression for some omap3 beagleboard versions.

The timer fix needs to patch both the dts and the timer code because
otherwise the timer quirk handling for old dtbs will prevent the dts fix
from working.

The other changes are for issues found by automated analysis, a macasp
typo fix, and two cosmetic fixes for clocks.

* tag 'omap-for-v5.17/fixes-for-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: Don't use legacy clock defines for dra7 clkctrl
  clk: ti: Move dra7 clock devices out of the legacy section
  ARM: dts: Fix timer regression for beagleboard revision c
  ARM: dts: am335x-wega: Fix typo in mcasp property rx-num-evt
  ARM: OMAP2+: adjust the location of put_device() call in omapdss_init_of
  ARM: OMAP2+: hwmod: Add of_node_put() before break

Link: https://lore.kernel.org/r/pull-1641801310-149268@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-07 17:42:44 +01:00
Marc Zyngier
74703b13f9 dt-bindings: apple,aic: Add CPU PMU per-cpu pseudo-interrupts
Advertise the two pseudo-interrupts that tied to the two PMU
flavours present in the Apple M1 SoC.

We choose the expose two different pseudo-interrupts to the OS
as the e-core PMU is obviously different from the p-core one,
effectively presenting two different devices.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-02-07 16:00:41 +00:00
Akhil R
38eb21a5fc dt-bindings: Add headers for Tegra234 PWM
Add dt-bindings header files for PWM of Tegra234

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-03 18:43:17 +01:00
Akhil R
bb747becf8 dt-bindings: Add headers for Tegra234 I2C
Add dt-bindings header files for I2C controllers for Tegra234

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-03 18:43:00 +01:00
Biju Das
4decd2e54b dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
Define RZ/V2L (R9A07G054) Clock Pulse Generator Core Clock and module
clock outputs, as listed in Table 7.1.4.2 ("Clock List r1.0") and also
add Reset definitions referring to registers CPG_RST_* in Section 7.2.3
("Register configuration") of the RZ/V2L Hardware User's Manual (Rev.
1.00, Nov. 2021).

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220126211003.6675-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-02 09:06:22 +01:00
Wells Lu
340407d214 dt-bindings: pinctrl: Add dt-bindings for Sunplus SP7021
Add dt-bindings header files and documentation for Sunplus SP7021 SoC.

Signed-off-by: Wells Lu <wellslutw@gmail.com>
Link: https://lore.kernel.org/r/1642344734-27229-2-git-send-email-wellslutw@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-30 02:55:41 +01:00
Qianggui Song
1713a8de4a dt-bindings: gpio: Add a header file for Amlogic Meson S4
Add a new dt-binding header file which documents the detail pin names.

Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
Link: https://lore.kernel.org/r/20220113031044.2665-3-qianggui.song@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-30 02:52:45 +01:00
Giulio Benetti
a81595729b dt-bindings: imx: Add clock binding for i.MXRT1050
Add the clock binding doc for i.MXRT1050.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
[Jesse: added clocks from IMXRT1050_CLK_IPG_PDOF to
IMXRT1050_CLK_DMA_MUX and moved IMXRT1050_CLK_END on]
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20220111215415.2075257-4-Mr.Bossman075@gmail.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2022-01-29 15:12:06 +02:00
Sergio Paracuellos
f383b07706 dt-bindings: reset: add dt binding header for Mediatek MT7621 resets
Add dt binding header for resets lines in Mediatek MT7621 SoCs.

Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20220110114930.1406665-2-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-26 13:04:46 +01:00
Alim Akhtar
d6dc675377 dt-bindings: clock: Add bindings definitions for FSD CMU blocks
Clock controller driver of FSD platform is designed to have separate
instances for each particular CMU. So clock IDs in this bindings header
also start from 1 for each CMU block.

Cc: linux-fsd@tesla.com
Reported-by: kernel test robot <lkp@intel.com>
[robot: reported missing #endif]
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-3-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2022-01-26 10:21:39 +01:00
Daniel Mack
68643c3735 dt-bindings: clock: cs2000-cp: document aux-output-source
This new optional property can be used to control the function of the
auxiliary output pin. Introduce a new dt-bindings include file that
contains the numerical values.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220125093336.226787-3-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-25 14:23:15 -08:00
Tudor Ambarus
a5ab04af49 clk: at91: sama7g5: Allow MCK1 to be exported and referenced in DT
MCK1 feeds the External Bus Interface (EBI). EBI's clock rate is used
to translate EBI's timmings to SMC timings, thus we need to handle MCK1
in the EBI driver. Allow MCK1 to be referenced as a PMC_TYPE_CORE clock
from phandle in DT.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20220111125310.902856-1-tudor.ambarus@microchip.com
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24 17:05:45 -08:00
Zixun LI
ea2be22f3d clk: at91: allow setting PMC_AUDIOPINCK clock parents via DT
Make AUDIOPINCK accessible via phandle to select it
as peripheral clock parent using assigned-clock-parents in DT
where available.

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Claudiu Beznea <Claudiu.Beznea@microchip.com>
Link: https://lore.kernel.org/r/20220111142051.37957-1-admin@hifiphile.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24 17:05:34 -08:00
Daire McNamara
2145bb687e dt-bindings: clk: microchip: Add Microchip PolarFire host binding
Add device tree bindings for the Microchip PolarFire system
clock controller

Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211216140022.16146-2-conor.dooley@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24 16:25:59 -08:00
Ariel D'Alessandro
6045ffd366
ASoC: tlv320aic31xx: Define PLL clock inputs
Add constants for the different PLL clock inputs in tlv320aic31xx.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Link: https://lore.kernel.org/r/20220117132109.283365-3-ariel.dalessandro@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24 13:31:53 +00:00
Ariel D'Alessandro
85f856f790
ASoC: Rename tlv320aic31xx-micbias.h as tlv320aic31xx.h
Let's use a more generic name, so other definitions for tlv320aic31xx
can be included.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220117132109.283365-2-ariel.dalessandro@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24 13:31:52 +00:00
Linus Torvalds
3bad80dab9 Char/Misc and other driver changes for 5.17-rc1
Here is the large set of char, misc, and other "small" driver subsystem
 changes for 5.17-rc1.
 
 Lots of different things are in here for char/misc drivers such as:
 	- habanalabs driver updates
 	- mei driver updates
 	- lkdtm driver updates
 	- vmw_vmci driver updates
 	- android binder driver updates
 	- other small char/misc driver updates
 
 Also smaller driver subsystems have also been updated, including:
 	- fpga subsystem updates
 	- iio subsystem updates
 	- soundwire subsystem updates
 	- extcon subsystem updates
 	- gnss subsystem updates
 	- phy subsystem updates
 	- coresight subsystem updates
 	- firmware subsystem updates
 	- comedi subsystem updates
 	- mhi subsystem updates
 	- speakup subsystem updates
 	- rapidio subsystem updates
 	- spmi subsystem updates
 	- virtual driver updates
 	- counter subsystem updates
 
 Too many individual changes to summarize, the shortlog contains the full
 details.
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYeGNAQ8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymoVgCg1CPjMu8/SDj3Sm3a1UMQJn9jnl8AnjQcEp3z
 hMr9mISG4r6g4PvjrJBj
 =9May
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver updates from Greg KH:
 "Here is the large set of char, misc, and other "small" driver
  subsystem changes for 5.17-rc1.

  Lots of different things are in here for char/misc drivers such as:

   - habanalabs driver updates

   - mei driver updates

   - lkdtm driver updates

   - vmw_vmci driver updates

   - android binder driver updates

   - other small char/misc driver updates

  Also smaller driver subsystems have also been updated, including:

   - fpga subsystem updates

   - iio subsystem updates

   - soundwire subsystem updates

   - extcon subsystem updates

   - gnss subsystem updates

   - phy subsystem updates

   - coresight subsystem updates

   - firmware subsystem updates

   - comedi subsystem updates

   - mhi subsystem updates

   - speakup subsystem updates

   - rapidio subsystem updates

   - spmi subsystem updates

   - virtual driver updates

   - counter subsystem updates

  Too many individual changes to summarize, the shortlog contains the
  full details.

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (406 commits)
  counter: 104-quad-8: Fix use-after-free by quad8_irq_handler
  dt-bindings: mux: Document mux-states property
  dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC
  counter: remove old and now unused registration API
  counter: ti-eqep: Convert to new counter registration
  counter: stm32-lptimer-cnt: Convert to new counter registration
  counter: stm32-timer-cnt: Convert to new counter registration
  counter: microchip-tcb-capture: Convert to new counter registration
  counter: ftm-quaddec: Convert to new counter registration
  counter: intel-qep: Convert to new counter registration
  counter: interrupt-cnt: Convert to new counter registration
  counter: 104-quad-8: Convert to new counter registration
  counter: Update documentation for new counter registration functions
  counter: Provide alternative counter registration functions
  counter: stm32-timer-cnt: Convert to counter_priv() wrapper
  counter: stm32-lptimer-cnt: Convert to counter_priv() wrapper
  counter: ti-eqep: Convert to counter_priv() wrapper
  counter: ftm-quaddec: Convert to counter_priv() wrapper
  counter: intel-qep: Convert to counter_priv() wrapper
  counter: microchip-tcb-capture: Convert to counter_priv() wrapper
  ...
2022-01-14 16:02:28 +01:00
Linus Torvalds
3ceff4ea07 sound updates for 5.17-rc1
It's a relatively calm development cycle, but still lots of updates in
 the driver side like Intel SOF.  Below are some highlights:
 
 * ALSA / ASoC core:
 - A new kselftest for ALSA control API
 - PCM NO_REWINDS support
 - Potential race fixes around control removals
 - Unify x86 SG-buffer memory allocation code
 - Cleanups and race fixes for ASoC DPCM locking
 
 * ASoC:
 - Refinements and cleanups around the delay() APIs
 - Wider use of dev_err_probe().
 - Continuing cleanups and improvements to the SOF code
 - Support for pin switches in simple-card derived cards
 - Support for AMD Renoir ACP, Asahi Kasei Microdevices AKM4375, Intel
   systems using NAU8825 and MAX98390, Mediatek MT8915, nVidia Tegra20
   S/PDIF, Qualcomm systems using ALC5682I-VS and Texas Instruments
   TLV320ADC3xxx
 
 * HD-audio / USB-audio:
 - Fix deadlock at HD-audio codec unbinding
 - Fixes for Tegra194 HD-audio, new HDA support for CS35L41 codec
 - Quirks for Lenovo and HP machines, Gigabyte mobo, Bose device
 
 * Misc:
 - Fix virmidi drain behavior
 
 Note that the merge of CS35L41 codec support is still half-baked, and
 at least one ACPI change is missing.  Although this won't hinder the
 kernel build itself, we're going to catch up before RC1.
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmHgHvgOHHRpd2FpQHN1
 c2UuZGUACgkQLtJE4w1nLE9/JBAAk1qY+2GE7a2j/dRW31rv2JxS3iMnCIdnp/Hn
 c0mArt8iEDPXbgmQ2b+tnuqh5GSz073UPCorxkEdAkYisbGSzk22VnfWsNwbSEgC
 p8Tqt8ma1blQWUYGzszQEN9u9BCLaMr1cO/ORZmD/f7hSq5W42Q8IYLTb1/9gdax
 +pJyBg8Y52PAKURnKWzmDoasJeDoQauxZ9R0g3BgQHj8Hb3QHQonyqKxJlyFac/e
 RyV7YycM2ES3Dj4u7TReRd9hdKeuzc2Wg8qYVC3x/9dzhKpvDM3Tg5ONw/58jW4x
 G6tuEj5SeEKH2LRQYTOLYScz9lVUalv97PCsq5LkQrDLqrO3hT+vxQpRdBZefRIQ
 +cKBd9GReRlQW9XCDrUs9ZuWtl1cyta8T3mk3WhTvjUcTlr1vd+TcyRoQvNhFNVH
 LaTjD1526Yra8BxyzSe7tyHhvOIvRWwjzSfwCyYV9097wV82+rOReqHyMDhN7Djc
 NbBQvoIh7v1Yo+hOYE3RUUhS5h+CJH8l43J1pWNODjXVYivYTzCOizDdJ8ktRaHE
 gpQ1vAM4pW1R5mQsyIwj6G9B1bclYboVBjlE9SXCpT3vmDneIWuLUmNV89gyNW+p
 96B3dL4BoCTyBtGYBtow2Es+/rX2dEWtM6pvOSHhRDoWL586Snr2lXDEbAQ9uZF9
 zpq1uqs=
 =csTR
 -----END PGP SIGNATURE-----

Merge tag 'sound-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "It's a relatively calm development cycle, but still lots of updates in
  the driver side like Intel SOF. Below are some highlights:

  ALSA / ASoC core:
   - A new kselftest for ALSA control API
   - PCM NO_REWINDS support
   - Potential race fixes around control removals
   - Unify x86 SG-buffer memory allocation code
   - Cleanups and race fixes for ASoC DPCM locking

  ASoC:
   - Refinements and cleanups around the delay() APIs
   - Wider use of dev_err_probe().
   - Continuing cleanups and improvements to the SOF code
   - Support for pin switches in simple-card derived cards
   - Support for AMD Renoir ACP, Asahi Kasei Microdevices AKM4375, Intel
     systems using NAU8825 and MAX98390, Mediatek MT8915, nVidia Tegra20
     S/PDIF, Qualcomm systems using ALC5682I-VS and Texas Instruments
     TLV320ADC3xxx

  HD-audio / USB-audio:
   - Fix deadlock at HD-audio codec unbinding
   - Fixes for Tegra194 HD-audio, new HDA support for CS35L41 codec
   - Quirks for Lenovo and HP machines, Gigabyte mobo, Bose device

  Misc:
   - Fix virmidi drain behavior

  Note that the merge of CS35L41 codec support is still half-baked, and
  at least one ACPI change is missing. Although this won't hinder the
  kernel build itself, we're going to catch up before RC1"

* tag 'sound-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (415 commits)
  ALSA: hda: intel-dsp-config: reorder the config table
  ALSA: hda: intel-dsp-config: add JasperLake support
  ALSA: hda: cs35l41: fix double free on error in probe()
  ALSA: hda: Fix dependencies of CS35L41 on SPI/I2C buses
  ALSA: hda: Fix dependency on ASoC cs35l41 codec
  ASoC: cs35l41: Add support for hibernate memory retention mode
  ASoC: cs35l41: Update handling of test key registers
  ALSA: intel_hdmi: Check for error num after setting mask
  ASoC: wcd9335: Keep a RX port value for each SLIM RX mux
  ASoC: amd: acp: acp-mach: Change default RT1019 amp dev id
  ALSA: virmidi: Remove duplicated code
  ALSA: seq: virmidi: Add a drain operation
  ASoC: topology: Fix typo
  ASoC: fsl_asrc: refine the check of available clock divider
  ASoC: Intel: bytcr_rt5640: Add support for external GPIO jack-detect
  ASoC: Intel: bytcr_rt5640: Support retrieving the codec IRQ from the AMCR0F28 ACPI dev
  ASoC: rt5640: Add support for boards with an external jack-detect GPIO
  ASoC: rt5640: Allow snd_soc_component_set_jack() to override the codec IRQ
  ASoC: rt5640: Change jack_work to a delayed_work
  ASoC: rt5640: Fix possible NULL pointer deref on resume
  ...
2022-01-14 14:55:38 +01:00
Linus Torvalds
fb3b0673b7 - qcom: misc updates to qcom-ipcc driver
- mpfs: change compatible string
 - pcc: fix handling of subtypes
 		avoid uninit variable
 - mtk: add missing of_node_put
 		enable control_by_sw
 		silent probe-defer prints
 		fix gce_num for mt8192
 - zynq: add missing of_node_put
 - imx: check for NULL instead of IS_ERR
 - appple: switch to generic compatibles
 - hi3660: convert comments to kernel-doc notation
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmHeb5AACgkQf9lkf8eY
 P5Vb9A//Q0a3TGr2NuRrgWy1JETOVTsbhDQXqMwkUJggyjXHQheXPLthh7NWAaCQ
 GDE7YBBImNVlkRZs7RevhTTN+IKfVDI9LzQnNODtm4ADvLPQvehN2xWieAORlJpb
 SYRJR1jQEcDPTk36C5EQNYQJvyIInXZvuBcRQHtyic7rbyCuxoTR4VFAj+ufmqRI
 NWk6vNr588lX1zOVy75/YPW7rzijUh709GFdArTdD2SqoQlOH/C1zUkpufpIBFvt
 b1REcOhhrTz1vZ96UnCeGBUKLjcQbWv8/fFODHmEdz//+Rl62GgI4SNuEUJ50b6n
 SSjAtf85r+de5f0Js4JnEIj+V9DcTjr3eVDaMYkQX/DQdzWVFl3jhXkXAFAKc6T2
 fzyPwdRgSAqwwweZkgX9OfH0TahS53qh6tleNXUufSWXVYkecbCC2/IRoymc3QAM
 sEPvmok4NAooP636cMRTD0deBYx0BO3/UWGm258hwRfpgMjjzQPiRiIRoeA5tiXt
 mjSPcljVNFbr2TQvPenJ0yjaBTiAJM7BV9bHeguprCYPPp4nNccr0q6MUmGDQlg+
 xdc4xUiARzumTI/uhcTTBYX92uXLBeEAwtisRUbXxrcnH3PIPVIffIyS15J++2M6
 Gl3AlBPFc1Tt+0sKorzgcDlbmrT+creEVdVRxRstQ1qnWZUcSQM=
 =8ZvF
 -----END PGP SIGNATURE-----

Merge tag 'mailbox-v5.17' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - qcom: misc updates to qcom-ipcc driver

 - mpfs: change compatible string

 - pcc:
     - fix handling of subtypes
     - avoid uninitialized variable

 - mtk:
     - add missing of_node_put
     - enable control_by_sw
     - silent probe-defer prints
     - fix gce_num for mt8192

 - zynq: add missing of_node_put

 - imx: check for NULL instead of IS_ERR

 - appple: switch to generic compatibles

 - hi3660: convert comments to kernel-doc notation

* tag 'mailbox-v5.17' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  dt-bindings: mailbox: Add more protocol and client ID
  mailbox: qcom-ipcc: Support interrupt wake up from suspend
  mailbox: qcom-ipcc: Support more IPCC instance
  mailbox: qcom-ipcc: Dynamic alloc for channel arrangement
  mailbox: change mailbox-mpfs compatible string
  mailbox: pcc: Handle all PCC subtypes correctly in pcc_mbox_irq
  mailbox: pcc: Avoid using the uninitialized variable 'dev'
  mailbox: mtk: add missing of_node_put before return
  mailbox: zynq: add missing of_node_put before return
  mailbox: imx: Fix an IS_ERR() vs NULL bug
  mailbox: hi3660: convert struct comments to kernel-doc notation
  mailbox: add control_by_sw for mt8195
  mailbox: mtk-cmdq: Silent EPROBE_DEFER errors for clks
  mailbox: fix gce_num of mt8192 driver data
  mailbox: apple: Bind to generic compatibles
  dt-bindings: mailbox: apple,mailbox: Add generic and t6000 compatibles
2022-01-13 11:19:07 -08:00
Linus Torvalds
455e73a07f We have a couple patches in the framework core this time around but
they're mostly minor cleanups and some debugfs stuff. The real work
 that's in here is the typical pile of clk driver updates and new SoC
 support. Per usual (or maybe just recent trends), Qualcomm gains a
 handful of SoC drivers additions and has the largest diffstat. After
 that there are quite a few updates to the Allwinner (sunxi) drivers to
 support modular drivers and Renesas is heavily updated to add more
 support for various clks. Overall it looks pretty normal.
 
 New Drivers:
  - Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
  - MediaTek mt7986 SoC basic support
  - Clock and reset driver for Toshiba Visconti SoCs
  - Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)
  - Allwinner D1 clks
  - Lan966x Generic Clock Controller driver and associated DT bindings
  - Qualcomm SDX65, SM8450, and MSM8976 GCC clks
  - Qualcomm SDX65 and SM8450 RPMh clks
 
 Updates:
  - Set suppress_bind_attrs to true for i.MX8ULP driver
  - Switch from do_div to div64_ul for throughout all i.MX drivers
  - Fix imx8mn_clko1_sels for i.MX8MN
  - Remove unused IPG_AUDIO_ROOT from i.MX8MP
  - Switch parent for audio_root_clk to audio ahb in i.MX8MP driver
  - Removal of all remaining uses of __clk_lookup() in drivers/clk/samsung
  - Refactoring of the CPU clocks registration to use common interface
  - An update of the Exynos850 driver (support for more clock domains)
    required by the E850-96 development board
  - Prep for runtime PM and generic power domains on Tegra
  - Support modular Allwinner clk drivers via platform bus
  - Lan966x clock driver extended to support clock gating
  - Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
    thermal (TSU) clocks and resets on Renesas RZ/G2L
  - Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2 clock
    drivers, and in the Renesas SDHI driver
  - Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable
  - Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC
  - Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
  - Add GPU clock and resets on Renesas RZ/G2L
  - Add clk-provider.h to various Qualcomm clk drivers
  - devm version of clk_hw_register_gate()
  - kerneldoc fixes in a couple drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmHfOa8RHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSX+Ew/9FaQLRh3ahN+qF8VMJ1K9qUciYBlU+UtC
 excKfTkJg+1JGMP8dGSRSi/aC/UyLPb0dJDRMKcSZPYIScP+wc3HJHm4i+CpxDcn
 /wXPW3tvY1CkVq1P7/baesoNiIle5zqpl4+0w9CN5KuoXctc35Pr1GqJ/C0XsDfQ
 DS3lpck65tr7Wy1muChT1ZR+7hGv6K7olR7FDYNVSDtfJcaOZENSLgbPF6eea0FR
 /dl+6o1COF23XAGF1GJg88DYRgnEqxLsfFTaC6Hz8DeQdKBVh9GF6tpgLhk7vsaG
 gcRZxU24KaUw0lNZGdzmagy8ZJ6aZhcuzXQKN9VecbTIhRYNTWmB1VsvbhhEVb1T
 96kBAp/II1JZdh/8W7uOmg4Ahupap5+f6JKMfR3zD4aDXkNDsxyXBA5AXtC0GPGN
 5340WiJsBz/dD9/YE+mQ7YZKhdvKaGEVbmVUpQHceapeTBk4EIHKSVIq5sKd7qiq
 ZHxOIizx5MgBJyoSeIxkB3j0KvwSTDNz6WM2F9gnNNtGfuSlA4NAnO1davINNQun
 +seP+deBviUl+P2u9iodRApfCiEuM3mA548KTba/Z1nJ7sN93/qrqr1FBAUSqY+k
 xNRXfXIzlOY9ifm6PlvU8QUK0XVtKjt0ld7pFzRkf6EU523DwzL2I2XIY2Eve2vA
 LaDihwcKyR0=
 =jB+l
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "We have a couple patches in the framework core this time around but
  they're mostly minor cleanups and some debugfs stuff. The real work
  that's in here is the typical pile of clk driver updates and new SoC
  support.

  Per usual (or maybe just recent trends), Qualcomm gains a handful of
  SoC drivers additions and has the largest diffstat. After that there
  are quite a few updates to the Allwinner (sunxi) drivers to support
  modular drivers and Renesas is heavily updated to add more support for
  various clks.

  Overall it looks pretty normal.

  New Drivers:
   - Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
   - MediaTek mt7986 SoC basic support
   - Clock and reset driver for Toshiba Visconti SoCs
   - Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)
   - Allwinner D1 clks
   - Lan966x Generic Clock Controller driver and associated DT bindings
   - Qualcomm SDX65, SM8450, and MSM8976 GCC clks
   - Qualcomm SDX65 and SM8450 RPMh clks

  Updates:
   - Set suppress_bind_attrs to true for i.MX8ULP driver
   - Switch from do_div to div64_ul for throughout all i.MX drivers
   - Fix imx8mn_clko1_sels for i.MX8MN
   - Remove unused IPG_AUDIO_ROOT from i.MX8MP
   - Switch parent for audio_root_clk to audio ahb in i.MX8MP driver
   - Removal of all remaining uses of __clk_lookup() in
     drivers/clk/samsung
   - Refactoring of the CPU clocks registration to use common interface
   - An update of the Exynos850 driver (support for more clock domains)
     required by the E850-96 development board
   - Prep for runtime PM and generic power domains on Tegra
   - Support modular Allwinner clk drivers via platform bus
   - Lan966x clock driver extended to support clock gating
   - Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
     thermal (TSU) clocks and resets on Renesas RZ/G2L
   - Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2
     clock drivers, and in the Renesas SDHI driver
   - Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable
   - Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC
   - Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
   - Add GPU clock and resets on Renesas RZ/G2L
   - Add clk-provider.h to various Qualcomm clk drivers
   - devm version of clk_hw_register_gate()
   - kerneldoc fixes in a couple drivers"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (131 commits)
  clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup()
  clk: mediatek: add mt7986 clock support
  clk: mediatek: add mt7986 clock IDs
  dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
  clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
  clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
  clk: x86: Fix clk_gate_flags for RV_CLK_GATE
  clk: x86: Use dynamic con_id string during clk registration
  ACPI: APD: Add a fmw property clk-name
  drivers: acpi: acpi_apd: Remove unused device property "is-rv"
  x86: clk: clk-fch: Add support for newer family of AMD's SOC
  clk: ingenic: Add MDMA and BDMA clocks
  dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
  clk: bm1880: remove kfrees on static allocations
  clk: Drop unused COMMON_CLK_STM32MP157_SCMI config
  clk: st: clkgen-mux: search reg within node or parent
  clk: st: clkgen-fsyn: search reg within node or parent
  clk: Enable/Disable runtime PM for clk_summary
  MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller
  clk: visconti: Add support common clock driver and reset driver
  ...
2022-01-12 17:02:27 -08:00
Huang Yiwei
869b6ca39c dt-bindings: mailbox: Add more protocol and client ID
Add more protocol and client ID which can be used in device
tree properties.

Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:33 -06:00
Stephen Boyd
4afd2a9355 Merge branches 'clk-ingenic' and 'clk-mediatek' into clk-next
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
 - MediaTek mt7986 SoC basic support

* clk-ingenic:
  clk: ingenic: Add MDMA and BDMA clocks
  dt-bindings: clk/ingenic: Add MDMA and BDMA clocks

* clk-mediatek:
  clk: mediatek: add mt7986 clock support
  clk: mediatek: add mt7986 clock IDs
  dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
  clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
  clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
2022-01-11 18:31:00 -08:00
Stephen Boyd
1d0bd126d9 Merge branches 'clk-socfpga', 'clk-toshiba', 'clk-st' and 'clk-bitmain' into clk-next
- Clock and reset driver for Toshiba Visconti SoCs

* clk-socfpga:
  clk: socfpga: s10: Make use of the helper function devm_platform_ioremap_resource()
  clk: socfpga: agilex: Make use of the helper function devm_platform_ioremap_resource()
  clk: socfpga: remove redundant assignment after a mask operation
  clk: socfpga: remove redundant assignment on division

* clk-toshiba:
  clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup()
  MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller
  clk: visconti: Add support common clock driver and reset driver
  dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC
  dt-bindings: clock: Add DT bindings for PLL of Toshiba Visconti TMPV770x SoC

* clk-st:
  clk: Drop unused COMMON_CLK_STM32MP157_SCMI config
  clk: st: clkgen-mux: search reg within node or parent
  clk: st: clkgen-fsyn: search reg within node or parent

* clk-bitmain:
  clk: bm1880: remove kfrees on static allocations
2022-01-11 18:30:50 -08:00
Stephen Boyd
f691c9b526 Merge branches 'clk-nvidia', 'clk-imx', 'clk-samsung' and 'clk-qcom' into clk-next
* clk-nvidia:
  clk: tegra: Support runtime PM and power domain
  clk: tegra: Make vde a child of pll_p on tegra114

* clk-imx:
  clk: imx8mp: Fix the parent clk of the audio_root_clk
  clk: imx8mp: Remove IPG_AUDIO_ROOT from imx8mp-clock.h
  clk: imx8mn: Fix imx8mn_clko1_sels
  clk: imx: Use div64_ul instead of do_div
  clk: imx: imx8ulp: set suppress_bind_attrs to true

* clk-samsung:
  clk: samsung: Add initial Exynos7885 clock driver
  clk: samsung: clk-pll: Add support for pll1417x
  clk: samsung: Make exynos850_register_cmu shared
  dt-bindings: clock: Document Exynos7885 CMU bindings
  dt-bindings: clock: Add bindings definitions for Exynos7885 CMU
  clk: samsung: exynos850: Add missing sysreg clocks
  dt-bindings: clock: Add bindings for Exynos850 sysreg clocks
  clk: samsung: exynos850: Register clocks early
  clk: samsung: exynos850: Keep some crucial clocks running
  clk: samsung: exynos850: Implement CMU_CMGP domain
  dt-bindings: clock: Add bindings for Exynos850 CMU_CMGP
  clk: samsung: exynos850: Implement CMU_APM domain
  dt-bindings: clock: Add bindings for Exynos850 CMU_APM
  clk: samsung: Update CPU clk registration
  clk: samsung: Remove meaningless __init and extern from header files
  clk: samsung: remove __clk_lookup() usage
  dt-bindings: clock: samsung: add IDs for some core clocks

* clk-qcom: (25 commits)
  clk: qcom: gcc-sc7280: Mark gcc_cfg_noc_lpass_clk always enabled
  clk: qcom: clk-alpha-pll: Increase PLL lock detect poll time
  clk: qcom: turingcc-qcs404: explicitly include clk-provider.h
  clk: qcom: q6sstop-qcs404: explicitly include clk-provider.h
  clk: qcom: mmcc-apq8084: explicitly include clk-provider.h
  clk: qcom: lpasscc-sdm845: explicitly include clk-provider.h
  clk: qcom: lpasscc-sc7280: explicitly include clk-provider.h
  clk: qcom: gcc-sm6350: explicitly include clk-provider.h
  clk: qcom: gcc-msm8994: explicitly include clk-provider.h
  clk: qcom: gcc-sm8350: explicitly include clk-provider.h
  clk: qcom: Add MSM8976/56 Global Clock Controller (GCC) driver
  dt-bindings: clk: qcom: Document MSM8976 Global Clock Controller
  clk: qcom: Add clock driver for SM8450
  clk: qcom: Add SDX65 GCC support
  clk: qcom: Add LUCID_EVO PLL type for SDX65
  dt-bindings: clock: Add SM8450 GCC clock bindings
  dt-bindings: clock: Add SDX65 GCC clock bindings
  clk: qcom: rpmh: add support for SM8450 rpmh clocks
  dt-bindings: clock: Add RPMHCC bindings for SM8450
  clk: qcom: smd-rpm: Drop binary value handling for buffered clock
  ...
2022-01-11 18:30:43 -08:00
Stephen Boyd
151768f348 Merge branches 'clk-x86', 'clk-stm', 'clk-amlogic' and 'clk-allwinner' into clk-next
* clk-x86:
  clk: x86: Fix clk_gate_flags for RV_CLK_GATE
  clk: x86: Use dynamic con_id string during clk registration
  ACPI: APD: Add a fmw property clk-name
  drivers: acpi: acpi_apd: Remove unused device property "is-rv"
  x86: clk: clk-fch: Add support for newer family of AMD's SOC
  clk: Introduce clk-tps68470 driver
  platform/x86: int3472: Deal with probe ordering issues
  platform/x86: int3472: Pass tps68470_regulator_platform_data to the tps68470-regulator MFD-cell
  platform/x86: int3472: Pass tps68470_clk_platform_data to the tps68470-regulator MFD-cell
  platform/x86: int3472: Add get_sensor_adev_and_name() helper
  platform/x86: int3472: Split into 2 drivers
  platform_data: Add linux/platform_data/tps68470.h file
  i2c: acpi: Add i2c_acpi_new_device_by_fwnode() function
  i2c: acpi: Use acpi_dev_ready_for_enumeration() helper
  ACPI: delay enumeration of devices with a _DEP pointing to an INT3472 device

* clk-stm:
  clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell

* clk-amlogic:
  clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBB

* clk-allwinner:
  clk: sunxi-ng: Add support for the D1 SoC clocks
  clk: sunxi-ng: gate: Add macros for gates with fixed dividers
  clk: sunxi-ng: mux: Add macros using clk_parent_data and clk_hw
  clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hw
  clk: sunxi-ng: div: Add macros using clk_parent_data and clk_hw
  dt-bindings: clk: Add compatibles for D1 CCUs
  clk: sunxi-ng: Allow the CCU core to be built as a module
  clk: sunxi-ng: Convert early providers to platform drivers
  clk: sunxi-ng: Allow drivers to be built as modules
  clk: sunxi-ng: Export symbols used by CCU drivers
2022-01-11 18:30:35 -08:00
Stephen Boyd
270bbc7253 Merge branches 'clk-doc', 'clk-renesas', 'clk-at91', 'clk-cleanup' and 'clk-debugfs' into clk-next
* clk-doc:
  clk: Gemini: fix struct name in kernel-doc
  clk: zynq: pll: Fix kernel-doc warnings
  clk: imx: pllv1: fix kernel-doc notation for struct clk_pllv1

* clk-renesas: (31 commits)
  clk: renesas: r9a07g044: Add GPU clock and reset entries
  clk: renesas: r9a07g044: Add mux and divider for G clock
  clk: renesas: r9a07g044: Rename CLK_PLL3_DIV4 macro
  clk: renesas: cpg-mssr: Add support for R-Car S4-8
  clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver
  dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
  dt-bindings: power: Add r8a779f0 SYSC power domain definitions
  clk: renesas: r9a07g044: Add TSU clock and reset entry
  mmc: renesas_sdhi: Simplify an expression
  mmc: renesas_sdhi: Use devm_clk_get_optional() to obtain CD clock
  dt-bindings: clock: renesas,cpg-mssr: Document r8a779f0
  clk: renesas: cpg-mssr: propagate return value of_genpd_add_provider_simple()
  clk: renesas: cpg-mssr: Check return value of pm_genpd_init()
  clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple()
  clk: renesas: rzg2l: Check return value of pm_genpd_init()
  clk: renesas: r9a07g044: Add RSPI clock and reset entries
  clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIV
  clk: renesas: rzg2l: Add CPG_PL1_DDIV macro
  mmc: renesas_sdhi: Parse DT for SDnH
  mmc: renesas_sdhi: Use dev_err_probe when getting clock fails
  ...

* clk-at91:
  clk: lan966x: Extend lan966x clock driver for clock gating support
  dt-bindings: clock: lan966x: Extend includes with clock gates
  dt-bindings: clock: lan966x: Extend for clock gate support
  clk: gate: Add devm_clk_hw_register_gate()
  clk: lan966x: Add lan966x SoC clock driver
  dt-bindings: clock: lan966x: Add LAN966X Clock Controller
  dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs

* clk-cleanup:
  clk: stm32mp1: remove redundant assignment to pointer data
  clk: __clk_core_init() never takes NULL
  clk: clk_core_get() can also return NULL
  clk/ti/adpll: Make const pointer error a static const array

* clk-debugfs:
  clk: Enable/Disable runtime PM for clk_summary
  clk: Emit a stern warning with writable debugfs enabled
  clk: Add write operation for clk_parent debugfs node
2022-01-11 18:30:10 -08:00
Linus Torvalds
c288ea6798 gpio updates for v5.17
- new testing module: gpio-sim that is scheduled to replace gpio-mockup
 - initial changes aiming at converting all GPIO drivers to using the fwnode
   interface and limiting any references to OF symbols to gpiolib-of.c
 - add support for Tegra234 and Tegra241 to gpio-tegra186
 - add support for new models (SSD201 and SSD202D) to gpio-msc313
 - add basic support for interrupts to gpio-aggregator
 - add support for AMDIF031 HID device to gpio-amdpt
 - drop support for unused platforms in gpio-xlp
 - cleanup leftovers from the removal of the legacy Samsung Exynos GPIO driver
 - use raw spinlocks in gpio-aspeed and gpio-aspeed-sgpio to make PREEMPT_RT
   happy
 - generalize the common 'ngpios' device property by reading it in the core
   gpiolib code so that we can remove duplicate reads from drivers
 - allow line names from device properties to override names set by drivers
 - code shrink in gpiod_add_lookup_table()
 - add new model to the DT bindings for gpio-vf610
 - convert DT bindings for tegra devices to YAML
 - improvements to interrupt handling in gpio-rcar and gpio-rockchip
 - updates to intel drivers from Andy (details in the merge commit)
 - some minor tweaks, improvements and coding-style fixes all around the
   subsystem
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAmHdpawACgkQEacuoBRx
 13KBTxAA1uB3zOqq5L9gn7cLR8Pi1/N4o7ltB0uwIFGJ8X5+jkHqkEi2TRa7Nyv1
 OODt/C2g8iguhynQJ1g//ZW12tzoThwI9fUzixZ9FRBMmX5oHeCcrS/YAYP4GDJY
 T9KOiXPDJ+vHV7SbM4k8gIlMHFk5Uq1jjvNnDIebzyBlyzAKxH9dIY3r1zt0Y4BR
 aKlAD5pxmLDAMAWVlTRo5e/W/Xd0ob0LCkDwlgozb3gwoPQbQQIPHuw+jPl5cMR2
 wBRNVFuJLi5dnpyrOoCXWWDQzeQzw8x+5vlwZfLkr2pF4FfDWoxefmbrDulzU+Au
 t6TULGcFKhLalyozY2D2mWNo8lMs4fDt/SXrDHwgS/cmGpq7RUGfvFuV6a9IOukP
 /uqoMYviIRswJuvPBs6dBNFaZxJkw4cWzd9tIzywb07mpkUCwX8wARwg+dZGvdQt
 4aAJwkJHuR29bEpDVfWwd2UV+fdAX5RiVQqLznNzGK51O+vS4UklYyWtO44R+fgm
 F81y2zOo0ly9xA6YkGjoSATnWDTmzTQSrnwcFv9J9UewY3PJpQc4xgqvZysur5cb
 0k/kuf9eWazmo46gW3ztv8GfXogDko8DEKrEgGs47tg97RDR5YbzOkOmnsqWvoUd
 nSVyx6vs2ijXsEi96FKhfTrU0AT2YcAIbEWjQoQvBR+3zkase7I=
 =OUhL
 -----END PGP SIGNATURE-----

Merge tag 'gpio-updates-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "The gpio-sim module is back, this time without any changes to
  configfs. This results in a less elegant user-space interface but I
  never got any follow-up on the committable items and didn't want to
  delay this module for several more months.

  Other than that we have support for several new models and some
  support going away. We started working on converting GPIO drivers to
  using fwnode exclusively in order to limit references to OF symbols to
  gpiolib-of.c exclusively. We also have regular tweaks and improvements
  all over the place.

  Summary:

   - new testing module: gpio-sim that is scheduled to replace
     gpio-mockup

   - initial changes aiming at converting all GPIO drivers to using the
     fwnode interface and limiting any references to OF symbols to
     gpiolib-of.c

   - add support for Tegra234 and Tegra241 to gpio-tegra186

   - add support for new models (SSD201 and SSD202D) to gpio-msc313

   - add basic support for interrupts to gpio-aggregator

   - add support for AMDIF031 HID device to gpio-amdpt

   - drop support for unused platforms in gpio-xlp

   - cleanup leftovers from the removal of the legacy Samsung Exynos
     GPIO driver

   - use raw spinlocks in gpio-aspeed and gpio-aspeed-sgpio to make
     PREEMPT_RT happy

   - generalize the common 'ngpios' device property by reading it in the
     core gpiolib code so that we can remove duplicate reads from
     drivers

   - allow line names from device properties to override names set by
     drivers

   - code shrink in gpiod_add_lookup_table()

   - add new model to the DT bindings for gpio-vf610

   - convert DT bindings for tegra devices to YAML

   - improvements to interrupt handling in gpio-rcar and gpio-rockchip

   - updates to intel drivers from Andy (details in the merge commit)

   - some minor tweaks, improvements and coding-style fixes all around
     the subsystem"

* tag 'gpio-updates-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (59 commits)
  gpio: rcar: Propagate errors from devm_request_irq()
  gpio: rcar: Use platform_get_irq() to get the interrupt
  gpio: ts5500: Use platform_get_irq() to get the interrupt
  gpio: dwapb: Switch to use fwnode instead of of_node
  gpiolib: acpi: make fwnode take precedence in struct gpio_chip
  dt-bindings: gpio: samsung: drop unused bindings
  gpio: max3191x: Use bitmap_free() to free bitmap
  gpio: regmap: Switch to use fwnode instead of of_node
  gpio: tegra186: Add support for Tegra241
  dt-bindings: gpio: Add Tegra241 support
  gpio: brcmstb: Use local variable to access OF node
  gpio: Remove unused local OF node pointers
  gpio: sim: add missing fwnode_handle_put() in gpio_sim_probe()
  gpio: msc313: Add support for SSD201 and SSD202D
  gpio: msc313: Code clean ups
  dt-bindings: gpio: msc313: Add offsets for ssd20xd
  dt-bindings: gpio: msc313: Add compatible for ssd20xd
  gpio: sim: fix uninitialized ret variable
  gpio: Propagate firmware node from a parent device
  gpio: Setup parent device and get rid of unnecessary of_node assignment
  ...
2022-01-11 12:31:35 -08:00
Linus Torvalds
bb4ed26e7e SoC: Add support for StarFive JH7100 RISC-V SoC
This adds support for the StarFive JH7100, including the necessary
 device drivers and DT files for the BeagleV Starlight prototype
 board, with additional boards to be added later. This SoC promises
 to be the first usable low-cost platform for RISC-V.
 
 I've taken this through the SoC tree in the anticipation of adding
 a few other Arm based SoCs as well, but those did not pass the
 review in time, so it's only this one.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHE4/wACgkQmmx57+YA
 GNlSlRAArOIWkgB8Uwf2dz1tdyGNo6b0yqrqPBnc2hlafQVkrd/Cy0imIEt21pJk
 IkVviuuJmWMS7lFppvjoKbTZDvGt4gcA2o//NorBtSLV5G7mbJAMkeDtfdURRAb0
 c7IXbtHaI5qMPHXOzjbKTHedbLJpS2P1uXQtGr9hiZFP8ZfyfbEF1bzL0edcCAWi
 DuY7cpEHEzeKATN8NQ1ETwpx0MJBfp7pzyfQbB9I1VvIMX1qbuLBUUJ6snLGSiw1
 kvLrQoV+2ZISeEfQ8M/PoHpHexO7CzY0thlTFt2mThLVI0ZlaVJvI6oJDAX5AG67
 tsmDiBxzvp+gWx5T8TfCgETJOVPUpNpSodF8U+cvIIpZM+DLiDc3Dyu6Zrod5guZ
 y989Sc+Be1LZEEyy0VscCoDleNxuFohh8aNJZnRtzd5UfJnz7cDIfGUdS2hwP9JN
 vI7Ci4nQIcvG35RwnLVMOp1azm3RIv2xoESdLkbS9/4smNEjLT1xtr6uVcP+MIKE
 qsWh8TITRWF4aiFqmsz1JyTHFAL0cCi4lZM//Y6XGKM2z0sCmpbfHIEGhJWuSNme
 lXvqn62VfiA5CvSnijYMwtRnCKIDDhsjvQo6H0gxCqW6ynCnKAivL/yo65hqtQO8
 wBpmlziU7IXx4Js/1eGpF7zq7a9LHFqFnKCrE/+7hK/DPGF2Qck=
 =X5uk
 -----END PGP SIGNATURE-----

Merge tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull RISC-V SoC updates from Arnd Bergmann:
 "Add support for StarFive JH7100 RISC-V SoC

  This adds support for the StarFive JH7100, including the necessary
  device drivers and DT files for the BeagleV Starlight prototype board,
  with additional boards to be added later. This SoC promises to be the
  first usable low-cost platform for RISC-V.

  I've taken this through the SoC tree in the anticipation of adding a
  few other Arm based SoCs as well, but those did not pass the review in
  time, so it's only this one"

* tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  reset: starfive-jh7100: Fix 32bit compilation
  RISC-V: Add BeagleV Starlight Beta device tree
  RISC-V: Add initial StarFive JH7100 device tree
  serial: 8250_dw: Add StarFive JH7100 quirk
  dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts
  pinctrl: starfive: Add pinctrl driver for StarFive SoCs
  dt-bindings: pinctrl: Add StarFive JH7100 bindings
  dt-bindings: pinctrl: Add StarFive pinctrl definitions
  reset: starfive-jh7100: Add StarFive JH7100 reset driver
  dt-bindings: reset: Add Starfive JH7100 reset bindings
  dt-bindings: reset: Add StarFive JH7100 reset definitions
  clk: starfive: Add JH7100 clock generator driver
  dt-bindings: clock: starfive: Add JH7100 bindings
  dt-bindings: clock: starfive: Add JH7100 clock definitions
  dt-bindings: interrupt-controller: Add StarFive JH7100 plic
  dt-bindings: timer: Add StarFive JH7100 clint
  RISC-V: Add StarFive SoC Kconfig option
2022-01-10 08:32:37 -08:00
Linus Torvalds
aca48b2dd1 ARM: SoC devicetree changes for v5.17
As usual, this is the bulk of the updates for the SoC tree, adding
 more devices to existing files, addressing issues from ever improving
 automated checking, and fixing minor issues.
 
 The most interesting bits as usual are the new platforms.
 All the newly supported SoCs belong into existing families
 this time:
 
  - Qualcomm gets support for two newly announced platforms, both
    of which can now work in production environments: the SDX65
    5G modem that can run a minimal Linux on its Cortex-A7 core,
    and the Snapdragon 8 Gen 1, their latest high-end phone SoC.
 
  - Renesas adds support for R-Car S4-8, the most recent automotive
    Server/Communication SoC.
 
  - TI adds support for J721s2, a new automotive SoC in the K3
    family.
 
  - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
    generation following their popular MT76xx series. Only basic
    support is added for now.
 
  - NXP i.MX8 ULP8 is a new low-power variant of the widespread
    i.MX8 series.
 
  - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that
    we have supported for a long time.
 
 New boards with the existing SoCs include
 
  - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers
 
  - AT91/SAMA5 based evaluation board
 
  - NXP gains twenty new development and industrial boards for their
    i.MX and Layerscape SoCs
 
  - Intel IXP4xx now supports the final two machines in device tree
    that were previously only supported in old style board files.
 
  - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013,
    while MT8183 is used in the Acer Chromebook 314.
 
  - Qualcomm gains support for the reference machines using the two
    new SoCs, plus a number of Chromebook variants and phones based
    on the Snapdragon 7c, 845 and 888 SoCs, including various
    Sony Xperia devices and the Microsoft Surface Duo 2.
 
  - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.
 
  - Tegra now boots various older Android devices based on 32-bit
    chips out of the box, including a number of ASUS Transformer
    tablets.
    There is also a new Jetson AGX Orin developer kit.
 
  - Apple support adds the missing device trees for all the remaining
    M1 Macbook and iMac variants, though not yet the M1 Pro/Max
    versions.
 
  - Allwinner now supports another version of the Tanix TX6 set-top
    box based on the H6 SoC.
 
  - Broadcom gains support for the Netgear RAXE500 Wireless router
    based on BCM4908.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHDsm4ACgkQmmx57+YA
 GNm9YhAAm0c/uPAkDA/6ESjaMC5qIHnV8CC9ZV24iINqFutcjKm2az8OiqKZT7UW
 a/+n2sfjAiyoAAaXrp/WvyMH2Sula1i/OZpR4GYIbD/lbYRFk+4+iW2YY9vViCjL
 KH6M/H6KfOSNmGcpe3wDvu7D4YWfFKDCDyUJsEaMW2xSQehYbH5P0OuzQW1EROHr
 GQp60QtCbUpMmqIrkJT99MxBGCCyb4dV6BT3iU489/YU3q3pOF8OWMLKv5TlXzfw
 x0pLH5CKavvCFj3iqp80sCEBeSoUecLKVnBRfmwAH1vgfNrhpXh4jP9m1e3Vh3Bb
 aJGZ57W77Akf+TywZEojDdIDQGKcdlzpZNxN2i4e4+LECYvfOdJW8GP18MmsXEY4
 apb0NeKad8FGRI4b97dIVEcTa894JkEZaEtnNaIdjWFhBgzO+Kr2iOTw71AKsJmc
 eIwv4SDdUQTU4VT08ceJTOVt8NikGALJStg5knpVJ9lfHvFlWj1GAE4QnCtS6pUR
 iiyqJ1/7khNplcgowaz6nuC2gSE49UwYQImLvBfG17eT1YU3B2OZg/FZ9xSmr2bW
 Thk+TKO9A6xai8QQWYV99Ae+Y6nDWUrLL5U9DXTn4cm64g5z3VkVKGcNajg/kAad
 hyQmSIhcypp2KN//c+d3VU/KY1EUYJDzg1EEwRuxP7Gih5/7pb8=
 =IF3G
 -----END PGP SIGNATURE-----

Merge tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "As usual, this is the bulk of the updates for the SoC tree, adding
  more devices to existing files, addressing issues from ever improving
  automated checking, and fixing minor issues.

  The most interesting bits as usual are the new platforms. All the
  newly supported SoCs belong into existing families this time:

   - Qualcomm gets support for two newly announced platforms, both of
     which can now work in production environments: the SDX65 5G modem
     that can run a minimal Linux on its Cortex-A7 core, and the
     Snapdragon 8 Gen 1, their latest high-end phone SoC.

   - Renesas adds support for R-Car S4-8, the most recent automotive
     Server/Communication SoC.

   - TI adds support for J721s2, a new automotive SoC in the K3 family.

   - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
     generation following their popular MT76xx series. Only basic
     support is added for now.

   - NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8
     series.

   - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we
     have supported for a long time.

  New boards with the existing SoCs include

   - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers

   - AT91/SAMA5 based evaluation board

   - NXP gains twenty new development and industrial boards for their
     i.MX and Layerscape SoCs

   - Intel IXP4xx now supports the final two machines in device tree
     that were previously only supported in old style board files.

   - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while
     MT8183 is used in the Acer Chromebook 314.

   - Qualcomm gains support for the reference machines using the two new
     SoCs, plus a number of Chromebook variants and phones based on the
     Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia
     devices and the Microsoft Surface Duo 2.

   - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.

   - Tegra now boots various older Android devices based on 32-bit chips
     out of the box, including a number of ASUS Transformer tablets.

     There is also a new Jetson AGX Orin developer kit.

   - Apple support adds the missing device trees for all the remaining
     M1 Macbook and iMac variants, though not yet the M1 Pro/Max
     versions.

   - Allwinner now supports another version of the Tanix TX6 set-top box
     based on the H6 SoC.

   - Broadcom gains support for the Netgear RAXE500 Wireless router
     based on BCM4908"

* tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (574 commits)
  Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U"
  arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
  arm64: dts: qcom: sm8450-qrd: Enable USB nodes
  arm64: dts: qcom: sm8450: Add usb nodes
  ARM: dts: aspeed: add LCLK setting into LPC KCS nodes
  dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property
  ARM: dts: aspeed: add LCLK setting into LPC IBT node
  ARM: dts: aspeed: p10: Add TPM device
  ARM: dts: aspeed: p10: Enable USB host ports
  ARM: dts: aspeed: Add TYAN S8036 BMC machine
  ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config
  ARM: dts: aspeed: Adding Facebook Bletchley BMC
  ARM: dts: aspeed: g220a: Enable secondary flash
  ARM: dts: Add openbmc-flash-layout-64-alt.dtsi
  ARM: dts: aspeed: Add secure boot controller node
  dt-bindings: aspeed: Add Secure Boot Controller bindings
  ARM: dts: Remove "spidev" nodes
  dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
  dt-bindings: arm: samsung: Document E850-96 board binding
  dt-bindings: Add vendor prefix for WinLink
  ...
2022-01-10 08:24:40 -08:00
Sam Shih
4470c830f9 clk: mediatek: add mt7986 clock IDs
Add MT7986 clock dt-bindings, include topckgen, apmixedsys,
infracfg, and ethernet subsystem clocks.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211217121148.6753-3-sam.shih@mediatek.com
Reviewed-by: Ryder Lee <ryder.lee@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-06 18:30:58 -08:00
Paul Cercueil
51d04bcfb8 dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
The Ingenic JZ4760 and JZ4770 both have an extra DMA core named BDMA
dedicated to the NAND and BCH controller, but which can also do
memory-to-memory transfers. The JZ4760 additionally has a DMA core named
MDMA dedicated to memory-to-memory transfers. The programming manual for
the JZ4770 does have a bit for a MDMA clock, but does not seem to have
the hardware wired in.

Add macros for the MDMA and BDMA clocks to the dt-bindings include
files, so that they can be used within Device Tree files.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20211220193319.114974-2-paul@crapouillou.net
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-06 17:51:11 -08:00
Nobuhiro Iwamatsu
ffa81a0326 dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC
Add device tree bindings for SMU (System Management Unit) controller of
Toshiba Visconti TMPV770x SoC series.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211025031038.4180686-3-nobuhiro1.iwamatsu@toshiba.co.jp
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-05 17:05:21 -08:00
Aswath Govindraju
04ce4a6b9b dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC
There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES
lane mux can select upto 4 different IPs. Define all the possible
functions.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/0571fd6b-ec4d-71b3-5cf7-6fa48ed5592c@axentia.se
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-03 13:59:57 +01:00
Greg Kroah-Hartman
e75a58db41 phy-for-5.17
- New support:
         - Qualcomm eDP PHY driver
 	- Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support
 	- Lan966x ethernet serdes PHY driver
 	- Support for uniphier NXI & Pro4 SoC
         - Qualcomm SM6350 USB2 support
 	- Amlogic Meson8 HDMI TX PHY driver
 	- Rockchip rk3568 usb2 support
 	- Intel Thunder Bay eMMC PHY driver
 	- Freescale IMX8 PCIe phy driver
 
   - Updates:
 	- Cadence Sierra driver updates for multilink configurations
         - Bcm usb2 updates for Phy reg space
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmHNmqQACgkQfBQHDyUj
 g0fhew/9H14cOScEaekVHvEtyxWJwAuNFlquEiQPLqnjL67aSDy4Xku43Z8xXvvY
 8XwSmDhlZV/UmQMte1+XKyEEPpfUScN7elVP5/Vq07oHM/jaDG1dPPPZyf0pIM4y
 bpD2dameXpHThC3Mb8QpERsZA0d4zvm6+8PN0MtkZGTPNKTwMl7sBIA/W76Ic+my
 6+HUqANa5OXo0iEZSDK8TkygpblIdgYthYsTaSTuiAkxYSse47U0xUWuex3UVQpZ
 DSSCZUtjxTXTMSxJBNi8ry8ZJIkUhiVL4fY3Oh9bYRi9e7UGiEMwCb/yF979kPYA
 ZcI8bR/w0/f4oIQdOUjcxIA6n9avKrnAEIQFp18dWTBjUZTEZdYz2zS0DMuXq9t2
 4yLXSNqO2FvOo3/AK5B/K6tf2j3zJTEdVpiq+rKOKxCAZWY2EDVtdDJRYYynCPK9
 xBiut4PrGoG8Fs1RiL768kzy5a21fbDK5CFS8QYbbno/YhznwNFKKRX4VdgY/b1b
 ltI/cD6G70M+TOYCJ0jNIwRoA2dZCUClhdulpltSrTx9tR4M6oH+pXxHBD66WVNK
 ouJRaqtvi48ILwXZ9oAEKFQfu8hQt1OMWTcGbJ0ntPPVBPHv7hRQAxAyJZcADfDP
 RjO7CX48Il3/33w4kIH9VFO4DE/asYJ6QGOVo9SA0iRh5M9fI88=
 =29yF
 -----END PGP SIGNATURE-----

Merge tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next

Vinod writes:

phy-for-5.17

  - New support:
        - Qualcomm eDP PHY driver
	- Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support
	- Lan966x ethernet serdes PHY driver
	- Support for uniphier NXI & Pro4 SoC
        - Qualcomm SM6350 USB2 support
	- Amlogic Meson8 HDMI TX PHY driver
	- Rockchip rk3568 usb2 support
	- Intel Thunder Bay eMMC PHY driver
	- Freescale IMX8 PCIe phy driver

  - Updates:
	- Cadence Sierra driver updates for multilink configurations
        - Bcm usb2 updates for Phy reg space

* tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (72 commits)
  phy: cadence: Sierra: Add support for derived reference clock output
  dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock
  phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration
  phy: cadence: Sierra: Add support for PHY multilink configurations
  phy: cadence: Sierra: Fix to get correct parent for mux clocks
  phy: cadence: Sierra: Update single link PCIe register configuration
  phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation
  phy: cadence: Sierra: Check cmn_ready assertion during PHY power on
  phy: cadence: Sierra: Add PHY PCS common register configurations
  phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation
  phy: cadence: Sierra: Add support to get SSC type from device tree
  dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode
  dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic names
  phy: cadence: Sierra: Prepare driver to add support for multilink configurations
  phy: cadence: Sierra: Use of_device_get_match_data() to get driver data
  phy: mediatek: Fix missing check in mtk_mipi_tx_probe
  phy: uniphier-usb3ss: fix unintended writing zeros to PHY register
  phy: phy-mtk-tphy: use new io helpers to access register
  phy: phy-mtk-xsphy: use new io helpers to access register
  phy: mediatek: add helpers to update bits of registers
  ...
2021-12-30 14:02:16 +01:00
Swapnil Jakhade
637feefb8a dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock
Add clock ID for Sierra derived reference clock.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211223060137.9252-15-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:09 +05:30
Swapnil Jakhade
253f06c7b1 dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic names
Rename SSC macros to use generic names instead of PHY specific names,
so that they can be used to specify SSC modes for both Torrent and
Sierra. Renaming the macros should not affect the things as these are
not being used in any DTS file yet.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211223060137.9252-4-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:08 +05:30
Greg Kroah-Hartman
1bc4deedc2 interconnect changes for 5.17
Here are the interconnect changes for the 5.17-rc1 merge window
 consisting of new drivers, minor changes and fixes.
 
 New drivers:
  - New driver for MSM8996 platforms
  - New driver for SC7280 EPSS L3 hardware
  - New driver for QCM2290 platforms
  - New driver for SM8450 platforms
 
 Driver changes:
  - dt-bindings: interconnect: Combine SDM660 bindings into RPM schema
  - icc-rpm: Add support for bus power domain
  - icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check
  - icc-rpm: Define ICC device type
  - icc-rpm: Add QNOC type QoS support
  - icc-rpm: Support child NoC device probe
  - icc-rpm: Prevent integer overflow in rate
  - icc-rpmh: Add BCMs to commit list in pre_aggregate
 
 Signed-off-by: Georgi Djakov <djakov@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJhxGkPAAoJEIDQzArG2BZjsRwP/3nr3s4b60PZ9hoxSxcBmmoD
 OAwd1tIeyXGxkeKHeJDdDj92hvgdvZwpl/H+wLnzy4VZmNqrIkREl23KaSlLeJE7
 P4U0ZUj7DYqXhR6+D1MiWa8+2rzQ/kqbDiXsFPEQL5Wa2/rGVgq95D/znz5Szv6f
 EtZUDBBtzR9s56LlL9+pprApWRz4+bf4YfX6AsMuKaKedjqzEKxLov2+wC+6zGoV
 2vkFQODxntsoZ95cwRz6GVBAZle/6O/NiSc6ndx/MpPhIQpsr2F0Er1nsgERxDum
 EsC3JVl+7aoHTym7npFp/JT04YBpHC3l7SnJff0EDws7MSiBjkp1WNIlYwP5juuA
 PZ3ziLtSzy36Vi0OVpykZSdwbeS9lNuz58CI74fIzcfGA1H1q3s8K4JHS7WMcgsQ
 EgghbCaiREZKBhZa6gMn4d6cufTpqAImDYae8gD788ziw7x+Pr3P6RgWbn+PE7mI
 odlx3OKwnCIsDPTj+5B5rXFKkfzV7grX1HI0sUZDIJ8Cv4Qs1kcLWP6Sg4ZafOMj
 ZcwYoTo9dMy81aDfEKIlpXR2ILxcb4vJTNTSdmFsPmNX+01X8rPlk/uCPPx9nClW
 acpqJLfCMKKbSwoZwrkWZQo2XCJBq/jan5dg8Q/fMLsqDORUtmnkK+hzR75mHHhP
 IydRk18TN1TQUhnNiFcd
 =dXxk
 -----END PGP SIGNATURE-----

Merge tag 'icc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next

Georgi writes:

interconnect changes for 5.17

Here are the interconnect changes for the 5.17-rc1 merge window
consisting of new drivers, minor changes and fixes.

New drivers:
 - New driver for MSM8996 platforms
 - New driver for SC7280 EPSS L3 hardware
 - New driver for QCM2290 platforms
 - New driver for SM8450 platforms

Driver changes:
 - dt-bindings: interconnect: Combine SDM660 bindings into RPM schema
 - icc-rpm: Add support for bus power domain
 - icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check
 - icc-rpm: Define ICC device type
 - icc-rpm: Add QNOC type QoS support
 - icc-rpm: Support child NoC device probe
 - icc-rpm: Prevent integer overflow in rate
 - icc-rpmh: Add BCMs to commit list in pre_aggregate

Signed-off-by: Georgi Djakov <djakov@kernel.org>

* tag 'icc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  interconnect: qcom: Add QCM2290 driver support
  dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support
  interconnect: icc-rpm: Support child NoC device probe
  interconnect: icc-rpm: Add QNOC type QoS support
  interconnect: icc-rpm: Define ICC device type
  interconnect: qcom: Add SM8450 interconnect provider driver
  dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings
  interconnect: qcom: rpm: Prevent integer overflow in rate
  interconnect: icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check
  interconnect: qcom: icc-rpmh: Add BCMs to commit list in pre_aggregate
  interconnect: qcom: Add MSM8996 interconnect provider driver
  dt-bindings: interconnect: Add Qualcomm MSM8996 DT bindings
  interconnect: icc-rpm: Add support for bus power domain
  dt-bindings: interconnect: Combine SDM660 bindings into RPM schema
  interconnect: qcom: Add EPSS L3 support on SC7280
  dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280
2021-12-27 10:23:35 +01:00
Akhil R
9f01881bea dt-bindings: gpio: Add Tegra241 support
Add the port definitions for the main and AON GPIO controllers found on
Tegra241 (Grace).

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-23 17:12:11 +01:00
Arnd Bergmann
c03b7ba969 Qualcomm ARM64 DeviceTree updates for v5.17
This introduces initial support for the brand new Snapdragon 8 Gen 1,
 aka SM8450 platform, with SMP, CPUfreq, cluster idling, low speed buses,
 TLMM pinctrl, SMMU, regulators, clocks, power-domains, UFS storage and
 USB currently supported.
 
 SDM845 adds new support for Sony Xperia XZ2, XZ2C and XZ3. The Lenovo
 Yoga C630 gains a few audio related fixes. The PMIC's VADC channels are
 described as thermal zones. OnePlus devices gains msm-id and board-id,
 to facilitate a single firmware image for the multiple devices.
 
 On SM8350 the Sony Xperia 1 III and 5 III, as well as initial
 description of Microsoft's Surface Duo 2 are introduced.  On the
 platform side, LLCC, QUP nodes, redistributor stride and all the
 low-speed QUPs are added
 
 MSM8996 gained various regulator fixes, and adsp firmware name to
 faciliate pushing firmware to linux-firmware. Xiaomi Mi Note 2 gained
 touchkey controller definition.
 
 On SDM660 the Xiaomi Redmi Note 7 gained power and volume keys, RPM and
 regulator definitions, USB, eMMC and SD-card and a simple-framebuffer
 description.
 
 MSM8916 has the mmc aliases corrected, to stop the storage devices to
 move around and the RPM sleep stats memory is described. Support for the
 Samsung J5 2015 smartphone is introduced.
 
 SM6350 validation errors are fixed and and description of the audio,
 compute and modem remoteprocs are added.
 
 A couple new revisions of the SC7180 based Google devices are added.
 The SC7280 platform gains venus and a few fixes. The CRD development
 device is introduced, with the EC, touchscreen and touchpad.
 
 On SM8250 CPU opp-tables, for scaling L3 cache and DDR frequency based
 on CPU frequency, are added. As is TX, RX macros and SoundWire blocks
 and used to enable audio on the SM8350 MTP.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmHDQQobHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FzJAQANU2GokY9/BRKTNJjZFj
 CIvSBWpBD6wAzqdWqIJBRSbhWDO58Oyu1qRMOw5iylKCqkb89vbcKorpwq6/8l7j
 Sttox8iRtd/N5GqgwwFB109DSWs6TqRd4rnbYd9au3c21RSLYYgLa1v9f6OobdZi
 vbY6DQBTHYYClLPYvn5iUMy6JGTFsR5EAjcEJj0cZ1178tKP0Do38Hldeo/wvX37
 oqA1GXG3uCtbYKG+gJcNSfwvOo9q0ki5oacGuUWVOWkL+Vj2LiMbhhzDJlu8tF8M
 VzAy3o6UN2+hquJVxQsfs5wfgcLVK/IdMyjiaEe5GZd9SWmtSt4n+CUQ0ZkDPBfR
 KkIOci4M0WoHlmY/IPELS9MfDxdDeJn+u8v8jpM/vEZMOSCZiBFcvNPPD7aBP9VK
 c+f8eVf21NGxfZ4zA9bkp9aBACyv4zfjo/iFd3TmT1P78sDOJMI7pG3APHOYY9Fc
 ZKT9uTcca9KgVzTZcLzvD69OudrHP9pw6QdT4OT1fy/EPtj2+9hHN+cfty+iAtDN
 sgIcFmWBryO6OctgF+CA/FuojYi6PB2WOfvECljnmQwfIxDnz/6EGbbG97yH0FZr
 TE4BasLkdQZZPrTxgj1kpu++CrkFeUhpsEciQjDxYoCJ3mFAXNws6prxKpTh1jcg
 dalfKkiEX1ww3WsfciUb0X/V
 =/hGD
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DeviceTree updates for v5.17

This introduces initial support for the brand new Snapdragon 8 Gen 1,
aka SM8450 platform, with SMP, CPUfreq, cluster idling, low speed buses,
TLMM pinctrl, SMMU, regulators, clocks, power-domains, UFS storage and
USB currently supported.

SDM845 adds new support for Sony Xperia XZ2, XZ2C and XZ3. The Lenovo
Yoga C630 gains a few audio related fixes. The PMIC's VADC channels are
described as thermal zones. OnePlus devices gains msm-id and board-id,
to facilitate a single firmware image for the multiple devices.

On SM8350 the Sony Xperia 1 III and 5 III, as well as initial
description of Microsoft's Surface Duo 2 are introduced.  On the
platform side, LLCC, QUP nodes, redistributor stride and all the
low-speed QUPs are added

MSM8996 gained various regulator fixes, and adsp firmware name to
faciliate pushing firmware to linux-firmware. Xiaomi Mi Note 2 gained
touchkey controller definition.

On SDM660 the Xiaomi Redmi Note 7 gained power and volume keys, RPM and
regulator definitions, USB, eMMC and SD-card and a simple-framebuffer
description.

MSM8916 has the mmc aliases corrected, to stop the storage devices to
move around and the RPM sleep stats memory is described. Support for the
Samsung J5 2015 smartphone is introduced.

SM6350 validation errors are fixed and and description of the audio,
compute and modem remoteprocs are added.

A couple new revisions of the SC7180 based Google devices are added.
The SC7280 platform gains venus and a few fixes. The CRD development
device is introduced, with the EC, touchscreen and touchpad.

On SM8250 CPU opp-tables, for scaling L3 cache and DDR frequency based
on CPU frequency, are added. As is TX, RX macros and SoundWire blocks
and used to enable audio on the SM8350 MTP.

* tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (92 commits)
  arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
  arm64: dts: qcom: sm8450-qrd: Enable USB nodes
  arm64: dts: qcom: sm8450: Add usb nodes
  arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodes
  arm64: dts: qcom: sm8450: add cpufreq support
  arm64: dts: qcom: sm8450: Add rpmhpd node
  arm64: dts: qcom: sm8450-qrd: enable ufs nodes
  arm64: dts: qcom: sm8450: add ufs nodes
  arm64: dts: qcom: sm8450-qrd: Add rpmh regulator nodes
  arm64: dts: qcom: Add base SM8450 QRD DTS
  arm64: dts: qcom: sm8450: add smmu nodes
  arm64: dts: qcom: sm8450: Add reserved memory nodes
  arm64: dts: qcom: sm8450: Add tlmm nodes
  arm64: dts: qcom: Add base SM8450 DTSI
  arm64: dts: qcom: ipq6018: Fix gpio-ranges property
  arm64: dts: qcom: sdm845: add QFPROM chipset specific compatible
  arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones
  arm64: dts: qcom: pm8998: Add ADC Thermal Monitor node
  arm64: qcom: dts: drop legacy property #stream-id-cells
  Revert "arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer"
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-22 16:49:32 +01:00
Tony Lindgren
9206a3af4f clk: ti: Move dra7 clock devices out of the legacy section
I accidentally added some dra7 clock defines to the legacy section that
we want to stop using. Let's move the defines to the right location.
Note that this is just a cosmetic fix.

Cc: linux-clk@vger.kernel.org
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-12-22 08:27:35 +02:00
Arnd Bergmann
dfdded9b0b Qualcomm DeviceTree updates for v5.17
To SDX55 this introduces the description of the IPA, PCIe PHY and PCIe
 endpoint controller, as well as enables these for the FN960 device.
 
 The SDX65 5G platform is introduced, currently with definitions
 necessary to boot to a shell.
 
 The undocumented property "input-name" is dropped throughout the dts
 files, dwc3 nodes throughout gains more specific compatibles and lastly
 building of the Dragonboard 410c DTB on ARM32 is enabled, in addition to
 its normal operation in 64-bit mode.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmHBVYobHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FruwQAIkncBLbeVIk2ioM7xEH
 WRpd5yDczi2LVsXaDCjmCu9s4MMMaDYYUiQWSh1etovEdN+x8t4R8gzeNYDkZNX3
 T0g3+x7bL0xjynQo4HEje8fzYZryCmWZfmYbqggawLWynUDXyYLSNFh+bxKEFpLw
 uxOiNXzmTRZQhNUE60JV2BJCNuZls+pjthURbTAGWZ/LoBhgW6RjADOqGHVz1eF0
 RIz8YPRaVN0lTrBxPAwwJDJ4AWo5nG5zNiy0/0fxnxabvr32N/2YBl2dCJ3hMgZB
 /OIsMS21b2wYbOR59NgD/vauGXUeGnophcWnMmIEPA9D/ZiJiKYNteWLfEbUNKnC
 sy/XXZbo0y+uHBIxFsmg8m4Dh5WBmkAgoINwEZ/0BFTVoCbQq6Oi8xnkkvPc61L1
 r/ZUpFr13xzV3s1e2dSPAlgW3P7WfgTyXTN/5YkNi4dT47uD71EiHTDvcUEocFcg
 gPyjm4SSRo/1HUqPOJMeFnVx5mv4cCo2OrnkQWKaCENgWg07wFq3lXJjOB666jMF
 OEXRKPmH8tA3eVexy0tayO1bps/Go2MGjERtRxz/EUw8UDWO/0SerhplYD/vMmFU
 NLOWbwIAUoJT5daiAsUYJQr1KBnJMlkFsim0Nd962rKZTX4F5cKkkJv8ucrwN+01
 SZoQVfDBHlZtMuMsJn/Sxqk/
 =SjjW
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHB5qAACgkQmmx57+YA
 GNkkxxAAw0GqWdbEiF2rNpTHsZgJnsDJpIfxFgONdzVA6C4pDi2YUlp5GgKitBzQ
 zok21TebNPTNOEf7q8FqubpleDU+x913eJaYYQA8DRmx5fHeNkzYt6jMAE5c3V5Y
 fpcRSLV0GLiT48tzhK/r3917/jZWnjcp7eKWDWByyavzkphgcVTbqYYBYZVltkzH
 s/nyIu8zdSvCmOLMipRrH85GSVi372DU6bD/ejHdz0yXv/RsT2/2DZA6ZeJSF3FQ
 qpZEnGxnizGrqcP6b3g6xVjVEYmwHC8js3B8scUyM/I9j+h/LAQD8yRXLivj5kwm
 tM/mtCGaIfux3ca1B0cRe5DTZP3jPa7vKUmIxTVJsjfgKyco9vwJlPIyHdSBKqQQ
 n7HtB2jBruCjb2IhtHjhCC0htPKFpEUs6k1SK3UB+I3usEfMhut/FC5RFU9Pz6ta
 GtQ8k6ucdJySQDxgOF62EFqEjQmcDNOqTl07rgosXx4zrh4TYNlvW6v6/N3QblPp
 8eRQGgK6HZMAypL1HgeEeYtYhK6eyRCfmNrQ+U2w1o/VRsRwwsLC6g4YENyEYm+1
 yVQjPyEgo9KZah3tYtc8pxAGs3E6ulyHMhBZtHh1gWjSNyDTEBvYjcuKE1Javxmh
 dRRgIoymJG1f7b5zACkimDuvB5A4DOJ6pUvpvpad6Cv724J7ixA=
 =rvAi
 -----END PGP SIGNATURE-----

Merge tag 'qcom-dts-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm DeviceTree updates for v5.17

To SDX55 this introduces the description of the IPA, PCIe PHY and PCIe
endpoint controller, as well as enables these for the FN960 device.

The SDX65 5G platform is introduced, currently with definitions
necessary to boot to a shell.

The undocumented property "input-name" is dropped throughout the dts
files, dwc3 nodes throughout gains more specific compatibles and lastly
building of the Dragonboard 410c DTB on ARM32 is enabled, in addition to
its normal operation in 64-bit mode.

* tag 'qcom-dts-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: Drop input-name property
  ARM: dts: qcom: sdx65: Add pincontrol node
  ARM: dts: qcom: Add SDX65 platform and MTP board support
  dt-bindings: arm: qcom: Document SDX65 platform and boards
  dt-bindings: clock: Add SDX65 GCC clock bindings
  ARM: dts: qcom: Build apq8016-sbc/DragonBoard 410c DTB on ARM32
  ARM: dts: qcom: sdx55-t55: Enable IPA
  ARM: dts: qcom: sdx55-fn980: Enable IPA
  ARM: dts: qcom: sdx55-fn980: Enable PCIe EP
  ARM: dts: qcom: sdx55: Add support for PCIe EP
  ARM: dts: qcom: sdx55-fn980: Enable PCIE0 PHY
  ARM: dts: qcom: sdx55: Add support for PCIe PHY
  ARM: dts: qcom: update USB nodes with new platform specific compatible

Link: https://lore.kernel.org/r/20211221042154.3621955-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21 15:37:20 +01:00
Arnd Bergmann
13ee75c7b5 Qualcomm driver updates for v5.17
This introduces RPM power-domain support for the SM8450, SM6125 and
 QCM2290 platforms. It them clean up the platform-based naming of the
 resources definitions throughout the RPMh PD driver.
 
 The last-level cache controller driver gains SM8350 support.
 
 The RPM sleep stats driver gains support for several older systems that
 had a slightly different memory layout for this information.
 
 The socinfo gains SM8450, SM6350 and SM7227 definitions.
 
 In addition to the DeviceTree binding updates related to these changes
 new compatibles was added to describe the SM8450 and the Kryo 780 CPU.
 
 Lastly a few typo and style fixes are introduced.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmHBUg4bHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FObUQAOCTBSbL/US0wCCUEHPq
 MScjFtPDAV88bJi9uRzi5lalwPd/3yPZu+XLcCV/CjRj6nlGAbua2EcogvMsM1Lj
 rgHZopKnnDOHEFII2ZZ3lyJN4EntvSGHtnm/i2Jd7n3nB52zBkuRpgn3mi32QWoL
 QmGECClAPFBlQi9P33yHDZ/XC8ZK1y982G+Pb8SD6guxmtGxXCm4SaZ4qwVya53s
 euBl+nT/snARPEwaqRoGIsvs+fH2BcoJbug19MLQ+3Q4K9ycxQkWalzcMsLM/EjT
 H1JGjoaHbTpNhyMmKDqN2jS0CkvoLiYOIvhAbqw6l2HluRkn8QhcDOJJ9RHl2oB/
 EqYkK457F7smA0Z9vViuaEZJWfyPNt0z2c7zcpf73Iuk8cBM+48MUQ1UOwyvQh3c
 8AeyyAkgyYBWv58h5rLDS2fqD+tWx4hz6tqxyYojsxYjQkyWRDU6540tGSDeVAt+
 SUQ9qFXWyG7R5Z3GBVHi7ztXnkl6vYZUF05fhZrkpw9YrGlmu3wK/3Rcg9ZIECOg
 Q0UA/GQsqQtCqmzkRQsur/ljEbCrmtiB6JvG+7cnQIWPwcN/4Ho3wyfXvtzNvNki
 dMIpd+7NKkTaj1HUaH5qEnyO4szUpMoFfOrtqzlucH5dGG6fppY3svVWzuxLcbDy
 8+b+/aDuWa7HUXpBbPaK7H7U
 =ovup
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHBy8wACgkQmmx57+YA
 GNmS3xAAhIPIdMWF76Gb7eQu0UWrbuACSl0Nkt5SRbRyjX0BHectf+ssXUzR6r2/
 l8Uf2fkBYP5UWVUbWXlKPlmwmdQo/lAGYeHvi/lx3W4ORvIe6CRTeIS0q0DLPwSV
 H7iH8lnoFozIITt+6N+LhN9VME/Zpo8E/t2Wt47mkSkV/2hP6Adrgh5f4pz4KMcl
 hHQcAhi0/3DTEoGjczBDcTXMIt8nUPSwTnd1ktOaD0avRgKgiiLslvzjTxLMXRuw
 aDInx8uIMBswbEE0ZtG1aFrYZ54Y3DAm65n4aZfOPo3OlLjiosOqT1pvKWkpF/u1
 OYcQzVEdUnEwZKB9BYzkTFVtK3ptE/5nNFg4HkclZATrqvEfQ6I3EbM9tvtY6GV+
 BUUjxOthWq0Rnazd3BkOJvsepSndB1dOfxAunBk6m/r44shWWjLKGRI3jd+0QgW2
 UVd0hy5pC28OZelGgSAU0PVQyHYl/82pRu7UCpHVaOg9mvuwgURChr7ddGi9XWVG
 cMChFAumH/hvnQrRavONPUqaTjP62hRkOqjA/bvc3jFuAgFWqvSrc+z1AvqKw4Uz
 0ks+tjoHrQ839EZB0g/LDk7K8MDe8llvOk16gzqNxplQJe2WYaRZ9S0GD+3MC1Wz
 sSIyMsFLhfZJ2Z7TNOqLTPPW3jfoU3ntNzHUY8gCpTSh8DVkbtQ=
 =NlpZ
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.17

This introduces RPM power-domain support for the SM8450, SM6125 and
QCM2290 platforms. It them clean up the platform-based naming of the
resources definitions throughout the RPMh PD driver.

The last-level cache controller driver gains SM8350 support.

The RPM sleep stats driver gains support for several older systems that
had a slightly different memory layout for this information.

The socinfo gains SM8450, SM6350 and SM7227 definitions.

In addition to the DeviceTree binding updates related to these changes
new compatibles was added to describe the SM8450 and the Kryo 780 CPU.

Lastly a few typo and style fixes are introduced.

* tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits)
  soc: qcom: rpmh-rsc: Fix typo in a comment
  soc: qcom: socinfo: Add SM6350 and SM7225
  dt-bindings: arm: msm: Don't mark LLCC interrupt as required
  dt-bindings: firmware: scm: Add SM6350 compatible
  dt-bindings: arm: msm: Add LLCC for SM6350
  soc: qcom: rpmhpd: Sort power-domain definitions and lists
  soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280
  soc: qcom: rpmhpd: Rename rpmhpd struct names
  soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao
  soc: qcom: socinfo: add SM8450 ID
  soc: qcom: rpmhpd: Add SM8450 power domains
  dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding
  soc: qcom: smem: Update max processor count
  dt-bindings: arm: qcom: Document SM8450 SoC and boards
  dt-bindings: firmware: scm: Add SM8450 compatible
  dt-bindings: arm: cpus: Add kryo780 compatible
  soc: qcom: rpmpd: Add support for sm6125
  dt-bindings: qcom-rpmpd: Add sm6125 power domains
  soc: qcom: aoss: constify static struct thermal_cooling_device_ops
  PM: AVS: qcom-cpr: Use div64_ul instead of do_div
  ...

Link: https://lore.kernel.org/r/20211221040452.3620633-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21 13:42:52 +01:00
Dmitry Baryshkov
22c755708c dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding
Add compatible and constants for the power domains exposed by the RPMH
in the Qualcomm SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-6-vkoul@kernel.org
2021-12-20 19:10:10 -06:00
Martin Botka
8712107740 dt-bindings: qcom-rpmpd: Add sm6125 power domains
Add dt-bindings for sm6125 SoC RPM Power Domains

Signed-off-by: Martin Botka <martin.botka@somainline.org>
[bjorn: Added compatible to binding as well]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211130212332.25401-1-martin.botka@somainline.org
2021-12-20 19:10:10 -06:00
Arnd Bergmann
0fd319105f Samsung DTS ARM64 changes for v5.17
1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink
    E850-96 board and WinLink vendor prefix.
 2. Add pinctrl definitions used for Exynos850.
 3. Minor fixes and improvements.
 4. Convert serial on ExynosAutov9 to new hierarchy where serial is part
    of USI node.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmHAZ5gQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD18hgD/9k4ki8CxbmuES6l9+wPlFQaPjmPePxF/P5
 nrFQRQL7kv+X05QBmswqGoZjh/ABPtaJan4Ue32BaMSr2vUrxauDec4046foCfcz
 cBttxFlcvkr7h1sHWZwrpqvcEG1QDcxSc0BUtCA0fFwNwcG8oadw5u1183VXFbwk
 UOwAZAZbqgZwRk/6LARrEXRp1P0qyyRnBuk6g9GFPDVvwK1KGSrfGnTQYDbSZBkt
 dHmvDMDR+0vMQgV/D1nHFDsKBRVFykKy9t5Xg+rvGHome7AkRtawibUcIB4ANQcz
 taxZA5vnlMDmvtNMRCHfx2HLzNwf1t1BGTZFj/EsVU+EJSf+juNSahRLiA0VC9uK
 x0jaRnhPwg7FkyksZZjDrSRZWe8GNYjBsE9nJ5EwH+H9Nf/PZD40eWgKlAEXbF0U
 tHfHX+xEoqy5o3qryPk1nLMEs3zXAqyAb3XRyz08m0j1oARPZgv/oi9h8Pgm5Dob
 SS7J/HiaNFipNyCcLz2D0JDQo47Xz5WLmYAsyUDgR1ddW/QphhafFqhhJt+LMqdx
 O+vG7xgBeZsQvlSsOlQTE0r541i6aAxgxsudVSFo7wlxA1LEn3WK5kC8W+GjzSsE
 1eN4Y3UvbIxv0oVuN/PfzhMZeVPLpr6M+0KnXaODfYtJNczQFizAxh9hfQ5cnmj+
 I2Zzzmsc1A==
 =A5Of
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAnZYACgkQmmx57+YA
 GNlQihAAml4a+mnX6NOZk6kMr/I4RuYESWDb4Gvinbd/GhwvSTx7i9lPWkfnvBRt
 vSyZgy8MbPLKcFVVrjI6L2IER+FnCpQH5iJyCPoEQ6lqpN6gzL8m1EEeOSuGf5NR
 JNFeMmFPCJbxHZnYPWyGgFDPo/f2sQxXRS69bNBGvMjH3ZCI1cLy4cow/2FuDxH0
 BfQh+zdYEdR9Fi/hdHIk8KU0pwzWzJGRRbMgsRUBDJl2B8UWM0xb4RpbEEEyag7H
 JOrvIzvQuT0LQvaM73DUJ/2UbQ0Sfhf5F0lWGhUPKLDTncKqe7tUNSqXRAjAYwtF
 0Jpp54cpWIjsjWijQ9LCcf0MV6zrEky5HtLYcNFooUR7/LdmJNogfFvBVhED52dD
 o4Z5++MFR4H/oLjSkK+ehjXp+lW0p+7fCm9boRhVOLTYK8UdZbc2j1oSsGoWUc2C
 KD4o+VXqo0/X48Zp90yPVKQf4CxV04+IJ0op8HTFEfvT58RvaDv96dSPj1XMrIhR
 1rL4yC814oPdQjbRI5IZfIyChpWGs9XOVETsdu59K/HXBY9ASO4oM+RyJJJxHJrS
 87DGaXymgazguAm/twlfMmAPFN2E8pRO9uJE7QH27wzG0O60WwreSXLxG2F3YywA
 2qUR0BpZ9MHoZTyiUObHojLMxcFoD0ObKiaZi3tsaySkqrcLc1Q=
 =qF6s
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.17

1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink
   E850-96 board and WinLink vendor prefix.
2. Add pinctrl definitions used for Exynos850.
3. Minor fixes and improvements.
4. Convert serial on ExynosAutov9 to new hierarchy where serial is part
   of USI node.

* tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
  dt-bindings: arm: samsung: Document E850-96 board binding
  dt-bindings: Add vendor prefix for WinLink
  dt-bindings: arm: samsung: document jackpotlte board binding
  dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example
  arm64: dts: exynos: convert serial_0 to USI on ExynosAutov9
  dt-bindings: soc: samsung: Add Exynos USI bindings
  arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7

Link: https://lore.kernel.org/r/20211220115530.30961-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 16:13:26 +01:00
Arnd Bergmann
33f8b4862a i.MX arm64 device tree change for 5.17:
- New SoC support: i.MX8 ULP.
 - New board support: i.MX8MM/MN based TQMa8Mx boards, iMX8MN BSH SMM S2,
   i.MX8 ULP EVK.
 - A series from Adam Ford to enable Camera and USB support for
   imx8mm-beacon device.
 - Add overlays for various serdes protocols on LS1028A QDS board using
   different PHY cards.
 - A series from Biwen Li to update LS1028A devices around RTC, flextimer
   and PWM support.
 - A series from Joakim Zhang to update ENET/FEC suppport on i.MX8M
   devices.
 - A couple of changes from Lucas Stach to update nitrogen8-som Ethernet
   PHY and I2C1 pad configuration.
 - A series from Martin Kepplinger to split out a shared imx8mq-librem5-r3
   dtsi for Librem5 devices.
 - Add cache descriptions for i.MX8 SoCs.
 - A series from Vladimir Oltean to update ls1028a-rdb device tree in
   order to share the DTS between Linux and U-Boot.
 - Random device addtion to various i.MX8 and LX2160A based devices.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmG9hc4UHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM5tZAf/chwOQUH6gwyc76vb2mzcMlYq4jPN
 vMxJZ6fJBf+QglOrGfSznl11SHNCGs+NBDvRkJt9JLKj1fHh/jUTZf5HCRnK62lH
 YB+w2XxlthufTPujkVXM10Dsx65Up67Mo3ZN5/3M6Fd+w/P8YUzPEL0jD2dm7CDM
 rKqe57kcJ6ZaJgASuPdVh51fwpmbCNOQZCRgg4Y+sunXzUVyjA/jOUaeQojg+m2e
 TTe80CH+3fugipWkotAa8ypxAJEbeEsPvVB711UxTY28rE2BqDkcPMyOiq+9HW+M
 AoqPeyeZffyJGwLblLCQTZzMEuWU9G87H+fda7b8sg7yFPvjefaj+4DbdA==
 =ARjB
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAm/QACgkQmmx57+YA
 GNk/4g/9GG9YYbOHzLDSit6I92eAwMhIxCE7ls2RrB/JBIi1v13qZ85YTPw9w1Bc
 klRXP46fI6dVl7R7t0Vt2zt5MpuNnKAMZsHQR+UvB/Zll4RC7n29NEpWyFW0i4Yv
 /G28Whmp1sQs8szrWwvOlxWMY3fSlQMKM4vrtJUU6Che5ec+PwgsRL2rWf5/cnJh
 E9HqQ3eJMyP8cdayRnlUCI8yWAdXHkeDQhl7Mu97eX4l7Ka2OkDseEZY+HgRmQSv
 Ee3X1EPxFHau9f842NtIwNz54Vdibfh+UHCzMeWOtDZXF8bhWVYp13joPNDM7AWM
 0oYMh966t/JuU4cPCQxed61C9Laxg42TkCbfuU7dC5pqKlCdSZSKOmLe7c6vw3Vf
 IGQwVgMh8/c3oJAbbPqWz+kfCg3O2KNzA3MnsQuizoLEwa5R4msqtk6FZ5uqR6d/
 RYL9eZKzeZWPXwth1KCEx+qLFWuRxC5cdK181Hc/Srm3bzNf/6vfCcReRCvlfOiE
 lU1kzHLOKtfUeWSEK3WFnWuTbU68NaH8rUZXpuTlV1kYEeBf/mD4aTOUW9hOh0v6
 EYwpk2QYPBcUUYR2KC6gfyJTTwihn3FR8+RiJR+VFjlhNrNHbrNmp3Vo19yjgu/Y
 brbFPEitQPnvXdrGAIfck9vHhO9VJ3xygo9SMowGsaRuFLunW/0=
 =zQ1O
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree change for 5.17:

- New SoC support: i.MX8 ULP.
- New board support: i.MX8MM/MN based TQMa8Mx boards, iMX8MN BSH SMM S2,
  i.MX8 ULP EVK.
- A series from Adam Ford to enable Camera and USB support for
  imx8mm-beacon device.
- Add overlays for various serdes protocols on LS1028A QDS board using
  different PHY cards.
- A series from Biwen Li to update LS1028A devices around RTC, flextimer
  and PWM support.
- A series from Joakim Zhang to update ENET/FEC suppport on i.MX8M
  devices.
- A couple of changes from Lucas Stach to update nitrogen8-som Ethernet
  PHY and I2C1 pad configuration.
- A series from Martin Kepplinger to split out a shared imx8mq-librem5-r3
  dtsi for Librem5 devices.
- Add cache descriptions for i.MX8 SoCs.
- A series from Vladimir Oltean to update ls1028a-rdb device tree in
  order to share the DTS between Linux and U-Boot.
- Random device addtion to various i.MX8 and LX2160A based devices.

* tag 'imx-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (56 commits)
  arm64: dts: imx8mp-evk: configure multiple queues on eqos
  arm64: dts: ls1028a-qds: add overlays for various serdes protocols
  arm64: dts: ls1028a-qds: enable lpuart1
  arm64: dts: ls1028a-qds: move rtc node to the correct i2c bus
  arm64: dts: ls1028a-rdb: enable pwm0
  arm64: dts: ls1028a: add flextimer based pwm nodes
  arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup source
  arm64: dts: ls1028a: Add PCIe EP nodes
  arm64: dts: lx2162a-qds: add interrupt line for RTC node
  arm64: dts: lx2162a-qds: support SD UHS-I and eMMC HS400 modes
  arm64: dts: lx2160a: enable usb3-lpm-capable for usb3 nodes
  arm64: dts: lx2160a-qds: Add mdio mux nodes
  arm64: dts: lx2160a: add optee-tz node
  arm64: dts: lx2160a-rdb: Add Inphi PHY node
  arm64: dts: imx8mm: don't assign PLL2 in SoC dtsi
  arm64: dts: nitrogen8-som: correct i2c1 pad-ctrl
  arm64: dts: nitrogen8-som: correct network PHY reset
  arm64: dts: imx8mn-bsh-smm-s2/pro: Add iMX8MN BSH SMM S2 boards
  arm64: dts: imx8mm/n: Remove the 'pm-ignore-notify' property
  arm64: dts: imx8ulp: add power domain entry for usdhc
  ...

Link: https://lore.kernel.org/r/20211218071427.26745-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 16:06:27 +01:00
Arnd Bergmann
990102a792 Devicetree changes for TI K3 platforms for v5.17 merge window:
* New Platforms:
   - J721s2 SoC, SoM and Common Processor Board support
 * New features:
   - CAN support on AM64 EVM and SK
   - TimeSync Router on AM64
 * Fixes:
   - Correct d-cache-sets info on J7200
   - Fix L2 cache-sets value for J721e/J7200/AM64
   - Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200
   - Disable McASP on IoT2050 board to fix dtbs_check warnings
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEEyRC2zAhGcGjrhiNExEYeRXyRFuMFAmG8nQoQHHZpZ25lc2hy
 QHRpLmNvbQAKCRDERh5FfJEW423oB/wMWRML3F6+LKGkDpm6Dme6oV24NzhnACBl
 CQ0me3NpQEq4QELPasRwc9E4WOLGCGtDS1HByCrpCELFI7ET9ebwgo7yxl9nvJm+
 nzSGwWY9/n3wtXhEc68r0if12WRuu59YTrhf+Q5GNF6uh4iv5aSmAfdSQmUljER5
 hs1mZVAQflbxhsG5XR+OUGUvxQZ6Uy8F0OjW++a+ci3QtmQ9y+FUCIMdeLMvXD4C
 efaWtFtselePPqN3AJMRddAgo/rbzXWBaX57LG8oMz4a223Ima7FpVB0sgzsnYh8
 +qG1JqFC88SR9Prjp7n8oaBdopL+ZXOZvernLWonFIGvvodK57ZM
 =DYkC
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAmXgACgkQmmx57+YA
 GNlR3g/+MjiqccCspohN8BRhsOTpDtq7NBM+F/oqwKzr9sktpwWeMz6dI1hjPihz
 spyixzw10lcHdO3me1B8jOV2+Cek8zZzhDHK0tBXZU4AO+lNmgsjyxWs953TMcg8
 eklBb3TpocHfGEuJSzPfTAD1B9QRB3Bl7kMztwE9uNKUCJiXCToIs63i/8QaCjIG
 kNzJOCdndw07h4Ms+6MTlDLbpivFnedU43YyrtYGCovg5tlv02B8452KpbfHAIUf
 MuuCAIYHm/ZAZa8aOfQ3ZsxwwXCYVu77uG14CTQKChOJeOZ9xzf5WFsRtY4EjJFW
 bixwAQ9ZxFuFm8vXPz5vHkNh0nDGdHV2LJ7SVCoFZ/zcxXROH8+ol9/XtHsaShRh
 C5+Ekz8GWvWnVCaeon53vzMXneVRoK6YvxtS1P87uuaM8IH3U8lktmHaJMlD/qdl
 mGLyJs4GRt3tKdqlLB3FvUb1tWSLSZ84fuRHVb/FXY9M/driZYgGymH7axTWJtSE
 m3rB2EMvbYWfdV69J8T0JSPmLwRY9lkJxSvnJulXB/J0yuvqHesrXoZHbiqxkZiM
 adYT/ub6a03yRwoCFowTtOfBGyHOG7SLwrdHQ5dam0dCHjc0SGgJZj+gnHWh0asC
 +/JMhePTxD1fH0UmElRHY1L1of6iWguWXTFgNZhHUxbCj/z+dSU=
 =R9bG
 -----END PGP SIGNATURE-----

Merge tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt

Devicetree changes for TI K3 platforms for v5.17 merge window:

* New Platforms:
  - J721s2 SoC, SoM and Common Processor Board support
* New features:
  - CAN support on AM64 EVM and SK
  - TimeSync Router on AM64
* Fixes:
  - Correct d-cache-sets info on J7200
  - Fix L2 cache-sets value for J721e/J7200/AM64
  - Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200
  - Disable McASP on IoT2050 board to fix dtbs_check warnings

* tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
  arch: arm64: ti: Add support J721S2 Common Processor Board
  arm64: dts: ti: Add initial support for J721S2 System on Module
  arm64: dts: ti: Add initial support for J721S2 SoC
  dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2
  dt-bindings: arm: ti: Add bindings for J721s2 SoC
  arm64: dts: ti: iot2050: Disable mcasp nodes at dtsi level
  arm64: dts: ti: k3-am642-evm/sk: Add support for main domain mcan nodes in EVM and disable them on SK
  arm64: dts: ti: k3-am64-main: Add support for MCAN
  arm64: dts: ti: k3-j721e-common-proc-board: Add support for mcu and main mcan nodes
  arm64: dts: ti: k3-j721e: Add support for MCAN nodes
  arm64: dts: ti: am654-base-board/am65-iot2050-common: Disable mcan nodes
  arm64: dts: ti: k3-am65-mcu: Add Support for MCAN
  arm64: dts: ti: k3-am64-main: add timesync router node
  arm64: dts: ti: k3-j7200: Correct the d-cache-sets info
  arm64: dts: ti: k3-j721e: Fix the L2 cache sets
  arm64: dts: ti: k3-j7200: Fix the L2 cache sets
  arm64: dts: ti: k3-am642: Fix the L2 cache sets
  arm64: dts: ti: j721e-main: Fix 'dtbs_check' in serdes_ln_ctrl node
  arm64: dts: ti: j7200-main: Fix 'dtbs_check' serdes_ln_ctrl node
  arm64: dts: ti: k3-j721e: correct cache-sets info

Link: https://lore.kernel.org/r/20211217172806.10023-2-vigneshr@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 15:55:52 +01:00
Daniel Palmer
e82513696e dt-bindings: gpio: msc313: Add offsets for ssd20xd
Add the gpio offsets for the SSD201 and SSD202D chips.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-20 15:48:43 +01:00
Arnd Bergmann
b87cd3759d dt-bindings: Changes for v5.17-rc1
This contains a bunch of json-schema conversions for various Tegra-
 related DT bindings and additions for new SoC and board support.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmG8sRoTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoUpLD/9aTWMH3DhMh2uKpOOt8TOdNiZXLqec
 GLXFoA3jHNHxEcwOXU6or8Hg4ipZnYgN2tspu2qpI+OvgwsoZcJqu8WAfH+fS2vv
 950OmjAdKBTQhiOO1eSo86Kq00orE6TdMQ3NfTUqEKKcjbiAruy+ojuDfFRoutP+
 UCe7Vl8CMi++MFmvyKBLu2GoDKb2JoKtoabiCxNwchZH3acgWFMfxeLBWNBj6HqH
 W7h+uld9MTg1rEZ7P7ZGspiXh9Nzt8e3e2un7j24L0qDI+s8Ur4XOf+Fms4aAMXc
 Pbme+q4DaA4xcFXVd5kyAKK1f6kYNVNZBHjKMVuPR4zjK4vADAZ2SZ0hFc3pE7hB
 rZtjwp4TphuwGrwNoXE4koi04GZStwnvp/Wr4BlCSyycY2H1UxMHHgMDWLA4WVVw
 JM+9uvjvCe0oE7x6+l4usWMVJrQljWH3IU5w4SXyzowYu5cvbWFhqRieFcg8iDbF
 CnGJGorq6bKJExiIyWtiRR4+m1TGsBq2cNUb1A0qgUTrMq6O2R4AiqSe45wDYSlQ
 z1zON1LILctiQfyCM2vsDLOe4AEyitzQkRPS9zo7Jn6dPnf9k3knpTDdyDS7vU2A
 juR3JOTdHuZ6jNBu5ykJbr3EN54D9nXHEGEl5ToHkahXEpJIC5haQOkRYU+OxER0
 C+gWIEJcroJkjA==
 =aSMg
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAlSQACgkQmmx57+YA
 GNkY/g//Wc6o+0wNZ8DBGSvI/3spHcNdSeIFwprmMJyBd1ho30kDL+jBW+5bYekT
 5X7GC7E/GkbxfvePQkZtS5+qFFdOV5qtQdjLEf2bQc/RuErnwnLttLBTFQpuBNHh
 VFjB+KHkEGtGFjjJ6CCnz57M5m+4NBWpIBwtubEygWhopCAb6as/dvi3F6Gso4lq
 xUhRe7Gx7LiJeqJhQqhGTgLo50oBQOHbXsIKEMuwXDMuhsQnpWVq3srJPr6pfgZi
 Q4cgE7GTKCe2TE7wDk9wKB5ptK6hntXswN51tFEGZk/5PNjot+64LzIRQ47CjpGm
 nisGWyT86ksaVZnXZlRvynbedWasrXITL76ccadbF4vqZGe9G07kw5N+i/t05DeN
 TkvXSBe+4e6q6zAOzrUUCP59R7X+sgC8phYj8al8We7i+Prn5IX+a4Glm4wiOMVv
 n9j9yRr/YPDrLVDjmqIhESzSmq5IZucbuqi7CW+TeaKrILlMaYcWuxXdAd8H9Ite
 krT4RxSkM+DJCW0OGIpYH9EtynHpf1HGhlP05wmrSa+quWa8h7WBCS2D9lFk4RU3
 1cqV1qHLqL+HctxP0LGS2ajT1sUwkgoshijNlknmlwQW+Wzqu56J1H/+toLrH1XK
 20ZALOao6CN344n2A//XVOk0udBShg93KmvTLhv2HQ4SIK5Jlwg=
 =acJz
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.17-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.17-rc1

This contains a bunch of json-schema conversions for various Tegra-
related DT bindings and additions for new SoC and board support.

* tag 'tegra-for-5.17-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits)
  media: dt: bindings: tegra-vde: Document OPP and power domain
  media: dt: bindings: tegra-vde: Convert to schema
  dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D
  dt-bindings: host1x: Document OPP and power domain properties
  dt-bindings: clock: tegra-car: Document new clock sub-nodes
  dt-bindings: ARM: tegra: Document Pegatron Chagall
  dt-bindings: ARM: tegra: Document ASUS Transformers
  dt-bindings: usb: tegra-xudc: Document interconnects and iommus properties
  dt-bindings: serial: Document Tegra234 TCU
  dt-bindings: serial: tegra-tcu: Convert to json-schema
  dt-bindings: thermal: tegra186-bpmp: Convert to json-schema
  dt-bindings: firmware: tegra: Convert to json-schema
  dt-bindings: tegra: pmc: Convert to json-schema
  dt-bindings: serial: 8250: Document Tegra234 UART
  dt-bindings: mmc: tegra: Document Tegra234 SDHCI
  dt-bindings: fuse: tegra: Document Tegra234 FUSE
  dt-bindings: fuse: tegra: Convert to json-schema
  dt-bindings: rtc: tegra: Document Tegra234 RTC
  dt-bindings: rtc: tegra: Convert to json-schema
  dt-bindings: mailbox: tegra: Document Tegra234 HSP
  ...

Link: https://lore.kernel.org/r/20211217162253.1801077-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 15:37:24 +01:00
Arnd Bergmann
9593bdfa1d Samsung SoC drivers changes for v5.17
1. Exynos ChipID: add Exynos7885 support.
 2. Exynos PMU: add Exynos850 support.
 3. Minor bindings cleanup.
 4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
    a shared IP block between I2C, UART/serial and SPI. Basically one has
    to choose which feature the USI block will support and later the
    regular I2C/serial/SPI driver will bind and work.
    This merges also one commit with dt-binding headers from my dts64
    pull request.
 
    Together with a future serial driver change, this will break the ABI.
 
    Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards
 
    Why: To properly and efficiently support the USI with new hierarchy
    of USI-{serial,SPI,I2C} devicetree nodes.
 
    Rationale:
    Recently added serial and USI support was short-sighted and did not
    allow to smooth support of other features (SPI and I2C). Adding
    support for USI-SPI and USI-I2C would effect in code duplication.
    Adding support for different USI versions (currently supported is
    USIv2 but support for v1 is planned) would cause even more code
    duplication and create a solution difficult to maintain.
    Since USI-serial and ExynosAutov9 have been added recently, are
    considered fresh development features and there are no supported
    products using them, the code/solution is being refactored in
    non-backwards compatible way.  The compatibility is not broken yet.
    It will be when serial driver changes are accepted.
    The ABI break was discussed with only known users of ExynosAutov9 and
    received their permission.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmHAa1EQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1+/HEACSadLl5gVkHa2IDfnG5q8b0rWK2/qLNsKR
 YTLDB3XnLWMEZs7TMDqT6OtTKaQSJOlUAVKL5ZkZ9W0DNcG0mWcMdIPJ2HH8nv9Q
 oVwJnOpDVFRal/zligg6JO1Rwly9ZFJryg5o1k3Ii979wzRf5v4Wu/d7PdVQ53VB
 tmeL2tCE9Cf3LlnGi1Pnjcr9c/Jab62XFTXb/Hp62tXhtfCysVktaVLilTEnVP6D
 VJm842bLVLLGYmerUe7XvnmL7cpN07VzCCXl8QtiXQ92Sgf4hSLmn7CcwyfkVl0O
 vEhK8CrHgx4TenDUnF6DGec/64H+1f26BN0APbJWwoLX7jt595yZspmGhsHL6gmE
 lLNnl0mey5ExuNJTlEXpt4DJNjElA7s6C6kizoFwtIsdJWpnxLM+TB9CuqG2rS0o
 nRqEX1uIEYYIx4y3LK334Sctwnh0J90J40LrOzRNII2fwDa5THsckudgxCitUi+0
 xeX8NelVCAZrrzVWydCrDim7cT/VHPE1BC97vcVcViFFFjJt1clwn+gajGz7ffrt
 zm+XjubkaGWr81GivQK+axmZhg78229RjY2TYjFiDy7sPUnbDpT3JRxLv1Nh/xh8
 7nrzZoy0sZTdJ4j4n1+UkykoOzWJ96GifqIlqZBPOIHhVC0zSgGQFrQ8hKF1fdWb
 2BqdvGErUg==
 =2Ed8
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAlD4ACgkQmmx57+YA
 GNndpw//awblW/2vJ2hayxPCwQknzNXeEHn2jSQJ8j92Ep+Z90oyeiA7woPBepl2
 QxgLJlNRt7GGbLEH3R0wpx0kg5w4ZroHG1dyUxPfF/EFfnHpuCLNuUFnj8Cl/fPw
 14o2VLI7NBZFxK4pZYlrTX0QUWEnDET6G/LO3IL+/YelU8aBQZVBfb9Hvj9OnI1h
 juIPrfwaUNbl37HwfQU5FftQYJnOcy0EBiSOaqPoYpyIHguxU1QZ5mZy5M0iytGV
 HZFFYOfAs2l7kD+CVchtnGeIyWUinW7d4hRTS4qi4QP51pnaAefFnxHLKz9RwgMf
 FCKZUax4/t7ifDu9b2sqiT8htToY8/xpoHyi2YjQTvyM3vOTi2OLWtWbLv4fnybi
 L1MCAogcG/GCcTYECyGjSnfFV5c5CYIWEPqCJ50x4odj288OGSvtEZ2Q27j/HCvk
 dlhrAQyL+fIWt+U7LM9FnJRSwgD1fplvtXncuVl7J3oA8uXYZg5tw6LIFBkxQTMG
 Qypc5nxVtZK3Qz1Q59Q9zzZTE0amHr0m2uYGS6JOnIG6sbeApSLlxSW4+NMOLSMx
 BOfSZa1etm1TBx3fI0O0HjUb4MOnUwDoWrUrV5MkJohFtqvAoQMQejtjt11+ffGn
 SOTLAGE2VDTzCkAJs3gSLsESq6uB0wQFUiT68CyrR4ify61qZSs=
 =pxdx
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers

Samsung SoC drivers changes for v5.17

1. Exynos ChipID: add Exynos7885 support.
2. Exynos PMU: add Exynos850 support.
3. Minor bindings cleanup.
4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
   a shared IP block between I2C, UART/serial and SPI. Basically one has
   to choose which feature the USI block will support and later the
   regular I2C/serial/SPI driver will bind and work.
   This merges also one commit with dt-binding headers from my dts64
   pull request.

   Together with a future serial driver change, this will break the ABI.

   Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards

   Why: To properly and efficiently support the USI with new hierarchy
   of USI-{serial,SPI,I2C} devicetree nodes.

   Rationale:
   Recently added serial and USI support was short-sighted and did not
   allow to smooth support of other features (SPI and I2C). Adding
   support for USI-SPI and USI-I2C would effect in code duplication.
   Adding support for different USI versions (currently supported is
   USIv2 but support for v1 is planned) would cause even more code
   duplication and create a solution difficult to maintain.
   Since USI-serial and ExynosAutov9 have been added recently, are
   considered fresh development features and there are no supported
   products using them, the code/solution is being refactored in
   non-backwards compatible way.  The compatibility is not broken yet.
   It will be when serial driver changes are accepted.
   The ABI break was discussed with only known users of ExynosAutov9 and
   received their permission.

* tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  dt-bindings: soc: samsung: keep SoC driver bindings together
  soc: samsung: Add USI driver
  dt-bindings: soc: samsung: Add Exynos USI bindings
  soc: samsung: exynos-pmu: Add Exynos850 support
  dt-bindings: samsung: pmu: Document Exynos850
  soc: samsung: exynos-chipid: add Exynos7885 SoC support
  soc: samsung: exynos-chipid: describe which SoCs go with compatibles

Link: https://lore.kernel.org/r/20211220115405.30434-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 15:33:34 +01:00