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1 Commits

Author SHA1 Message Date
Chen Wang
5911423798 dt-bindings: clock: sophgo: add clkgen for SG2042 
Add bindings for the clock generator of divider/mux and gates working
for other subsystem than RP subsystem for Sophgo SG2042.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Rob Herring <robh@kernel.org>
 2024-06-14 14:49:40 +08:00