2 Commits

Author	SHA1	Message	Date
Sascha Hauer	575bc7b477	dt-bindings: clock: rockchip: add USB480M_PHY mux ... The USB480M clock can source from a MUX that selects the clock to come from either of the USB-phy internal 480MHz PLLs. These clocks are provided by the USB phy driver. This adds the define for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240405-clk-rk3568-usb480m-phy-mux-v1-1-6c89de20a6ff@pengutronix.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>	2024-04-10 07:08:50 +02:00
Elaine Zhang	0865517926	clk: rockchip: add dt-binding header for rk3568 ... Add the dt-bindings header for the rk3568, that gets shared between the clock controller and the clock references in the dts. Add softreset ID for rk3568. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20210315085608.16010-3-zhangqing@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>	2021-03-21 11:10:24 +01:00