Commit Graph

21 Commits

Author SHA1 Message Date
Krzysztof Kozlowski
25b306c484 pinctrl: nuvoton: Constify static 'pinctrl_desc'
The local static 'struct pinctrl_desc' is not modified, so can be made
const for code safety.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: J. Neuschäfer <j.ne@posteo.net>
Link: https://lore.kernel.org/20250611-pinctrl-const-desc-v2-6-b11c1d650384@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-06-18 13:26:36 +02:00
Linus Torvalds
29d9983b2c Pin control changes for the v6.15 kernel cycle:
Core changes:
 
 - None really.
 
 New drivers:
 
 - AMD ISP411 "AMD ISP" driver.
 
 - Exynos 2200 and 7870 SoC subdrivers.
 
 - Sophgo RISC-V SG2042 and SG2044 subdrivers.
 
 - Amlogic A4 subdriver.
 
 - Rockchip RK3528 subdriver.
 
 - Broadcom BCM21664 subdriver.
 
 - Allwinner A523/T527 subdriver.
 
 - Ingenic X1600 subdriver.
 
 - Microchip SAMA7D65 subdriver, essentially a re-branded
   Atmel AT91 PIO4 driver, but nowadays a Microschip SoC line.
 
 Improvements:
 
 - Bring in the devm_kmemdup_array() helper and use it throughout,
   also bring in changes to other subsystems for this to establish
   this helper.
 
 - Support EGPIO on the Qualcomm SA8775P SoC.
 
 - Extend EINT support in the Mediatek driver.
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Merge tag 'pinctrl-v6.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Core changes:

   - None really.

  New drivers:

   - AMD ISP411 "AMD ISP" driver

   - Exynos 2200 and 7870 SoC subdrivers

   - Sophgo RISC-V SG2042 and SG2044 subdrivers

   - Amlogic A4 subdriver

   - Rockchip RK3528 subdriver

   - Broadcom BCM21664 subdriver

   - Allwinner A523/T527 subdriver

   - Ingenic X1600 subdriver

   - Microchip SAMA7D65 subdriver, essentially a re-branded Atmel AT91
     PIO4 driver, but nowadays a Microschip SoC line

  Improvements:

   - Bring in the devm_kmemdup_array() helper and use it throughout,
     also bring in changes to other subsystems for this to establish
     this helper

   - Support EGPIO on the Qualcomm SA8775P SoC

   - Extend EINT support in the Mediatek driver"

* tag 'pinctrl-v6.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (101 commits)
  pinctrl: mediatek: Add EINT support for multiple addresses
  pinctrl: amlogic-a4: Drop surplus semicolon
  pinctrl: nuvoton: Reduce use of OF-specific APIs
  pinctrl: nuvoton: Convert to use struct group_desc
  pinctrl: nuvoton: Make use of struct pinfunction and PINCTRL_PINFUNCTION()
  pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP()
  pinctrl: npcm8xx: Fix incorrect struct npcm8xx_pincfg assignment
  pinctrl: tegra: Fix off by one in tegra_pinctrl_get_group()
  pinctrl: PINCTRL_AMDISP should depend on DRM_AMD_ISP
  pinctrl: qcom: sa8775p: Enable egpio function
  dt-bindings: pinctrl: qcom: Add egpio function for sa8775p
  pinctrl: qcom: tlmm-test: Validate irq_enable delivers edge irqs
  pinctrl: qcom: Clear latched interrupt status when changing IRQ type
  dt-bindings: pinctrl: airoha: Add missing gpio-ranges property
  pinctrl: bcm281xx: Add missing assignment in bcm21664_pinctrl_lock_all()
  pinctrl: amd: isp411: Fix IS_ERR() vs NULL check in probe()
  dt-bindings: pinctrl: at91-pio4: add microchip,sama7d65-pinctrl
  pinctrl: tegra: Set SFIO mode to Mux Register
  pinctrl-tegra: Restore SFSEL bit when freeing pins
  pinctrl: tegra: Add descriptions for SoC data fields
  ...
2025-03-29 16:59:16 -07:00
Andy Shevchenko
693c9ecd83 pinctrl: nuvoton: Reduce use of OF-specific APIs
Some drivers are using device property APIs along with OF-specific ones.
At the same time few of the latter can be converted to device property
calls. Reduce use of OF-specific APIs in order to bring a bit more consistency
into the drivers.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250318105932.2090926-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-20 09:14:10 +01:00
Andy Shevchenko
1bce744173 pinctrl: nuvoton: Make use of struct pinfunction and PINCTRL_PINFUNCTION()
Since pin control provides a generic data type and a macro for
the pin function definition, use them in the driver.

Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250318105932.2090926-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-20 09:14:10 +01:00
Andy Shevchenko
1a65846509 pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP()
The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro.
Utilize them instead of open coded variants in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250318105932.2090926-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-20 09:14:10 +01:00
Andy Shevchenko
113ec87b0f pinctrl: npcm8xx: Fix incorrect struct npcm8xx_pincfg assignment
Sparse is not happy about implementation of the NPCM8XX_PINCFG()

 pinctrl-npcm8xx.c:1314:9: warning: obsolete array initializer, use C99 syntax
 pinctrl-npcm8xx.c:1315:9: warning: obsolete array initializer, use C99 syntax
 ...
 pinctrl-npcm8xx.c:1412:9: warning: obsolete array initializer, use C99 syntax
 pinctrl-npcm8xx.c:1413:9: warning: too many warnings

which uses index-based assignment in a wrong way, i.e. it missed
the equal sign and hence the index is simply ignored, while the
entries are indexed naturally. This is not a problem as the pin
numbering repeats the natural order, but it might be in case of
shuffling the entries. Fix this by adding missed equal sign and
reformat a bit for better readability.

Fixes: acf4884a57 ("pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250318105932.2090926-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-20 09:14:09 +01:00
Charles Han
acf40ab427 pinctrl: nuvoton: npcm8xx: Add NULL check in npcm8xx_gpio_fw
devm_kasprintf() calls can return null pointers on failure.
But the return values were not checked in npcm8xx_gpio_fw().
Add NULL check in npcm8xx_gpio_fw(), to handle kernel NULL
pointer dereference error.

Fixes: acf4884a57 ("pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver")
Signed-off-by: Charles Han <hanchunchao@inspur.com>
Link: https://lore.kernel.org/20250212100532.4317-1-hanchunchao@inspur.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-25 17:21:50 +01:00
Yue Haibing
d6c6fd77e5 pinctrl: nuvoton: npcm8xx: Fix error handling in npcm8xx_gpio_fw()
fwnode_irq_get() was changed to not return 0, fix this by checking
for negative error, also update the error log.

Fixes: acf4884a57 ("pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver")
Signed-off-by: Yue Haibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/20250118031334.243324-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-17 00:16:01 +01:00
Tomer Maimon
1441195709 pinctrl: nuvoton: npcm8xx: modify pins flags
Modify the following pins flags on the Nuvoton NPCM8XX BMC:
- Add pins 110-113, 187, 191, 192, 194-199, 202 SLEW flag
- Add pins 229 and 230 GPO flag.
- Remove pin 233 SLEWLPC flag.
- Remove pin 251 SLEW flag.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-8-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:35 +02:00
Tomer Maimon
db5edf0f5c pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration
Modify clkrun and serirq pin configuration on the Nuvoton NPCM8XX BMC
SoC.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-7-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:35 +02:00
Tomer Maimon
d66fad91c9 pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group
Add pin 250 to DDR pins group on the Nuvoton NPCM8xx BMC SoC.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-6-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:34 +02:00
Tomer Maimon
4edcebbb43 pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36
This patch adds support for GPIO pins GPI35 and GPI36 on the Nuvoton
NPCM8xx BMC SoC.

The pins are configured for only for input.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-5-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:34 +02:00
Tomer Maimon
92f5f86b06 pinctrl: nuvoton: npcm8xx: clear polarity before set both edge
Clear polarity before setting both edges to ensure that the polarity is
in the same state before configuring events for both edges

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-4-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:34 +02:00
Tomer Maimon
20070bdc1c pinctrl: nuvoton: npcm8xx: remove non-existent pins, groups, functions
Remove non-existent smb4den abd lpcclk pins, groups and functions on
the Nuvoton NPCM8XX BMC SoC.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-3-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:34 +02:00
Bartosz Golaszewski
11d84b2033 pinctrl: nuvoton: npcm8xx: drop wrappers around pinctrl_gpio_request/free()
pinctrl_gpio_*() helpers now have signatures corresponding with those of
the GPIOLIB callbacks. We can drop the wrappers.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:23 +01:00
Bartosz Golaszewski
b679d6c06b treewide: rename pinctrl_gpio_direction_output_new()
Now that pinctrl_gpio_direction_output() is no longer used, let's drop
the '_new' suffix from its improved variant.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
315c46f9b6 treewide: rename pinctrl_gpio_direction_input_new()
Now that pinctrl_gpio_direction_input() is no longer used, let's drop the
'_new' suffix from its improved variant.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
4fccb263f3 treewide: rename pinctrl_gpio_free_new()
Now that pinctrl_gpio_free()() is no longer used, let's drop the '_new'
suffix from its improved variant.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
acb38be654 treewide: rename pinctrl_gpio_request_new()
Now that pinctrl_gpio_request() is no longer used, let's drop the '_new'
suffix from its improved variant.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
481a59fb3d pinctrl: nuvoton: npcm8xx: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Tomer Maimon
acf4884a57 pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver
Add pinctrl and GPIO controller driver support to Arbel BMC NPCM8XX SoC.

Arbel BMC NPCM8XX pinctrl driver based on Poleg NPCM7XX, except the
pin mux mapping difference the NPCM8XX GPIO supports adjust debounce
period time.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/r/20230828140849.21724-3-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-11 15:51:40 +02:00