The conversion of all GPIO drivers to using the .set_rv() and
.set_multiple_rv() callbacks from struct gpio_chip (which - unlike their
predecessors - return an integer and allow the controller drivers to
indicate failures to users) is now complete and the legacy ones have
been removed. Rename the new callbacks back to their original names in
one sweeping change.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
After commit a934a57a42 ("scripts/misc-check: check missing #include
<linux/export.h> when W=1") and 7d95680d64 ("scripts/misc-check:
check unnecessary #include <linux/export.h> when W=1"), we get some build
warnings with W=1:
pinctrl-intel.c: warning: EXPORT_SYMBOL() is used, but #include <linux/export.h> is missing
So fix these build warnings for the driver code.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the driver to using
them.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the driver to using
them.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the driver to using
them.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the driver to using
them.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
We already have ACPI dependency for Intel pinctrl menu. No need to
repeat it.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* Split devres APIs to a separate header (linux/device/devres.h)
* Move IOMEM_ERR_PTR() to err.h to avoid unneeded loops
* Introduce devm_kmemdup_array()
* Use devm_kmemdup_array() in input, IIO, and pinctrl subsystems
The following is an automated git shortlog grouped by driver:
baytrail:
- copy communities using devm_kmemdup_array()
cherryview:
- use devm_kmemdup_array()
devres:
- Introduce devm_kmemdup_array()
driver core:
- Split devres APIs to device/devres.h
err.h:
- move IOMEM_ERR_PTR() to err.h
iio:
- adc: xilinx-xadc-core: use devm_kmemdup_array()
- imu: st_lsm9ds0: Replace device.h with what is needed
input:
- ipaq-micro-keys: use devm_kmemdup_array()
- sparse-keymap: use devm_kmemdup_array()
intel:
- copy communities using devm_kmemdup_array()
Merge patch series "Split devres APIs to device/devres.h and introduce devm_kmemdup_array()":
- Merge patch series "Split devres APIs to device/devres.h and introduce devm_kmemdup_array()"
pxa2xx:
- use devm_kmemdup_array()
tangier:
- use devm_kmemdup_array()
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEqaflIX74DDDzMJJtb7wzTHR8rCgFAme8RZYACgkQb7wzTHR8
rCjJZQ/+I3T47leAtx3RJV9ZhJ5EoXB3sk9l8ob5tYT0U2FafWHHyTmdI1/6C7od
cdjxoChoVWRrQwscu8i37Jnh955PiZSDW2NGNeVLi7+bRotSkuQbNR0QZ1bC6qe4
IHRQzMbIXgfy5mDISHQU9eshL7qw3VgPQ2Ol2v/w/xVR44X7to9PvmSVp6KTMEj4
E1xzVNHAHlsx3qEGd+ytsutNMCpQZfYwn8QJjr8p2CI32in5asSrtrVUzcWP6db3
64ohbpP8aetjrhct2XSWeHL9zrAl92LMMbxuZZMAVQs3Agef3967LGYR213eMtEN
637py119PmEd7l366LFifTICbDVVTIf3bv19wP3CkCMoFta10BGkPuIvBlyJCqHW
Hryljafx6DKMSldUN1HUQXgvqlgpjliMm/hDyiFstQAUul2Olz8WizZfeZq4ixeb
mKqGqjMVxIROKmOPouLSF12kgX1TAvgEfH6RMBGsfUuZVux0lRJr0lInesNrxWvl
/djJJoldRfeS1rL2turis3YlBlvqrDr4dEIpCLUlpmYfR6QnUSHA+AzRKkNECrbx
1AEstCculkLUXfCnTReHm+SZfk+HhDY/aVIaiEDLBLb52dY7Us2tlhC/CrYSVksD
hT6EULuo5jDCNw8EJc/eB0J/E2e0WiDaxUEnh/Xnap4qC1vJqkg=
=j1xo
-----END PGP SIGNATURE-----
Merge tag 'ib-devres-iio-input-pinctrl-v6.15' into intel/pinctrl
There are a few Intel pin control drivers that are affected
by the devm_kmemdup_array() conversion, merge the ib-devres-iio-input-pinctrl
for making development going smoothly.
* Split devres APIs to a separate header (linux/device/devres.h)
* Move IOMEM_ERR_PTR() to err.h to avoid unneeded loops
* Introduce devm_kmemdup_array()
* Use devm_kmemdup_array() in input, IIO, and pinctrl subsystems
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Convert to use devm_kmemdup_array() and while at it, use source size
instead of destination.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Convert to use devm_kmemdup_array() and while at it, use source size
instead of destination.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Copy communities using devm_kmemdup_array() instead of doing it manually.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
When instantiating PWM, the bypass should be set to false. The field
is used for the selected Intel SoCs that do not have PWM feature enabled
in their pin control IPs.
Fixes: eb78d3604d ("pinctrl: intel: Enumerate PWM device when community has a capability")
Reported-by: Alexis GUILLEMET <alexis.guillemet@dunasys.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: Alexis GUILLEMET <alexis.guillemet@dunasys.com>
The Intel pinctrl driver can provide a PWM device and for that needs to
call the function devm_pwm_lpss_probe(). That function is provided by
the pwm-lpss driver which intends to export it in the "PWM_LPSS"
namespace. To prepare fixing the pwm-lpss driver to indeed use the
"PWM_LPSS" namespace, import that namespace when used.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Instead of relying on the fact that the parent IRQ chip supports
fasteoi mode and calling the respective callback at the end of
the interrupt handler, surround it with enter and exit helpers
for chained IRQ handlers which will consider all possible cases.
This in particular unifies how GPIO drivers handle IRQ.
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Instead of relying on the fact that the parent IRQ chip supports
fasteoi mode and calling the respective callback at the end of
the interrupt handler, surround it with enter and exit helpers
for chained IRQ handlers which will consider all possible cases.
This in particular unifies how GPIO drivers handle IRQ.
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
No core changes this time.
New drivers:
- Xlinix Versal pin control driver.
- Ocelot LAN969x pin control driver.
- T-Head TH1520 RISC-V SoC pin control driver.
- Qualcomm SM8750, IPQ5424, QCS8300, SAR2130P and QCS615 SoC
pin control drivers.
- Qualcomm SM8750 LPASS (low power audio subsystem)
pin control driver.
- Qualcomm PM8937 mixsig IC pin control support, GPIO and
MPP (multi-purpose-pin).
- Samsung Exynos8895 and Exynos9810 SoC pin control driver.
- SpacemiT K1 SoC pin control driver.
- Airhoa EN7581 IC pin control driver.
Improvements:
- The Renesas subdriver now supports schmitt-trigger and
open drain pin configurations if the hardware supports it.
- Support GPIOF and GPIOG banks in the Aspeed G6 SoC.
- Support the DSW community in the Intel Elkhartlake SoC.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmdAhqsACgkQQRCzN7AZ
XXOX/BAAkTh2Xwh4t9u9p0wjvXcY9bu+O204vUaQNJr3zphqLegJihChriU8LiQN
7BTQcYMHMsoVXRzFsoRBSocfJmcFE6amoHemSkCaYDCrr0fchk61AzkivUMvMHBi
8qBFB1kYbk/Cmk2JwOEpf16gT45wTdIIOfqB6X9ikRdIUwCgjMH77OYHilXF0zPO
vmikY8fnIj/0r9hdVqD5bcpeHo8XHZpHBMvr1NfMUehfhGoJNLZF+xyg+fosnoDH
om92ugKC856jVP0Hl9kfL58ggKuBI2YPlm2OW9VxAQZu7EMvlCeUjv8R+sNpXrpI
rod84A62/K8OYcQLW+UIA2ykty3LFfh90wKtpkKV0z/7jtEfBBzCMsln/mCUVHEl
3zoo0n6n68r0i1zKAFf45JGJExeJv5U0lBfFGm8PnOOouZW3IYJcgHQfBswaPzRD
lEsT37jUEF+qE0VWqBx3xTz/w2Kxs5XHoF4P5UwE5TCAA90hjMLPdXXzn6bNiuww
4T8iOT5NFwHqlIKJxRBYJDDuc+EtQksmKhbDXilKgg0h+n/YmQN12CFKy5d+Ch57
mT/M6bP4FCsTOioUEALUVLMzUN7FJjPHN7GO1nwpA6Rmb8yMaYZJHxglfjduo83y
PNOsaLRY3BhukBh74B6OTq7SKgvH1Bj1VwEY87JhYZLmDE49xjw=
=F7bj
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v6.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"No core changes this time.
New drivers:
- Xlinix Versal pin control driver
- Ocelot LAN969x pin control driver
- T-Head TH1520 RISC-V SoC pin control driver
- Qualcomm SM8750, IPQ5424, QCS8300, SAR2130P and QCS615 SoC pin
control drivers
- Qualcomm SM8750 LPASS (low power audio subsystem) pin control
driver
- Qualcomm PM8937 mixsig IC pin control support, GPIO and MPP
(multi-purpose-pin)
- Samsung Exynos8895 and Exynos9810 SoC pin control driver
- SpacemiT K1 SoC pin control driver
- Airhoa EN7581 IC pin control driver
Improvements:
- The Renesas subdriver now supports schmitt-trigger and open drain
pin configurations if the hardware supports it
- Support GPIOF and GPIOG banks in the Aspeed G6 SoC
- Support the DSW community in the Intel Elkhartlake SoC"
* tag 'pinctrl-v6.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (105 commits)
pinctrl: airoha: Use unsigned long for bit search
pinctrl: k210: Undef K210_PC_DEFAULT
pinctrl: qcom: spmi: fix debugfs drive strength
pinctrl: qcom: Add sm8750 pinctrl driver
dt-bindings: pinctrl: qcom: Add sm8750 pinctrl
pinctrl: cy8c95x0: remove unneeded goto labels
pinctrl: cy8c95x0: embed iterator to the for-loop
pinctrl: cy8c95x0: Use temporary variable for struct device
pinctrl: cy8c95x0: use flexible sleeping in reset function
pinctrl: cy8c95x0: switch to using devm_regulator_get_enable()
pinctrl: cy8c95x0: Use 2-argument strscpy()
dt-bindings: pinctrl: sx150xq: allow gpio line naming
pinctrl: single: add marvell,pxa1908-padconf compatible
dt-bindings: pinctrl: pinctrl-single: add marvell,pxa1908-padconf compatible
dt-bindings: pinctrl: correct typo of description for cv1800
pinctrl: qcom: spmi-mpp: Add PM8937 compatible
dt-bindings: pinctrl: qcom,pmic-mpp: Document PM8937 compatible
pinctrl: qcom-pmic-gpio: add support for PM8937
dt-bindings: pinctrl: qcom,pmic-gpio: add PM8937
pinctrl: Use of_property_present() for non-boolean properties
...
This includes following Intel pinctrl changes for v6.13 merge window:
- Expose DSW community on Elkhart Lake.
- Elaborate in the code comment the pull bias settings.
Both have been in linux-next with no reported issues.
-----BEGIN PGP SIGNATURE-----
iQJUBAABCgA+FiEEVTdhRGBbNzLrSUBaAP2fSd+ZWKAFAmcskXwgHG1pa2Eud2Vz
dGVyYmVyZ0BsaW51eC5pbnRlbC5jb20ACgkQAP2fSd+ZWKBZWg/8CN4qU9KeZrMK
gao6NLTSFmwUsesGK7S/Lk3LpKYOquGarEIxMSeHTBMFOIgu+RQ+meqjpTm7X0Oa
fXUDzOPdhwqw36EbqR8DVSXoAeNSfwK2sfmQeOKbQFfBtgFLbSNyfdYFr1kJnYlw
7zKSsLXNxgi1KFu81K0zyPzPkX6EEy1jmSLQ0k3uXFfqDvagy3d1h2nvSvV9ze6f
WtPz1H8wye2a5WCOC2HnFujmXWFBByp+QEfyNMB4vwwPEoN2ZgbogCq11lyDJufc
DtlHUM0jf1nslL3F9RE/nfP/k2AHYZ6Y4gDXBFaUHF1LyaEzzmHh+afMErvfjMvs
j7v3s+6RG2bAzrDB0bZC1EZ9UUuSW2pIS/Fyo0Sd+IKGI2m90As1IccveI5m3hqJ
b1AF5mGqF9ljxPdJtCEfxpZGR+57r0uAU/mQxE2/mQjKSM5KmJ9BeWBR0WwbSqnE
o5zBoba+/v1YipkDFk2UXSHDXdzBu8Qtlt0pOHaNigtewOZsc0tWrz3jptiiFtPv
YTuZ8mv67PgZOm1hZY58coEMvs4bRsO98+NmGkAXu6Wi2CWVcaqo67GJEsqLsTrw
pfAtdjO31iWxmg7vfm3E4/6tEZw3/KdlYWJ2lKT7fXL3O2mGxGeTpIk95QsTsq1S
aZHWETf5GXiE+lq4jGh0ag8X3ZfgKzg=
=TQtH
-----END PGP SIGNATURE-----
Merge tag 'intel-pinctrl-v6.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel
intel-pinctrl for v6.13-2
This includes following Intel pinctrl changes for v6.13 merge window:
- Expose DSW community on Elkhart Lake.
- Elaborate in the code comment the pull bias settings.
Both have been in linux-next with no reported issues.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Hardware has a DSW (Deep Sleep Well) community that might be exposed
by some BIOSes. Add support for it in the driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Add a human readable decoder for pull bias values in the comment.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
After commit 0edb555a65 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.
Convert all platform drivers below drivers/pinctrl to use .remove(),
with the eventual goal to drop struct platform_driver::remove_new(). As
.remove() and .remove_new() have the same prototypes, conversion is done
by just changing the structure member name in the driver initializer.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://lore.kernel.org/20241007205803.444994-8-u.kleine-koenig@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Intel Panther Lake is supported by the generic platform driver,
so add it to the list of supported in Kconfig.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Substitute the comma with a semicolon in the `ncommunities` assignment
for better readability and consistency with common C coding style.
Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
The device_for_each_child_node() loop requires calls to
fwnode_handle_put() upon early returns to decrement the refcount of
the child node and avoid leaking memory if that error path is triggered.
There is one early returns within that loop in
intel_platform_pinctrl_prepare_community(), but fwnode_handle_put() is
missing.
Instead of adding the missing call, the scoped version of the loop can
be used to simplify the code and avoid mistakes in the future if new
early returns are added, as the child node is only used for parsing, and
it is never assigned.
Cc: stable@vger.kernel.org
Fixes: c5860e4a27 ("pinctrl: intel: Add a generic Intel pin control platform driver")
Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* Enable High Impedance pin configuration support for Intel pin control
* Miscellaneous small improvements here and there
The following is an automated git shortlog grouped by driver:
baytrail:
- Drop duplicate return statement
intel:
- Constify struct intel_pinctrl parameter
- Inline intel_gpio_community_irq_handler()
- Introduce for_each_intel_gpio_group() helper et al.
- Constify intel_get_community() returned object
- Implement high impedance support
- Add __intel_gpio_get_direction() helper
- Refactor __intel_gpio_set_direction() to be more useful
- Move debounce validation out of the lock
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEhiZOUlnC9oKN3n3AmT3/83c5Sy0FAmbgAl8ACgkQmT3/83c5
Sy3XhQ//WfkhNv73IVvGPlKLI4s6A43xINEZ/8gVNeukaOGIi54xu3wlV5QevDOS
6MacKg0g0ZUo1KQXp86o54LqvCfOLklFzJsiWkYXqqImRvuA+5OuP4fVOv3XV9Ga
i1b07A4vFamHwzUKt5kTYwhPOcqNzwYmPgU3jcArpANFs3lahVA9zCCzyXURTNnQ
UH546mEqDezH2m5WgDHATBakSRJJr9bsVYIwAO/8OOz+V75Spmag0vJgWY/9QQms
3mUoJmTLOQbaDUqVqvTRU0uovgUlYXIOJS2EWLqnFBcK78fPZ1CDw0Vn8P6uo1km
/FGcNmoDyXwW6TmI+CyHgiYIItjSYPE6YpxQZtIiGxA79bZwvBO7QA/7CYPniu/i
WyKiKLUOYnvKTqsr9hKOYvHGV74hjRb0EuycnEyw0SCtsoxWlrNnuP4CG22X9O0+
OvfD3jMAFSAmYooifK0CZyi+IFphFpTUmy+fq+hT6MAH9H3uQ88QWThrw+4hA5O0
rNPtwvL0WoK+4v8twQbOSRVd63J20oMGL7+nGnymnO5EA/XLVIlCSBFQhhNBKC3/
OeWlyP/v+n6KnWNY4Wo9daBgF6Vej0B/9E5Z46mOKIDO5Q9iIzG4bOh/iwv9C/7Q
BCnbOYiXJyLZLOJ7k9AuE0DfeYzIZsNIyDwximc8wus937YE2/g=
=Z/p4
-----END PGP SIGNATURE-----
Merge tag 'intel-pinctrl-v6.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel
intel-pinctrl for v6.12-1
* Enable High Impedance pin configuration support for Intel pin control
* Miscellaneous small improvements here and there
The following is an automated git shortlog grouped by driver:
baytrail:
- Drop duplicate return statement
intel:
- Constify struct intel_pinctrl parameter
- Inline intel_gpio_community_irq_handler()
- Introduce for_each_intel_gpio_group() helper et al.
- Constify intel_get_community() returned object
- Implement high impedance support
- Add __intel_gpio_get_direction() helper
- Refactor __intel_gpio_set_direction() to be more useful
- Move debounce validation out of the lock
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There are a few functions that do not and should not change
the state of the pin control object. Constify the respective
parameter.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
No need to repeat 'return ret;' inside and outside conditional.
Just use one outside conditional for both cases.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Since we have for_each_intel_pad_group() helper, there is
no advantage of having intel_gpio_community_irq_handler().
Inline it into intel_gpio_irq().
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Introduce a helper macro for_each_intel_gpio_group() et al.
With those in place, update the users.
It reduces the C code base as well as shrinks the binary:
add/remove: 0/0 grow/shrink: 4/21 up/down: 39/-621 (-582)
Total: Before=15942, After=15360, chg -3.65%
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
There is nothing prevents us from constifying intel_get_community()
returned object. Do it to make code more robust.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Implement high impedance support for Intel pin control hardware.
It allows to set high impedance and check it.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Add __intel_gpio_get_direction() helper which provides all possible
physical states of the pad.
With that done, update current users and make the respective checks
consistent.
While at it, make the style of anonymous enum kernel documentation
consistent.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Refactor __intel_gpio_set_direction() to be more useful, i.e.
1) use one parameter per each direction to support all combinatios;
2) move IO to the only user that needs it.
With that done, update current users and deduplicate existing code.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
There is no need to validate debounce value under the lock.
Move it outside.
It also results in a smaller binary:
add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-11 (-11)
Total: Before=15374, After=15363, chg -0.07%
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Arrow Lake-H/U has the same GPIO hardware than Meteor Lake-P but
the ACPI ID is different. Add this new ACPI ID to the list of supported
devices.
Cc: stable@vger.kernel.org
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
GPIO_S0_SC57 / GPIO_S0_SC61 can be muxed to PCU_UART_TXD / PCU_UART_RXD,
add a pinconf group for this.
On Bay Trail board schematics using these pins as UART these are
called UART3_TXD / UART3_RXD, name the pinconf group "uart3_grp"
to be consistent with the schematics.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
For all the "score" pin-groups all the intel_pingroup-s to select
the non GPIO function are re-used for byt_score_gpio_groups[].
But this is incorrect since a pin-group includes the mode setting,
which for the non GPIO functions generally is 1, where as to select
the GPIO function mode must be set to 0.
So the GPIO function needs separate intel_pingroup-s with their own mode
value of 0.
Add a new PIN_GROUP_GPIO macro which adds a foo_gpio entry to each
pin-group defined this way and update byt_score_gpio_groups[] to point
to the new foo_gpio entries.
The "sus" usb_oc_grp usb_ulpi_grp and pcu_spi_grp pin-groups are special
because these have a non 0 mode value to select the GPIO functions and
these already have matching foo_gpio pin-groups, leave these are unchanged.
The pmu_clk "sus" groups added in commit 2f46d7f7e9 ("pinctrl: baytrail:
Add pinconf group + function for the pmu_clk") do need to use the new
PIN_GROUP_GPIO macro.
Fixes: 2f46d7f7e9 ("pinctrl: baytrail: Add pinconf group + function for the pmu_clk")
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* New agnostic driver to support Lunar Lake and newer platforms
* New driver for Intel Meteor Point-S (PCH for Meteor Lake-S)
* Update drivers to use new PM helpers
* Use RAII for locking in a few drivers (Raag, Andy)
* Reduce locking scope in some functions (Raag)
* Miscellaneous cleanups (Raag)
The following is an automated git shortlog grouped by driver:
alderlake:
- Switch to use Intel pin control PM ops
baytrail:
- Simplify code with cleanup helpers
- Move default strength assignment to a switch-case
- Factor out byt_gpio_force_input_mode()
- Fix types of config value in byt_pin_config_set()
broxton:
- Switch to use Intel pin control PM ops
cannonlake:
- Switch to use Intel pin control PM ops
cedarfork:
- Switch to use Intel pin control PM ops
denverton:
- Switch to use Intel pin control PM ops
elkhartlake:
- Switch to use Intel pin control PM ops
emmitsburg:
- Switch to use Intel pin control PM ops
geminilake:
- Switch to use Intel pin control PM ops
icelake:
- Switch to use Intel pin control PM ops
intel:
- Add Intel Meteor Point pin controller and GPIO support
- use the correct _PM_OPS() export macro
- Add a generic Intel pin control platform driver
- Revert "Unexport intel_pinctrl_probe()"
- allow independent COMPILE_TEST
- Refactor intel_pinctrl_get_soc_data()
- Move default strength assignment to a switch-case
- Make PM ops functions static
- Provide Intel pin control wide PM ops structure
jasperlake:
- Switch to use Intel pin control PM ops
lakefield:
- Switch to use Intel pin control PM ops
lewisburg:
- Switch to use Intel pin control PM ops
lynxpoint:
- Simplify code with cleanup helpers
meteorlake:
- Switch to use Intel pin control PM ops
sunrisepoint:
- Switch to use Intel pin control PM ops
tangier:
- simplify locking using cleanup helpers
- Move default strength assignment to a switch-case
- Enable 910 Ohm bias
tigerlake:
- Switch to use Intel pin control PM ops
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEqaflIX74DDDzMJJtb7wzTHR8rCgFAmWAKiUACgkQb7wzTHR8
rCgi/A/8CBFdd32S5gp/BIymhXIeU8FTee9khST9eX4Zn3Ox5VUjdDzKIaSk432z
cJW7ycbAT94YhGVqmHh05pO73qH5LtEGk79ccRWWrAqAT6WmmmYn1OOWPBLOyHdC
2ekSwmYe64BTk0UoAvYz6/BRFy8o3onET+HYtZwiMNvqdBvdBfCiVtkJK5KmNyPV
wbNOs1xfA9drH68T7k23UvmbjY84s6t/ftPwws+kh0YmkkR65GASNlS167xxXTbX
M72mLeY+NJt8fFaawJahQTKhAMc6K7s3udgFh0Gmt1paWsJ6ABu+RIDOaPIWVtAC
5hMlbYFVC2y3QpjXlW8SWGq2WzoN+hzM/e/KTo2/7QzY/pt95q/TDyE/RJfFWYhS
PkCTcdzkDjyrOmfbNatumIZZEfoRg7Ddw9Cn1NwDJQrFHAMJhcqsPaxrZ0CtCJYn
o/1kU7QvlQB3EGZiucQouy8b5yz/96I811htfqvEoNNrtz4g1AI5Wkfw3dusY0jB
oQaYG2M7fxI4u9AzU5+yfhk2cdxU1dv7+GStSXzc8GcppID5ub8bmpU6mARFFglV
NJwvS529sP3+XSqvSApS1uZR+fRJFX3Fpo5QMBJm12UOPFLc4EDCnalc48WCLD2q
yn2uCvssiAEogCKKy8ZAEi8aWlT706eGg5G2+9KhaJ+lfLFGfiA=
=72T1
-----END PGP SIGNATURE-----
Merge tag 'intel-pinctrl-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel
intel-pinctrl for v6.8-1
* New agnostic driver to support Lunar Lake and newer platforms
* New driver for Intel Meteor Point-S (PCH for Meteor Lake-S)
* Update drivers to use new PM helpers
* Use RAII for locking in a few drivers (Raag, Andy)
* Reduce locking scope in some functions (Raag)
* Miscellaneous cleanups (Raag)
The following is an automated git shortlog grouped by driver:
alderlake:
- Switch to use Intel pin control PM ops
baytrail:
- Simplify code with cleanup helpers
- Move default strength assignment to a switch-case
- Factor out byt_gpio_force_input_mode()
- Fix types of config value in byt_pin_config_set()
broxton:
- Switch to use Intel pin control PM ops
cannonlake:
- Switch to use Intel pin control PM ops
cedarfork:
- Switch to use Intel pin control PM ops
denverton:
- Switch to use Intel pin control PM ops
elkhartlake:
- Switch to use Intel pin control PM ops
emmitsburg:
- Switch to use Intel pin control PM ops
geminilake:
- Switch to use Intel pin control PM ops
icelake:
- Switch to use Intel pin control PM ops
intel:
- Add Intel Meteor Point pin controller and GPIO support
- use the correct _PM_OPS() export macro
- Add a generic Intel pin control platform driver
- Revert "Unexport intel_pinctrl_probe()"
- allow independent COMPILE_TEST
- Refactor intel_pinctrl_get_soc_data()
- Move default strength assignment to a switch-case
- Make PM ops functions static
- Provide Intel pin control wide PM ops structure
jasperlake:
- Switch to use Intel pin control PM ops
lakefield:
- Switch to use Intel pin control PM ops
lewisburg:
- Switch to use Intel pin control PM ops
lynxpoint:
- Simplify code with cleanup helpers
meteorlake:
- Switch to use Intel pin control PM ops
sunrisepoint:
- Switch to use Intel pin control PM ops
tangier:
- simplify locking using cleanup helpers
- Move default strength assignment to a switch-case
- Enable 910 Ohm bias
tigerlake:
- Switch to use Intel pin control PM ops
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This driver supports pinctrl/GPIO hardware found on Intel Meteor Point
(a Meteor Lake PCH) providing users a pinctrl and GPIO interfaces
including GPIO interrupts.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Use the new gpiochip_dup_line_label() helper to safely retrieve the
descriptor label.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Use macros defined in linux/cleanup.h to automate resource lifetime
control in the driver.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
When ->pin_config_set() is called from the GPIO library (assumed
GpioIo() ACPI resource), the argument can be 1, when, for example,
PullDefault is provided. In such case we supply sane default in
the driver. Move that default assingment to a switch-case, so
it will be consolidated in one place.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
There is a piece of code that it being used at least twice.
Factor it out.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
When unpacked, the config value is split to two of different types.
Fix the types accordingly.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Use macros defined in linux/cleanup.h to automate resource lifetime
control in the driver.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Use lock guards from cleanup.h to simplify locking.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Since we don't have runtime PM handles here, we should be using
EXPORT_NS_GPL_DEV_SLEEP_PM_OPS() macro, so that the compiler can
discard it in case CONFIG_PM_SLEEP=n.
Fixes: b10a74b5c0 ("pinctrl: intel: Provide Intel pin control wide PM ops structure")
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
New generations of Intel platforms will provide better description
of the pin control devices in the ACPI tables. Hence, we may provide
a generic pin control platform driver to cover all of them. Currently
the following Intel SoCs / platforms require this to be functional:
- Lunar Lake
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
