Commit Graph

6 Commits

Author SHA1 Message Date
Chin-Yen Lee
16e3d93c61 wifi: rtw89: pci: add PCI Express error handling
Sometimes PCIe Advanced Error Reporting(AER), like bad TLP or
Data link protocol error, happens due to unstable pci signal or
no response from PCI host.

  pcieport 0000:00:1c.0: AER: Uncorrected (Non-Fatal) error message received from 0000:01:00.0
  rtw89_8852be 0000:01:00.0: PCIe Bus Error: severity=Uncorrected (Non-Fatal), type=Transaction Layer, (Requester ID)
  rtw89_8852be 0000:01:00.0:   device [10ec:b852] error status/mask=00004000/00400000
  rtw89_8852be 0000:01:00.0:    [14] CmpltTO                (First)
  rtw89_8852be 0000:01:00.0: SER catches error: 0x4000
  pcieport 0000:00:1c.0: AER: device recovery successful
  rtw89_8852be 0000:01:00.0: FW backtrace invalid key: 0xbb6c3214
  ieee80211 phy0: Hardware restart was requested

Setup callback function to call SER function to reset driver to recover
from these states.

Signed-off-by: Chin-Yen Lee <timlee@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20250523062711.27213-3-pkshih@realtek.com
2025-06-10 09:23:06 +08:00
Ping-Ke Shih
456ad3210a wifi: rtw89: 8922ae: add variant info to support RTL8922AE-VS
RTL8922AE-VS is a variant of RTL8922AE, which is supported by firmware
version after 0.35.54.0 and only can support up to MCS11. Add a variant
struct to describe these requirements accordingly.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20250108020955.14668-3-pkshih@realtek.com
2025-01-12 09:36:49 +08:00
Ping-Ke Shih
6ab452d458 wifi: rtw89: pci: treat first receiving part as first segment for 8922AE
For early chips, the RX BD info contains FS/LS bits for first/last segments
of a receiving packet. For 8922AE, the FS bit should be ignored, or it
may throw warning:

  rtw89_8922ae 0000:1a:00.0: skb should not be ready before first segment start

To have compatible logic, FS determined by what pending skb is existing
(!new) or not.

Since we expect every single receiving packet in single one segment,
enlarge 4 bytes for RX BD info, and add a debug message to note if
RX buffer is possibly smaller than expected size.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20250103025126.15378-1-pkshih@realtek.com
2025-01-12 09:24:21 +08:00
Chih-Kang Chang
f8bcfb2076 wifi: rtw89: adjust thermal protection step and more RTL8852BE-VT ID
To have better tuning of TX duty for fields usage, adjust thermal
protection step to 5, then TX duty reduce to 75% at most. Add RTL8852BE-VT
ID to enable this function by the way.

Signed-off-by: Chih-Kang Chang <gary.chang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20241219014511.9056-1-pkshih@realtek.com
2024-12-30 09:14:15 +08:00
Ping-Ke Shih
9ef90a49b0 wifi: rtw89: pci: add quirks by PCI subsystem ID for thermal protection
Specific PCI subsystem ID (SSID) of WiFi cards is used by specific
customer who want to enable various features with different arguments.

Define PCI SSID quirks tables to enable thermal protection with two kinds
of thermal values for 110 and 120 degree Celsius.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20241016133735.7571-3-pkshih@realtek.com
2024-10-25 09:31:13 +08:00
Ping-Ke Shih
bbe48c328f wifi: rtw89: 8852bte: add PCI entry of 8852BE-VT
PCI device ID 10ec:b520 of RTL8852BE-VT is added as PCI entry, and define
chip capabilities for driver common routines.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20240720021340.12102-7-pkshih@realtek.com
2024-07-31 13:50:29 +08:00