Commit Graph

16 Commits

Author SHA1 Message Date
Ping-Ke Shih
3218f5bd8e wifi: rtw89: pci: correct ISR RDU bit for 8922AE
The interrupt status (ISR) bits of RX desc unavailable (RDU) for 8922AE
are B_BE_RDU_CH1_INT_V1 and B_BE_RDU_CH0_INT_V1. With wrong bits, if it
happens, driver can't recognize the situation and prompt a message.
Fix the definition accordingly.

Fixes: aa70f76120 ("wifi: rtw89: pci: generalize interrupt status bits of interrupt handlers")
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20250227131907.9864-1-pkshih@realtek.com
2025-03-05 19:52:05 +08:00
Ping-Ke Shih
9c1df813e0 wifi: rtw89: pci: disable PCIE wake bit when PCIE deinit
The PCIE wake bit is to control PCIE wake signal to host. When PCIE is
going down, clear this bit to prevent waking up host unexpectedly.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20241111063835.15454-1-pkshih@realtek.com
2024-11-18 10:05:59 +08:00
Ping-Ke Shih
bbc0be2ee2 wifi: rtw89: 8922ae: disable PCI PHY EQ to improve compatibility
For adaption EQ circuit, this HW design and affected by EIEOS (Electrical
Idle Exit Order Set) amplitude from platform and process from IC, so
disable EQ to improve that.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20240925013901.9835-3-pkshih@realtek.com
2024-10-01 20:57:29 +08:00
Ping-Ke Shih
1a82680839 wifi: rtw89: pci: consolidate PCI basic configurations for probe and resume
The PCI settings aren't always persistent after chip suspends, so
reconfigure the settings after chip resumes. Since most of these settings
are the same, consolidate them into a function to avoid missing somewhere.

Fix the missing case of 8922AE resume flow.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20240925013901.9835-2-pkshih@realtek.com
2024-10-01 20:56:12 +08:00
Chin-Yen Lee
60b3f2898a wifi: rtw89: update suspend/resume for different generation
The setting during suspend or resume is different between different
generation, so update it.

Signed-off-by: Chin-Yen Lee <timlee@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240302005828.13666-6-pkshih@realtek.com
2024-03-05 20:56:43 +02:00
Chin-Yen Lee
1bf6fa8ac6 wifi: rtw89: update DMA function with different generation
The register of control and polling function for TX/RX DMA is different
from different generation, so update them. Also rename polling_dma
function to polling_dma_idle to avoid misunderstanding.

Signed-off-by: Chin-Yen Lee <timlee@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240302005828.13666-4-pkshih@realtek.com
2024-03-05 20:56:42 +02:00
Chin-Yen Lee
53fe234f15 wifi: rtw89: pci: implement PCI CLK/ASPM/L1SS for WiFi 7 chips
PCI CLK/ASPM/L1SS is power management mechanism used to reduce power
consumption of PCI chip. The registers for setting of these features
in WiFi 7 Chip are different from WiFi 6 chip, so separate them
in generation information.

Signed-off-by: Chin-Yen Lee <timlee@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240222064258.59782-4-pkshih@realtek.com
2024-02-27 16:55:13 +02:00
Ping-Ke Shih
57b9426952 wifi: rtw89: pci: update SER timer unit and timeout time
Be higher resolution of SER timer unit from 32ms to 16ms to detect
abnormal situation more accurately, and set hardware watchdog timer to 4ms.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240121071826.10159-2-pkshih@realtek.com
2024-02-01 12:15:42 +02:00
Ping-Ke Shih
aa70f76120 wifi: rtw89: pci: generalize interrupt status bits of interrupt handlers
For WiFi 7, interrupt status registers and their definitions are changed
a lot, but the logic is still the same, so define fields to reuse the code.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231110012319.12727-5-pkshih@realtek.com
2023-11-14 12:22:42 +02:00
Ping-Ke Shih
9e1aff437a wifi: rtw89: pci: add pre_deinit to be called after probe complete
At probe stage, we only do partial initialization to enable ability to
download firmware and read capabilities. After that, we use this pre_deinit
to disable HCI to save power.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231110012319.12727-4-pkshih@realtek.com
2023-11-14 12:22:42 +02:00
Zong-Zhe Yang
d720cca762 wifi: rtw89: pci: stop/start DMA for level 1 recovery according to chip gen
Level 1 recovery is to recover TX/RX rings, so it needs PCI to stop/start
DMA. But, different chip gen have different implementations, either
register address/mask or function flow. So, configure callback of
stop/start DMA by chip gen.

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231110012319.12727-3-pkshih@realtek.com
2023-11-14 12:22:42 +02:00
Zong-Zhe Yang
d5d717a776 wifi: rtw89: pci: reset BDRAM according to chip gen
Configure callback of reset BDRAM (buffer descriptor RAM) by chip gen.
Refine the one of 802.11ax chip gen and drop a redundant duplicate of it
in 802.11ax chip gen. Then, assign right callback of rst_bdram for HCI ops
which needs to do callback according to chip gen.

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231110012319.12727-2-pkshih@realtek.com
2023-11-14 12:22:41 +02:00
Ping-Ke Shih
5cb0d6b878 wifi: rtw89: pci: implement PCI mac_post_init for WiFi 7 chips
For normal use, we do additional settings than mac_pre_init, such as
more TX/RX DMA channels, interrupt mitigation and etc.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231101072149.21997-6-pkshih@realtek.com
2023-11-08 20:08:59 +02:00
Ping-Ke Shih
e24ae0f076 wifi: rtw89: pci: add LTR v2 for WiFi 7 chip
PCI LTR (Latency Tolerance Reporting) is a capability to yield expected
power consumption, and we configure the parameters according to design.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231101072149.21997-5-pkshih@realtek.com
2023-11-08 20:08:58 +02:00
Ping-Ke Shih
2daafe9a0c wifi: rtw89: pci: implement PCI mac_pre_init for WiFi 7 chips
Call this function when doing MAC initialization at probe stage. It does
partial initial registers only, because we only need basic ability to
download firmware. The function to clear index is the sub-function,
so set its pointer as well.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231101072149.21997-4-pkshih@realtek.com
2023-11-08 20:08:58 +02:00
Ping-Ke Shih
07fabde630 wifi: rtw89: pci: add PCI generation information to pci_info for each chip
In order to reuse PCI initial and configuration flows, add struct
rtw89_pci_gen_def to abstract the differences between WiFi 6/7 generations.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231101072149.21997-2-pkshih@realtek.com
2023-11-08 20:08:58 +02:00