Commit Graph

4 Commits

Author SHA1 Message Date
Luo Jie
9f93a0a428 clk: qcom: common: commonize qcom_cc_really_probe
The previous wrapper qcom_cc_really_probe takes the platform
device as parameter, which is limited to platform driver.

As for qca8k clock controller driver, which is registered as
the MDIO device, which also follows the qcom clock framework.

To commonize qcom_cc_really_probe, updating it to take the
struct device as parameter, so that the qcom_cc_really_probe
can be utilized by the previous platform device and the new
added MDIO device.

Also update the current clock controller drivers to take
&pdev->dev as parameter when calling qcom_cc_really_probe.

Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://lore.kernel.org/r/20240605124541.2711467-4-quic_luoj@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:04:26 -05:00
Christophe JAILLET
fcd9354ceb clk: qcom: Constify struct pll_vco
pll_vco structure are never modified. They are used as .vco_table in
"struct clk_alpha_pll".

And in this structure, we have:
	const struct pll_vco *vco_table;

Constifying these structures moves some data to a read-only section, so
increase overall security.

On a x86_64, with allmodconfig:
Before:
   text	   data	    bss	    dec	    hex	filename
   9905	  47576	      0	  57481	   e089	drivers/clk/qcom/mmcc-msm8994.o

After:
   text	   data	    bss	    dec	    hex	filename
  10033	  47440	      0	  57473	   e081	drivers/clk/qcom/mmcc-msm8994.o

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/c3c9a75ed77a5ef2e9b72081e88225d84bba91cd.1715359776.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27 11:45:04 -05:00
Konrad Dybcio
3f8d7f490a clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
These values were missing. Add them.

Fixes: 8676fd4f38 ("clk: qcom: add the SM8650 GPU Clock Controller driver")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231219-topic-8650_clks-v1-1-5672bfa0eb05@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-19 14:12:41 -06:00
Neil Armstrong
8676fd4f38 clk: qcom: add the SM8650 GPU Clock Controller driver
Add Graphics Clock Controller (GPUCC) support for SM8650 platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-10-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:11:29 -08:00