Camera PLLs on X1E80100 require both MMCX and MXC rails to be kept ON
to configure the PLLs properly. Hence move runtime power management,
PLL configuration and enabling critical clocks to qcom_cc_really_probe()
which ensures all required power domains are in enabled state before
configuring the PLLs or enabling the clocks.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # Dell Inspiron
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Link: https://lore.kernel.org/r/20250530-videocc-pll-multi-pd-voting-v5-12-02303b3a582d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The Titan TOP GDSC is the parent GDSC for all other GDSCs in the CAMCC
block. None of the subordinate blocks will switch on without the parent
GDSC switched on.
Fixes: 76126a5129 ("clk: qcom: Add camcc clock driver for x1e80100")
Acked-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20241227-b4-linux-next-24-12-16-titan-top-gdsc-v1-1-c96ef62fc307@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The previous wrapper qcom_cc_really_probe takes the platform
device as parameter, which is limited to platform driver.
As for qca8k clock controller driver, which is registered as
the MDIO device, which also follows the qcom clock framework.
To commonize qcom_cc_really_probe, updating it to take the
struct device as parameter, so that the qcom_cc_really_probe
can be utilized by the previous platform device and the new
added MDIO device.
Also update the current clock controller drivers to take
&pdev->dev as parameter when calling qcom_cc_really_probe.
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://lore.kernel.org/r/20240605124541.2711467-4-quic_luoj@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The desired DT pattern for clock indexing is the following:
clocks = <&gcc GCC_CAMERA_AHB_CLK>,
<&bi_tcxo_div2>,
<&bi_tcxo_ao_div2>,
<&sleep_clk>;
In order to facilitate that indexing structure we need to have DT_IFACE
enum defined.
Fixes: 76126a5129 ("clk: qcom: Add camcc clock driver for x1e80100")
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240302-linux-next-24-03-01-simple-clock-fixes-v1-2-25f348a5982b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Instead of magically poking at the bit0 of branch clocks' CBCR, use
the newly introduced helper.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240212-topic-clk_branch_en-v7-2-5b79eb7278b2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
